CoCalc -- pru

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GitHub Repository: Ardupilot/ardupilot
Path: blob/master/Tools/Linux_HAL_Essentials/pru/pwmpru/pru_defs.h
Views: ¹⁸⁰⁰
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#pragma once
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volatile register unsigned int __R31;
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volatile register unsigned int __R30;
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__far volatile char C0[0x300] __attribute__((cregister("C0", far)));
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__far volatile char C26[0x100] __attribute__((cregister("C26", near)));	/* PRUIEP */
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__far volatile char C4[0x100] __attribute__((cregister("C4", near)));	/* PRUCFG */
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#define PRUCFG(_reg) \
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	(*(volatile u32 *)((char *)C4 + (_reg)))
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/* fast access to the registers using the constants */
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#define PRUCFG_REVID	PRUCFG(0x0000)
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#define PRUCFG_SYSCFG	PRUCFG(0x0004)
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#define  SYSCFG_IDLE_MODE_S		0
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#define  SYSCFG_IDLE_MODE_W		2
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#define  SYSCFG_IDLE_MODE_M		((SYSCFG_IDLE_MODE_W - 1) << SYSCFG_IDLE_MODE_S)
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#define  SYSCFG_IDLE_MODE_FORCE		(0 << SYSCFG_IDLE_MODE_S)
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#define  SYSCFG_IDLE_MODE_NO		(1 << SYSCFG_IDLE_MODE_S)
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#define  SYSCFG_IDLE_MODE_SMART		(2 << SYSCFG_IDLE_MODE_S)
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#define  SYSCFG_STANDBY_MODE_S		2
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#define  SYSCFG_STANDBY_MODE_W		2	
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#define  SYSCFG_STANDBY_MODE_M		((SYSCFG_STANDBY_MODE_W - 1) << SYSCFG_STANDBY_MODE_S)
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#define  SYSCFG_STANDBY_MODE_FORCE	(0 << SYSCFG_STANDBY_MODE_S)
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#define  SYSCFG_STANDBY_MODE_NO		(1 << SYSCFG_STANDBY_MODE_S)
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#define  SYSCFG_STANDBY_MODE_SMART	(2 << SYSCFG_STANDBY_MODE_S)
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#define  SYSCFG_STANDBY_INIT		(1 << 4)
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#define  SYSCFG_SUB_MWAIT		(1 << 5)
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#define PRUCFG_SPP	PRUCFG(0x0034)
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#define  SPP_PRU1_PAD_HP_EN		(1 << 0)
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#define  SPP_XFR_SHIFT_EN		(1 << 1)
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#define PRUCFG_GPCFG0	PRUCFG(0x0008)
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#define  CPCFG0_PRU0_GPI_MODE_S		0
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#define  CPCFG0_PRU0_GPI_MODE_W		2
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#define  CPCFG0_PRU0_GPI_MODE_M		((CPCFG0_PRU0_GPI_MODE_W - 1) << CPCFG0_PRU0_GPI_MODE_S)
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#define  CPCFG0_PRU0_GPI_MODE_DIRECT	(0 << CPCFG0_PRU0_GPI_MODE_S)
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#define  CPCFG0_PRU0_GPI_MODE_PARALLEL	(1 << CPCFG0_PRU0_GPI_MODE_S)
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#define  CPCFG0_PRU0_GPI_MODE_SHIFT	(2 << CPCFG0_PRU0_GPI_MODE_S)
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#define  CPCFG0_PRU0_GPI_MODE_MII_RT	(3 << CPCFG0_PRU0_GPI_MODE_S)
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#define  CPCFG0_PRU0_GPI_CLK_MODE	(1 << 2)
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#define  CPCFG0_PRU0_GPI_DIV0_S		3
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#define  CPCFG0_PRU0_GPI_DIV0_W		5
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#define  CPCFG0_PRU0_GPI_DIV0_M		((CPCFG0_PRU0_GPI_DIV0_W - 1) << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_1		(0 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_1_5	(1 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_2		(2 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_2_5	(3 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_3		(4 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_3_5	(5 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_4		(6 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_4_5	(7 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_5		(8 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_5_5	(9 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_6		(10 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_6_5	(11 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_7		(12 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_7_5	(13 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_8		(14 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_8_5	(15 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_9		(16 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_9_5	(17 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_10	(18 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_10_5	(19 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_11	(20 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_11_5	(21 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_12	(22 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_12_5	(23 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_13	(24 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_13_5	(25 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_14	(26 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_14_5	(27 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_15	(28 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_15_5	(29 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV0_16	(30 << CPCFG0_PRU0_GPI_DIV0_S)
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#define  CPCFG0_PRU0_GPI_DIV1_S		8
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#define  CPCFG0_PRU0_GPI_DIV1_W		5
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#define  CPCFG0_PRU0_GPI_DIV1_M		((CPCFG0_PRU0_GPI_DIV1_W - 1) << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_1		(0 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_1_5	(1 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_2		(2 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_2_5	(3 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_3		(4 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_3_5	(5 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_4		(6 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_4_5	(7 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_5		(8 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_5_5	(9 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_6		(10 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_6_5	(11 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_7		(12 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_7_5	(13 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_8		(14 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_8_5	(15 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_9		(16 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_9_5	(17 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_10	(18 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_10_5	(19 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_11	(20 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_11_5	(21 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_12	(22 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_12_5	(23 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_13	(24 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_13_5	(25 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_14	(26 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_14_5	(27 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_15	(28 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_15_5	(29 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_DIV1_16	(30 << CPCFG0_PRU0_GPI_DIV1_S)
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#define  CPCFG0_PRU0_GPI_S8		(1 << 13)
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#define  CPCFG0_PRU0_GPO_MODE		(1 << 14)
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#define  CPCFG0_PRU0_GPO_DIV0_S		15
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#define  CPCFG0_PRU0_GPO_DIV0_W		5
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#define  CPCFG0_PRU0_GPO_DIV0_M		((CPCFG0_PRU0_GPO_DIV0_W - 1) << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_1		(0 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_1_5	(1 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_2		(2 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_2_5	(3 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_3		(4 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_3_5	(5 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_4		(6 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_4_5	(7 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_5		(8 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_5_5	(9 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_6		(10 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_6_5	(11 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_7		(12 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_7_5	(13 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_8		(14 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_8_5	(15 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_9		(16 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_9_5	(17 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_10	(18 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_10_5	(19 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_11	(20 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_11_5	(21 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_12	(22 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_12_5	(23 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_13	(24 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_13_5	(25 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_14	(26 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_14_5	(27 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_15	(28 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_15_5	(29 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV0_16	(30 << CPCFG0_PRU0_GPO_DIV0_S)
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#define  CPCFG0_PRU0_GPO_DIV1_S		20
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#define  CPCFG0_PRU0_GPO_DIV1_W		5
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#define  CPCFG0_PRU0_GPO_DIV1_M		((CPCFG0_PRU0_GPO_DIV1_W - 1) << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_1		(0 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_1_5	(1 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_2		(2 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_2_5	(3 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_3		(4 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_3_5	(5 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_4		(6 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_4_5	(7 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_5		(8 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_5_5	(9 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_6		(10 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_6_5	(11 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_7		(12 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_7_5	(13 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_8		(14 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_8_5	(15 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_9		(16 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_9_5	(17 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_10	(18 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_10_5	(19 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_11	(20 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_11_5	(21 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_12	(22 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_12_5	(23 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_13	(24 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_13_5	(25 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_14	(26 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_14_5	(27 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_15	(28 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_15_5	(29 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_DIV1_16	(30 << CPCFG0_PRU0_GPO_DIV1_S)
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#define  CPCFG0_PRU0_GPO_SH_SE		(1 << 25)
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#define PRUCFG_GPCFG1	PRUCFG(0x000C)
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#define  CPCFG0_PRU1_GPI_MODE_S		0
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#define  CPCFG0_PRU1_GPI_MODE_W		2
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#define  CPCFG0_PRU1_GPI_MODE_M		((CPCFG0_PRU1_GPI_MODE_W - 1) << CPCFG0_PRU1_GPI_MODE_S)
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#define  CPCFG0_PRU1_GPI_MODE_DIRECT	(0 << CPCFG0_PRU1_GPI_MODE_S)
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#define  CPCFG0_PRU1_GPI_MODE_PARALLEL	(1 << CPCFG0_PRU1_GPI_MODE_S)
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#define  CPCFG0_PRU1_GPI_MODE_SHIFT	(2 << CPCFG0_PRU1_GPI_MODE_S)
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#define  CPCFG0_PRU1_GPI_MODE_MII_RT	(3 << CPCFG0_PRU1_GPI_MODE_S)
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#define  CPCFG0_PRU1_GPI_CLK_MODE	(1 << 2)
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#define  CPCFG0_PRU1_GPI_DIV0_S		3
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#define  CPCFG0_PRU1_GPI_DIV0_W		5
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#define  CPCFG0_PRU1_GPI_DIV0_M		((CPCFG0_PRU1_GPI_DIV0_W - 1) << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_1		(0 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_1_5	(1 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_2		(2 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_2_5	(3 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_3		(4 << CPCFG0_PRU1_GPI_DIV0_S)
201
#define  CPCFG0_PRU1_GPI_DIV0_3_5	(5 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_4		(6 << CPCFG0_PRU1_GPI_DIV0_S)
203
#define  CPCFG0_PRU1_GPI_DIV0_4_5	(7 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_5		(8 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_5_5	(9 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_6		(10 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_6_5	(11 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_7		(12 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_7_5	(13 << CPCFG0_PRU1_GPI_DIV0_S)
210
#define  CPCFG0_PRU1_GPI_DIV0_8		(14 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_8_5	(15 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_9		(16 << CPCFG0_PRU1_GPI_DIV0_S)
213
#define  CPCFG0_PRU1_GPI_DIV0_9_5	(17 << CPCFG0_PRU1_GPI_DIV0_S)
214
#define  CPCFG0_PRU1_GPI_DIV0_10	(18 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_10_5	(19 << CPCFG0_PRU1_GPI_DIV0_S)
216
#define  CPCFG0_PRU1_GPI_DIV0_11	(20 << CPCFG0_PRU1_GPI_DIV0_S)
217
#define  CPCFG0_PRU1_GPI_DIV0_11_5	(21 << CPCFG0_PRU1_GPI_DIV0_S)
218
#define  CPCFG0_PRU1_GPI_DIV0_12	(22 << CPCFG0_PRU1_GPI_DIV0_S)
219
#define  CPCFG0_PRU1_GPI_DIV0_12_5	(23 << CPCFG0_PRU1_GPI_DIV0_S)
220
#define  CPCFG0_PRU1_GPI_DIV0_13	(24 << CPCFG0_PRU1_GPI_DIV0_S)
221
#define  CPCFG0_PRU1_GPI_DIV0_13_5	(25 << CPCFG0_PRU1_GPI_DIV0_S)
222
#define  CPCFG0_PRU1_GPI_DIV0_14	(26 << CPCFG0_PRU1_GPI_DIV0_S)
223
#define  CPCFG0_PRU1_GPI_DIV0_14_5	(27 << CPCFG0_PRU1_GPI_DIV0_S)
224
#define  CPCFG0_PRU1_GPI_DIV0_15	(28 << CPCFG0_PRU1_GPI_DIV0_S)
225
#define  CPCFG0_PRU1_GPI_DIV0_15_5	(29 << CPCFG0_PRU1_GPI_DIV0_S)
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#define  CPCFG0_PRU1_GPI_DIV0_16	(30 << CPCFG0_PRU1_GPI_DIV0_S)
227
#define  CPCFG0_PRU1_GPI_DIV1_S		8
228
#define  CPCFG0_PRU1_GPI_DIV1_W		5
229
#define  CPCFG0_PRU1_GPI_DIV1_M		((CPCFG0_PRU1_GPI_DIV1_W - 1) << CPCFG0_PRU1_GPI_DIV1_S)
230
#define  CPCFG0_PRU1_GPI_DIV1_1		(0 << CPCFG0_PRU1_GPI_DIV1_S)
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#define  CPCFG0_PRU1_GPI_DIV1_1_5	(1 << CPCFG0_PRU1_GPI_DIV1_S)
232
#define  CPCFG0_PRU1_GPI_DIV1_2		(2 << CPCFG0_PRU1_GPI_DIV1_S)
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#define  CPCFG0_PRU1_GPI_DIV1_2_5	(3 << CPCFG0_PRU1_GPI_DIV1_S)
234
#define  CPCFG0_PRU1_GPI_DIV1_3		(4 << CPCFG0_PRU1_GPI_DIV1_S)
235
#define  CPCFG0_PRU1_GPI_DIV1_3_5	(5 << CPCFG0_PRU1_GPI_DIV1_S)
236
#define  CPCFG0_PRU1_GPI_DIV1_4		(6 << CPCFG0_PRU1_GPI_DIV1_S)
237
#define  CPCFG0_PRU1_GPI_DIV1_4_5	(7 << CPCFG0_PRU1_GPI_DIV1_S)
238
#define  CPCFG0_PRU1_GPI_DIV1_5		(8 << CPCFG0_PRU1_GPI_DIV1_S)
239
#define  CPCFG0_PRU1_GPI_DIV1_5_5	(9 << CPCFG0_PRU1_GPI_DIV1_S)
240
#define  CPCFG0_PRU1_GPI_DIV1_6		(10 << CPCFG0_PRU1_GPI_DIV1_S)
241
#define  CPCFG0_PRU1_GPI_DIV1_6_5	(11 << CPCFG0_PRU1_GPI_DIV1_S)
242
#define  CPCFG0_PRU1_GPI_DIV1_7		(12 << CPCFG0_PRU1_GPI_DIV1_S)
243
#define  CPCFG0_PRU1_GPI_DIV1_7_5	(13 << CPCFG0_PRU1_GPI_DIV1_S)
244
#define  CPCFG0_PRU1_GPI_DIV1_8		(14 << CPCFG0_PRU1_GPI_DIV1_S)
245
#define  CPCFG0_PRU1_GPI_DIV1_8_5	(15 << CPCFG0_PRU1_GPI_DIV1_S)
246
#define  CPCFG0_PRU1_GPI_DIV1_9		(16 << CPCFG0_PRU1_GPI_DIV1_S)
247
#define  CPCFG0_PRU1_GPI_DIV1_9_5	(17 << CPCFG0_PRU1_GPI_DIV1_S)
248
#define  CPCFG0_PRU1_GPI_DIV1_10	(18 << CPCFG0_PRU1_GPI_DIV1_S)
249
#define  CPCFG0_PRU1_GPI_DIV1_10_5	(19 << CPCFG0_PRU1_GPI_DIV1_S)
250
#define  CPCFG0_PRU1_GPI_DIV1_11	(20 << CPCFG0_PRU1_GPI_DIV1_S)
251
#define  CPCFG0_PRU1_GPI_DIV1_11_5	(21 << CPCFG0_PRU1_GPI_DIV1_S)
252
#define  CPCFG0_PRU1_GPI_DIV1_12	(22 << CPCFG0_PRU1_GPI_DIV1_S)
253
#define  CPCFG0_PRU1_GPI_DIV1_12_5	(23 << CPCFG0_PRU1_GPI_DIV1_S)
254
#define  CPCFG0_PRU1_GPI_DIV1_13	(24 << CPCFG0_PRU1_GPI_DIV1_S)
255
#define  CPCFG0_PRU1_GPI_DIV1_13_5	(25 << CPCFG0_PRU1_GPI_DIV1_S)
256
#define  CPCFG0_PRU1_GPI_DIV1_14	(26 << CPCFG0_PRU1_GPI_DIV1_S)
257
#define  CPCFG0_PRU1_GPI_DIV1_14_5	(27 << CPCFG0_PRU1_GPI_DIV1_S)
258
#define  CPCFG0_PRU1_GPI_DIV1_15	(28 << CPCFG0_PRU1_GPI_DIV1_S)
259
#define  CPCFG0_PRU1_GPI_DIV1_15_5	(29 << CPCFG0_PRU1_GPI_DIV1_S)
260
#define  CPCFG0_PRU1_GPI_DIV1_16	(30 << CPCFG0_PRU1_GPI_DIV1_S)
261
#define  CPCFG0_PRU1_GPI_S8		(1 << 13)
262
#define  CPCFG0_PRU1_GPO_MODE		(1 << 14)
263
#define  CPCFG0_PRU1_GPO_DIV0_S		15
264
#define  CPCFG0_PRU1_GPO_DIV0_W		5
265
#define  CPCFG0_PRU1_GPO_DIV0_M		((CPCFG0_PRU1_GPO_DIV0_W - 1) << CPCFG0_PRU1_GPO_DIV0_S)
266
#define  CPCFG0_PRU1_GPO_DIV0_1		(0 << CPCFG0_PRU1_GPO_DIV0_S)
267
#define  CPCFG0_PRU1_GPO_DIV0_1_5	(1 << CPCFG0_PRU1_GPO_DIV0_S)
268
#define  CPCFG0_PRU1_GPO_DIV0_2		(2 << CPCFG0_PRU1_GPO_DIV0_S)
269
#define  CPCFG0_PRU1_GPO_DIV0_2_5	(3 << CPCFG0_PRU1_GPO_DIV0_S)
270
#define  CPCFG0_PRU1_GPO_DIV0_3		(4 << CPCFG0_PRU1_GPO_DIV0_S)
271
#define  CPCFG0_PRU1_GPO_DIV0_3_5	(5 << CPCFG0_PRU1_GPO_DIV0_S)
272
#define  CPCFG0_PRU1_GPO_DIV0_4		(6 << CPCFG0_PRU1_GPO_DIV0_S)
273
#define  CPCFG0_PRU1_GPO_DIV0_4_5	(7 << CPCFG0_PRU1_GPO_DIV0_S)
274
#define  CPCFG0_PRU1_GPO_DIV0_5		(8 << CPCFG0_PRU1_GPO_DIV0_S)
275
#define  CPCFG0_PRU1_GPO_DIV0_5_5	(9 << CPCFG0_PRU1_GPO_DIV0_S)
276
#define  CPCFG0_PRU1_GPO_DIV0_6		(10 << CPCFG0_PRU1_GPO_DIV0_S)
277
#define  CPCFG0_PRU1_GPO_DIV0_6_5	(11 << CPCFG0_PRU1_GPO_DIV0_S)
278
#define  CPCFG0_PRU1_GPO_DIV0_7		(12 << CPCFG0_PRU1_GPO_DIV0_S)
279
#define  CPCFG0_PRU1_GPO_DIV0_7_5	(13 << CPCFG0_PRU1_GPO_DIV0_S)
280
#define  CPCFG0_PRU1_GPO_DIV0_8		(14 << CPCFG0_PRU1_GPO_DIV0_S)
281
#define  CPCFG0_PRU1_GPO_DIV0_8_5	(15 << CPCFG0_PRU1_GPO_DIV0_S)
282
#define  CPCFG0_PRU1_GPO_DIV0_9		(16 << CPCFG0_PRU1_GPO_DIV0_S)
283
#define  CPCFG0_PRU1_GPO_DIV0_9_5	(17 << CPCFG0_PRU1_GPO_DIV0_S)
284
#define  CPCFG0_PRU1_GPO_DIV0_10	(18 << CPCFG0_PRU1_GPO_DIV0_S)
285
#define  CPCFG0_PRU1_GPO_DIV0_10_5	(19 << CPCFG0_PRU1_GPO_DIV0_S)
286
#define  CPCFG0_PRU1_GPO_DIV0_11	(20 << CPCFG0_PRU1_GPO_DIV0_S)
287
#define  CPCFG0_PRU1_GPO_DIV0_11_5	(21 << CPCFG0_PRU1_GPO_DIV0_S)
288
#define  CPCFG0_PRU1_GPO_DIV0_12	(22 << CPCFG0_PRU1_GPO_DIV0_S)
289
#define  CPCFG0_PRU1_GPO_DIV0_12_5	(23 << CPCFG0_PRU1_GPO_DIV0_S)
290
#define  CPCFG0_PRU1_GPO_DIV0_13	(24 << CPCFG0_PRU1_GPO_DIV0_S)
291
#define  CPCFG0_PRU1_GPO_DIV0_13_5	(25 << CPCFG0_PRU1_GPO_DIV0_S)
292
#define  CPCFG0_PRU1_GPO_DIV0_14	(26 << CPCFG0_PRU1_GPO_DIV0_S)
293
#define  CPCFG0_PRU1_GPO_DIV0_14_5	(27 << CPCFG0_PRU1_GPO_DIV0_S)
294
#define  CPCFG0_PRU1_GPO_DIV0_15	(28 << CPCFG0_PRU1_GPO_DIV0_S)
295
#define  CPCFG0_PRU1_GPO_DIV0_15_5	(29 << CPCFG0_PRU1_GPO_DIV0_S)
296
#define  CPCFG0_PRU1_GPO_DIV0_16	(30 << CPCFG0_PRU1_GPO_DIV0_S)
297
#define  CPCFG0_PRU1_GPO_DIV1_S		20
298
#define  CPCFG0_PRU1_GPO_DIV1_W		5
299
#define  CPCFG0_PRU1_GPO_DIV1_M		((CPCFG0_PRU1_GPO_DIV1_W - 1) << CPCFG0_PRU1_GPO_DIV1_S)
300
#define  CPCFG0_PRU1_GPO_DIV1_1		(0 << CPCFG0_PRU1_GPO_DIV1_S)
301
#define  CPCFG0_PRU1_GPO_DIV1_1_5	(1 << CPCFG0_PRU1_GPO_DIV1_S)
302
#define  CPCFG0_PRU1_GPO_DIV1_2		(2 << CPCFG0_PRU1_GPO_DIV1_S)
303
#define  CPCFG0_PRU1_GPO_DIV1_2_5	(3 << CPCFG0_PRU1_GPO_DIV1_S)
304
#define  CPCFG0_PRU1_GPO_DIV1_3		(4 << CPCFG0_PRU1_GPO_DIV1_S)
305
#define  CPCFG0_PRU1_GPO_DIV1_3_5	(5 << CPCFG0_PRU1_GPO_DIV1_S)
306
#define  CPCFG0_PRU1_GPO_DIV1_4		(6 << CPCFG0_PRU1_GPO_DIV1_S)
307
#define  CPCFG0_PRU1_GPO_DIV1_4_5	(7 << CPCFG0_PRU1_GPO_DIV1_S)
308
#define  CPCFG0_PRU1_GPO_DIV1_5		(8 << CPCFG0_PRU1_GPO_DIV1_S)
309
#define  CPCFG0_PRU1_GPO_DIV1_5_5	(9 << CPCFG0_PRU1_GPO_DIV1_S)
310
#define  CPCFG0_PRU1_GPO_DIV1_6		(10 << CPCFG0_PRU1_GPO_DIV1_S)
311
#define  CPCFG0_PRU1_GPO_DIV1_6_5	(11 << CPCFG0_PRU1_GPO_DIV1_S)
312
#define  CPCFG0_PRU1_GPO_DIV1_7		(12 << CPCFG0_PRU1_GPO_DIV1_S)
313
#define  CPCFG0_PRU1_GPO_DIV1_7_5	(13 << CPCFG0_PRU1_GPO_DIV1_S)
314
#define  CPCFG0_PRU1_GPO_DIV1_8		(14 << CPCFG0_PRU1_GPO_DIV1_S)
315
#define  CPCFG0_PRU1_GPO_DIV1_8_5	(15 << CPCFG0_PRU1_GPO_DIV1_S)
316
#define  CPCFG0_PRU1_GPO_DIV1_9		(16 << CPCFG0_PRU1_GPO_DIV1_S)
317
#define  CPCFG0_PRU1_GPO_DIV1_9_5	(17 << CPCFG0_PRU1_GPO_DIV1_S)
318
#define  CPCFG0_PRU1_GPO_DIV1_10	(18 << CPCFG0_PRU1_GPO_DIV1_S)
319
#define  CPCFG0_PRU1_GPO_DIV1_10_5	(19 << CPCFG0_PRU1_GPO_DIV1_S)
320
#define  CPCFG0_PRU1_GPO_DIV1_11	(20 << CPCFG0_PRU1_GPO_DIV1_S)
321
#define  CPCFG0_PRU1_GPO_DIV1_11_5	(21 << CPCFG0_PRU1_GPO_DIV1_S)
322
#define  CPCFG0_PRU1_GPO_DIV1_12	(22 << CPCFG0_PRU1_GPO_DIV1_S)
323
#define  CPCFG0_PRU1_GPO_DIV1_12_5	(23 << CPCFG0_PRU1_GPO_DIV1_S)
324
#define  CPCFG0_PRU1_GPO_DIV1_13	(24 << CPCFG0_PRU1_GPO_DIV1_S)
325
#define  CPCFG0_PRU1_GPO_DIV1_13_5	(25 << CPCFG0_PRU1_GPO_DIV1_S)
326
#define  CPCFG0_PRU1_GPO_DIV1_14	(26 << CPCFG0_PRU1_GPO_DIV1_S)
327
#define  CPCFG0_PRU1_GPO_DIV1_14_5	(27 << CPCFG0_PRU1_GPO_DIV1_S)
328
#define  CPCFG0_PRU1_GPO_DIV1_15	(28 << CPCFG0_PRU1_GPO_DIV1_S)
329
#define  CPCFG0_PRU1_GPO_DIV1_15_5	(29 << CPCFG0_PRU1_GPO_DIV1_S)
330
#define  CPCFG0_PRU1_GPO_DIV1_16	(30 << CPCFG0_PRU1_GPO_DIV1_S)
331
#define  CPCFG0_PRU1_GPO_SH_SE		(1 << 25)
332

333
#define PRUCFG_CGR	PRUCFG(0x0010)
334

335
#define PRUCFG_ISRP	PRUCFG(0x0014)
336

337
#define PRUCFG_ISP	PRUCFG(0x0018)
338

339
#define PRUCFG_IESP	PRUCFG(0x001C)
340

341
#define PRUCFG_PMAO	PRUCFG(0x0028)
342
#define  PMAO_PMAO_PRU0		(1 << 0)
343
#define  PMAO_PMAO_PRU1		(1 << 1)
344

345
#define PRUCFG_MII_RT	PRUCFG(0x002C)
346

347
#define PRUCFG_IEPCLK	PRUCFG(0x0030)
348

349
#define PRUCFG_PINMX	PRUCFG(0x0040)
350

351
#define PINTC(_reg) \
352
	(*(volatile u32 *)((char *)C0 + (_reg)))
353

354
#define PINTC_REVID		PINTC(0x0000)
355
#define PINTC_CR		PINTC(0x0004)
356
#define PINTC_GER		PINTC(0x0010)
357
#define PINTC_GNLR		PINTC(0x001C)
358
#define PINTC_SISR		PINTC(0x0020)
359
#define PINTC_SICR		PINTC(0x0024)
360
#define PINTC_EISR		PINTC(0x0028)
361
#define PINTC_EICR		PINTC(0x002C)
362
#define PINTC_HIEISR		PINTC(0x0034)
363
#define PINTC_HIDISR		PINTC(0x0038)
364
#define PINTC_GPIR		PINTC(0x0080)
365
#define PINTC_SRSR0		PINTC(0x0200)
366
#define PINTC_SRSR1		PINTC(0x0204)
367
#define PINTC_SECR0		PINTC(0x0280)
368
#define PINTC_SECR1		PINTC(0x0284)
369
#define PINTC_ESR0		PINTC(0x0300)
370
#define PINTC_ESR1		PINTC(0x0304)
371
#define PINTC_ECR0		PINTC(0x0380)
372
#define PINTC_ECR1		PINTC(0x0384)
373
#define PINTC_CMR0		PINTC(0x0400)
374
#define PINTC_CMR1		PINTC(0x0404)
375
#define PINTC_CMR2		PINTC(0x0408)
376
#define PINTC_CMR3		PINTC(0x040C)
377
#define PINTC_CMR4		PINTC(0x0410)
378
#define PINTC_CMR5		PINTC(0x0414)
379
#define PINTC_CMR6		PINTC(0x0418)
380
#define PINTC_CMR7		PINTC(0x041C)
381
#define PINTC_CMR8		PINTC(0x0420)
382
#define PINTC_CMR9		PINTC(0x0424)
383
#define PINTC_CMR10		PINTC(0x0428)
384
#define PINTC_CMR11		PINTC(0x042C)
385
#define PINTC_CMR12		PINTC(0x0430)
386
#define PINTC_CMR13		PINTC(0x0434)
387
#define PINTC_CMR14		PINTC(0x0438)
388
#define PINTC_CMR15		PINTC(0x043C)
389
#define PINTC_HMR0		PINTC(0x0800)
390
#define PINTC_HMR1		PINTC(0x0804)
391
#define PINTC_HMR2		PINTC(0x0808)
392
#define PINTC_HIPIR0		PINTC(0x0900)
393
#define PINTC_HIPIR1		PINTC(0x0904)
394
#define PINTC_HIPIR2		PINTC(0x0908)
395
#define PINTC_HIPIR3		PINTC(0x090C)
396
#define PINTC_HIPIR4		PINTC(0x0910)
397
#define PINTC_HIPIR5		PINTC(0x0914)
398
#define PINTC_HIPIR6		PINTC(0x0918)
399
#define PINTC_HIPIR7		PINTC(0x091C)
400
#define PINTC_HIPIR8		PINTC(0x0920)
401
#define PINTC_HIPIR9		PINTC(0x0924)
402
#define PINTC_SIPR0		PINTC(0x0D00)
403
#define PINTC_SIPR1		PINTC(0x0D04)
404
#define PINTC_SITR0		PINTC(0x0D80)
405
#define PINTC_SITR1		PINTC(0x0D84)
406
#define PINTC_HINLR0		PINTC(0x1100)
407
#define PINTC_HINLR1		PINTC(0x1104)
408
#define PINTC_HINLR2		PINTC(0x1108)
409
#define PINTC_HINLR3		PINTC(0x110C)
410
#define PINTC_HINLR4		PINTC(0x1110)
411
#define PINTC_HINLR5		PINTC(0x1114)
412
#define PINTC_HINLR6		PINTC(0x1118)
413
#define PINTC_HINLR7		PINTC(0x111C)
414
#define PINTC_HINLR8		PINTC(0x1120)
415
#define PINTC_HINLR9		PINTC(0x1124)
416
#define PINTC_HIER		PINTC(0x1500)
417

418
/* PRU Industrial Ethernet Peripheral */
419
#define PIEP(_reg) \
420
	(*(volatile u32 *)((char *)C26 + (_reg)))
421

422
#define PIEP_GLOBAL_CFG		PIEP(0x0000)
423
#define  GLOBAL_CFG_CNT_ENABLE		(1 << 0)
424
#define  GLOBAL_CFG_DEFAULT_INC_S	4
425
#define  GLOBAL_CFG_DEFAULT_INC_W	4
426
#define  GLOBAL_CFG_DEFAULT_INC_M	((GLOBAL_CFG_DEFAULT_INC_W - 1) << GLOBAL_CFG_DEFAULT_INC_S)
427
#define  GLOBAL_CFG_DEFAULT_INC(x)	(((x) << GLOBAL_CFG_DEFAULT_INC_S) & GLOBAL_CFG_DEFAULT_INC_M)
428
#define  GLOBAL_CFG_CMP_INC_S		8
429
#define  GLOBAL_CFG_CMP_INC_W		12
430
#define  GLOBAL_CFG_CMP_INC_M		((GLOBAL_CFG_CMP_INC_W - 1) << GLOBAL_CFG_CMP_INC_S)
431
#define  GLOBAL_CFG_CMP_INC(x)		(((x) << GLOBAL_CFG_CMP_INC_S) & GLOBAL_CFG_CMP_INC_M)
432

433
#define PIEP_GLOBAL_STATUS	PIEP(0x0004)
434
#define  GLOBAL_STATUS_CNT_OVF		(1 << 0)
435

436
#define PIEP_COMPEN		PIEP(0x0008)
437
#define PIEP_COUNT		PIEP(0x000C)
438
#define PIEP_CMP_CFG		PIEP(0x0040)
439
#define  CMP_CFG_CMP0_RST_CNT_EN	(1 << 0)
440
#define  CMP_CFG_CMP_EN_S		1
441
#define  CMP_CFG_CMP_EN_W		8
442
#define  CMP_CFG_CMP_EN_M		((CMP_CFG_CMP_EN_W - 1) << CMP_CFG_CMP_EN_S)
443
#define  CMP_CFG_CMP_EN(x)		((1 << ((x) + CMP_CFG_CMP_EN_S)) & CMP_CFG_CMP_EN_M)
444

445
#define PIEP_CMP_STATUS		PIEP(0x0044)
446
#define  CMD_STATUS_CMP_HIT_S		0
447
#define  CMD_STATUS_CMP_HIT_W		8
448
#define  CMD_STATUS_CMP_HIT_M		((CMD_STATUS_CMP_HIT_W - 1) << CMD_STATUS_CMP_HIT_S)
449
#define  CMD_STATUS_CMP_HIT(x)		((1 << ((x) + CMD_STATUS_CMP_HIT_S)) & CMD_STATUS_CMP_HIT_M)
450

451
#define PIEP_CMP_CMP0		PIEP(0x0048)
452
#define PIEP_CMP_CMP1		PIEP(0x004C)
453
#define PIEP_CMP_CMP2		PIEP(0x0050)
454
#define PIEP_CMP_CMP3		PIEP(0x0054)
455
#define PIEP_CMP_CMP4		PIEP(0x0058)
456
#define PIEP_CMP_CMP5		PIEP(0x005C)
457
#define PIEP_CMP_CMP6		PIEP(0x0060)
458
#define PIEP_CMP_CMP7		PIEP(0x0064)
459
#define PIEP_CMP_CMP(x)		PIEP(0x0048 + ((x) << 2))
460

461
#if defined(PRU0) || defined(PRU1)
462

463
#ifdef PRU0
464
#define PCTRL(_reg) \
465
	(*(volatile u32 *)((char *)0x22000 + (_reg)))
466
#define PCTRL_OTHER(_reg) \
467
	(*(volatile u32 *)((char *)0x24000 + (_reg)))
468
#else
469
#define PCTRL(_reg) \
470
	(*(volatile u32 *)((char *)0x24000 + (_reg)))
471
#define PCTRL_OTHER(_reg) \
472
	(*(volatile u32 *)((char *)0x22000 + (_reg)))
473
#endif
474

475
#define PCTRL_CONTROL		PCTRL(0x0000)
476
#define  CONTROL_SOFT_RST_N	(1 << 0)
477
#define  CONTROL_ENABLE		(1 << 1)
478
#define  CONTROL_SLEEPING	(1 << 2)
479
#define  CONTROL_COUNTER_ENABLE	(1 << 3)
480
#define  CONTROL_SINGLE_STEP	(1 << 8)
481
#define  CONTROL_RUNSTATE	(1 << 15)
482
#define PCTRL_STATUS		PCTRL(0x0004)
483
#define PCTRL_WAKEUP_EN		PCTRL(0x0008)
484
#define PCTRL_CYCLE		PCTRL(0x000C)
485
#define PCTRL_STALL		PCTRL(0x0010)
486
#define PCTRL_CTBIR0		PCTRL(0x0020)
487
#define PCTRL_CTBIR1		PCTRL(0x0024)
488
#define PCTRL_CTPPR0		PCTRL(0x0028)
489
#define PCTRL_CTPPR1		PCTRL(0x002C)
490

491
/* we can't access our debug registers (since we have to be stopped) */
492
#ifdef PRU0
493
#define PDBG_OTHER(_reg) \
494
	(*(volatile u32 *)((char *)0x24400 + (_reg)))
495
#else
496
#define PDBG_OTHER(_reg) \
497
	(*(volatile u32 *)((char *)0x22400 + (_reg)))
498
#endif
499

500
#endif
501

502
/* secondary access by C28 (which must point to 0x20200 */
503
#define PINTC_0200(_reg) \
504
	(*(volatile u32 *)((char *)C28 + ((_reg) - 0x200)))
505

506
#define SIGNAL_EVENT(x) \
507
	do { \
508
		__R31 = (1 << 5) | ((x) - 16); \
509
	} while(0)
510

511

512
#ifndef PRU_CLK
513
/* default PRU clock (200MHz) */
514
#define PRU_CLK	200000000
515
#endif
516

517
/* NOTE: Do no use it for larger than 5 secs */
518
#define PRU_200MHz_sec(x)	((u32)(((x) * 200000000)))
519
#define PRU_200MHz_ms(x)	((u32)(((x) * 200000)))
520
#define PRU_200MHz_ms_err(x)	0
521
#define PRU_200MHz_us(x)	((u32)(((x) * 200)))
522
#define PRU_200MHz_us_err(x)	0
523
#define PRU_200MHz_ns(x)	((u32)(((x) * 2) / 10))
524
#define PRU_200MHz_ns_err(x)	((u32)(((x) * 2) % 10))
525

526
#if PRU_CLK != 200000000 
527
/* NOTE: Do no use it for larger than 5 secs */
528
#define PRU_sec(x)	((u32)(((u64)(x) * PRU_CLK)))
529
#define PRU_ms(x)	((u32)(((u64)(x) * PRU_CLK) / 1000))
530
#define PRU_ms_err(x)	((u32)(((u64)(x) * PRU_CLK) % 1000))
531
#define PRU_us(x)	((u32)(((u64)(x) * PRU_CLK) / 1000000))
532
#define PRU_us_err(x)	((u32)(((u64)(x) * PRU_CLK) % 1000000))
533
#define PRU_ns(x)	((u32)(((u64)(x) * PRU_CLK) / 1000000000))
534
#define PRU_ns_err(x)	((u32)(((u64)(x) * PRU_CLK) % 1000000000))
535
#else
536
/* NOTE: Do no use it for larger than 5 secs */
537
#define PRU_sec(x)	PRU_200MHz_sec(x)
538
#define PRU_ms(x)	PRU_200MHz_ms(x)
539
#define PRU_ms_err(x)	PRU_200MHz_ms_err(x)
540
#define PRU_us(x)	PRU_200MHz_us(x)
541
#define PRU_us_err(x)	PRU_200MHz_us_err(x)
542
#define PRU_ns(x)	PRU_200MHz_ns(x)
543
#define PRU_ns_err(x)	PRU_200MHz_ns_err(x)
544
#endif
545

546
#define DPRAM_SHARED	0x00010000
547

548
/* event definitions */
549
#define SYSEV_ARM_TO_PRU0	21
550
#define SYSEV_ARM_TO_PRU1	22
551
#define SYSEV_PRU0_TO_ARM	19
552
#define SYSEV_PRU0_TO_PRU1	17
553
#define SYSEV_PRU1_TO_ARM	20
554
#define SYSEV_PRU1_TO_PRU0	19
555

556
/* for communication with the host we have another set of events */
557
#define SYSEV_VR_ARM_TO_PRU0	24
558
#define SYSEV_VR_PRU0_TO_ARM	25
559
#define SYSEV_VR_ARM_TO_PRU1	26
560
#define SYSEV_VR_PRU1_TO_ARM	27
561

562
#define pru0_signal() (__R31 & (1U << 30))
563
#define pru1_signal() (__R31 & (1U << 31))
564

565
#ifdef PRU0
566
#define pru_signal()	pru0_signal()
567
#define SYSEV_OTHER_PRU_TO_THIS_PRU	SYSEV_PRU1_TO_PRU0
568
#define SYSEV_ARM_TO_THIS_PRU		SYSEV_ARM_TO_PRU0
569
#define SYSEV_THIS_PRU_TO_OTHER_PRU	SYSEV_PRU0_TO_PRU1
570
#define SYSEV_THIS_PRU_TO_ARM		SYSEV_PRU0_TO_ARM
571
#define SYSEV_VR_ARM_TO_THIS_PRU	SYSEV_VR_ARM_TO_PRU0
572
#define SYSEV_VR_THIS_PRU_TO_ARM	SYSEV_VR_PRU0_TO_ARM
573
#endif
574

575
#ifdef PRU1
576
#define pru_signal()	pru1_signal()
577
#define SYSEV_OTHER_PRU_TO_THIS_PRU	SYSEV_PRU0_TO_PRU1
578
#define SYSEV_ARM_TO_THIS_PRU		SYSEV_ARM_TO_PRU1
579
#define SYSEV_THIS_PRU_TO_OTHER_PRU	SYSEV_PRU1_TO_PRU0
580
#define SYSEV_THIS_PRU_TO_ARM		SYSEV_PRU1_TO_ARM
581
#define SYSEV_VR_ARM_TO_THIS_PRU	SYSEV_VR_ARM_TO_PRU1
582
#define SYSEV_VR_THIS_PRU_TO_ARM	SYSEV_VR_PRU1_TO_ARM
583
#endif
584

585
/* all events < 32 */
586
#define SYSEV_THIS_PRU_INCOMING_MASK	\
587
	(BIT(SYSEV_ARM_TO_THIS_PRU) | \
588
	 BIT(SYSEV_OTHER_PRU_TO_THIS_PRU) | \
589
	 BIT(SYSEV_VR_ARM_TO_THIS_PRU))
590

591
#define DELAY_CYCLES(x) \
592
	do { \
593
		unsigned int t = (x) >> 1; \
594
		do { \
595
			__asm(" "); \
596
		} while (--t); \
597
	} while(0)
598

599
#ifndef BIT
600
#define BIT(x) (1U << (x))
601
#endif
602

603
/* access to the resources of the other PRU (halt it and have your way) */
604
#if defined(PRU0) || defined(PRU1)
605

606
static inline void pru_other_halt(void)
607
{
608
	PCTRL_OTHER(0x0000) &= ~CONTROL_ENABLE;	/* clear enable */
609
	/* loop until RUNSTATE clears */
610
	while ((PCTRL_OTHER(0x0000) & CONTROL_RUNSTATE) != 0)
611
		;
612
}
613

614
static inline void pru_other_resume(void)
615
{
616
	PCTRL_OTHER(0x0000) |= CONTROL_ENABLE;	/* set enable */
617
}
618

619
static inline u32 pru_other_read_reg(u16 reg)
620
{
621
	u32 val;
622

623
	reg <<= 2;	/* multiply by 4 */
624
	pru_other_halt();
625
	val = PDBG_OTHER(reg);
626
	pru_other_resume();
627
	return val;
628
}
629

630
static inline void pru_other_write_reg(u16 reg, u32 val)
631
{
632
	reg <<= 2;	/* multiply by 4 */
633
	pru_other_halt();
634
	PDBG_OTHER(reg) = val;
635
	pru_other_resume();
636
}
637

638
static inline void pru_other_and_or_reg(u16 reg, u32 andmsk, u32 ormsk)
639
{
640
	reg <<= 2;	/* multiply by 4 */
641
	pru_other_halt();
642
	PDBG_OTHER(reg) = (PDBG_OTHER(reg) & andmsk) | ormsk;
643
	pru_other_resume();
644
}
645

646
#endif
647

648
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