Path: blob/master/Utilities/cmlibrhash/librhash/byte_order.h
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/* byte_order.h */1#ifndef BYTE_ORDER_H2#define BYTE_ORDER_H3#include "ustd.h"4#include <stdlib.h>56#if 07#if defined(__GLIBC__)8# include <endian.h>9#endif10#endif1112#if defined(__FreeBSD__) || defined(__DragonFly__) || defined(__APPLE__)13# include <sys/types.h>14#elif defined (__NetBSD__) || defined(__OpenBSD__)15# include <sys/param.h>16#endif171819#ifdef __cplusplus20extern "C" {21#endif2223/* if x86 compatible cpu */24#if defined(i386) || defined(__i386__) || defined(__i486__) || \25defined(__i586__) || defined(__i686__) || defined(__pentium__) || \26defined(__pentiumpro__) || defined(__pentium4__) || \27defined(__nocona__) || defined(prescott) || defined(__core2__) || \28defined(__k6__) || defined(__k8__) || defined(__athlon__) || \29defined(__amd64) || defined(__amd64__) || \30defined(__x86_64) || defined(__x86_64__) || defined(_M_IX86) || \31defined(_M_AMD64) || defined(_M_IA64) || defined(_M_X64)32/* detect if x86-64 instruction set is supported */33# if defined(_LP64) || defined(__LP64__) || defined(__x86_64) || \34defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)35# define CPU_X6436# else37# define CPU_IA3238# endif39#endif4041#include <cm3p/kwiml/abi.h>42#if KWIML_ABI_ENDIAN_ID == KWIML_ABI_ENDIAN_ID_LITTLE43# define CPU_LITTLE_ENDIAN44# define IS_BIG_ENDIAN 045# define IS_LITTLE_ENDIAN 146#elif KWIML_ABI_ENDIAN_ID == KWIML_ABI_ENDIAN_ID_BIG47# define CPU_BIG_ENDIAN48# define IS_BIG_ENDIAN 149# define IS_LITTLE_ENDIAN 050#endif5152#if 053#define RHASH_BYTE_ORDER_LE 123454#define RHASH_BYTE_ORDER_BE 43215556#if (defined(__BYTE_ORDER) && defined(__LITTLE_ENDIAN) && __BYTE_ORDER == __LITTLE_ENDIAN) || \57(defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)58# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE59#elif (defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) && __BYTE_ORDER == __BIG_ENDIAN) || \60(defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)61# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE62#elif defined(_BYTE_ORDER)63# if defined(_LITTLE_ENDIAN) && (_BYTE_ORDER == _LITTLE_ENDIAN)64# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE65# elif defined(_BIG_ENDIAN) && (_BYTE_ORDER == _BIG_ENDIAN)66# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE67# endif68#elif defined(__sun) && defined(_LITTLE_ENDIAN)69# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE70#elif defined(__sun) && defined(_BIG_ENDIAN)71# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE72#endif7374/* try detecting endianness by CPU */75#ifdef RHASH_BYTE_ORDER76#elif defined(CPU_IA32) || defined(CPU_X64) || defined(__ia64) || defined(__ia64__) || \77defined(__alpha__) || defined(_M_ALPHA) || defined(vax) || defined(MIPSEL) || \78defined(_ARM_) || defined(__arm__) || defined(_M_ARM64) || defined(_M_ARM64EC) || \79defined(__loongarch64) || defined(__sw_64)80# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE81#elif defined(__sparc) || defined(__sparc__) || defined(sparc) || \82defined(_ARCH_PPC) || defined(_ARCH_PPC64) || defined(_POWER) || \83defined(__POWERPC__) || defined(POWERPC) || defined(__powerpc) || \84defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || \85defined(__hpux) || defined(_MIPSEB) || defined(mc68000) || \86defined(__s390__) || defined(__s390x__) || defined(sel) || defined(__hppa__)87# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE88#else89# error "Can't detect CPU architechture"90#endif9192#define IS_BIG_ENDIAN (RHASH_BYTE_ORDER == RHASH_BYTE_ORDER_BE)93#define IS_LITTLE_ENDIAN (RHASH_BYTE_ORDER == RHASH_BYTE_ORDER_LE)94#endif9596#ifndef __has_builtin97# define __has_builtin(x) 098#endif99100#define IS_ALIGNED_32(p) (0 == (3 & (uintptr_t)(p)))101#define IS_ALIGNED_64(p) (0 == (7 & (uintptr_t)(p)))102103#if defined(_MSC_VER)104#define ALIGN_ATTR(n) __declspec(align(n))105#elif defined(__GNUC__)106#define ALIGN_ATTR(n) __attribute__((aligned (n)))107#else108#define ALIGN_ATTR(n) /* nothing */109#endif110111112#if defined(_MSC_VER) || defined(__BORLANDC__)113#define I64(x) x##ui64114#else115#define I64(x) x##ULL116#endif117118#if defined(_MSC_VER)119#define RHASH_INLINE __inline120#elif defined(__GNUC__) && !defined(__STRICT_ANSI__)121#define RHASH_INLINE inline122#elif defined(__GNUC__)123#define RHASH_INLINE __inline__124#else125#define RHASH_INLINE126#endif127128/* define rhash_ctz - count traling zero bits */129#if (defined(__GNUC__) && __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)) || \130(defined(__clang__) && __has_builtin(__builtin_ctz))131/* GCC >= 3.4 or clang */132# define rhash_ctz(x) __builtin_ctz(x)133#else134unsigned rhash_ctz(unsigned); /* define as function */135#endif136137void rhash_swap_copy_str_to_u32(void* to, int index, const void* from, size_t length);138void rhash_swap_copy_str_to_u64(void* to, int index, const void* from, size_t length);139void rhash_swap_copy_u64_to_str(void* to, const void* from, size_t length);140void rhash_u32_mem_swap(unsigned* p, int length_in_u32);141142/* bswap definitions */143#if (defined(__GNUC__) && (__GNUC__ >= 4) && (__GNUC__ > 4 || __GNUC_MINOR__ >= 3)) || \144(defined(__clang__) && __has_builtin(__builtin_bswap32) && __has_builtin(__builtin_bswap64))145/* GCC >= 4.3 or clang */146# define bswap_32(x) __builtin_bswap32(x)147# define bswap_64(x) __builtin_bswap64(x)148#elif (_MSC_VER > 1300) && (defined(CPU_IA32) || defined(CPU_X64)) /* MS VC */149# define bswap_32(x) _byteswap_ulong((unsigned long)x)150# define bswap_64(x) _byteswap_uint64((__int64)x)151#else152/* fallback to generic bswap definition */153static RHASH_INLINE uint32_t bswap_32(uint32_t x)154{155# if defined(__GNUC__) && defined(CPU_IA32) && !defined(__i386__) && !defined(RHASH_NO_ASM)156__asm("bswap\t%0" : "=r" (x) : "0" (x)); /* gcc x86 version */157return x;158# else159x = ((x << 8) & 0xFF00FF00u) | ((x >> 8) & 0x00FF00FFu);160return (x >> 16) | (x << 16);161# endif162}163static RHASH_INLINE uint64_t bswap_64(uint64_t x)164{165union {166uint64_t ll;167uint32_t l[2];168} w, r;169w.ll = x;170r.l[0] = bswap_32(w.l[1]);171r.l[1] = bswap_32(w.l[0]);172return r.ll;173}174#endif /* bswap definitions */175176#if IS_BIG_ENDIAN177# define be2me_32(x) (x)178# define be2me_64(x) (x)179# define le2me_32(x) bswap_32(x)180# define le2me_64(x) bswap_64(x)181182# define be32_copy(to, index, from, length) memcpy((char*)(to) + (index), (from), (length))183# define le32_copy(to, index, from, length) rhash_swap_copy_str_to_u32((to), (index), (from), (length))184# define be64_copy(to, index, from, length) memcpy((char*)(to) + (index), (from), (length))185# define le64_copy(to, index, from, length) rhash_swap_copy_str_to_u64((to), (index), (from), (length))186# define me64_to_be_str(to, from, length) memcpy((to), (from), (length))187# define me64_to_le_str(to, from, length) rhash_swap_copy_u64_to_str((to), (from), (length))188189#else /* IS_BIG_ENDIAN */190# define be2me_32(x) bswap_32(x)191# define be2me_64(x) bswap_64(x)192# define le2me_32(x) (x)193# define le2me_64(x) (x)194195# define be32_copy(to, index, from, length) rhash_swap_copy_str_to_u32((to), (index), (from), (length))196# define le32_copy(to, index, from, length) memcpy((char*)(to) + (index), (from), (length))197# define be64_copy(to, index, from, length) rhash_swap_copy_str_to_u64((to), (index), (from), (length))198# define le64_copy(to, index, from, length) memcpy((char*)(to) + (index), (from), (length))199# define me64_to_be_str(to, from, length) rhash_swap_copy_u64_to_str((to), (from), (length))200# define me64_to_le_str(to, from, length) memcpy((to), (from), (length))201#endif /* IS_BIG_ENDIAN */202203/* ROTL/ROTR macros rotate a 32/64-bit word left/right by n bits */204#define ROTL32(dword, n) ((dword) << (n) ^ ((dword) >> (32 - (n))))205#define ROTR32(dword, n) ((dword) >> (n) ^ ((dword) << (32 - (n))))206#define ROTL64(qword, n) ((qword) << (n) ^ ((qword) >> (64 - (n))))207#define ROTR64(qword, n) ((qword) >> (n) ^ ((qword) << (64 - (n))))208209#define CPU_FEATURE_SSE4_2 (52)210211#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) \212&& (defined(CPU_X64) || defined(CPU_IA32))213# define HAS_INTEL_CPUID214int has_cpu_feature(unsigned feature_bit);215#else216# define has_cpu_feature(x) (0)217#endif218219#ifdef __cplusplus220} /* extern "C" */221#endif /* __cplusplus */222223#endif /* BYTE_ORDER_H */224225226