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GitHub Repository: PojavLauncherTeam/angle
Path: blob/main_old/include/CL/cl_ext.h
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/*******************************************************************************
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* Copyright (c) 2008-2020 The Khronos Group Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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******************************************************************************/
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/* cl_ext.h contains OpenCL extensions which don't have external */
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/* (OpenGL, D3D) dependencies. */
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#ifndef __CL_EXT_H
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#define __CL_EXT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <CL/cl.h>
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/* cl_khr_fp64 extension - no extension #define since it has no functions */
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/* CL_DEVICE_DOUBLE_FP_CONFIG is defined in CL.h for OpenCL >= 120 */
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#if CL_TARGET_OPENCL_VERSION <= 110
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#define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
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#endif
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/* cl_khr_fp16 extension - no extension #define since it has no functions */
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#define CL_DEVICE_HALF_FP_CONFIG 0x1033
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/* Memory object destruction
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*
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* Apple extension for use to manage externally allocated buffers used with cl_mem objects with CL_MEM_USE_HOST_PTR
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*
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* Registers a user callback function that will be called when the memory object is deleted and its resources
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* freed. Each call to clSetMemObjectCallbackFn registers the specified user callback function on a callback
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* stack associated with memobj. The registered user callback functions are called in the reverse order in
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* which they were registered. The user callback functions are called and then the memory object is deleted
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* and its resources freed. This provides a mechanism for the application (and libraries) using memobj to be
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* notified when the memory referenced by host_ptr, specified when the memory object is created and used as
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* the storage bits for the memory object, can be reused or freed.
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*
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* The application may not call CL api's with the cl_mem object passed to the pfn_notify.
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*
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* Please check for the "cl_APPLE_SetMemObjectDestructor" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
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* before using.
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*/
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#define cl_APPLE_SetMemObjectDestructor 1
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extern CL_API_ENTRY cl_int CL_API_CALL clSetMemObjectDestructorAPPLE( cl_mem memobj,
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void (* pfn_notify)(cl_mem memobj, void * user_data),
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void * user_data) CL_API_SUFFIX__VERSION_1_0;
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/* Context Logging Functions
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*
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* The next three convenience functions are intended to be used as the pfn_notify parameter to clCreateContext().
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* Please check for the "cl_APPLE_ContextLoggingFunctions" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
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* before using.
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*
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* clLogMessagesToSystemLog forwards on all log messages to the Apple System Logger
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*/
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#define cl_APPLE_ContextLoggingFunctions 1
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extern CL_API_ENTRY void CL_API_CALL clLogMessagesToSystemLogAPPLE( const char * errstr,
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const void * private_info,
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size_t cb,
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void * user_data) CL_API_SUFFIX__VERSION_1_0;
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/* clLogMessagesToStdout sends all log messages to the file descriptor stdout */
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extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStdoutAPPLE( const char * errstr,
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const void * private_info,
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size_t cb,
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void * user_data) CL_API_SUFFIX__VERSION_1_0;
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/* clLogMessagesToStderr sends all log messages to the file descriptor stderr */
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extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStderrAPPLE( const char * errstr,
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const void * private_info,
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size_t cb,
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void * user_data) CL_API_SUFFIX__VERSION_1_0;
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/************************
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* cl_khr_icd extension *
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************************/
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#define cl_khr_icd 1
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/* cl_platform_info */
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#define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
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/* Additional Error Codes */
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#define CL_PLATFORM_NOT_FOUND_KHR -1001
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extern CL_API_ENTRY cl_int CL_API_CALL
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clIcdGetPlatformIDsKHR(cl_uint num_entries,
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cl_platform_id * platforms,
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cl_uint * num_platforms);
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typedef cl_int
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(CL_API_CALL *clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries,
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cl_platform_id * platforms,
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cl_uint * num_platforms);
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/*******************************
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* cl_khr_il_program extension *
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*******************************/
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#define cl_khr_il_program 1
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/* New property to clGetDeviceInfo for retrieving supported intermediate
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* languages
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*/
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#define CL_DEVICE_IL_VERSION_KHR 0x105B
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/* New property to clGetProgramInfo for retrieving for retrieving the IL of a
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* program
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*/
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#define CL_PROGRAM_IL_KHR 0x1169
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extern CL_API_ENTRY cl_program CL_API_CALL
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clCreateProgramWithILKHR(cl_context context,
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const void * il,
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size_t length,
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cl_int * errcode_ret);
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typedef cl_program
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(CL_API_CALL *clCreateProgramWithILKHR_fn)(cl_context context,
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const void * il,
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size_t length,
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cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
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/* Extension: cl_khr_image2d_from_buffer
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*
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* This extension allows a 2D image to be created from a cl_mem buffer without
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* a copy. The type associated with a 2D image created from a buffer in an
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* OpenCL program is image2d_t. Both the sampler and sampler-less read_image
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* built-in functions are supported for 2D images and 2D images created from
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* a buffer. Similarly, the write_image built-ins are also supported for 2D
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* images created from a buffer.
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*
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* When the 2D image from buffer is created, the client must specify the
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* width, height, image format (i.e. channel order and channel data type)
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* and optionally the row pitch.
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*
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* The pitch specified must be a multiple of
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* CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR pixels.
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* The base address of the buffer must be aligned to
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* CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR pixels.
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*/
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#define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A
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#define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B
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/**************************************
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* cl_khr_initialize_memory extension *
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**************************************/
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#define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030
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/**************************************
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* cl_khr_terminate_context extension *
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**************************************/
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#define CL_CONTEXT_TERMINATED_KHR -1121
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#define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031
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#define CL_CONTEXT_TERMINATE_KHR 0x2032
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#define cl_khr_terminate_context 1
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extern CL_API_ENTRY cl_int CL_API_CALL
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clTerminateContextKHR(cl_context context) CL_API_SUFFIX__VERSION_1_2;
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typedef cl_int
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(CL_API_CALL *clTerminateContextKHR_fn)(cl_context context) CL_API_SUFFIX__VERSION_1_2;
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/*
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* Extension: cl_khr_spir
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*
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* This extension adds support to create an OpenCL program object from a
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* Standard Portable Intermediate Representation (SPIR) instance
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*/
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#define CL_DEVICE_SPIR_VERSIONS 0x40E0
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#define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1
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/*****************************************
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* cl_khr_create_command_queue extension *
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*****************************************/
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#define cl_khr_create_command_queue 1
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typedef cl_properties cl_queue_properties_khr;
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extern CL_API_ENTRY cl_command_queue CL_API_CALL
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clCreateCommandQueueWithPropertiesKHR(cl_context context,
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cl_device_id device,
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const cl_queue_properties_khr* properties,
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cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
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typedef cl_command_queue
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(CL_API_CALL *clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context,
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cl_device_id device,
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const cl_queue_properties_khr* properties,
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cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
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/******************************************
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* cl_nv_device_attribute_query extension *
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******************************************/
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/* cl_nv_device_attribute_query extension - no extension #define since it has no functions */
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#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
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#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
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#define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
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#define CL_DEVICE_WARP_SIZE_NV 0x4003
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#define CL_DEVICE_GPU_OVERLAP_NV 0x4004
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#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
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#define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
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/*********************************
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* cl_amd_device_attribute_query *
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*********************************/
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#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
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#define CL_DEVICE_TOPOLOGY_AMD 0x4037
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#define CL_DEVICE_BOARD_NAME_AMD 0x4038
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#define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
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#define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040
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#define CL_DEVICE_SIMD_WIDTH_AMD 0x4041
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#define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042
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#define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
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#define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044
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#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045
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#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046
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#define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047
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#define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048
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#define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049
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#define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A
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#define CL_DEVICE_GFXIP_MINOR_AMD 0x404B
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#define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C
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#define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030
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#define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031
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#define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033
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#define CL_DEVICE_PCIE_ID_AMD 0x4034
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/*********************************
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* cl_arm_printf extension
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*********************************/
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#define CL_PRINTF_CALLBACK_ARM 0x40B0
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#define CL_PRINTF_BUFFERSIZE_ARM 0x40B1
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/***********************************
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* cl_ext_device_fission extension
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***********************************/
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#define cl_ext_device_fission 1
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extern CL_API_ENTRY cl_int CL_API_CALL
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clReleaseDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
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typedef cl_int
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(CL_API_CALL *clReleaseDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
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extern CL_API_ENTRY cl_int CL_API_CALL
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clRetainDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
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typedef cl_int
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(CL_API_CALL *clRetainDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
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typedef cl_ulong cl_device_partition_property_ext;
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extern CL_API_ENTRY cl_int CL_API_CALL
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clCreateSubDevicesEXT(cl_device_id in_device,
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const cl_device_partition_property_ext * properties,
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cl_uint num_entries,
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cl_device_id * out_devices,
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cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1;
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typedef cl_int
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(CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device,
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const cl_device_partition_property_ext * properties,
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cl_uint num_entries,
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cl_device_id * out_devices,
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cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1;
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/* cl_device_partition_property_ext */
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#define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
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#define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
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#define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
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#define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
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/* clDeviceGetInfo selectors */
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#define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
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#define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
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#define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
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#define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
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#define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
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/* error codes */
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#define CL_DEVICE_PARTITION_FAILED_EXT -1057
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#define CL_INVALID_PARTITION_COUNT_EXT -1058
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#define CL_INVALID_PARTITION_NAME_EXT -1059
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/* CL_AFFINITY_DOMAINs */
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#define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
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#define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
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#define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
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#define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
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#define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
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#define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
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/* cl_device_partition_property_ext list terminators */
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#define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0)
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#define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0)
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#define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1)
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/***********************************
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* cl_ext_migrate_memobject extension definitions
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***********************************/
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#define cl_ext_migrate_memobject 1
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typedef cl_bitfield cl_mem_migration_flags_ext;
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#define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1
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#define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040
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extern CL_API_ENTRY cl_int CL_API_CALL
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clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue,
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cl_uint num_mem_objects,
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const cl_mem * mem_objects,
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cl_mem_migration_flags_ext flags,
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cl_uint num_events_in_wait_list,
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const cl_event * event_wait_list,
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cl_event * event);
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typedef cl_int
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(CL_API_CALL *clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue,
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cl_uint num_mem_objects,
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const cl_mem * mem_objects,
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cl_mem_migration_flags_ext flags,
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cl_uint num_events_in_wait_list,
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const cl_event * event_wait_list,
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cl_event * event);
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/*********************************
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* cl_ext_cxx_for_opencl extension
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*********************************/
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#define cl_ext_cxx_for_opencl 1
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#define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230
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/*********************************
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* cl_qcom_ext_host_ptr extension
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*********************************/
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#define cl_qcom_ext_host_ptr 1
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#define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29)
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#define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
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#define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
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#define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2
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#define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3
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#define CL_MEM_HOST_UNCACHED_QCOM 0x40A4
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#define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5
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#define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6
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#define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7
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typedef cl_uint cl_image_pitch_info_qcom;
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extern CL_API_ENTRY cl_int CL_API_CALL
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clGetDeviceImageInfoQCOM(cl_device_id device,
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size_t image_width,
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size_t image_height,
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const cl_image_format *image_format,
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cl_image_pitch_info_qcom param_name,
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size_t param_value_size,
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void *param_value,
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size_t *param_value_size_ret);
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typedef struct _cl_mem_ext_host_ptr
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{
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/* Type of external memory allocation. */
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/* Legal values will be defined in layered extensions. */
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cl_uint allocation_type;
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/* Host cache policy for this external memory allocation. */
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cl_uint host_cache_policy;
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} cl_mem_ext_host_ptr;
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/*******************************************
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* cl_qcom_ext_host_ptr_iocoherent extension
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********************************************/
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/* Cache policy specifying io-coherence */
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#define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9
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/*********************************
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* cl_qcom_ion_host_ptr extension
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*********************************/
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#define CL_MEM_ION_HOST_PTR_QCOM 0x40A8
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typedef struct _cl_mem_ion_host_ptr
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{
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/* Type of external memory allocation. */
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/* Must be CL_MEM_ION_HOST_PTR_QCOM for ION allocations. */
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cl_mem_ext_host_ptr ext_host_ptr;
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/* ION file descriptor */
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int ion_filedesc;
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/* Host pointer to the ION allocated memory */
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void* ion_hostptr;
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} cl_mem_ion_host_ptr;
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/*********************************
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* cl_qcom_android_native_buffer_host_ptr extension
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*********************************/
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#define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6
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typedef struct _cl_mem_android_native_buffer_host_ptr
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{
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/* Type of external memory allocation. */
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/* Must be CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM for Android native buffers. */
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cl_mem_ext_host_ptr ext_host_ptr;
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/* Virtual pointer to the android native buffer */
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void* anb_ptr;
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} cl_mem_android_native_buffer_host_ptr;
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/******************************************
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* cl_img_yuv_image extension *
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******************************************/
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/* Image formats used in clCreateImage */
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#define CL_NV21_IMG 0x40D0
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#define CL_YV12_IMG 0x40D1
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/******************************************
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* cl_img_cached_allocations extension *
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******************************************/
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/* Flag values used by clCreateBuffer */
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#define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26)
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#define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27)
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/******************************************
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* cl_img_use_gralloc_ptr extension *
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******************************************/
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#define cl_img_use_gralloc_ptr 1
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/* Flag values used by clCreateBuffer */
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#define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28)
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/* To be used by clGetEventInfo: */
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#define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2
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#define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3
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/* Error codes from clEnqueueAcquireGrallocObjectsIMG and clEnqueueReleaseGrallocObjectsIMG */
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#define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4
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#define CL_INVALID_GRALLOC_OBJECT_IMG 0x40D5
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extern CL_API_ENTRY cl_int CL_API_CALL
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clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue,
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cl_uint num_objects,
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const cl_mem * mem_objects,
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cl_uint num_events_in_wait_list,
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const cl_event * event_wait_list,
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cl_event * event) CL_API_SUFFIX__VERSION_1_2;
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extern CL_API_ENTRY cl_int CL_API_CALL
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clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue,
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cl_uint num_objects,
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const cl_mem * mem_objects,
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cl_uint num_events_in_wait_list,
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const cl_event * event_wait_list,
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cl_event * event) CL_API_SUFFIX__VERSION_1_2;
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/******************************************
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* cl_img_generate_mipmap extension *
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******************************************/
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#define cl_img_generate_mipmap 1
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typedef cl_uint cl_mipmap_filter_mode_img;
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/* To be used by clEnqueueGenerateMipmapIMG */
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#define CL_MIPMAP_FILTER_ANY_IMG 0x0
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#define CL_MIPMAP_FILTER_BOX_IMG 0x1
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/* To be used by clGetEventInfo */
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#define CL_COMMAND_GENERATE_MIPMAP_IMG 0x40D6
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extern CL_API_ENTRY cl_int CL_API_CALL
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clEnqueueGenerateMipmapIMG(cl_command_queue command_queue,
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cl_mem src_image,
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cl_mem dst_image,
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cl_mipmap_filter_mode_img mipmap_filter_mode,
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const size_t *array_region,
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const size_t *mip_region,
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cl_uint num_events_in_wait_list,
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const cl_event *event_wait_list,
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cl_event *event) CL_API_SUFFIX__VERSION_1_2;
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/******************************************
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* cl_img_mem_properties extension *
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******************************************/
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#define cl_img_mem_properties 1
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/* To be used by clCreateBufferWithProperties */
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#define CL_MEM_ALLOC_FLAGS_IMG 0x40D7
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/* To be used wiith the CL_MEM_ALLOC_FLAGS_IMG property */
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typedef cl_bitfield cl_mem_alloc_flags_img;
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/* To be used with cl_mem_alloc_flags_img */
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#define CL_MEM_ALLOC_RELAX_REQUIREMENTS_IMG (1 << 0)
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/*********************************
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* cl_khr_subgroups extension
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*********************************/
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#define cl_khr_subgroups 1
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#if !defined(CL_VERSION_2_1)
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/* For OpenCL 2.1 and newer, cl_kernel_sub_group_info is declared in CL.h.
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In hindsight, there should have been a khr suffix on this type for
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the extension, but keeping it un-suffixed to maintain backwards
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compatibility. */
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typedef cl_uint cl_kernel_sub_group_info;
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#endif
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555
/* cl_kernel_sub_group_info */
556
#define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033
557
#define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034
558
559
extern CL_API_ENTRY cl_int CL_API_CALL
560
clGetKernelSubGroupInfoKHR(cl_kernel in_kernel,
561
cl_device_id in_device,
562
cl_kernel_sub_group_info param_name,
563
size_t input_value_size,
564
const void * input_value,
565
size_t param_value_size,
566
void * param_value,
567
size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED;
568
569
typedef cl_int
570
(CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel,
571
cl_device_id in_device,
572
cl_kernel_sub_group_info param_name,
573
size_t input_value_size,
574
const void * input_value,
575
size_t param_value_size,
576
void * param_value,
577
size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED;
578
579
580
/*********************************
581
* cl_khr_mipmap_image extension
582
*********************************/
583
584
/* cl_sampler_properties */
585
#define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155
586
#define CL_SAMPLER_LOD_MIN_KHR 0x1156
587
#define CL_SAMPLER_LOD_MAX_KHR 0x1157
588
589
590
/*********************************
591
* cl_khr_priority_hints extension
592
*********************************/
593
/* This extension define is for backwards compatibility.
594
It shouldn't be required since this extension has no new functions. */
595
#define cl_khr_priority_hints 1
596
597
typedef cl_uint cl_queue_priority_khr;
598
599
/* cl_command_queue_properties */
600
#define CL_QUEUE_PRIORITY_KHR 0x1096
601
602
/* cl_queue_priority_khr */
603
#define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0)
604
#define CL_QUEUE_PRIORITY_MED_KHR (1<<1)
605
#define CL_QUEUE_PRIORITY_LOW_KHR (1<<2)
606
607
608
/*********************************
609
* cl_khr_throttle_hints extension
610
*********************************/
611
/* This extension define is for backwards compatibility.
612
It shouldn't be required since this extension has no new functions. */
613
#define cl_khr_throttle_hints 1
614
615
typedef cl_uint cl_queue_throttle_khr;
616
617
/* cl_command_queue_properties */
618
#define CL_QUEUE_THROTTLE_KHR 0x1097
619
620
/* cl_queue_throttle_khr */
621
#define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0)
622
#define CL_QUEUE_THROTTLE_MED_KHR (1<<1)
623
#define CL_QUEUE_THROTTLE_LOW_KHR (1<<2)
624
625
626
/*********************************
627
* cl_khr_subgroup_named_barrier
628
*********************************/
629
/* This extension define is for backwards compatibility.
630
It shouldn't be required since this extension has no new functions. */
631
#define cl_khr_subgroup_named_barrier 1
632
633
/* cl_device_info */
634
#define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
635
636
637
/*********************************
638
* cl_khr_extended_versioning
639
*********************************/
640
641
#define cl_khr_extended_versioning 1
642
643
#define CL_VERSION_MAJOR_BITS_KHR (10)
644
#define CL_VERSION_MINOR_BITS_KHR (10)
645
#define CL_VERSION_PATCH_BITS_KHR (12)
646
647
#define CL_VERSION_MAJOR_MASK_KHR ((1 << CL_VERSION_MAJOR_BITS_KHR) - 1)
648
#define CL_VERSION_MINOR_MASK_KHR ((1 << CL_VERSION_MINOR_BITS_KHR) - 1)
649
#define CL_VERSION_PATCH_MASK_KHR ((1 << CL_VERSION_PATCH_BITS_KHR) - 1)
650
651
#define CL_VERSION_MAJOR_KHR(version) ((version) >> (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR))
652
#define CL_VERSION_MINOR_KHR(version) (((version) >> CL_VERSION_PATCH_BITS_KHR) & CL_VERSION_MINOR_MASK_KHR)
653
#define CL_VERSION_PATCH_KHR(version) ((version) & CL_VERSION_PATCH_MASK_KHR)
654
655
#define CL_MAKE_VERSION_KHR(major, minor, patch) \
656
((((major) & CL_VERSION_MAJOR_MASK_KHR) << (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR)) | \
657
(((minor) & CL_VERSION_MINOR_MASK_KHR) << CL_VERSION_PATCH_BITS_KHR) | \
658
((patch) & CL_VERSION_PATCH_MASK_KHR))
659
660
typedef cl_uint cl_version_khr;
661
662
#define CL_NAME_VERSION_MAX_NAME_SIZE_KHR 64
663
664
typedef struct _cl_name_version_khr
665
{
666
cl_version_khr version;
667
char name[CL_NAME_VERSION_MAX_NAME_SIZE_KHR];
668
} cl_name_version_khr;
669
670
/* cl_platform_info */
671
#define CL_PLATFORM_NUMERIC_VERSION_KHR 0x0906
672
#define CL_PLATFORM_EXTENSIONS_WITH_VERSION_KHR 0x0907
673
674
/* cl_device_info */
675
#define CL_DEVICE_NUMERIC_VERSION_KHR 0x105E
676
#define CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR 0x105F
677
#define CL_DEVICE_EXTENSIONS_WITH_VERSION_KHR 0x1060
678
#define CL_DEVICE_ILS_WITH_VERSION_KHR 0x1061
679
#define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR 0x1062
680
681
682
/*********************************
683
* cl_khr_device_uuid extension
684
*********************************/
685
#define cl_khr_device_uuid 1
686
687
#define CL_UUID_SIZE_KHR 16
688
#define CL_LUID_SIZE_KHR 8
689
690
#define CL_DEVICE_UUID_KHR 0x106A
691
#define CL_DRIVER_UUID_KHR 0x106B
692
#define CL_DEVICE_LUID_VALID_KHR 0x106C
693
#define CL_DEVICE_LUID_KHR 0x106D
694
#define CL_DEVICE_NODE_MASK_KHR 0x106E
695
696
697
/**********************************
698
* cl_arm_import_memory extension *
699
**********************************/
700
#define cl_arm_import_memory 1
701
702
typedef intptr_t cl_import_properties_arm;
703
704
/* Default and valid proporties name for cl_arm_import_memory */
705
#define CL_IMPORT_TYPE_ARM 0x40B2
706
707
/* Host process memory type default value for CL_IMPORT_TYPE_ARM property */
708
#define CL_IMPORT_TYPE_HOST_ARM 0x40B3
709
710
/* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */
711
#define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4
712
713
/* Protected memory property */
714
#define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5
715
716
/* Android hardware buffer type value for CL_IMPORT_TYPE_ARM property */
717
#define CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM 0x41E2
718
719
/* Data consistency with host property */
720
#define CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM 0x41E3
721
722
/* Index of plane in a multiplanar hardware buffer */
723
#define CL_IMPORT_ANDROID_HARDWARE_BUFFER_PLANE_INDEX_ARM 0x41EF
724
725
/* Index of layer in a multilayer hardware buffer */
726
#define CL_IMPORT_ANDROID_HARDWARE_BUFFER_LAYER_INDEX_ARM 0x41F0
727
728
/* Import memory size value to indicate a size for the whole buffer */
729
#define CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM SIZE_MAX
730
731
/* This extension adds a new function that allows for direct memory import into
732
* OpenCL via the clImportMemoryARM function.
733
*
734
* Memory imported through this interface will be mapped into the device's page
735
* tables directly, providing zero copy access. It will never fall back to copy
736
* operations and aliased buffers.
737
*
738
* Types of memory supported for import are specified as additional extension
739
* strings.
740
*
741
* This extension produces cl_mem allocations which are compatible with all other
742
* users of cl_mem in the standard API.
743
*
744
* This extension maps pages with the same properties as the normal buffer creation
745
* function clCreateBuffer.
746
*/
747
extern CL_API_ENTRY cl_mem CL_API_CALL
748
clImportMemoryARM( cl_context context,
749
cl_mem_flags flags,
750
const cl_import_properties_arm *properties,
751
void *memory,
752
size_t size,
753
cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0;
754
755
756
/******************************************
757
* cl_arm_shared_virtual_memory extension *
758
******************************************/
759
#define cl_arm_shared_virtual_memory 1
760
761
/* Used by clGetDeviceInfo */
762
#define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
763
764
/* Used by clGetMemObjectInfo */
765
#define CL_MEM_USES_SVM_POINTER_ARM 0x40B7
766
767
/* Used by clSetKernelExecInfoARM: */
768
#define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8
769
#define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9
770
771
/* To be used by clGetEventInfo: */
772
#define CL_COMMAND_SVM_FREE_ARM 0x40BA
773
#define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB
774
#define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC
775
#define CL_COMMAND_SVM_MAP_ARM 0x40BD
776
#define CL_COMMAND_SVM_UNMAP_ARM 0x40BE
777
778
/* Flag values returned by clGetDeviceInfo with CL_DEVICE_SVM_CAPABILITIES_ARM as the param_name. */
779
#define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0)
780
#define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1)
781
#define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2)
782
#define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3)
783
784
/* Flag values used by clSVMAllocARM: */
785
#define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10)
786
#define CL_MEM_SVM_ATOMICS_ARM (1 << 11)
787
788
typedef cl_bitfield cl_svm_mem_flags_arm;
789
typedef cl_uint cl_kernel_exec_info_arm;
790
typedef cl_bitfield cl_device_svm_capabilities_arm;
791
792
extern CL_API_ENTRY void * CL_API_CALL
793
clSVMAllocARM(cl_context context,
794
cl_svm_mem_flags_arm flags,
795
size_t size,
796
cl_uint alignment) CL_API_SUFFIX__VERSION_1_2;
797
798
extern CL_API_ENTRY void CL_API_CALL
799
clSVMFreeARM(cl_context context,
800
void * svm_pointer) CL_API_SUFFIX__VERSION_1_2;
801
802
extern CL_API_ENTRY cl_int CL_API_CALL
803
clEnqueueSVMFreeARM(cl_command_queue command_queue,
804
cl_uint num_svm_pointers,
805
void * svm_pointers[],
806
void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue,
807
cl_uint num_svm_pointers,
808
void * svm_pointers[],
809
void * user_data),
810
void * user_data,
811
cl_uint num_events_in_wait_list,
812
const cl_event * event_wait_list,
813
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
814
815
extern CL_API_ENTRY cl_int CL_API_CALL
816
clEnqueueSVMMemcpyARM(cl_command_queue command_queue,
817
cl_bool blocking_copy,
818
void * dst_ptr,
819
const void * src_ptr,
820
size_t size,
821
cl_uint num_events_in_wait_list,
822
const cl_event * event_wait_list,
823
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
824
825
extern CL_API_ENTRY cl_int CL_API_CALL
826
clEnqueueSVMMemFillARM(cl_command_queue command_queue,
827
void * svm_ptr,
828
const void * pattern,
829
size_t pattern_size,
830
size_t size,
831
cl_uint num_events_in_wait_list,
832
const cl_event * event_wait_list,
833
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
834
835
extern CL_API_ENTRY cl_int CL_API_CALL
836
clEnqueueSVMMapARM(cl_command_queue command_queue,
837
cl_bool blocking_map,
838
cl_map_flags flags,
839
void * svm_ptr,
840
size_t size,
841
cl_uint num_events_in_wait_list,
842
const cl_event * event_wait_list,
843
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
844
845
extern CL_API_ENTRY cl_int CL_API_CALL
846
clEnqueueSVMUnmapARM(cl_command_queue command_queue,
847
void * svm_ptr,
848
cl_uint num_events_in_wait_list,
849
const cl_event * event_wait_list,
850
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
851
852
extern CL_API_ENTRY cl_int CL_API_CALL
853
clSetKernelArgSVMPointerARM(cl_kernel kernel,
854
cl_uint arg_index,
855
const void * arg_value) CL_API_SUFFIX__VERSION_1_2;
856
857
extern CL_API_ENTRY cl_int CL_API_CALL
858
clSetKernelExecInfoARM(cl_kernel kernel,
859
cl_kernel_exec_info_arm param_name,
860
size_t param_value_size,
861
const void * param_value) CL_API_SUFFIX__VERSION_1_2;
862
863
/********************************
864
* cl_arm_get_core_id extension *
865
********************************/
866
867
#ifdef CL_VERSION_1_2
868
869
#define cl_arm_get_core_id 1
870
871
/* Device info property for bitfield of cores present */
872
#define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF
873
874
#endif /* CL_VERSION_1_2 */
875
876
/*********************************
877
* cl_arm_job_slot_selection
878
*********************************/
879
880
#define cl_arm_job_slot_selection 1
881
882
/* cl_device_info */
883
#define CL_DEVICE_JOB_SLOTS_ARM 0x41E0
884
885
/* cl_command_queue_properties */
886
#define CL_QUEUE_JOB_SLOT_ARM 0x41E1
887
888
/*********************************
889
* cl_arm_scheduling_controls
890
*********************************/
891
892
#define cl_arm_scheduling_controls 1
893
894
typedef cl_bitfield cl_device_scheduling_controls_capabilities_arm;
895
896
/* cl_device_info */
897
#define CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM 0x41E4
898
899
#define CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM (1 << 0)
900
#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM (1 << 1)
901
#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM (1 << 2)
902
#define CL_DEVICE_SCHEDULING_DEFERRED_FLUSH_ARM (1 << 3)
903
#define CL_DEVICE_SCHEDULING_REGISTER_ALLOCATION_ARM (1 << 4)
904
905
#define CL_DEVICE_SUPPORTED_REGISTER_ALLOCATIONS_ARM 0x41EB
906
907
/* cl_kernel_info */
908
#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM 0x41E5
909
#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM 0x41E6
910
911
/* cl_queue_properties */
912
#define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7
913
#define CL_QUEUE_DEFERRED_FLUSH_ARM 0x41EC
914
915
/**************************************
916
* cl_arm_controlled_kernel_termination
917
***************************************/
918
919
#define cl_arm_controlled_kernel_termination 1
920
921
/* Error code to indicate kernel terminated with failure */
922
#define CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM -1108
923
924
/* cl_device_info */
925
#define CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM 0x41EE
926
927
/* Bit fields for controlled termination feature query */
928
typedef cl_bitfield cl_device_controlled_termination_capabilities_arm;
929
930
#define CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM (1 << 0)
931
#define CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM (1 << 1)
932
#define CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM (1 << 2)
933
934
/* cl_event_info */
935
#define CL_EVENT_COMMAND_TERMINATION_REASON_ARM 0x41ED
936
937
/* Values returned for event termination reason query */
938
typedef cl_uint cl_command_termination_reason_arm;
939
940
#define CL_COMMAND_TERMINATION_COMPLETION_ARM 0
941
#define CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM 1
942
#define CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM 2
943
#define CL_COMMAND_TERMINATION_ERROR_ARM 3
944
945
/***************************************
946
* cl_intel_thread_local_exec extension *
947
****************************************/
948
949
#define cl_intel_thread_local_exec 1
950
951
#define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31)
952
953
/***********************************************
954
* cl_intel_device_partition_by_names extension *
955
************************************************/
956
957
#define cl_intel_device_partition_by_names 1
958
959
#define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052
960
#define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1
961
962
/************************************************
963
* cl_intel_accelerator extension *
964
* cl_intel_motion_estimation extension *
965
* cl_intel_advanced_motion_estimation extension *
966
*************************************************/
967
968
#define cl_intel_accelerator 1
969
#define cl_intel_motion_estimation 1
970
#define cl_intel_advanced_motion_estimation 1
971
972
typedef struct _cl_accelerator_intel* cl_accelerator_intel;
973
typedef cl_uint cl_accelerator_type_intel;
974
typedef cl_uint cl_accelerator_info_intel;
975
976
typedef struct _cl_motion_estimation_desc_intel {
977
cl_uint mb_block_type;
978
cl_uint subpixel_mode;
979
cl_uint sad_adjust_mode;
980
cl_uint search_path_type;
981
} cl_motion_estimation_desc_intel;
982
983
/* error codes */
984
#define CL_INVALID_ACCELERATOR_INTEL -1094
985
#define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095
986
#define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096
987
#define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097
988
989
/* cl_accelerator_type_intel */
990
#define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0
991
992
/* cl_accelerator_info_intel */
993
#define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090
994
#define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091
995
#define CL_ACCELERATOR_CONTEXT_INTEL 0x4092
996
#define CL_ACCELERATOR_TYPE_INTEL 0x4093
997
998
/* cl_motion_detect_desc_intel flags */
999
#define CL_ME_MB_TYPE_16x16_INTEL 0x0
1000
#define CL_ME_MB_TYPE_8x8_INTEL 0x1
1001
#define CL_ME_MB_TYPE_4x4_INTEL 0x2
1002
1003
#define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
1004
#define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
1005
#define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2
1006
1007
#define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
1008
#define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1
1009
1010
#define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0
1011
#define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1
1012
#define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5
1013
1014
#define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0
1015
#define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1
1016
#define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2
1017
#define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4
1018
1019
#define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1
1020
#define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2
1021
#define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3
1022
1023
#define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16
1024
#define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21
1025
#define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32
1026
#define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43
1027
#define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48
1028
1029
#define CL_ME_COST_PENALTY_NONE_INTEL 0x0
1030
#define CL_ME_COST_PENALTY_LOW_INTEL 0x1
1031
#define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2
1032
#define CL_ME_COST_PENALTY_HIGH_INTEL 0x3
1033
1034
#define CL_ME_COST_PRECISION_QPEL_INTEL 0x0
1035
#define CL_ME_COST_PRECISION_HPEL_INTEL 0x1
1036
#define CL_ME_COST_PRECISION_PEL_INTEL 0x2
1037
#define CL_ME_COST_PRECISION_DPEL_INTEL 0x3
1038
1039
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
1040
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1041
#define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
1042
#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
1043
1044
#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
1045
#define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
1046
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
1047
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
1048
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
1049
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
1050
1051
#define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
1052
#define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1053
#define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
1054
#define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
1055
1056
/* cl_device_info */
1057
#define CL_DEVICE_ME_VERSION_INTEL 0x407E
1058
1059
#define CL_ME_VERSION_LEGACY_INTEL 0x0
1060
#define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1
1061
#define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2
1062
1063
extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL
1064
clCreateAcceleratorINTEL(
1065
cl_context context,
1066
cl_accelerator_type_intel accelerator_type,
1067
size_t descriptor_size,
1068
const void* descriptor,
1069
cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1070
1071
typedef cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)(
1072
cl_context context,
1073
cl_accelerator_type_intel accelerator_type,
1074
size_t descriptor_size,
1075
const void* descriptor,
1076
cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1077
1078
extern CL_API_ENTRY cl_int CL_API_CALL
1079
clGetAcceleratorInfoINTEL(
1080
cl_accelerator_intel accelerator,
1081
cl_accelerator_info_intel param_name,
1082
size_t param_value_size,
1083
void* param_value,
1084
size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1085
1086
typedef cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)(
1087
cl_accelerator_intel accelerator,
1088
cl_accelerator_info_intel param_name,
1089
size_t param_value_size,
1090
void* param_value,
1091
size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1092
1093
extern CL_API_ENTRY cl_int CL_API_CALL
1094
clRetainAcceleratorINTEL(
1095
cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1096
1097
typedef cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)(
1098
cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1099
1100
extern CL_API_ENTRY cl_int CL_API_CALL
1101
clReleaseAcceleratorINTEL(
1102
cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1103
1104
typedef cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)(
1105
cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1106
1107
/******************************************
1108
* cl_intel_simultaneous_sharing extension *
1109
*******************************************/
1110
1111
#define cl_intel_simultaneous_sharing 1
1112
1113
#define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
1114
#define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
1115
1116
/***********************************
1117
* cl_intel_egl_image_yuv extension *
1118
************************************/
1119
1120
#define cl_intel_egl_image_yuv 1
1121
1122
#define CL_EGL_YUV_PLANE_INTEL 0x4107
1123
1124
/********************************
1125
* cl_intel_packed_yuv extension *
1126
*********************************/
1127
1128
#define cl_intel_packed_yuv 1
1129
1130
#define CL_YUYV_INTEL 0x4076
1131
#define CL_UYVY_INTEL 0x4077
1132
#define CL_YVYU_INTEL 0x4078
1133
#define CL_VYUY_INTEL 0x4079
1134
1135
/********************************************
1136
* cl_intel_required_subgroup_size extension *
1137
*********************************************/
1138
1139
#define cl_intel_required_subgroup_size 1
1140
1141
#define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
1142
#define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109
1143
#define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A
1144
1145
/****************************************
1146
* cl_intel_driver_diagnostics extension *
1147
*****************************************/
1148
1149
#define cl_intel_driver_diagnostics 1
1150
1151
typedef cl_uint cl_diagnostics_verbose_level;
1152
1153
#define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106
1154
1155
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff )
1156
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 )
1157
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 )
1158
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 )
1159
1160
/********************************
1161
* cl_intel_planar_yuv extension *
1162
*********************************/
1163
1164
#define CL_NV12_INTEL 0x410E
1165
1166
#define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 )
1167
#define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 )
1168
1169
#define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
1170
#define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
1171
1172
/*******************************************************
1173
* cl_intel_device_side_avc_motion_estimation extension *
1174
********************************************************/
1175
1176
#define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
1177
#define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
1178
#define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
1179
1180
#define CL_AVC_ME_VERSION_0_INTEL 0x0 /* No support. */
1181
#define CL_AVC_ME_VERSION_1_INTEL 0x1 /* First supported version. */
1182
1183
#define CL_AVC_ME_MAJOR_16x16_INTEL 0x0
1184
#define CL_AVC_ME_MAJOR_16x8_INTEL 0x1
1185
#define CL_AVC_ME_MAJOR_8x16_INTEL 0x2
1186
#define CL_AVC_ME_MAJOR_8x8_INTEL 0x3
1187
1188
#define CL_AVC_ME_MINOR_8x8_INTEL 0x0
1189
#define CL_AVC_ME_MINOR_8x4_INTEL 0x1
1190
#define CL_AVC_ME_MINOR_4x8_INTEL 0x2
1191
#define CL_AVC_ME_MINOR_4x4_INTEL 0x3
1192
1193
#define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0
1194
#define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1
1195
#define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2
1196
1197
#define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0
1198
#define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E
1199
#define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D
1200
#define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B
1201
#define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77
1202
#define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F
1203
#define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F
1204
#define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F
1205
1206
#define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0
1207
#define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1
1208
#define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2
1209
#define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3
1210
#define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4
1211
#define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5
1212
#define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6
1213
#define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7
1214
#define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8
1215
#define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9
1216
#define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2
1217
#define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa
1218
1219
#define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
1220
#define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2
1221
1222
#define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
1223
#define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
1224
#define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3
1225
1226
#define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0
1227
#define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1
1228
#define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2
1229
#define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3
1230
1231
#define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10
1232
#define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15
1233
#define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20
1234
#define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B
1235
#define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30
1236
1237
#define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0
1238
#define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2
1239
#define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4
1240
#define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8
1241
1242
#define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0
1243
#define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000
1244
1245
#define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
1246
#define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
1247
#define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 )
1248
#define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 )
1249
#define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 )
1250
#define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 )
1251
#define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
1252
#define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
1253
#define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 )
1254
#define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 )
1255
#define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 )
1256
#define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 )
1257
#define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 )
1258
#define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 )
1259
1260
#define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00
1261
#define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80
1262
1263
#define CL_AVC_ME_INTRA_16x16_INTEL 0x0
1264
#define CL_AVC_ME_INTRA_8x8_INTEL 0x1
1265
#define CL_AVC_ME_INTRA_4x4_INTEL 0x2
1266
1267
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6
1268
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5
1269
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3
1270
1271
#define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60
1272
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10
1273
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8
1274
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4
1275
1276
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
1277
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1278
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
1279
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
1280
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
1281
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
1282
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
1283
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
1284
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
1285
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
1286
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
1287
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1288
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
1289
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
1290
1291
#define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1
1292
#define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2
1293
#define CL_AVC_ME_FRAME_DUAL_INTEL 0x3
1294
1295
#define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0
1296
#define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1
1297
#define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2
1298
1299
#define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0
1300
#define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1
1301
1302
/*******************************************
1303
* cl_intel_unified_shared_memory extension *
1304
********************************************/
1305
1306
/* These APIs are in sync with Revision Q of the cl_intel_unified_shared_memory spec! */
1307
1308
#define cl_intel_unified_shared_memory 1
1309
1310
/* cl_device_info */
1311
#define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190
1312
#define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191
1313
#define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192
1314
#define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193
1315
#define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194
1316
1317
typedef cl_bitfield cl_device_unified_shared_memory_capabilities_intel;
1318
1319
/* cl_device_unified_shared_memory_capabilities_intel - bitfield */
1320
#define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0)
1321
#define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1)
1322
#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2)
1323
#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3)
1324
1325
typedef cl_properties cl_mem_properties_intel;
1326
1327
/* cl_mem_properties_intel */
1328
#define CL_MEM_ALLOC_FLAGS_INTEL 0x4195
1329
1330
typedef cl_bitfield cl_mem_alloc_flags_intel;
1331
1332
/* cl_mem_alloc_flags_intel - bitfield */
1333
#define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0)
1334
1335
typedef cl_uint cl_mem_info_intel;
1336
1337
/* cl_mem_alloc_info_intel */
1338
#define CL_MEM_ALLOC_TYPE_INTEL 0x419A
1339
#define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B
1340
#define CL_MEM_ALLOC_SIZE_INTEL 0x419C
1341
#define CL_MEM_ALLOC_DEVICE_INTEL 0x419D
1342
/* Enum values 0x419E-0x419F are reserved for future queries. */
1343
1344
typedef cl_uint cl_unified_shared_memory_type_intel;
1345
1346
/* cl_unified_shared_memory_type_intel */
1347
#define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196
1348
#define CL_MEM_TYPE_HOST_INTEL 0x4197
1349
#define CL_MEM_TYPE_DEVICE_INTEL 0x4198
1350
#define CL_MEM_TYPE_SHARED_INTEL 0x4199
1351
1352
typedef cl_uint cl_mem_advice_intel;
1353
1354
/* cl_mem_advice_intel */
1355
/* Enum values 0x4208-0x420F are reserved for future memory advices. */
1356
1357
/* cl_kernel_exec_info */
1358
#define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200
1359
#define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201
1360
#define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202
1361
#define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203
1362
1363
/* cl_command_type */
1364
#define CL_COMMAND_MEMFILL_INTEL 0x4204
1365
#define CL_COMMAND_MEMCPY_INTEL 0x4205
1366
#define CL_COMMAND_MIGRATEMEM_INTEL 0x4206
1367
#define CL_COMMAND_MEMADVISE_INTEL 0x4207
1368
1369
extern CL_API_ENTRY void* CL_API_CALL
1370
clHostMemAllocINTEL(
1371
cl_context context,
1372
const cl_mem_properties_intel* properties,
1373
size_t size,
1374
cl_uint alignment,
1375
cl_int* errcode_ret);
1376
1377
typedef void* (CL_API_CALL *
1378
clHostMemAllocINTEL_fn)(
1379
cl_context context,
1380
const cl_mem_properties_intel* properties,
1381
size_t size,
1382
cl_uint alignment,
1383
cl_int* errcode_ret);
1384
1385
extern CL_API_ENTRY void* CL_API_CALL
1386
clDeviceMemAllocINTEL(
1387
cl_context context,
1388
cl_device_id device,
1389
const cl_mem_properties_intel* properties,
1390
size_t size,
1391
cl_uint alignment,
1392
cl_int* errcode_ret);
1393
1394
typedef void* (CL_API_CALL *
1395
clDeviceMemAllocINTEL_fn)(
1396
cl_context context,
1397
cl_device_id device,
1398
const cl_mem_properties_intel* properties,
1399
size_t size,
1400
cl_uint alignment,
1401
cl_int* errcode_ret);
1402
1403
extern CL_API_ENTRY void* CL_API_CALL
1404
clSharedMemAllocINTEL(
1405
cl_context context,
1406
cl_device_id device,
1407
const cl_mem_properties_intel* properties,
1408
size_t size,
1409
cl_uint alignment,
1410
cl_int* errcode_ret);
1411
1412
typedef void* (CL_API_CALL *
1413
clSharedMemAllocINTEL_fn)(
1414
cl_context context,
1415
cl_device_id device,
1416
const cl_mem_properties_intel* properties,
1417
size_t size,
1418
cl_uint alignment,
1419
cl_int* errcode_ret);
1420
1421
extern CL_API_ENTRY cl_int CL_API_CALL
1422
clMemFreeINTEL(
1423
cl_context context,
1424
void* ptr);
1425
1426
typedef cl_int (CL_API_CALL *
1427
clMemFreeINTEL_fn)(
1428
cl_context context,
1429
void* ptr);
1430
1431
extern CL_API_ENTRY cl_int CL_API_CALL
1432
clMemBlockingFreeINTEL(
1433
cl_context context,
1434
void* ptr);
1435
1436
typedef cl_int (CL_API_CALL *
1437
clMemBlockingFreeINTEL_fn)(
1438
cl_context context,
1439
void* ptr);
1440
1441
extern CL_API_ENTRY cl_int CL_API_CALL
1442
clGetMemAllocInfoINTEL(
1443
cl_context context,
1444
const void* ptr,
1445
cl_mem_info_intel param_name,
1446
size_t param_value_size,
1447
void* param_value,
1448
size_t* param_value_size_ret);
1449
1450
typedef cl_int (CL_API_CALL *
1451
clGetMemAllocInfoINTEL_fn)(
1452
cl_context context,
1453
const void* ptr,
1454
cl_mem_info_intel param_name,
1455
size_t param_value_size,
1456
void* param_value,
1457
size_t* param_value_size_ret);
1458
1459
extern CL_API_ENTRY cl_int CL_API_CALL
1460
clSetKernelArgMemPointerINTEL(
1461
cl_kernel kernel,
1462
cl_uint arg_index,
1463
const void* arg_value);
1464
1465
typedef cl_int (CL_API_CALL *
1466
clSetKernelArgMemPointerINTEL_fn)(
1467
cl_kernel kernel,
1468
cl_uint arg_index,
1469
const void* arg_value);
1470
1471
extern CL_API_ENTRY cl_int CL_API_CALL
1472
clEnqueueMemsetINTEL( /* Deprecated */
1473
cl_command_queue command_queue,
1474
void* dst_ptr,
1475
cl_int value,
1476
size_t size,
1477
cl_uint num_events_in_wait_list,
1478
const cl_event* event_wait_list,
1479
cl_event* event);
1480
1481
typedef cl_int (CL_API_CALL *
1482
clEnqueueMemsetINTEL_fn)( /* Deprecated */
1483
cl_command_queue command_queue,
1484
void* dst_ptr,
1485
cl_int value,
1486
size_t size,
1487
cl_uint num_events_in_wait_list,
1488
const cl_event* event_wait_list,
1489
cl_event* event);
1490
1491
extern CL_API_ENTRY cl_int CL_API_CALL
1492
clEnqueueMemFillINTEL(
1493
cl_command_queue command_queue,
1494
void* dst_ptr,
1495
const void* pattern,
1496
size_t pattern_size,
1497
size_t size,
1498
cl_uint num_events_in_wait_list,
1499
const cl_event* event_wait_list,
1500
cl_event* event);
1501
1502
typedef cl_int (CL_API_CALL *
1503
clEnqueueMemFillINTEL_fn)(
1504
cl_command_queue command_queue,
1505
void* dst_ptr,
1506
const void* pattern,
1507
size_t pattern_size,
1508
size_t size,
1509
cl_uint num_events_in_wait_list,
1510
const cl_event* event_wait_list,
1511
cl_event* event);
1512
1513
extern CL_API_ENTRY cl_int CL_API_CALL
1514
clEnqueueMemcpyINTEL(
1515
cl_command_queue command_queue,
1516
cl_bool blocking,
1517
void* dst_ptr,
1518
const void* src_ptr,
1519
size_t size,
1520
cl_uint num_events_in_wait_list,
1521
const cl_event* event_wait_list,
1522
cl_event* event);
1523
1524
typedef cl_int (CL_API_CALL *
1525
clEnqueueMemcpyINTEL_fn)(
1526
cl_command_queue command_queue,
1527
cl_bool blocking,
1528
void* dst_ptr,
1529
const void* src_ptr,
1530
size_t size,
1531
cl_uint num_events_in_wait_list,
1532
const cl_event* event_wait_list,
1533
cl_event* event);
1534
1535
#ifdef CL_VERSION_1_2
1536
1537
/* Because these APIs use cl_mem_migration_flags, they require
1538
OpenCL 1.2: */
1539
1540
extern CL_API_ENTRY cl_int CL_API_CALL
1541
clEnqueueMigrateMemINTEL(
1542
cl_command_queue command_queue,
1543
const void* ptr,
1544
size_t size,
1545
cl_mem_migration_flags flags,
1546
cl_uint num_events_in_wait_list,
1547
const cl_event* event_wait_list,
1548
cl_event* event);
1549
1550
typedef cl_int (CL_API_CALL *
1551
clEnqueueMigrateMemINTEL_fn)(
1552
cl_command_queue command_queue,
1553
const void* ptr,
1554
size_t size,
1555
cl_mem_migration_flags flags,
1556
cl_uint num_events_in_wait_list,
1557
const cl_event* event_wait_list,
1558
cl_event* event);
1559
1560
#endif
1561
1562
extern CL_API_ENTRY cl_int CL_API_CALL
1563
clEnqueueMemAdviseINTEL(
1564
cl_command_queue command_queue,
1565
const void* ptr,
1566
size_t size,
1567
cl_mem_advice_intel advice,
1568
cl_uint num_events_in_wait_list,
1569
const cl_event* event_wait_list,
1570
cl_event* event);
1571
1572
typedef cl_int (CL_API_CALL *
1573
clEnqueueMemAdviseINTEL_fn)(
1574
cl_command_queue command_queue,
1575
const void* ptr,
1576
size_t size,
1577
cl_mem_advice_intel advice,
1578
cl_uint num_events_in_wait_list,
1579
const cl_event* event_wait_list,
1580
cl_event* event);
1581
1582
/***************************************************
1583
* cl_intel_create_buffer_with_properties extension *
1584
****************************************************/
1585
1586
#define cl_intel_create_buffer_with_properties 1
1587
1588
extern CL_API_ENTRY cl_mem CL_API_CALL
1589
clCreateBufferWithPropertiesINTEL(
1590
cl_context context,
1591
const cl_mem_properties_intel* properties,
1592
cl_mem_flags flags,
1593
size_t size,
1594
void * host_ptr,
1595
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
1596
1597
typedef cl_mem (CL_API_CALL *
1598
clCreateBufferWithPropertiesINTEL_fn)(
1599
cl_context context,
1600
const cl_mem_properties_intel* properties,
1601
cl_mem_flags flags,
1602
size_t size,
1603
void * host_ptr,
1604
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
1605
1606
/******************************************
1607
* cl_intel_mem_channel_property extension *
1608
*******************************************/
1609
1610
#define CL_MEM_CHANNEL_INTEL 0x4213
1611
1612
/*********************************
1613
* cl_intel_mem_force_host_memory *
1614
**********************************/
1615
1616
#define cl_intel_mem_force_host_memory 1
1617
1618
/* cl_mem_flags */
1619
#define CL_MEM_FORCE_HOST_MEMORY_INTEL (1 << 20)
1620
1621
/***************************************************************
1622
* cl_intel_command_queue_families
1623
***************************************************************/
1624
#define cl_intel_command_queue_families 1
1625
1626
typedef cl_bitfield cl_command_queue_capabilities_intel;
1627
1628
#define CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL 64
1629
1630
typedef struct _cl_queue_family_properties_intel {
1631
cl_command_queue_properties properties;
1632
cl_command_queue_capabilities_intel capabilities;
1633
cl_uint count;
1634
char name[CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL];
1635
} cl_queue_family_properties_intel;
1636
1637
/* cl_device_info */
1638
#define CL_DEVICE_QUEUE_FAMILY_PROPERTIES_INTEL 0x418B
1639
1640
/* cl_queue_properties */
1641
#define CL_QUEUE_FAMILY_INTEL 0x418C
1642
#define CL_QUEUE_INDEX_INTEL 0x418D
1643
1644
/* cl_command_queue_capabilities_intel */
1645
#define CL_QUEUE_DEFAULT_CAPABILITIES_INTEL 0
1646
#define CL_QUEUE_CAPABILITY_CREATE_SINGLE_QUEUE_EVENTS_INTEL (1 << 0)
1647
#define CL_QUEUE_CAPABILITY_CREATE_CROSS_QUEUE_EVENTS_INTEL (1 << 1)
1648
#define CL_QUEUE_CAPABILITY_SINGLE_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 2)
1649
#define CL_QUEUE_CAPABILITY_CROSS_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 3)
1650
#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_INTEL (1 << 8)
1651
#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_RECT_INTEL (1 << 9)
1652
#define CL_QUEUE_CAPABILITY_MAP_BUFFER_INTEL (1 << 10)
1653
#define CL_QUEUE_CAPABILITY_FILL_BUFFER_INTEL (1 << 11)
1654
#define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_INTEL (1 << 12)
1655
#define CL_QUEUE_CAPABILITY_MAP_IMAGE_INTEL (1 << 13)
1656
#define CL_QUEUE_CAPABILITY_FILL_IMAGE_INTEL (1 << 14)
1657
#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_IMAGE_INTEL (1 << 15)
1658
#define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_BUFFER_INTEL (1 << 16)
1659
#define CL_QUEUE_CAPABILITY_MARKER_INTEL (1 << 24)
1660
#define CL_QUEUE_CAPABILITY_BARRIER_INTEL (1 << 25)
1661
#define CL_QUEUE_CAPABILITY_KERNEL_INTEL (1 << 26)
1662
1663
#ifdef __cplusplus
1664
}
1665
#endif
1666
1667
1668
#endif /* __CL_EXT_H */
1669
1670