Path: blob/main_old/include/platform/FeaturesD3D.h
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//1// Copyright 2015 The ANGLE Project Authors. All rights reserved.2// Use of this source code is governed by a BSD-style license that can be3// found in the LICENSE file.4//56// FeaturesD3D.h: Features and workarounds for D3D driver bugs and other issues.78#ifndef ANGLE_PLATFORM_FEATURESD3D_H_9#define ANGLE_PLATFORM_FEATURESD3D_H_1011#include "platform/Feature.h"1213namespace angle14{1516// Workarounds attached to each shader. Do not need to expose information about these workarounds so17// a simple bool struct suffices.18struct CompilerWorkaroundsD3D19{20bool skipOptimization = false;2122bool useMaxOptimization = false;2324// IEEE strictness needs to be enabled for NANs to work.25bool enableIEEEStrictness = false;26};2728struct FeaturesD3D : FeatureSetBase29{30FeaturesD3D();31~FeaturesD3D();3233// On some systems, having extra rendertargets than necessary slows down the shader.34// We can fix this by optimizing those out of the shader. At the same time, we can35// work around a bug on some nVidia drivers that they ignore "null" render targets36// in D3D11, by compacting the active color attachments list to omit null entries.37Feature mrtPerfWorkaround = {"mrt_perf_workaround", FeatureCategory::D3DWorkarounds,38"Some drivers have a bug where they ignore null render targets",39&members};4041Feature setDataFasterThanImageUpload = {"set_data_faster_than_image_upload",42FeatureCategory::D3DWorkarounds,43"Set data faster than image upload", &members};4445// Some renderers can't disable mipmaps on a mipmapped texture (i.e. solely sample from level46// zero, and ignore the other levels). D3D11 Feature Level 10+ does this by setting MaxLOD to47// 0.0f in the Sampler state. D3D9 sets D3DSAMP_MIPFILTER to D3DTEXF_NONE. There is no48// equivalent to this in D3D11 Feature Level 9_3. This causes problems when (for example) an49// application creates a mipmapped texture2D, but sets GL_TEXTURE_MIN_FILTER to GL_NEAREST50// (i.e disables mipmaps). To work around this, D3D11 FL9_3 has to create two copies of the51// texture. The textures' level zeros are identical, but only one texture has mips.52Feature zeroMaxLodWorkaround = {"zero_max_lod", FeatureCategory::D3DWorkarounds,53"Missing an option to disable mipmaps on a mipmapped texture",54&members};5556// Some renderers do not support Geometry Shaders so the Geometry Shader-based PointSprite57// emulation will not work. To work around this, D3D11 FL9_3 has to use a different pointsprite58// emulation that is implemented using instanced quads.59Feature useInstancedPointSpriteEmulation = {60"use_instanced_point_sprite_emulation", FeatureCategory::D3DWorkarounds,61"Some D3D11 renderers do not support geometry shaders for pointsprite emulation", &members};6263// A bug fixed in NVIDIA driver version 347.88 < x <= 368.81 triggers a TDR when using64// CopySubresourceRegion from a staging texture to a depth/stencil in D3D11. The workaround65// is to use UpdateSubresource to trigger an extra copy. We disable this workaround on newer66// NVIDIA driver versions because of a second driver bug present with the workaround enabled.67// (See: http://anglebug.com/1452)68Feature depthStencilBlitExtraCopy = {69"depth_stencil_blit_extra_copy", FeatureCategory::D3DWorkarounds,70"Bug in some drivers triggers a TDR when using CopySubresourceRegion from a staging "71"texture to a depth/stencil",72&members, "http://anglebug.com/1452"};7374// The HLSL optimizer has a bug with optimizing "pow" in certain integer-valued expressions.75// We can work around this by expanding the pow into a series of multiplies if we're running76// under the affected compiler.77Feature expandIntegerPowExpressions = {78"expand_integer_pow_expressions", FeatureCategory::D3DWorkarounds,79"The HLSL optimizer has a bug with optimizing 'pow' in certain integer-valued expressions",80&members};8182// NVIDIA drivers sometimes write out-of-order results to StreamOut buffers when transform83// feedback is used to repeatedly write to the same buffer positions.84Feature flushAfterEndingTransformFeedback = {85"flush_after_ending_transform_feedback", FeatureCategory::D3DWorkarounds,86"Some drivers sometimes write out-of-order results to StreamOut buffers when transform "87"feedback is used to repeatedly write to the same buffer positions",88&members};8990// Some drivers (NVIDIA) do not take into account the base level of the texture in the results91// of the HLSL GetDimensions builtin.92Feature getDimensionsIgnoresBaseLevel = {93"get_dimensions_ignores_base_level", FeatureCategory::D3DWorkarounds,94"Some drivers do not take into account the base level of the "95"texture in the results of the HLSL GetDimensions builtin",96&members};9798// On some Intel drivers, HLSL's function texture.Load returns 0 when the parameter Location99// is negative, even if the sum of Offset and Location is in range. This may cause errors when100// translating GLSL's function texelFetchOffset into texture.Load, as it is valid for101// texelFetchOffset to use negative texture coordinates as its parameter P when the sum of P102// and Offset is in range. To work around this, we translate texelFetchOffset into texelFetch103// by adding Offset directly to Location before reading the texture.104Feature preAddTexelFetchOffsets = {105"pre_add_texel_fetch_offsets", FeatureCategory::D3DWorkarounds,106"HLSL's function texture.Load returns 0 when the parameter Location is negative, even if "107"the sum of Offset and Location is in range",108&members};109110// On some AMD drivers, 1x1 and 2x2 mips of depth/stencil textures aren't sampled correctly.111// We can work around this bug by doing an internal blit to a temporary single-channel texture112// before we sample.113Feature emulateTinyStencilTextures = {114"emulate_tiny_stencil_textures", FeatureCategory::D3DWorkarounds,115"1x1 and 2x2 mips of depth/stencil textures aren't sampled correctly", &members};116117// In Intel driver, the data with format DXGI_FORMAT_B5G6R5_UNORM will be parsed incorrectly.118// This workaroud will disable B5G6R5 support when it's Intel driver. By default, it will use119// R8G8B8A8 format. This bug is fixed in version 4539 on Intel drivers.120// On older AMD drivers, the data in DXGI_FORMAT_B5G6R5_UNORM becomes corrupted for unknown121// reasons.122Feature disableB5G6R5Support = {"disable_b5g6r5_support", FeatureCategory::D3DWorkarounds,123"Textures with the format "124"DXGI_FORMAT_B5G6R5_UNORM have incorrect data",125&members};126127// On some Intel drivers, evaluating unary minus operator on integer may get wrong answer in128// vertex shaders. To work around this bug, we translate -(int) into ~(int)+1.129// This driver bug is fixed in 20.19.15.4624.130Feature rewriteUnaryMinusOperator = {131"rewrite_unary_minus_operator", FeatureCategory::D3DWorkarounds,132"Evaluating unary minus operator on integer may get wrong answer in vertex shaders",133&members};134135// On some Intel drivers, using isnan() on highp float will get wrong answer. To work around136// this bug, we use an expression to emulate function isnan().137// Tracking bug: https://crbug.com/650547138// This driver bug is fixed in 21.20.16.4542.139Feature emulateIsnanFloat = {"emulate_isnan_float", FeatureCategory::D3DWorkarounds,140"Using isnan() on highp float will get wrong answer", &members,141"https://crbug.com/650547"};142143// On some Intel drivers, using clear() may not take effect. To work around this bug, we call144// clear() twice on these platforms.145// Tracking bug: https://crbug.com/655534146Feature callClearTwice = {"call_clear_twice", FeatureCategory::D3DWorkarounds,147"Using clear() may not take effect", &members,148"https://crbug.com/655534"};149150// On some Intel drivers, copying from staging storage to constant buffer storage does not151// seem to work. Work around this by keeping system memory storage as a canonical reference152// for buffer data.153// D3D11-only workaround. See http://crbug.com/593024.154Feature useSystemMemoryForConstantBuffers = {"use_system_memory_for_constant_buffers",155FeatureCategory::D3DWorkarounds,156"Copying from staging storage to constant buffer "157"storage does not work",158&members, "https://crbug.com/593024"};159160// This workaround is for the ANGLE_multiview extension. If enabled the viewport or render161// target slice will be selected in the geometry shader stage. The workaround flag is added to162// make it possible to select the code path in end2end and performance tests.163Feature selectViewInGeometryShader = {164"select_view_in_geometry_shader", FeatureCategory::D3DWorkarounds,165"The viewport or render target slice will be selected in the geometry shader stage for "166"the ANGLE_multiview extension",167&members};168169// When rendering with no render target on D3D, two bugs lead to incorrect behavior on Intel170// drivers < 4815. The rendering samples always pass neglecting discard statements in pixel171// shader.172// 1. If rendertarget is not set, the pixel shader will be recompiled to drop 'SV_TARGET'.173// When using a pixel shader with no 'SV_TARGET' in a draw, the pixels are always generated even174// if they should be discard by 'discard' statements.175// 2. If ID3D11BlendState.RenderTarget[].RenderTargetWriteMask is 0 and rendertarget is not set,176// then rendering samples also pass neglecting discard statements in pixel shader.177// So we add a mock texture as render target in such case. See http://anglebug.com/2152178Feature addMockTextureNoRenderTarget = {179"add_mock_texture_no_render_target", FeatureCategory::D3DWorkarounds,180"On some drivers when rendering with no render target, two bugs lead to incorrect behavior",181&members, "http://anglebug.com/2152"};182183// Don't use D3D constant register zero when allocating space for uniforms in the vertex shader.184// This is targeted to work around a bug in NVIDIA D3D driver version 388.59 where in very185// specific cases the driver would not handle constant register zero correctly.186Feature skipVSConstantRegisterZero = {187"skip_vs_constant_register_zero", FeatureCategory::D3DWorkarounds,188"In specific cases the driver doesn't handle constant register zero correctly", &members};189190// Forces the value returned from an atomic operations to be always be resolved. This is191// targeted to workaround a bug in NVIDIA D3D driver where the return value from192// RWByteAddressBuffer.InterlockedAdd does not get resolved when used in the .yzw components of193// a RWByteAddressBuffer.Store operation. Only has an effect on HLSL translation.194// http://anglebug.com/3246195Feature forceAtomicValueResolution = {196"force_atomic_value_resolution", FeatureCategory::D3DWorkarounds,197"On some drivers the return value from RWByteAddressBuffer.InterlockedAdd does not resolve "198"when used in the .yzw components of a RWByteAddressBuffer.Store operation",199&members, "http://anglebug.com/3246"};200201// Match chromium's robust resource init behaviour by always prefering to upload texture data202// instead of clearing. Clear calls have been observed to cause texture corruption for some203// formats.204Feature allowClearForRobustResourceInit = {205"allow_clear_for_robust_resource_init", FeatureCategory::D3DWorkarounds,206"Some drivers corrupt texture data when clearing for robust resource initialization.",207&members, "http://crbug.com/941620"};208209// Allow translating uniform block to StructuredBuffer. This is targeted to work around a slow210// fxc compile performance issue with dynamic uniform indexing. http://anglebug.com/3682211Feature allowTranslateUniformBlockToStructuredBuffer = {212"allow_translate_uniform_block_to_structured_buffer", FeatureCategory::D3DWorkarounds,213"There is a slow fxc compile performance issue with dynamic uniform indexing if "214"translating a uniform block with a large array member to cbuffer.",215&members, "http://anglebug.com/3682"};216217Feature allowES3OnFL10_0 = {"allowES3OnFL10_0", FeatureCategory::D3DWorkarounds,218"Allow ES3 on 10.0 devices", &members};219};220221inline FeaturesD3D::FeaturesD3D() = default;222inline FeaturesD3D::~FeaturesD3D() = default;223224} // namespace angle225226#endif // ANGLE_PLATFORM_FEATURESD3D_H_227228229