Path: blob/21.2-virgl/include/drm-uapi/tegra_drm.h
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/*1* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*/2122#ifndef _TEGRA_DRM_H_23#define _TEGRA_DRM_H_2425#include "drm.h"2627#if defined(__cplusplus)28extern "C" {29#endif3031#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)32#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)3334/**35* struct drm_tegra_gem_create - parameters for the GEM object creation IOCTL36*/37struct drm_tegra_gem_create {38/**39* @size:40*41* The size, in bytes, of the buffer object to be created.42*/43__u64 size;4445/**46* @flags:47*48* A bitmask of flags that influence the creation of GEM objects:49*50* DRM_TEGRA_GEM_CREATE_TILED51* Use the 16x16 tiling format for this buffer.52*53* DRM_TEGRA_GEM_CREATE_BOTTOM_UP54* The buffer has a bottom-up layout.55*/56__u32 flags;5758/**59* @handle:60*61* The handle of the created GEM object. Set by the kernel upon62* successful completion of the IOCTL.63*/64__u32 handle;65};6667/**68* struct drm_tegra_gem_mmap - parameters for the GEM mmap IOCTL69*/70struct drm_tegra_gem_mmap {71/**72* @handle:73*74* Handle of the GEM object to obtain an mmap offset for.75*/76__u32 handle;7778/**79* @pad:80*81* Structure padding that may be used in the future. Must be 0.82*/83__u32 pad;8485/**86* @offset:87*88* The mmap offset for the given GEM object. Set by the kernel upon89* successful completion of the IOCTL.90*/91__u64 offset;92};9394/**95* struct drm_tegra_syncpt_read - parameters for the read syncpoint IOCTL96*/97struct drm_tegra_syncpt_read {98/**99* @id:100*101* ID of the syncpoint to read the current value from.102*/103__u32 id;104105/**106* @value:107*108* The current syncpoint value. Set by the kernel upon successful109* completion of the IOCTL.110*/111__u32 value;112};113114/**115* struct drm_tegra_syncpt_incr - parameters for the increment syncpoint IOCTL116*/117struct drm_tegra_syncpt_incr {118/**119* @id:120*121* ID of the syncpoint to increment.122*/123__u32 id;124125/**126* @pad:127*128* Structure padding that may be used in the future. Must be 0.129*/130__u32 pad;131};132133/**134* struct drm_tegra_syncpt_wait - parameters for the wait syncpoint IOCTL135*/136struct drm_tegra_syncpt_wait {137/**138* @id:139*140* ID of the syncpoint to wait on.141*/142__u32 id;143144/**145* @thresh:146*147* Threshold value for which to wait.148*/149__u32 thresh;150151/**152* @timeout:153*154* Timeout, in milliseconds, to wait.155*/156__u32 timeout;157158/**159* @value:160*161* The new syncpoint value after the wait. Set by the kernel upon162* successful completion of the IOCTL.163*/164__u32 value;165};166167#define DRM_TEGRA_NO_TIMEOUT (0xffffffff)168169/**170* struct drm_tegra_open_channel - parameters for the open channel IOCTL171*/172struct drm_tegra_open_channel {173/**174* @client:175*176* The client ID for this channel.177*/178__u32 client;179180/**181* @pad:182*183* Structure padding that may be used in the future. Must be 0.184*/185__u32 pad;186187/**188* @context:189*190* The application context of this channel. Set by the kernel upon191* successful completion of the IOCTL. This context needs to be passed192* to the DRM_TEGRA_CHANNEL_CLOSE or the DRM_TEGRA_SUBMIT IOCTLs.193*/194__u64 context;195};196197/**198* struct drm_tegra_close_channel - parameters for the close channel IOCTL199*/200struct drm_tegra_close_channel {201/**202* @context:203*204* The application context of this channel. This is obtained from the205* DRM_TEGRA_OPEN_CHANNEL IOCTL.206*/207__u64 context;208};209210/**211* struct drm_tegra_get_syncpt - parameters for the get syncpoint IOCTL212*/213struct drm_tegra_get_syncpt {214/**215* @context:216*217* The application context identifying the channel for which to obtain218* the syncpoint ID.219*/220__u64 context;221222/**223* @index:224*225* Index of the client syncpoint for which to obtain the ID.226*/227__u32 index;228229/**230* @id:231*232* The ID of the given syncpoint. Set by the kernel upon successful233* completion of the IOCTL.234*/235__u32 id;236};237238/**239* struct drm_tegra_get_syncpt_base - parameters for the get wait base IOCTL240*/241struct drm_tegra_get_syncpt_base {242/**243* @context:244*245* The application context identifying for which channel to obtain the246* wait base.247*/248__u64 context;249250/**251* @syncpt:252*253* ID of the syncpoint for which to obtain the wait base.254*/255__u32 syncpt;256257/**258* @id:259*260* The ID of the wait base corresponding to the client syncpoint. Set261* by the kernel upon successful completion of the IOCTL.262*/263__u32 id;264};265266/**267* struct drm_tegra_syncpt - syncpoint increment operation268*/269struct drm_tegra_syncpt {270/**271* @id:272*273* ID of the syncpoint to operate on.274*/275__u32 id;276277/**278* @incrs:279*280* Number of increments to perform for the syncpoint.281*/282__u32 incrs;283};284285/**286* struct drm_tegra_cmdbuf - structure describing a command buffer287*/288struct drm_tegra_cmdbuf {289/**290* @handle:291*292* Handle to a GEM object containing the command buffer.293*/294__u32 handle;295296/**297* @offset:298*299* Offset, in bytes, into the GEM object identified by @handle at300* which the command buffer starts.301*/302__u32 offset;303304/**305* @words:306*307* Number of 32-bit words in this command buffer.308*/309__u32 words;310311/**312* @pad:313*314* Structure padding that may be used in the future. Must be 0.315*/316__u32 pad;317};318319/**320* struct drm_tegra_reloc - GEM object relocation structure321*/322struct drm_tegra_reloc {323struct {324/**325* @cmdbuf.handle:326*327* Handle to the GEM object containing the command buffer for328* which to perform this GEM object relocation.329*/330__u32 handle;331332/**333* @cmdbuf.offset:334*335* Offset, in bytes, into the command buffer at which to336* insert the relocated address.337*/338__u32 offset;339} cmdbuf;340struct {341/**342* @target.handle:343*344* Handle to the GEM object to be relocated.345*/346__u32 handle;347348/**349* @target.offset:350*351* Offset, in bytes, into the target GEM object at which the352* relocated data starts.353*/354__u32 offset;355} target;356357/**358* @shift:359*360* The number of bits by which to shift relocated addresses.361*/362__u32 shift;363364/**365* @pad:366*367* Structure padding that may be used in the future. Must be 0.368*/369__u32 pad;370};371372/**373* struct drm_tegra_waitchk - wait check structure374*/375struct drm_tegra_waitchk {376/**377* @handle:378*379* Handle to the GEM object containing a command stream on which to380* perform the wait check.381*/382__u32 handle;383384/**385* @offset:386*387* Offset, in bytes, of the location in the command stream to perform388* the wait check on.389*/390__u32 offset;391392/**393* @syncpt:394*395* ID of the syncpoint to wait check.396*/397__u32 syncpt;398399/**400* @thresh:401*402* Threshold value for which to check.403*/404__u32 thresh;405};406407/**408* struct drm_tegra_submit - job submission structure409*/410struct drm_tegra_submit {411/**412* @context:413*414* The application context identifying the channel to use for the415* execution of this job.416*/417__u64 context;418419/**420* @num_syncpts:421*422* The number of syncpoints operated on by this job. This defines the423* length of the array pointed to by @syncpts.424*/425__u32 num_syncpts;426427/**428* @num_cmdbufs:429*430* The number of command buffers to execute as part of this job. This431* defines the length of the array pointed to by @cmdbufs.432*/433__u32 num_cmdbufs;434435/**436* @num_relocs:437*438* The number of relocations to perform before executing this job.439* This defines the length of the array pointed to by @relocs.440*/441__u32 num_relocs;442443/**444* @num_waitchks:445*446* The number of wait checks to perform as part of this job. This447* defines the length of the array pointed to by @waitchks.448*/449__u32 num_waitchks;450451/**452* @waitchk_mask:453*454* Bitmask of valid wait checks.455*/456__u32 waitchk_mask;457458/**459* @timeout:460*461* Timeout, in milliseconds, before this job is cancelled.462*/463__u32 timeout;464465/**466* @syncpts:467*468* A pointer to an array of &struct drm_tegra_syncpt structures that469* specify the syncpoint operations performed as part of this job.470* The number of elements in the array must be equal to the value471* given by @num_syncpts.472*/473__u64 syncpts;474475/**476* @cmdbufs:477*478* A pointer to an array of &struct drm_tegra_cmdbuf structures that479* define the command buffers to execute as part of this job. The480* number of elements in the array must be equal to the value given481* by @num_syncpts.482*/483__u64 cmdbufs;484485/**486* @relocs:487*488* A pointer to an array of &struct drm_tegra_reloc structures that489* specify the relocations that need to be performed before executing490* this job. The number of elements in the array must be equal to the491* value given by @num_relocs.492*/493__u64 relocs;494495/**496* @waitchks:497*498* A pointer to an array of &struct drm_tegra_waitchk structures that499* specify the wait checks to be performed while executing this job.500* The number of elements in the array must be equal to the value501* given by @num_waitchks.502*/503__u64 waitchks;504505/**506* @fence:507*508* The threshold of the syncpoint associated with this job after it509* has been completed. Set by the kernel upon successful completion of510* the IOCTL. This can be used with the DRM_TEGRA_SYNCPT_WAIT IOCTL to511* wait for this job to be finished.512*/513__u32 fence;514515/**516* @reserved:517*518* This field is reserved for future use. Must be 0.519*/520__u32 reserved[5];521};522523#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0524#define DRM_TEGRA_GEM_TILING_MODE_TILED 1525#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2526527/**528* struct drm_tegra_gem_set_tiling - parameters for the set tiling IOCTL529*/530struct drm_tegra_gem_set_tiling {531/**532* @handle:533*534* Handle to the GEM object for which to set the tiling parameters.535*/536__u32 handle;537538/**539* @mode:540*541* The tiling mode to set. Must be one of:542*543* DRM_TEGRA_GEM_TILING_MODE_PITCH544* pitch linear format545*546* DRM_TEGRA_GEM_TILING_MODE_TILED547* 16x16 tiling format548*549* DRM_TEGRA_GEM_TILING_MODE_BLOCK550* 16Bx2 tiling format551*/552__u32 mode;553554/**555* @value:556*557* The value to set for the tiling mode parameter.558*/559__u32 value;560561/**562* @pad:563*564* Structure padding that may be used in the future. Must be 0.565*/566__u32 pad;567};568569/**570* struct drm_tegra_gem_get_tiling - parameters for the get tiling IOCTL571*/572struct drm_tegra_gem_get_tiling {573/**574* @handle:575*576* Handle to the GEM object for which to query the tiling parameters.577*/578__u32 handle;579580/**581* @mode:582*583* The tiling mode currently associated with the GEM object. Set by584* the kernel upon successful completion of the IOCTL.585*/586__u32 mode;587588/**589* @value:590*591* The tiling mode parameter currently associated with the GEM object.592* Set by the kernel upon successful completion of the IOCTL.593*/594__u32 value;595596/**597* @pad:598*599* Structure padding that may be used in the future. Must be 0.600*/601__u32 pad;602};603604#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)605#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)606607/**608* struct drm_tegra_gem_set_flags - parameters for the set flags IOCTL609*/610struct drm_tegra_gem_set_flags {611/**612* @handle:613*614* Handle to the GEM object for which to set the flags.615*/616__u32 handle;617618/**619* @flags:620*621* The flags to set for the GEM object.622*/623__u32 flags;624};625626/**627* struct drm_tegra_gem_get_flags - parameters for the get flags IOCTL628*/629struct drm_tegra_gem_get_flags {630/**631* @handle:632*633* Handle to the GEM object for which to query the flags.634*/635__u32 handle;636637/**638* @flags:639*640* The flags currently associated with the GEM object. Set by the641* kernel upon successful completion of the IOCTL.642*/643__u32 flags;644};645646#define DRM_TEGRA_GEM_CREATE 0x00647#define DRM_TEGRA_GEM_MMAP 0x01648#define DRM_TEGRA_SYNCPT_READ 0x02649#define DRM_TEGRA_SYNCPT_INCR 0x03650#define DRM_TEGRA_SYNCPT_WAIT 0x04651#define DRM_TEGRA_OPEN_CHANNEL 0x05652#define DRM_TEGRA_CLOSE_CHANNEL 0x06653#define DRM_TEGRA_GET_SYNCPT 0x07654#define DRM_TEGRA_SUBMIT 0x08655#define DRM_TEGRA_GET_SYNCPT_BASE 0x09656#define DRM_TEGRA_GEM_SET_TILING 0x0a657#define DRM_TEGRA_GEM_GET_TILING 0x0b658#define DRM_TEGRA_GEM_SET_FLAGS 0x0c659#define DRM_TEGRA_GEM_GET_FLAGS 0x0d660661#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)662#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)663#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)664#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)665#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)666#define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)667#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_close_channel)668#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)669#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)670#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)671#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)672#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)673#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)674#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)675676#if defined(__cplusplus)677}678#endif679680#endif681682683