Path: blob/21.2-virgl/include/drm-uapi/v3d_drm.h
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/*1* Copyright © 2014-2018 Broadcom2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21*/2223#ifndef _V3D_DRM_H_24#define _V3D_DRM_H_2526#include "drm.h"2728#if defined(__cplusplus)29extern "C" {30#endif3132#define DRM_V3D_SUBMIT_CL 0x0033#define DRM_V3D_WAIT_BO 0x0134#define DRM_V3D_CREATE_BO 0x0235#define DRM_V3D_MMAP_BO 0x0336#define DRM_V3D_GET_PARAM 0x0437#define DRM_V3D_GET_BO_OFFSET 0x0538#define DRM_V3D_SUBMIT_TFU 0x0639#define DRM_V3D_SUBMIT_CSD 0x074041#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)42#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)43#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)44#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)45#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)46#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)47#define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)48#define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)4950#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x015152/**53* struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D54* engine.55*56* This asks the kernel to have the GPU execute an optional binner57* command list, and a render command list.58*59* The L1T, slice, L2C, L2T, and GCA caches will be flushed before60* each CL executes. The VCD cache should be flushed (if necessary)61* by the submitted CLs. The TLB writes are guaranteed to have been62* flushed by the time the render done IRQ happens, which is the63* trigger for out_sync. Any dirtying of cachelines by the job (only64* possible using TMU writes) must be flushed by the caller using the65* DRM_V3D_SUBMIT_CL_FLUSH_CACHE_FLAG flag.66*/67struct drm_v3d_submit_cl {68/* Pointer to the binner command list.69*70* This is the first set of commands executed, which runs the71* coordinate shader to determine where primitives land on the screen,72* then writes out the state updates and draw calls necessary per tile73* to the tile allocation BO.74*75* This BCL will block on any previous BCL submitted on the76* same FD, but not on any RCL or BCLs submitted by other77* clients -- that is left up to the submitter to control78* using in_sync_bcl if necessary.79*/80__u32 bcl_start;8182/** End address of the BCL (first byte after the BCL) */83__u32 bcl_end;8485/* Offset of the render command list.86*87* This is the second set of commands executed, which will either88* execute the tiles that have been set up by the BCL, or a fixed set89* of tiles (in the case of RCL-only blits).90*91* This RCL will block on this submit's BCL, and any previous92* RCL submitted on the same FD, but not on any RCL or BCLs93* submitted by other clients -- that is left up to the94* submitter to control using in_sync_rcl if necessary.95*/96__u32 rcl_start;9798/** End address of the RCL (first byte after the RCL) */99__u32 rcl_end;100101/** An optional sync object to wait on before starting the BCL. */102__u32 in_sync_bcl;103/** An optional sync object to wait on before starting the RCL. */104__u32 in_sync_rcl;105/** An optional sync object to place the completion fence in. */106__u32 out_sync;107108/* Offset of the tile alloc memory109*110* This is optional on V3D 3.3 (where the CL can set the value) but111* required on V3D 4.1.112*/113__u32 qma;114115/** Size of the tile alloc memory. */116__u32 qms;117118/** Offset of the tile state data array. */119__u32 qts;120121/* Pointer to a u32 array of the BOs that are referenced by the job.122*/123__u64 bo_handles;124125/* Number of BO handles passed in (size is that times 4). */126__u32 bo_handle_count;127128__u32 flags;129};130131/**132* struct drm_v3d_wait_bo - ioctl argument for waiting for133* completion of the last DRM_V3D_SUBMIT_CL on a BO.134*135* This is useful for cases where multiple processes might be136* rendering to a BO and you want to wait for all rendering to be137* completed.138*/139struct drm_v3d_wait_bo {140__u32 handle;141__u32 pad;142__u64 timeout_ns;143};144145/**146* struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.147*148* There are currently no values for the flags argument, but it may be149* used in a future extension.150*/151struct drm_v3d_create_bo {152__u32 size;153__u32 flags;154/** Returned GEM handle for the BO. */155__u32 handle;156/**157* Returned offset for the BO in the V3D address space. This offset158* is private to the DRM fd and is valid for the lifetime of the GEM159* handle.160*161* This offset value will always be nonzero, since various HW162* units treat 0 specially.163*/164__u32 offset;165};166167/**168* struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.169*170* This doesn't actually perform an mmap. Instead, it returns the171* offset you need to use in an mmap on the DRM device node. This172* means that tools like valgrind end up knowing about the mapped173* memory.174*175* There are currently no values for the flags argument, but it may be176* used in a future extension.177*/178struct drm_v3d_mmap_bo {179/** Handle for the object being mapped. */180__u32 handle;181__u32 flags;182/** offset into the drm node to use for subsequent mmap call. */183__u64 offset;184};185186enum drm_v3d_param {187DRM_V3D_PARAM_V3D_UIFCFG,188DRM_V3D_PARAM_V3D_HUB_IDENT1,189DRM_V3D_PARAM_V3D_HUB_IDENT2,190DRM_V3D_PARAM_V3D_HUB_IDENT3,191DRM_V3D_PARAM_V3D_CORE0_IDENT0,192DRM_V3D_PARAM_V3D_CORE0_IDENT1,193DRM_V3D_PARAM_V3D_CORE0_IDENT2,194DRM_V3D_PARAM_SUPPORTS_TFU,195DRM_V3D_PARAM_SUPPORTS_CSD,196DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH,197};198199struct drm_v3d_get_param {200__u32 param;201__u32 pad;202__u64 value;203};204205/**206* Returns the offset for the BO in the V3D address space for this DRM fd.207* This is the same value returned by drm_v3d_create_bo, if that was called208* from this DRM fd.209*/210struct drm_v3d_get_bo_offset {211__u32 handle;212__u32 offset;213};214215struct drm_v3d_submit_tfu {216__u32 icfg;217__u32 iia;218__u32 iis;219__u32 ica;220__u32 iua;221__u32 ioa;222__u32 ios;223__u32 coef[4];224/* First handle is the output BO, following are other inputs.225* 0 for unused.226*/227__u32 bo_handles[4];228/* sync object to block on before running the TFU job. Each TFU229* job will execute in the order submitted to its FD. Synchronization230* against rendering jobs requires using sync objects.231*/232__u32 in_sync;233/* Sync object to signal when the TFU job is done. */234__u32 out_sync;235};236237/* Submits a compute shader for dispatch. This job will block on any238* previous compute shaders submitted on this fd, and any other239* synchronization must be performed with in_sync/out_sync.240*/241struct drm_v3d_submit_csd {242__u32 cfg[7];243__u32 coef[4];244245/* Pointer to a u32 array of the BOs that are referenced by the job.246*/247__u64 bo_handles;248249/* Number of BO handles passed in (size is that times 4). */250__u32 bo_handle_count;251252/* sync object to block on before running the CSD job. Each253* CSD job will execute in the order submitted to its FD.254* Synchronization against rendering/TFU jobs or CSD from255* other fds requires using sync objects.256*/257__u32 in_sync;258/* Sync object to signal when the CSD job is done. */259__u32 out_sync;260};261262#if defined(__cplusplus)263}264#endif265266#endif /* _V3D_DRM_H_ */267268269