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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/amd/common/ac_debug.c
7097 views
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "ac_debug.h"
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#ifdef HAVE_VALGRIND
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#include <memcheck.h>
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#include <valgrind.h>
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#define VG(x) x
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#else
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#define VG(x) ((void)0)
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#endif
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#include "sid.h"
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#include "sid_tables.h"
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#include "util/compiler.h"
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#include "util/memstream.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "util/u_string.h"
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#include <assert.h>
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#include <inttypes.h>
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/* Parsed IBs are difficult to read without colors. Use "less -R file" to
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* read them, or use "aha -b -f file" to convert them to html.
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*/
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#define COLOR_RESET "\033[0m"
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#define COLOR_RED "\033[31m"
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#define COLOR_GREEN "\033[1;32m"
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#define COLOR_YELLOW "\033[1;33m"
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#define COLOR_CYAN "\033[1;36m"
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#define INDENT_PKT 8
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struct ac_ib_parser {
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FILE *f;
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uint32_t *ib;
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unsigned num_dw;
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const int *trace_ids;
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unsigned trace_id_count;
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enum chip_class chip_class;
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ac_debug_addr_callback addr_callback;
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void *addr_callback_data;
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unsigned cur_dw;
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};
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static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib);
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static void print_spaces(FILE *f, unsigned num)
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{
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fprintf(f, "%*s", num, "");
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}
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static void print_value(FILE *file, uint32_t value, int bits)
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{
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/* Guess if it's int or float */
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if (value <= (1 << 15)) {
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if (value <= 9)
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fprintf(file, "%u\n", value);
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else
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fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
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} else {
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float f = uif(value);
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if (fabs(f) < 100000 && f * 10 == floor(f * 10))
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fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
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else
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/* Don't print more leading zeros than there are bits. */
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fprintf(file, "0x%0*x\n", bits / 4, value);
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}
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}
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static void print_named_value(FILE *file, const char *name, uint32_t value, int bits)
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{
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print_spaces(file, INDENT_PKT);
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fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
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print_value(file, value, bits);
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}
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static const struct si_reg *find_register(enum chip_class chip_class, unsigned offset)
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{
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const struct si_reg *table;
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unsigned table_size;
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switch (chip_class) {
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case GFX10_3:
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case GFX10:
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table = gfx10_reg_table;
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table_size = ARRAY_SIZE(gfx10_reg_table);
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break;
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case GFX9:
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table = gfx9_reg_table;
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table_size = ARRAY_SIZE(gfx9_reg_table);
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break;
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case GFX8:
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table = gfx8_reg_table;
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table_size = ARRAY_SIZE(gfx8_reg_table);
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break;
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case GFX7:
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table = gfx7_reg_table;
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table_size = ARRAY_SIZE(gfx7_reg_table);
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break;
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case GFX6:
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table = gfx6_reg_table;
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table_size = ARRAY_SIZE(gfx6_reg_table);
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break;
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default:
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return NULL;
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}
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for (unsigned i = 0; i < table_size; i++) {
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const struct si_reg *reg = &table[i];
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if (reg->offset == offset)
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return reg;
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}
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return NULL;
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}
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const char *ac_get_register_name(enum chip_class chip_class, unsigned offset)
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{
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const struct si_reg *reg = find_register(chip_class, offset);
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return reg ? sid_strings + reg->name_offset : "(no name)";
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}
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void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset, uint32_t value,
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uint32_t field_mask)
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{
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const struct si_reg *reg = find_register(chip_class, offset);
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if (reg) {
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const char *reg_name = sid_strings + reg->name_offset;
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bool first_field = true;
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print_spaces(file, INDENT_PKT);
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fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", reg_name);
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if (!reg->num_fields) {
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print_value(file, value, 32);
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return;
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}
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for (unsigned f = 0; f < reg->num_fields; f++) {
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const struct si_field *field = sid_fields_table + reg->fields_offset + f;
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const int *values_offsets = sid_strings_offsets + field->values_offset;
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uint32_t val = (value & field->mask) >> (ffs(field->mask) - 1);
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if (!(field->mask & field_mask))
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continue;
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/* Indent the field. */
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if (!first_field)
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print_spaces(file, INDENT_PKT + strlen(reg_name) + 4);
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/* Print the field. */
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fprintf(file, "%s = ", sid_strings + field->name_offset);
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if (val < field->num_values && values_offsets[val] >= 0)
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fprintf(file, "%s\n", sid_strings + values_offsets[val]);
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else
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print_value(file, val, util_bitcount(field->mask));
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first_field = false;
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}
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return;
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}
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print_spaces(file, INDENT_PKT);
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fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " <- 0x%08x\n", offset, value);
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}
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static uint32_t ac_ib_get(struct ac_ib_parser *ib)
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{
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uint32_t v = 0;
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if (ib->cur_dw < ib->num_dw) {
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v = ib->ib[ib->cur_dw];
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#ifdef HAVE_VALGRIND
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/* Help figure out where garbage data is written to IBs.
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*
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* Arguably we should do this already when the IBs are written,
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* see RADEON_VALGRIND. The problem is that client-requests to
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* Valgrind have an overhead even when Valgrind isn't running,
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* and radeon_emit is performance sensitive...
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*/
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if (VALGRIND_CHECK_VALUE_IS_DEFINED(v))
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fprintf(ib->f, COLOR_RED "Valgrind: The next DWORD is garbage" COLOR_RESET "\n");
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#endif
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fprintf(ib->f, "\n\035#%08x ", v);
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} else {
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fprintf(ib->f, "\n\035#???????? ");
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}
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ib->cur_dw++;
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return v;
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}
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static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset,
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struct ac_ib_parser *ib)
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{
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unsigned reg_dw = ac_ib_get(ib);
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unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset;
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unsigned index = reg_dw >> 28;
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int i;
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if (index != 0) {
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print_spaces(f, INDENT_PKT);
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fprintf(f, "INDEX = %u\n", index);
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}
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for (i = 0; i < count; i++)
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ac_dump_reg(f, ib->chip_class, reg + i * 4, ac_ib_get(ib), ~0);
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}
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static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
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int *current_trace_id)
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{
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unsigned first_dw = ib->cur_dw;
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int count = PKT_COUNT_G(header);
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unsigned op = PKT3_IT_OPCODE_G(header);
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const char *predicate = PKT3_PREDICATE(header) ? "(predicate)" : "";
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int i;
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/* Print the name first. */
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for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
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if (packet3_table[i].op == op)
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break;
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if (i < ARRAY_SIZE(packet3_table)) {
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const char *name = sid_strings + packet3_table[i].name_offset;
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if (op == PKT3_SET_CONTEXT_REG || op == PKT3_SET_CONFIG_REG || op == PKT3_SET_UCONFIG_REG ||
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op == PKT3_SET_UCONFIG_REG_INDEX || op == PKT3_SET_SH_REG)
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fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n", name, predicate);
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else
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fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n", name, predicate);
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} else
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fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n", op, predicate);
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/* Print the contents. */
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switch (op) {
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case PKT3_SET_CONTEXT_REG:
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ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
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break;
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case PKT3_SET_CONFIG_REG:
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ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib);
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break;
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case PKT3_SET_UCONFIG_REG:
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case PKT3_SET_UCONFIG_REG_INDEX:
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ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib);
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break;
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case PKT3_SET_SH_REG:
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ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
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break;
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case PKT3_ACQUIRE_MEM:
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ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0);
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print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
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if (ib->chip_class >= GFX10)
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ac_dump_reg(f, ib->chip_class, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
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break;
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case PKT3_SURFACE_SYNC:
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if (ib->chip_class >= GFX7) {
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ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
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} else {
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ac_dump_reg(f, ib->chip_class, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->chip_class, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
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}
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print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
300
break;
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case PKT3_EVENT_WRITE: {
302
uint32_t event_dw = ac_ib_get(ib);
303
ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
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S_028A90_EVENT_TYPE(~0));
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print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
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print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1);
307
if (count > 0) {
308
print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
309
print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 16);
310
}
311
break;
312
}
313
case PKT3_EVENT_WRITE_EOP: {
314
uint32_t event_dw = ac_ib_get(ib);
315
ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
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S_028A90_EVENT_TYPE(~0));
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print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
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print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
319
print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
320
print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
321
print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
322
print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
323
print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
324
uint32_t addr_hi_dw = ac_ib_get(ib);
325
print_named_value(f, "ADDRESS_HI", addr_hi_dw, 16);
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print_named_value(f, "DST_SEL", (addr_hi_dw >> 16) & 0x3, 2);
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print_named_value(f, "INT_SEL", (addr_hi_dw >> 24) & 0x7, 3);
328
print_named_value(f, "DATA_SEL", addr_hi_dw >> 29, 3);
329
print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
330
print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
331
break;
332
}
333
case PKT3_RELEASE_MEM: {
334
uint32_t event_dw = ac_ib_get(ib);
335
if (ib->chip_class >= GFX10) {
336
ac_dump_reg(f, ib->chip_class, R_490_RELEASE_MEM_OP, event_dw, ~0u);
337
} else {
338
ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
339
S_028A90_EVENT_TYPE(~0));
340
print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
341
print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
342
print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
343
print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
344
print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
345
print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
346
print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1);
347
print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1);
348
print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1);
349
}
350
uint32_t sel_dw = ac_ib_get(ib);
351
print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2);
352
print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3);
353
print_named_value(f, "DATA_SEL", sel_dw >> 29, 3);
354
print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
355
print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
356
print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
357
print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
358
print_named_value(f, "CTXID", ac_ib_get(ib), 32);
359
break;
360
}
361
case PKT3_WAIT_REG_MEM:
362
print_named_value(f, "OP", ac_ib_get(ib), 32);
363
print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
364
print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
365
print_named_value(f, "REF", ac_ib_get(ib), 32);
366
print_named_value(f, "MASK", ac_ib_get(ib), 32);
367
print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
368
break;
369
case PKT3_DRAW_INDEX_AUTO:
370
ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
371
ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
372
break;
373
case PKT3_DRAW_INDEX_2:
374
ac_dump_reg(f, ib->chip_class, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0);
375
ac_dump_reg(f, ib->chip_class, R_0287E8_VGT_DMA_BASE, ac_ib_get(ib), ~0);
376
ac_dump_reg(f, ib->chip_class, R_0287E4_VGT_DMA_BASE_HI, ac_ib_get(ib), ~0);
377
ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
378
ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
379
break;
380
case PKT3_INDEX_TYPE:
381
ac_dump_reg(f, ib->chip_class, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0);
382
break;
383
case PKT3_NUM_INSTANCES:
384
ac_dump_reg(f, ib->chip_class, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0);
385
break;
386
case PKT3_WRITE_DATA:
387
ac_dump_reg(f, ib->chip_class, R_370_CONTROL, ac_ib_get(ib), ~0);
388
ac_dump_reg(f, ib->chip_class, R_371_DST_ADDR_LO, ac_ib_get(ib), ~0);
389
ac_dump_reg(f, ib->chip_class, R_372_DST_ADDR_HI, ac_ib_get(ib), ~0);
390
/* The payload is written automatically */
391
break;
392
case PKT3_CP_DMA:
393
ac_dump_reg(f, ib->chip_class, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0);
394
ac_dump_reg(f, ib->chip_class, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0);
395
ac_dump_reg(f, ib->chip_class, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0);
396
ac_dump_reg(f, ib->chip_class, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0);
397
ac_dump_reg(f, ib->chip_class, R_415_COMMAND, ac_ib_get(ib), ~0);
398
break;
399
case PKT3_DMA_DATA:
400
ac_dump_reg(f, ib->chip_class, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
401
ac_dump_reg(f, ib->chip_class, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0);
402
ac_dump_reg(f, ib->chip_class, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0);
403
ac_dump_reg(f, ib->chip_class, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0);
404
ac_dump_reg(f, ib->chip_class, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0);
405
ac_dump_reg(f, ib->chip_class, R_415_COMMAND, ac_ib_get(ib), ~0);
406
break;
407
case PKT3_INDIRECT_BUFFER_SI:
408
case PKT3_INDIRECT_BUFFER_CONST:
409
case PKT3_INDIRECT_BUFFER_CIK: {
410
uint32_t base_lo_dw = ac_ib_get(ib);
411
ac_dump_reg(f, ib->chip_class, R_3F0_IB_BASE_LO, base_lo_dw, ~0);
412
uint32_t base_hi_dw = ac_ib_get(ib);
413
ac_dump_reg(f, ib->chip_class, R_3F1_IB_BASE_HI, base_hi_dw, ~0);
414
uint32_t control_dw = ac_ib_get(ib);
415
ac_dump_reg(f, ib->chip_class, R_3F2_IB_CONTROL, control_dw, ~0);
416
417
if (!ib->addr_callback)
418
break;
419
420
uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw;
421
void *data = ib->addr_callback(ib->addr_callback_data, addr);
422
if (!data)
423
break;
424
425
if (G_3F2_CHAIN(control_dw)) {
426
ib->ib = data;
427
ib->num_dw = G_3F2_IB_SIZE(control_dw);
428
ib->cur_dw = 0;
429
return;
430
}
431
432
struct ac_ib_parser ib_recurse;
433
memcpy(&ib_recurse, ib, sizeof(ib_recurse));
434
ib_recurse.ib = data;
435
ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw);
436
ib_recurse.cur_dw = 0;
437
if (ib_recurse.trace_id_count) {
438
if (*current_trace_id == *ib->trace_ids) {
439
++ib_recurse.trace_ids;
440
--ib_recurse.trace_id_count;
441
} else {
442
ib_recurse.trace_id_count = 0;
443
}
444
}
445
446
fprintf(f, "\n\035>------------------ nested begin ------------------\n");
447
ac_do_parse_ib(f, &ib_recurse);
448
fprintf(f, "\n\035<------------------- nested end -------------------\n");
449
break;
450
}
451
case PKT3_CLEAR_STATE:
452
case PKT3_INCREMENT_DE_COUNTER:
453
case PKT3_PFP_SYNC_ME:
454
break;
455
case PKT3_NOP:
456
if (header == PKT3_NOP_PAD) {
457
count = -1; /* One dword NOP. */
458
} else if (count == 0 && ib->cur_dw < ib->num_dw && AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) {
459
unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]);
460
461
print_spaces(f, INDENT_PKT);
462
fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
463
464
if (!ib->trace_id_count)
465
break; /* tracing was disabled */
466
467
*current_trace_id = packet_id;
468
469
print_spaces(f, INDENT_PKT);
470
if (packet_id < *ib->trace_ids)
471
fprintf(f, COLOR_RED "This trace point was reached by the CP." COLOR_RESET "\n");
472
else if (packet_id == *ib->trace_ids)
473
fprintf(f, COLOR_RED "!!!!! This is the last trace point that "
474
"was reached by the CP !!!!!" COLOR_RESET "\n");
475
else if (packet_id + 1 == *ib->trace_ids)
476
fprintf(f, COLOR_RED "!!!!! This is the first trace point that "
477
"was NOT been reached by the CP !!!!!" COLOR_RESET "\n");
478
else
479
fprintf(f, COLOR_RED "!!!!! This trace point was NOT reached "
480
"by the CP !!!!!" COLOR_RESET "\n");
481
break;
482
}
483
break;
484
}
485
486
/* print additional dwords */
487
while (ib->cur_dw <= first_dw + count)
488
ac_ib_get(ib);
489
490
if (ib->cur_dw > first_dw + count + 1)
491
fprintf(f, COLOR_RED " !!!!! count in header too low !!!!!" COLOR_RESET "\n");
492
}
493
494
/**
495
* Parse and print an IB into a file.
496
*/
497
static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib)
498
{
499
int current_trace_id = -1;
500
501
while (ib->cur_dw < ib->num_dw) {
502
uint32_t header = ac_ib_get(ib);
503
unsigned type = PKT_TYPE_G(header);
504
505
switch (type) {
506
case 3:
507
ac_parse_packet3(f, header, ib, &current_trace_id);
508
break;
509
case 2:
510
/* type-2 nop */
511
if (header == 0x80000000) {
512
fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
513
break;
514
}
515
FALLTHROUGH;
516
default:
517
fprintf(f, "Unknown packet type %i\n", type);
518
break;
519
}
520
}
521
}
522
523
static void format_ib_output(FILE *f, char *out)
524
{
525
unsigned depth = 0;
526
527
for (;;) {
528
char op = 0;
529
530
if (out[0] == '\n' && out[1] == '\035')
531
out++;
532
if (out[0] == '\035') {
533
op = out[1];
534
out += 2;
535
}
536
537
if (op == '<')
538
depth--;
539
540
unsigned indent = 4 * depth;
541
if (op != '#')
542
indent += 9;
543
544
if (indent)
545
print_spaces(f, indent);
546
547
char *end = strchrnul(out, '\n');
548
fwrite(out, end - out, 1, f);
549
fputc('\n', f); /* always end with a new line */
550
if (!*end)
551
break;
552
553
out = end + 1;
554
555
if (op == '>')
556
depth++;
557
}
558
}
559
560
/**
561
* Parse and print an IB into a file.
562
*
563
* \param f file
564
* \param ib_ptr IB
565
* \param num_dw size of the IB
566
* \param chip_class chip class
567
* \param trace_ids the last trace IDs that are known to have been reached
568
* and executed by the CP, typically read from a buffer
569
* \param trace_id_count The number of entries in the trace_ids array.
570
* \param addr_callback Get a mapped pointer of the IB at a given address. Can
571
* be NULL.
572
* \param addr_callback_data user data for addr_callback
573
*/
574
void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids,
575
unsigned trace_id_count, enum chip_class chip_class,
576
ac_debug_addr_callback addr_callback, void *addr_callback_data)
577
{
578
struct ac_ib_parser ib = {0};
579
ib.ib = ib_ptr;
580
ib.num_dw = num_dw;
581
ib.trace_ids = trace_ids;
582
ib.trace_id_count = trace_id_count;
583
ib.chip_class = chip_class;
584
ib.addr_callback = addr_callback;
585
ib.addr_callback_data = addr_callback_data;
586
587
char *out;
588
size_t outsize;
589
struct u_memstream mem;
590
u_memstream_open(&mem, &out, &outsize);
591
FILE *const memf = u_memstream_get(&mem);
592
ib.f = memf;
593
ac_do_parse_ib(memf, &ib);
594
u_memstream_close(&mem);
595
596
if (out) {
597
format_ib_output(f, out);
598
free(out);
599
}
600
601
if (ib.cur_dw > ib.num_dw) {
602
printf("\nPacket ends after the end of IB.\n");
603
exit(1);
604
}
605
}
606
607
/**
608
* Parse and print an IB into a file.
609
*
610
* \param f file
611
* \param ib IB
612
* \param num_dw size of the IB
613
* \param chip_class chip class
614
* \param trace_ids the last trace IDs that are known to have been reached
615
* and executed by the CP, typically read from a buffer
616
* \param trace_id_count The number of entries in the trace_ids array.
617
* \param addr_callback Get a mapped pointer of the IB at a given address. Can
618
* be NULL.
619
* \param addr_callback_data user data for addr_callback
620
*/
621
void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids, unsigned trace_id_count,
622
const char *name, enum chip_class chip_class, ac_debug_addr_callback addr_callback,
623
void *addr_callback_data)
624
{
625
fprintf(f, "------------------ %s begin ------------------\n", name);
626
627
ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count, chip_class, addr_callback,
628
addr_callback_data);
629
630
fprintf(f, "------------------- %s end -------------------\n\n", name);
631
}
632
633
/**
634
* Parse dmesg and return TRUE if a VM fault has been detected.
635
*
636
* \param chip_class chip class
637
* \param old_dmesg_timestamp previous dmesg timestamp parsed at init time
638
* \param out_addr detected VM fault addr
639
*/
640
bool ac_vm_fault_occured(enum chip_class chip_class, uint64_t *old_dmesg_timestamp,
641
uint64_t *out_addr)
642
{
643
#ifdef _WIN32
644
return false;
645
#else
646
char line[2000];
647
unsigned sec, usec;
648
int progress = 0;
649
uint64_t dmesg_timestamp = 0;
650
bool fault = false;
651
652
FILE *p = popen("dmesg", "r");
653
if (!p)
654
return false;
655
656
while (fgets(line, sizeof(line), p)) {
657
char *msg, len;
658
659
if (!line[0] || line[0] == '\n')
660
continue;
661
662
/* Get the timestamp. */
663
if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
664
static bool hit = false;
665
if (!hit) {
666
fprintf(stderr, "%s: failed to parse line '%s'\n", __func__, line);
667
hit = true;
668
}
669
continue;
670
}
671
dmesg_timestamp = sec * 1000000ull + usec;
672
673
/* If just updating the timestamp. */
674
if (!out_addr)
675
continue;
676
677
/* Process messages only if the timestamp is newer. */
678
if (dmesg_timestamp <= *old_dmesg_timestamp)
679
continue;
680
681
/* Only process the first VM fault. */
682
if (fault)
683
continue;
684
685
/* Remove trailing \n */
686
len = strlen(line);
687
if (len && line[len - 1] == '\n')
688
line[len - 1] = 0;
689
690
/* Get the message part. */
691
msg = strchr(line, ']');
692
if (!msg)
693
continue;
694
msg++;
695
696
const char *header_line, *addr_line_prefix, *addr_line_format;
697
698
if (chip_class >= GFX9) {
699
/* Match this:
700
* ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0)
701
* ..: at page 0x0000000219f8f000 from 27
702
* ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C
703
*/
704
header_line = "VMC page fault";
705
addr_line_prefix = " at page";
706
addr_line_format = "%" PRIx64;
707
} else {
708
header_line = "GPU fault detected:";
709
addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR";
710
addr_line_format = "%" PRIX64;
711
}
712
713
switch (progress) {
714
case 0:
715
if (strstr(msg, header_line))
716
progress = 1;
717
break;
718
case 1:
719
msg = strstr(msg, addr_line_prefix);
720
if (msg) {
721
msg = strstr(msg, "0x");
722
if (msg) {
723
msg += 2;
724
if (sscanf(msg, addr_line_format, out_addr) == 1)
725
fault = true;
726
}
727
}
728
progress = 0;
729
break;
730
default:
731
progress = 0;
732
}
733
}
734
pclose(p);
735
736
if (dmesg_timestamp > *old_dmesg_timestamp)
737
*old_dmesg_timestamp = dmesg_timestamp;
738
739
return fault;
740
#endif
741
}
742
743
static int compare_wave(const void *p1, const void *p2)
744
{
745
struct ac_wave_info *w1 = (struct ac_wave_info *)p1;
746
struct ac_wave_info *w2 = (struct ac_wave_info *)p2;
747
748
/* Sort waves according to PC and then SE, SH, CU, etc. */
749
if (w1->pc < w2->pc)
750
return -1;
751
if (w1->pc > w2->pc)
752
return 1;
753
if (w1->se < w2->se)
754
return -1;
755
if (w1->se > w2->se)
756
return 1;
757
if (w1->sh < w2->sh)
758
return -1;
759
if (w1->sh > w2->sh)
760
return 1;
761
if (w1->cu < w2->cu)
762
return -1;
763
if (w1->cu > w2->cu)
764
return 1;
765
if (w1->simd < w2->simd)
766
return -1;
767
if (w1->simd > w2->simd)
768
return 1;
769
if (w1->wave < w2->wave)
770
return -1;
771
if (w1->wave > w2->wave)
772
return 1;
773
774
return 0;
775
}
776
777
/* Return wave information. "waves" should be a large enough array. */
778
unsigned ac_get_wave_info(enum chip_class chip_class,
779
struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP])
780
{
781
#ifdef _WIN32
782
return 0;
783
#else
784
char line[2000], cmd[128];
785
unsigned num_waves = 0;
786
787
sprintf(cmd, "umr -O halt_waves -wa %s", chip_class >= GFX10 ? "gfx_0.0.0" : "gfx");
788
789
FILE *p = popen(cmd, "r");
790
if (!p)
791
return 0;
792
793
if (!fgets(line, sizeof(line), p) || strncmp(line, "SE", 2) != 0) {
794
pclose(p);
795
return 0;
796
}
797
798
while (fgets(line, sizeof(line), p)) {
799
struct ac_wave_info *w;
800
uint32_t pc_hi, pc_lo, exec_hi, exec_lo;
801
802
assert(num_waves < AC_MAX_WAVES_PER_CHIP);
803
w = &waves[num_waves];
804
805
if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x", &w->se, &w->sh, &w->cu, &w->simd,
806
&w->wave, &w->status, &pc_hi, &pc_lo, &w->inst_dw0, &w->inst_dw1, &exec_hi,
807
&exec_lo) == 12) {
808
w->pc = ((uint64_t)pc_hi << 32) | pc_lo;
809
w->exec = ((uint64_t)exec_hi << 32) | exec_lo;
810
w->matched = false;
811
num_waves++;
812
}
813
}
814
815
qsort(waves, num_waves, sizeof(struct ac_wave_info), compare_wave);
816
817
pclose(p);
818
return num_waves;
819
#endif
820
}
821
822