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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/amd/compiler/aco_print_ir.cpp
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/*
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* Copyright © 2018 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "aco_builder.h"
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#include "aco_ir.h"
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#include "common/ac_shader_util.h"
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#include "common/sid.h"
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#include <array>
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namespace aco {
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const std::array<const char*, num_reduce_ops> reduce_ops = []()
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{
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std::array<const char*, num_reduce_ops> ret{};
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ret[iadd8] = "iadd8";
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ret[iadd16] = "iadd16";
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ret[iadd32] = "iadd32";
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ret[iadd64] = "iadd64";
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ret[imul8] = "imul8";
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ret[imul16] = "imul16";
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ret[imul32] = "imul32";
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ret[imul64] = "imul64";
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ret[fadd16] = "fadd16";
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ret[fadd32] = "fadd32";
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ret[fadd64] = "fadd64";
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ret[fmul16] = "fmul16";
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ret[fmul32] = "fmul32";
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ret[fmul64] = "fmul64";
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ret[imin8] = "imin8";
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ret[imin16] = "imin16";
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ret[imin32] = "imin32";
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ret[imin64] = "imin64";
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ret[imax8] = "imax8";
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ret[imax16] = "imax16";
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ret[imax32] = "imax32";
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ret[imax64] = "imax64";
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ret[umin8] = "umin8";
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ret[umin16] = "umin16";
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ret[umin32] = "umin32";
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ret[umin64] = "umin64";
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ret[umax8] = "umax8";
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ret[umax16] = "umax16";
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ret[umax32] = "umax32";
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ret[umax64] = "umax64";
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ret[fmin16] = "fmin16";
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ret[fmin32] = "fmin32";
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ret[fmin64] = "fmin64";
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ret[fmax16] = "fmax16";
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ret[fmax32] = "fmax32";
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ret[fmax64] = "fmax64";
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ret[iand8] = "iand8";
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ret[iand16] = "iand16";
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ret[iand32] = "iand32";
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ret[iand64] = "iand64";
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ret[ior8] = "ior8";
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ret[ior16] = "ior16";
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ret[ior32] = "ior32";
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ret[ior64] = "ior64";
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ret[ixor8] = "ixor8";
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ret[ixor16] = "ixor16";
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ret[ixor32] = "ixor32";
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ret[ixor64] = "ixor64";
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return ret;
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}();
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static void
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print_reg_class(const RegClass rc, FILE* output)
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{
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switch (rc) {
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case RegClass::s1: fprintf(output, " s1: "); return;
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case RegClass::s2: fprintf(output, " s2: "); return;
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case RegClass::s3: fprintf(output, " s3: "); return;
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case RegClass::s4: fprintf(output, " s4: "); return;
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case RegClass::s6: fprintf(output, " s6: "); return;
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case RegClass::s8: fprintf(output, " s8: "); return;
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case RegClass::s16: fprintf(output, "s16: "); return;
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case RegClass::v1: fprintf(output, " v1: "); return;
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case RegClass::v2: fprintf(output, " v2: "); return;
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case RegClass::v3: fprintf(output, " v3: "); return;
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case RegClass::v4: fprintf(output, " v4: "); return;
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case RegClass::v5: fprintf(output, " v5: "); return;
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case RegClass::v6: fprintf(output, " v6: "); return;
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case RegClass::v7: fprintf(output, " v7: "); return;
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case RegClass::v8: fprintf(output, " v8: "); return;
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case RegClass::v1b: fprintf(output, " v1b: "); return;
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case RegClass::v2b: fprintf(output, " v2b: "); return;
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case RegClass::v3b: fprintf(output, " v3b: "); return;
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case RegClass::v4b: fprintf(output, " v4b: "); return;
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case RegClass::v6b: fprintf(output, " v6b: "); return;
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case RegClass::v8b: fprintf(output, " v8b: "); return;
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case RegClass::v1_linear: fprintf(output, " v1: "); return;
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case RegClass::v2_linear: fprintf(output, " v2: "); return;
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}
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}
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void
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print_physReg(PhysReg reg, unsigned bytes, FILE* output, unsigned flags)
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{
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if (reg == 124) {
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fprintf(output, "m0");
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} else if (reg == 106) {
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fprintf(output, "vcc");
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} else if (reg == 253) {
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fprintf(output, "scc");
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} else if (reg == 126) {
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fprintf(output, "exec");
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} else {
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bool is_vgpr = reg / 256;
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unsigned r = reg % 256;
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unsigned size = DIV_ROUND_UP(bytes, 4);
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if (size == 1 && (flags & print_no_ssa)) {
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fprintf(output, "%c%d", is_vgpr ? 'v' : 's', r);
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} else {
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fprintf(output, "%c[%d", is_vgpr ? 'v' : 's', r);
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if (size > 1)
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fprintf(output, "-%d]", r + size - 1);
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else
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fprintf(output, "]");
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}
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if (reg.byte() || bytes % 4)
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fprintf(output, "[%d:%d]", reg.byte() * 8, (reg.byte() + bytes) * 8);
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}
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}
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static void
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print_constant(uint8_t reg, FILE* output)
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{
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if (reg >= 128 && reg <= 192) {
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fprintf(output, "%d", reg - 128);
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return;
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} else if (reg >= 192 && reg <= 208) {
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fprintf(output, "%d", 192 - reg);
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return;
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}
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switch (reg) {
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case 240: fprintf(output, "0.5"); break;
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case 241: fprintf(output, "-0.5"); break;
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case 242: fprintf(output, "1.0"); break;
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case 243: fprintf(output, "-1.0"); break;
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case 244: fprintf(output, "2.0"); break;
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case 245: fprintf(output, "-2.0"); break;
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case 246: fprintf(output, "4.0"); break;
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case 247: fprintf(output, "-4.0"); break;
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case 248: fprintf(output, "1/(2*PI)"); break;
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}
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}
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void
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aco_print_operand(const Operand* operand, FILE* output, unsigned flags)
174
{
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if (operand->isLiteral() || (operand->isConstant() && operand->bytes() == 1)) {
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if (operand->bytes() == 1)
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fprintf(output, "0x%.2x", operand->constantValue());
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else if (operand->bytes() == 2)
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fprintf(output, "0x%.4x", operand->constantValue());
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else
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fprintf(output, "0x%x", operand->constantValue());
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} else if (operand->isConstant()) {
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print_constant(operand->physReg().reg(), output);
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} else if (operand->isUndefined()) {
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print_reg_class(operand->regClass(), output);
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fprintf(output, "undef");
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} else {
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if (operand->isLateKill())
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fprintf(output, "(latekill)");
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if (operand->is16bit())
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fprintf(output, "(is16bit)");
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if (operand->is24bit())
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fprintf(output, "(is24bit)");
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if ((flags & print_kill) && operand->isKill())
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fprintf(output, "(kill)");
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if (!(flags & print_no_ssa))
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fprintf(output, "%%%d%s", operand->tempId(), operand->isFixed() ? ":" : "");
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if (operand->isFixed())
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print_physReg(operand->physReg(), operand->bytes(), output, flags);
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}
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}
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static void
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print_definition(const Definition* definition, FILE* output, unsigned flags)
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{
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if (!(flags & print_no_ssa))
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print_reg_class(definition->regClass(), output);
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if (definition->isPrecise())
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fprintf(output, "(precise)");
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if (definition->isNUW())
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fprintf(output, "(nuw)");
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if (definition->isNoCSE())
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fprintf(output, "(noCSE)");
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if ((flags & print_kill) && definition->isKill())
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fprintf(output, "(kill)");
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if (!(flags & print_no_ssa))
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fprintf(output, "%%%d%s", definition->tempId(), definition->isFixed() ? ":" : "");
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if (definition->isFixed())
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print_physReg(definition->physReg(), definition->bytes(), output, flags);
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}
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static void
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print_storage(storage_class storage, FILE* output)
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{
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fprintf(output, " storage:");
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int printed = 0;
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if (storage & storage_buffer)
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printed += fprintf(output, "%sbuffer", printed ? "," : "");
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if (storage & storage_atomic_counter)
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printed += fprintf(output, "%satomic_counter", printed ? "," : "");
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if (storage & storage_image)
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printed += fprintf(output, "%simage", printed ? "," : "");
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if (storage & storage_shared)
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printed += fprintf(output, "%sshared", printed ? "," : "");
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if (storage & storage_vmem_output)
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printed += fprintf(output, "%svmem_output", printed ? "," : "");
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if (storage & storage_scratch)
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printed += fprintf(output, "%sscratch", printed ? "," : "");
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if (storage & storage_vgpr_spill)
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printed += fprintf(output, "%svgpr_spill", printed ? "," : "");
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}
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static void
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print_semantics(memory_semantics sem, FILE* output)
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{
249
fprintf(output, " semantics:");
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int printed = 0;
251
if (sem & semantic_acquire)
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printed += fprintf(output, "%sacquire", printed ? "," : "");
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if (sem & semantic_release)
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printed += fprintf(output, "%srelease", printed ? "," : "");
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if (sem & semantic_volatile)
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printed += fprintf(output, "%svolatile", printed ? "," : "");
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if (sem & semantic_private)
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printed += fprintf(output, "%sprivate", printed ? "," : "");
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if (sem & semantic_can_reorder)
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printed += fprintf(output, "%sreorder", printed ? "," : "");
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if (sem & semantic_atomic)
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printed += fprintf(output, "%satomic", printed ? "," : "");
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if (sem & semantic_rmw)
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printed += fprintf(output, "%srmw", printed ? "," : "");
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}
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static void
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print_scope(sync_scope scope, FILE* output, const char* prefix = "scope")
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{
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fprintf(output, " %s:", prefix);
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switch (scope) {
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case scope_invocation: fprintf(output, "invocation"); break;
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case scope_subgroup: fprintf(output, "subgroup"); break;
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case scope_workgroup: fprintf(output, "workgroup"); break;
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case scope_queuefamily: fprintf(output, "queuefamily"); break;
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case scope_device: fprintf(output, "device"); break;
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}
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}
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static void
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print_sync(memory_sync_info sync, FILE* output)
282
{
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print_storage(sync.storage, output);
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print_semantics(sync.semantics, output);
285
print_scope(sync.scope, output);
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}
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static void
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print_instr_format_specific(const Instruction* instr, FILE* output)
290
{
291
switch (instr->format) {
292
case Format::SOPK: {
293
const SOPK_instruction& sopk = instr->sopk();
294
fprintf(output, " imm:%d", sopk.imm & 0x8000 ? (sopk.imm - 65536) : sopk.imm);
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break;
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}
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case Format::SOPP: {
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uint16_t imm = instr->sopp().imm;
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switch (instr->opcode) {
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case aco_opcode::s_waitcnt: {
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/* we usually should check the chip class for vmcnt/lgkm, but
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* insert_waitcnt() should fill it in regardless. */
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unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
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if (vmcnt != 63)
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fprintf(output, " vmcnt(%d)", vmcnt);
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if (((imm >> 4) & 0x7) < 0x7)
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fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
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if (((imm >> 8) & 0x3F) < 0x3F)
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fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
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break;
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}
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case aco_opcode::s_endpgm:
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case aco_opcode::s_endpgm_saved:
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case aco_opcode::s_endpgm_ordered_ps_done:
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case aco_opcode::s_wakeup:
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case aco_opcode::s_barrier:
317
case aco_opcode::s_icache_inv:
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case aco_opcode::s_ttracedata:
319
case aco_opcode::s_set_gpr_idx_off: {
320
break;
321
}
322
case aco_opcode::s_sendmsg: {
323
unsigned id = imm & sendmsg_id_mask;
324
switch (id) {
325
case sendmsg_none: fprintf(output, " sendmsg(MSG_NONE)"); break;
326
case _sendmsg_gs:
327
fprintf(output, " sendmsg(gs%s%s, %u)", imm & 0x10 ? ", cut" : "",
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imm & 0x20 ? ", emit" : "", imm >> 8);
329
break;
330
case _sendmsg_gs_done:
331
fprintf(output, " sendmsg(gs_done%s%s, %u)", imm & 0x10 ? ", cut" : "",
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imm & 0x20 ? ", emit" : "", imm >> 8);
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break;
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case sendmsg_save_wave: fprintf(output, " sendmsg(save_wave)"); break;
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case sendmsg_stall_wave_gen: fprintf(output, " sendmsg(stall_wave_gen)"); break;
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case sendmsg_halt_waves: fprintf(output, " sendmsg(halt_waves)"); break;
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case sendmsg_ordered_ps_done: fprintf(output, " sendmsg(ordered_ps_done)"); break;
338
case sendmsg_early_prim_dealloc: fprintf(output, " sendmsg(early_prim_dealloc)"); break;
339
case sendmsg_gs_alloc_req: fprintf(output, " sendmsg(gs_alloc_req)"); break;
340
}
341
break;
342
}
343
default: {
344
if (imm)
345
fprintf(output, " imm:%u", imm);
346
break;
347
}
348
}
349
if (instr->sopp().block != -1)
350
fprintf(output, " block:BB%d", instr->sopp().block);
351
break;
352
}
353
case Format::SMEM: {
354
const SMEM_instruction& smem = instr->smem();
355
if (smem.glc)
356
fprintf(output, " glc");
357
if (smem.dlc)
358
fprintf(output, " dlc");
359
if (smem.nv)
360
fprintf(output, " nv");
361
print_sync(smem.sync, output);
362
break;
363
}
364
case Format::VINTRP: {
365
const Interp_instruction& vintrp = instr->vintrp();
366
fprintf(output, " attr%d.%c", vintrp.attribute, "xyzw"[vintrp.component]);
367
break;
368
}
369
case Format::DS: {
370
const DS_instruction& ds = instr->ds();
371
if (ds.offset0)
372
fprintf(output, " offset0:%u", ds.offset0);
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if (ds.offset1)
374
fprintf(output, " offset1:%u", ds.offset1);
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if (ds.gds)
376
fprintf(output, " gds");
377
print_sync(ds.sync, output);
378
break;
379
}
380
case Format::MUBUF: {
381
const MUBUF_instruction& mubuf = instr->mubuf();
382
if (mubuf.offset)
383
fprintf(output, " offset:%u", mubuf.offset);
384
if (mubuf.offen)
385
fprintf(output, " offen");
386
if (mubuf.idxen)
387
fprintf(output, " idxen");
388
if (mubuf.addr64)
389
fprintf(output, " addr64");
390
if (mubuf.glc)
391
fprintf(output, " glc");
392
if (mubuf.dlc)
393
fprintf(output, " dlc");
394
if (mubuf.slc)
395
fprintf(output, " slc");
396
if (mubuf.tfe)
397
fprintf(output, " tfe");
398
if (mubuf.lds)
399
fprintf(output, " lds");
400
if (mubuf.disable_wqm)
401
fprintf(output, " disable_wqm");
402
print_sync(mubuf.sync, output);
403
break;
404
}
405
case Format::MIMG: {
406
const MIMG_instruction& mimg = instr->mimg();
407
unsigned identity_dmask =
408
!instr->definitions.empty() ? (1 << instr->definitions[0].size()) - 1 : 0xf;
409
if ((mimg.dmask & identity_dmask) != identity_dmask)
410
fprintf(output, " dmask:%s%s%s%s", mimg.dmask & 0x1 ? "x" : "",
411
mimg.dmask & 0x2 ? "y" : "", mimg.dmask & 0x4 ? "z" : "",
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mimg.dmask & 0x8 ? "w" : "");
413
switch (mimg.dim) {
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case ac_image_1d: fprintf(output, " 1d"); break;
415
case ac_image_2d: fprintf(output, " 2d"); break;
416
case ac_image_3d: fprintf(output, " 3d"); break;
417
case ac_image_cube: fprintf(output, " cube"); break;
418
case ac_image_1darray: fprintf(output, " 1darray"); break;
419
case ac_image_2darray: fprintf(output, " 2darray"); break;
420
case ac_image_2dmsaa: fprintf(output, " 2dmsaa"); break;
421
case ac_image_2darraymsaa: fprintf(output, " 2darraymsaa"); break;
422
}
423
if (mimg.unrm)
424
fprintf(output, " unrm");
425
if (mimg.glc)
426
fprintf(output, " glc");
427
if (mimg.dlc)
428
fprintf(output, " dlc");
429
if (mimg.slc)
430
fprintf(output, " slc");
431
if (mimg.tfe)
432
fprintf(output, " tfe");
433
if (mimg.da)
434
fprintf(output, " da");
435
if (mimg.lwe)
436
fprintf(output, " lwe");
437
if (mimg.r128 || mimg.a16)
438
fprintf(output, " r128/a16");
439
if (mimg.d16)
440
fprintf(output, " d16");
441
if (mimg.disable_wqm)
442
fprintf(output, " disable_wqm");
443
print_sync(mimg.sync, output);
444
break;
445
}
446
case Format::EXP: {
447
const Export_instruction& exp = instr->exp();
448
unsigned identity_mask = exp.compressed ? 0x5 : 0xf;
449
if ((exp.enabled_mask & identity_mask) != identity_mask)
450
fprintf(output, " en:%c%c%c%c", exp.enabled_mask & 0x1 ? 'r' : '*',
451
exp.enabled_mask & 0x2 ? 'g' : '*', exp.enabled_mask & 0x4 ? 'b' : '*',
452
exp.enabled_mask & 0x8 ? 'a' : '*');
453
if (exp.compressed)
454
fprintf(output, " compr");
455
if (exp.done)
456
fprintf(output, " done");
457
if (exp.valid_mask)
458
fprintf(output, " vm");
459
460
if (exp.dest <= V_008DFC_SQ_EXP_MRT + 7)
461
fprintf(output, " mrt%d", exp.dest - V_008DFC_SQ_EXP_MRT);
462
else if (exp.dest == V_008DFC_SQ_EXP_MRTZ)
463
fprintf(output, " mrtz");
464
else if (exp.dest == V_008DFC_SQ_EXP_NULL)
465
fprintf(output, " null");
466
else if (exp.dest >= V_008DFC_SQ_EXP_POS && exp.dest <= V_008DFC_SQ_EXP_POS + 3)
467
fprintf(output, " pos%d", exp.dest - V_008DFC_SQ_EXP_POS);
468
else if (exp.dest >= V_008DFC_SQ_EXP_PARAM && exp.dest <= V_008DFC_SQ_EXP_PARAM + 31)
469
fprintf(output, " param%d", exp.dest - V_008DFC_SQ_EXP_PARAM);
470
break;
471
}
472
case Format::PSEUDO_BRANCH: {
473
const Pseudo_branch_instruction& branch = instr->branch();
474
/* Note: BB0 cannot be a branch target */
475
if (branch.target[0] != 0)
476
fprintf(output, " BB%d", branch.target[0]);
477
if (branch.target[1] != 0)
478
fprintf(output, ", BB%d", branch.target[1]);
479
break;
480
}
481
case Format::PSEUDO_REDUCTION: {
482
const Pseudo_reduction_instruction& reduce = instr->reduction();
483
fprintf(output, " op:%s", reduce_ops[reduce.reduce_op]);
484
if (reduce.cluster_size)
485
fprintf(output, " cluster_size:%u", reduce.cluster_size);
486
break;
487
}
488
case Format::PSEUDO_BARRIER: {
489
const Pseudo_barrier_instruction& barrier = instr->barrier();
490
print_sync(barrier.sync, output);
491
print_scope(barrier.exec_scope, output, "exec_scope");
492
break;
493
}
494
case Format::FLAT:
495
case Format::GLOBAL:
496
case Format::SCRATCH: {
497
const FLAT_instruction& flat = instr->flatlike();
498
if (flat.offset)
499
fprintf(output, " offset:%u", flat.offset);
500
if (flat.glc)
501
fprintf(output, " glc");
502
if (flat.dlc)
503
fprintf(output, " dlc");
504
if (flat.slc)
505
fprintf(output, " slc");
506
if (flat.lds)
507
fprintf(output, " lds");
508
if (flat.nv)
509
fprintf(output, " nv");
510
if (flat.disable_wqm)
511
fprintf(output, " disable_wqm");
512
print_sync(flat.sync, output);
513
break;
514
}
515
case Format::MTBUF: {
516
const MTBUF_instruction& mtbuf = instr->mtbuf();
517
fprintf(output, " dfmt:");
518
switch (mtbuf.dfmt) {
519
case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
520
case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
521
case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
522
case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
523
case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
524
case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
525
case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
526
case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
527
case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
528
case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
529
case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
530
case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
531
case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
532
case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
533
case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
534
}
535
fprintf(output, " nfmt:");
536
switch (mtbuf.nfmt) {
537
case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
538
case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
539
case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
540
case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
541
case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
542
case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
543
case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
544
case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
545
}
546
if (mtbuf.offset)
547
fprintf(output, " offset:%u", mtbuf.offset);
548
if (mtbuf.offen)
549
fprintf(output, " offen");
550
if (mtbuf.idxen)
551
fprintf(output, " idxen");
552
if (mtbuf.glc)
553
fprintf(output, " glc");
554
if (mtbuf.dlc)
555
fprintf(output, " dlc");
556
if (mtbuf.slc)
557
fprintf(output, " slc");
558
if (mtbuf.tfe)
559
fprintf(output, " tfe");
560
if (mtbuf.disable_wqm)
561
fprintf(output, " disable_wqm");
562
print_sync(mtbuf.sync, output);
563
break;
564
}
565
case Format::VOP3P: {
566
if (instr->vop3p().clamp)
567
fprintf(output, " clamp");
568
break;
569
}
570
default: {
571
break;
572
}
573
}
574
if (instr->isVOP3()) {
575
const VOP3_instruction& vop3 = instr->vop3();
576
switch (vop3.omod) {
577
case 1: fprintf(output, " *2"); break;
578
case 2: fprintf(output, " *4"); break;
579
case 3: fprintf(output, " *0.5"); break;
580
}
581
if (vop3.clamp)
582
fprintf(output, " clamp");
583
if (vop3.opsel & (1 << 3))
584
fprintf(output, " opsel_hi");
585
} else if (instr->isDPP()) {
586
const DPP_instruction& dpp = instr->dpp();
587
if (dpp.dpp_ctrl <= 0xff) {
588
fprintf(output, " quad_perm:[%d,%d,%d,%d]", dpp.dpp_ctrl & 0x3, (dpp.dpp_ctrl >> 2) & 0x3,
589
(dpp.dpp_ctrl >> 4) & 0x3, (dpp.dpp_ctrl >> 6) & 0x3);
590
} else if (dpp.dpp_ctrl >= 0x101 && dpp.dpp_ctrl <= 0x10f) {
591
fprintf(output, " row_shl:%d", dpp.dpp_ctrl & 0xf);
592
} else if (dpp.dpp_ctrl >= 0x111 && dpp.dpp_ctrl <= 0x11f) {
593
fprintf(output, " row_shr:%d", dpp.dpp_ctrl & 0xf);
594
} else if (dpp.dpp_ctrl >= 0x121 && dpp.dpp_ctrl <= 0x12f) {
595
fprintf(output, " row_ror:%d", dpp.dpp_ctrl & 0xf);
596
} else if (dpp.dpp_ctrl == dpp_wf_sl1) {
597
fprintf(output, " wave_shl:1");
598
} else if (dpp.dpp_ctrl == dpp_wf_rl1) {
599
fprintf(output, " wave_rol:1");
600
} else if (dpp.dpp_ctrl == dpp_wf_sr1) {
601
fprintf(output, " wave_shr:1");
602
} else if (dpp.dpp_ctrl == dpp_wf_rr1) {
603
fprintf(output, " wave_ror:1");
604
} else if (dpp.dpp_ctrl == dpp_row_mirror) {
605
fprintf(output, " row_mirror");
606
} else if (dpp.dpp_ctrl == dpp_row_half_mirror) {
607
fprintf(output, " row_half_mirror");
608
} else if (dpp.dpp_ctrl == dpp_row_bcast15) {
609
fprintf(output, " row_bcast:15");
610
} else if (dpp.dpp_ctrl == dpp_row_bcast31) {
611
fprintf(output, " row_bcast:31");
612
} else {
613
fprintf(output, " dpp_ctrl:0x%.3x", dpp.dpp_ctrl);
614
}
615
if (dpp.row_mask != 0xf)
616
fprintf(output, " row_mask:0x%.1x", dpp.row_mask);
617
if (dpp.bank_mask != 0xf)
618
fprintf(output, " bank_mask:0x%.1x", dpp.bank_mask);
619
if (dpp.bound_ctrl)
620
fprintf(output, " bound_ctrl:1");
621
} else if (instr->isSDWA()) {
622
const SDWA_instruction& sdwa = instr->sdwa();
623
switch (sdwa.omod) {
624
case 1: fprintf(output, " *2"); break;
625
case 2: fprintf(output, " *4"); break;
626
case 3: fprintf(output, " *0.5"); break;
627
}
628
if (sdwa.clamp)
629
fprintf(output, " clamp");
630
switch (sdwa.dst_sel & sdwa_asuint) {
631
case sdwa_udword: break;
632
case sdwa_ubyte0:
633
case sdwa_ubyte1:
634
case sdwa_ubyte2:
635
case sdwa_ubyte3:
636
fprintf(output, " dst_sel:%sbyte%u", sdwa.dst_sel & sdwa_sext ? "s" : "u",
637
sdwa.dst_sel & sdwa_bytenum);
638
break;
639
case sdwa_uword0:
640
case sdwa_uword1:
641
fprintf(output, " dst_sel:%sword%u", sdwa.dst_sel & sdwa_sext ? "s" : "u",
642
sdwa.dst_sel & sdwa_wordnum);
643
break;
644
}
645
if (sdwa.dst_preserve)
646
fprintf(output, " dst_preserve");
647
}
648
}
649
650
void
651
aco_print_instr(const Instruction* instr, FILE* output, unsigned flags)
652
{
653
if (!instr->definitions.empty()) {
654
for (unsigned i = 0; i < instr->definitions.size(); ++i) {
655
print_definition(&instr->definitions[i], output, flags);
656
if (i + 1 != instr->definitions.size())
657
fprintf(output, ", ");
658
}
659
fprintf(output, " = ");
660
}
661
fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
662
if (instr->operands.size()) {
663
bool* const abs = (bool*)alloca(instr->operands.size() * sizeof(bool));
664
bool* const neg = (bool*)alloca(instr->operands.size() * sizeof(bool));
665
bool* const opsel = (bool*)alloca(instr->operands.size() * sizeof(bool));
666
uint8_t* const sel = (uint8_t*)alloca(instr->operands.size() * sizeof(uint8_t));
667
for (unsigned i = 0; i < instr->operands.size(); ++i) {
668
abs[i] = false;
669
neg[i] = false;
670
opsel[i] = false;
671
sel[i] = sdwa_udword;
672
}
673
if (instr->isVOP3()) {
674
const VOP3_instruction& vop3 = instr->vop3();
675
for (unsigned i = 0; i < 3; ++i) {
676
abs[i] = vop3.abs[i];
677
neg[i] = vop3.neg[i];
678
opsel[i] = vop3.opsel & (1 << i);
679
sel[i] = sdwa_udword;
680
}
681
} else if (instr->isDPP()) {
682
const DPP_instruction& dpp = instr->dpp();
683
for (unsigned i = 0; i < 2; ++i) {
684
abs[i] = dpp.abs[i];
685
neg[i] = dpp.neg[i];
686
opsel[i] = false;
687
sel[i] = sdwa_udword;
688
}
689
} else if (instr->isSDWA()) {
690
const SDWA_instruction& sdwa = instr->sdwa();
691
for (unsigned i = 0; i < 2; ++i) {
692
abs[i] = sdwa.abs[i];
693
neg[i] = sdwa.neg[i];
694
opsel[i] = false;
695
sel[i] = sdwa.sel[i];
696
}
697
}
698
for (unsigned i = 0; i < instr->operands.size(); ++i) {
699
if (i)
700
fprintf(output, ", ");
701
else
702
fprintf(output, " ");
703
704
if (neg[i])
705
fprintf(output, "-");
706
if (abs[i])
707
fprintf(output, "|");
708
if (opsel[i])
709
fprintf(output, "hi(");
710
else if (sel[i] & sdwa_sext)
711
fprintf(output, "sext(");
712
aco_print_operand(&instr->operands[i], output, flags);
713
if (opsel[i] || (sel[i] & sdwa_sext))
714
fprintf(output, ")");
715
if (!(sel[i] & sdwa_isra)) {
716
if (sel[i] == sdwa_udword || sel[i] == sdwa_sdword) {
717
/* print nothing */
718
} else if (sel[i] & sdwa_isword) {
719
unsigned index = sel[i] & sdwa_wordnum;
720
fprintf(output, "[%u:%u]", index * 16, index * 16 + 15);
721
} else {
722
unsigned index = sel[i] & sdwa_bytenum;
723
fprintf(output, "[%u:%u]", index * 8, index * 8 + 7);
724
}
725
}
726
if (abs[i])
727
fprintf(output, "|");
728
729
if (instr->isVOP3P()) {
730
const VOP3P_instruction& vop3 = instr->vop3p();
731
if ((vop3.opsel_lo & (1 << i)) || !(vop3.opsel_hi & (1 << i))) {
732
fprintf(output, ".%c%c", vop3.opsel_lo & (1 << i) ? 'y' : 'x',
733
vop3.opsel_hi & (1 << i) ? 'y' : 'x');
734
}
735
if (vop3.neg_lo[i] && vop3.neg_hi[i])
736
fprintf(output, "*[-1,-1]");
737
else if (vop3.neg_lo[i])
738
fprintf(output, "*[-1,1]");
739
else if (vop3.neg_hi[i])
740
fprintf(output, "*[1,-1]");
741
}
742
}
743
}
744
print_instr_format_specific(instr, output);
745
}
746
747
static void
748
print_block_kind(uint16_t kind, FILE* output)
749
{
750
if (kind & block_kind_uniform)
751
fprintf(output, "uniform, ");
752
if (kind & block_kind_top_level)
753
fprintf(output, "top-level, ");
754
if (kind & block_kind_loop_preheader)
755
fprintf(output, "loop-preheader, ");
756
if (kind & block_kind_loop_header)
757
fprintf(output, "loop-header, ");
758
if (kind & block_kind_loop_exit)
759
fprintf(output, "loop-exit, ");
760
if (kind & block_kind_continue)
761
fprintf(output, "continue, ");
762
if (kind & block_kind_break)
763
fprintf(output, "break, ");
764
if (kind & block_kind_continue_or_break)
765
fprintf(output, "continue_or_break, ");
766
if (kind & block_kind_discard)
767
fprintf(output, "discard, ");
768
if (kind & block_kind_branch)
769
fprintf(output, "branch, ");
770
if (kind & block_kind_merge)
771
fprintf(output, "merge, ");
772
if (kind & block_kind_invert)
773
fprintf(output, "invert, ");
774
if (kind & block_kind_uses_discard_if)
775
fprintf(output, "discard_if, ");
776
if (kind & block_kind_needs_lowering)
777
fprintf(output, "needs_lowering, ");
778
if (kind & block_kind_uses_demote)
779
fprintf(output, "uses_demote, ");
780
if (kind & block_kind_export_end)
781
fprintf(output, "export_end, ");
782
}
783
784
static void
785
print_stage(Stage stage, FILE* output)
786
{
787
fprintf(output, "ACO shader stage: ");
788
789
if (stage == compute_cs)
790
fprintf(output, "compute_cs");
791
else if (stage == fragment_fs)
792
fprintf(output, "fragment_fs");
793
else if (stage == gs_copy_vs)
794
fprintf(output, "gs_copy_vs");
795
else if (stage == vertex_ls)
796
fprintf(output, "vertex_ls");
797
else if (stage == vertex_es)
798
fprintf(output, "vertex_es");
799
else if (stage == vertex_vs)
800
fprintf(output, "vertex_vs");
801
else if (stage == tess_control_hs)
802
fprintf(output, "tess_control_hs");
803
else if (stage == vertex_tess_control_hs)
804
fprintf(output, "vertex_tess_control_hs");
805
else if (stage == tess_eval_es)
806
fprintf(output, "tess_eval_es");
807
else if (stage == tess_eval_vs)
808
fprintf(output, "tess_eval_vs");
809
else if (stage == geometry_gs)
810
fprintf(output, "geometry_gs");
811
else if (stage == vertex_geometry_gs)
812
fprintf(output, "vertex_geometry_gs");
813
else if (stage == tess_eval_geometry_gs)
814
fprintf(output, "tess_eval_geometry_gs");
815
else if (stage == vertex_ngg)
816
fprintf(output, "vertex_ngg");
817
else if (stage == tess_eval_ngg)
818
fprintf(output, "tess_eval_ngg");
819
else if (stage == vertex_geometry_ngg)
820
fprintf(output, "vertex_geometry_ngg");
821
else if (stage == tess_eval_geometry_ngg)
822
fprintf(output, "tess_eval_geometry_ngg");
823
else
824
fprintf(output, "unknown");
825
826
fprintf(output, "\n");
827
}
828
829
void
830
aco_print_block(const Block* block, FILE* output, unsigned flags, const live& live_vars)
831
{
832
fprintf(output, "BB%d\n", block->index);
833
fprintf(output, "/* logical preds: ");
834
for (unsigned pred : block->logical_preds)
835
fprintf(output, "BB%d, ", pred);
836
fprintf(output, "/ linear preds: ");
837
for (unsigned pred : block->linear_preds)
838
fprintf(output, "BB%d, ", pred);
839
fprintf(output, "/ kind: ");
840
print_block_kind(block->kind, output);
841
fprintf(output, "*/\n");
842
843
if (flags & print_live_vars) {
844
fprintf(output, "\tlive out:");
845
for (unsigned id : live_vars.live_out[block->index])
846
fprintf(output, " %%%d", id);
847
fprintf(output, "\n");
848
849
RegisterDemand demand = block->register_demand;
850
fprintf(output, "\tdemand: %u vgpr, %u sgpr\n", demand.vgpr, demand.sgpr);
851
}
852
853
unsigned index = 0;
854
for (auto const& instr : block->instructions) {
855
fprintf(output, "\t");
856
if (flags & print_live_vars) {
857
RegisterDemand demand = live_vars.register_demand[block->index][index];
858
fprintf(output, "(%3u vgpr, %3u sgpr) ", demand.vgpr, demand.sgpr);
859
}
860
if (flags & print_perf_info)
861
fprintf(output, "(%3u clk) ", instr->pass_flags);
862
863
aco_print_instr(instr.get(), output, flags);
864
fprintf(output, "\n");
865
index++;
866
}
867
}
868
869
void
870
aco_print_program(const Program* program, FILE* output, const live& live_vars, unsigned flags)
871
{
872
switch (program->progress) {
873
case CompilationProgress::after_isel: fprintf(output, "After Instruction Selection:\n"); break;
874
case CompilationProgress::after_spilling:
875
fprintf(output, "After Spilling:\n");
876
flags |= print_kill;
877
break;
878
case CompilationProgress::after_ra: fprintf(output, "After RA:\n"); break;
879
}
880
881
print_stage(program->stage, output);
882
883
for (Block const& block : program->blocks)
884
aco_print_block(&block, output, flags, live_vars);
885
886
if (program->constant_data.size()) {
887
fprintf(output, "\n/* constant data */\n");
888
for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
889
fprintf(output, "[%06d] ", i);
890
unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
891
for (unsigned j = 0; j < line_size; j += 4) {
892
unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
893
uint32_t v = 0;
894
memcpy(&v, &program->constant_data[i + j], size);
895
fprintf(output, " %08x", v);
896
}
897
fprintf(output, "\n");
898
}
899
}
900
901
fprintf(output, "\n");
902
}
903
904
void
905
aco_print_program(const Program* program, FILE* output, unsigned flags)
906
{
907
aco_print_program(program, output, live(), flags);
908
}
909
910
} // namespace aco
911
912