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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/amd/compiler/tests/test_isel.cpp
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/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "helpers.h"
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#include "test_isel-spirv.h"
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#include <llvm/Config/llvm-config.h>
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using namespace aco;
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BEGIN_TEST(isel.interp.simple)
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QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX,
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layout(location = 0) in vec4 in_color;
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layout(location = 0) out vec4 out_color;
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void main() {
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out_color = in_color;
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}
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);
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QoShaderModuleCreateInfo fs = qoShaderModuleCreateInfoGLSL(FRAGMENT,
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layout(location = 0) in vec4 in_color;
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layout(location = 0) out vec4 out_color;
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void main() {
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//>> v1: %a_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.w
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//! v1: %a = v_interp_p2_f32 %by, %pm:m0, (kill)%a_tmp attr0.w
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//! v1: %b_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.z
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//! v1: %b = v_interp_p2_f32 %by, %pm:m0, (kill)%b_tmp attr0.z
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//! v1: %g_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.y
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//! v1: %g = v_interp_p2_f32 %by, %pm:m0, (kill)%g_tmp attr0.y
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//! v1: %r_tmp = v_interp_p1_f32 (kill)%bx, %pm:m0 attr0.x
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//! v1: %r = v_interp_p2_f32 (kill)%by, (kill)%pm:m0, (kill)%r_tmp attr0.x
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//! exp (kill)%r, (kill)%g, (kill)%b, (kill)%a mrt0
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out_color = in_color;
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}
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);
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PipelineBuilder pbld(get_vk_device(GFX9));
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pbld.add_vsfs(vs, fs);
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pbld.print_ir(VK_SHADER_STAGE_FRAGMENT_BIT, "ACO IR");
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END_TEST
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BEGIN_TEST(isel.compute.simple)
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for (unsigned i = GFX7; i <= GFX8; i++) {
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if (!set_variant((chip_class)i))
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continue;
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QoShaderModuleCreateInfo cs = qoShaderModuleCreateInfoGLSL(COMPUTE,
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layout(local_size_x=1) in;
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layout(binding=0) buffer Buf {
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uint res;
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};
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void main() {
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//>> v1: %data = p_parallelcopy 42
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//buffer_store_dword %_, v1: undef, 0, %data disable_wqm storage:buffer semantics: scope:invocation
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res = 42;
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}
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);
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PipelineBuilder pbld(get_vk_device((chip_class)i));
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pbld.add_cs(cs);
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pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true);
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}
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END_TEST
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BEGIN_TEST(isel.gs.no_outputs)
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for (unsigned i = GFX8; i <= GFX10; i++) {
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if (!set_variant((chip_class)i))
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continue;
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QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX,
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void main() {}
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);
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QoShaderModuleCreateInfo gs = qoShaderModuleCreateInfoGLSL(GEOMETRY,
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layout(points) in;
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layout(points, max_vertices = 1) out;
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void main() {
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EmitVertex();
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EndPrimitive();
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}
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);
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PipelineBuilder pbld(get_vk_device((chip_class)i));
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pbld.add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs);
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pbld.add_stage(VK_SHADER_STAGE_GEOMETRY_BIT, gs);
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pbld.create_pipeline();
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//! success
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fprintf(output, "success\n");
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}
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END_TEST
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BEGIN_TEST(isel.gs.no_verts)
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for (unsigned i = GFX8; i <= GFX10; i++) {
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if (!set_variant((chip_class)i))
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continue;
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QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX,
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void main() {}
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);
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QoShaderModuleCreateInfo gs = qoShaderModuleCreateInfoGLSL(GEOMETRY,
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layout(points) in;
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layout(points, max_vertices = 0) out;
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void main() {}
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);
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PipelineBuilder pbld(get_vk_device((chip_class)i));
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pbld.add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs);
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pbld.add_stage(VK_SHADER_STAGE_GEOMETRY_BIT, gs);
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pbld.create_pipeline();
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//! success
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fprintf(output, "success\n");
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}
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END_TEST
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BEGIN_TEST(isel.sparse.clause)
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for (unsigned i = GFX10_3; i <= GFX10_3; i++) {
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if (!set_variant((chip_class)i))
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continue;
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QoShaderModuleCreateInfo cs = qoShaderModuleCreateInfoGLSL(COMPUTE,
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QO_EXTENSION GL_ARB_sparse_texture2 : require
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layout(local_size_x=1) in;
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layout(binding=0) uniform sampler2D tex;
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layout(binding=1) buffer Buf {
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vec4 res[4];
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uint code[4];
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};
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void main() {
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//! llvm_version: #llvm_ver
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//; if llvm_ver >= 12:
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//; funcs['sample_res'] = lambda _: 'v[#_:#_]'
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//; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_]'
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//; else:
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//; funcs['sample_res'] = lambda _: 'v#_'
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//; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_, v#_]'
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//>> v5: (noCSE)%zero0 = p_create_vector 0, 0, 0, 0, 0
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//>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero0, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
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//>> v5: (noCSE)%zero1 = p_create_vector 0, 0, 0, 0, 0
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//>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero1, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
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//>> v5: (noCSE)%zero2 = p_create_vector 0, 0, 0, 0, 0
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//>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero2, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
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//>> v5: (noCSE)%zero3 = p_create_vector 0, 0, 0, 0, 0
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//>> v5: %_ = image_sample_lz_o (kill)%_, (kill)%_, (kill)%zero3, (kill)%_, (kill)%_, (kill)%_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
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//>> s_clause 0x3
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//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
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//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
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//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
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//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
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code[0] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(1, 0), res[0]);
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code[1] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(2, 0), res[1]);
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code[2] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(3, 0), res[2]);
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code[3] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(4, 0), res[3]);
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}
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);
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fprintf(output, "llvm_version: %u\n", LLVM_VERSION_MAJOR);
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PipelineBuilder pbld(get_vk_device((chip_class)i));
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pbld.add_cs(cs);
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pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true);
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pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "Assembly", true);
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}
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END_TEST
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