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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
 Path: blob/21.2-virgl/src/amd/registers/gfx7.json
7204 views
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{

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 "enums": {

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  "ArrayMode": {

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   "entries": [

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    {"name": "ARRAY_LINEAR_GENERAL", "value": 0},

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    {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},

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    {"name": "ARRAY_1D_TILED_THIN1", "value": 2},

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    {"name": "ARRAY_1D_TILED_THICK", "value": 3},

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    {"name": "ARRAY_2D_TILED_THIN1", "value": 4},

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    {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},

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    {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},

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    {"name": "ARRAY_2D_TILED_THICK", "value": 7},

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    {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},

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    {"name": "ARRAY_PRT_TILED_THICK", "value": 9},

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    {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},

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    {"name": "ARRAY_3D_TILED_THIN1", "value": 12},

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    {"name": "ARRAY_3D_TILED_THICK", "value": 13},

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    {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},

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    {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}

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   ]

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  },

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   "entries": [

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    {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},

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    {"name": "BUF_DATA_FORMAT_8", "value": 1},

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    {"name": "BUF_DATA_FORMAT_16", "value": 2},

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    {"name": "BUF_DATA_FORMAT_8_8", "value": 3},

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    {"name": "BUF_DATA_FORMAT_32", "value": 4},

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    {"name": "BUF_DATA_FORMAT_16_16", "value": 5},

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    {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},

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    {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},

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    {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},

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    {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},

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    {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},

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    {"name": "BUF_DATA_FORMAT_32_32", "value": 11},

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    {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},

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    {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},

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    {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},

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    {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}

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   ]

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  },

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  "BUF_NUM_FORMAT": {

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   "entries": [

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    {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},

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    {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},

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    {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},

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    {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},

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    {"name": "BUF_NUM_FORMAT_UINT", "value": 4},

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    {"name": "BUF_NUM_FORMAT_SINT", "value": 5},

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    {"name": "BUF_NUM_FORMAT_SNORM_OGL", "value": 6},

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    {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}

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   ]

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  },

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  "BankHeight": {

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   "entries": [

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    {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},

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    {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},

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    {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},

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    {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}

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   ]

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  },

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  "BankWidth": {

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   "entries": [

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    {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},

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    {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},

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    {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},

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    {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}

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   ]

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  },

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  "BlendOp": {

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   "entries": [

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    {"name": "BLEND_ZERO", "value": 0},

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    {"name": "BLEND_ONE", "value": 1},

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    {"name": "BLEND_SRC_COLOR", "value": 2},

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    {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},

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    {"name": "BLEND_SRC_ALPHA", "value": 4},

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    {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},

79
    {"name": "BLEND_DST_ALPHA", "value": 6},

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    {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},

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    {"name": "BLEND_DST_COLOR", "value": 8},

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    {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},

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    {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},

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    {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},

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    {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},

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    {"name": "BLEND_CONSTANT_COLOR", "value": 13},

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    {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},

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    {"name": "BLEND_SRC1_COLOR", "value": 15},

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    {"name": "BLEND_INV_SRC1_COLOR", "value": 16},

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    {"name": "BLEND_SRC1_ALPHA", "value": 17},

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    {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},

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    {"name": "BLEND_CONSTANT_ALPHA", "value": 19},

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    {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}

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   ]

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  },

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  "BlendOpt": {

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   "entries": [

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    {"name": "FORCE_OPT_AUTO", "value": 0},

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    {"name": "FORCE_OPT_DISABLE", "value": 1},

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    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},

101
    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},

102
    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},

103
    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},

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    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},

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    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}

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   ]

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  },

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   "entries": [

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    {"name": "CB_DISABLE", "value": 0},

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    {"name": "CB_NORMAL", "value": 1},

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113
    {"name": "CB_RESOLVE", "value": 3},

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    {"name": "CB_DECOMPRESS", "value": 4},

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    {"name": "CB_FMASK_DECOMPRESS", "value": 5}

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   ]

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  },

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  "CBPerfClearFilterSel": {

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   "entries": [

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    {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},

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    {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}

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   ]

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  },

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  "CBPerfOpFilterSel": {

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   "entries": [

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    {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},

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    {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},

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    {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},

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    {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},

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    {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},

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    {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}

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   ]

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  },

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   "entries": [

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    {"name": "OUT", "value": 1},

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    {"name": "IN_2", "value": 16},

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    {"name": "IN_30", "value": 512},

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    {"name": "IN_31", "value": 1024},

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    {"name": "IN_310", "value": 2048},

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    {"name": "IN_32", "value": 4096},

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    {"name": "IN_320", "value": 8192},

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    {"name": "IN_321", "value": 16384},

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    {"name": "IN_3210", "value": 32768}

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   ]

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  },

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   "entries": [

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    {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},

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    {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},

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    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},

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    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}

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   ]

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  },

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   "entries": [

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    {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},

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    {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},

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    {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},

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    {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},

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    {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}

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   ]

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    {"name": "COLOR_INVALID", "value": 0},

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    {"name": "COLOR_11_11_10", "value": 7},

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    {"name": "COLOR_10_10_10_2", "value": 8},

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    {"name": "COLOR_2_10_10_10", "value": 9},

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    {"name": "COLOR_8_8_8_8", "value": 10},

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    {"name": "COLOR_32_32", "value": 11},

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    {"name": "COLOR_16_16_16_16", "value": 12},

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    {"name": "COLOR_RESERVED_13", "value": 13},

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    {"name": "COLOR_32_32_32_32", "value": 14},

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    {"name": "COLOR_RESERVED_15", "value": 15},

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    {"name": "COLOR_5_6_5", "value": 16},

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    {"name": "COLOR_1_5_5_5", "value": 17},

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    {"name": "COLOR_5_5_5_1", "value": 18},

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    {"name": "COLOR_4_4_4_4", "value": 19},

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    {"name": "COLOR_8_24", "value": 20},

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    {"name": "COLOR_24_8", "value": 21},

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    {"name": "COLOR_X24_8_32_FLOAT", "value": 22},

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    {"name": "COLOR_RESERVED_23", "value": 23}

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   ]

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  },

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  "CombFunc": {

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   "entries": [

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    {"name": "COMB_DST_PLUS_SRC", "value": 0},

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    {"name": "COMB_MIN_DST_SRC", "value": 2},

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    {"name": "COMB_MAX_DST_SRC", "value": 3},

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    {"name": "COMB_DST_MINUS_SRC", "value": 4}

207
   ]

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  },

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  "CompareFrag": {

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   "entries": [

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    {"name": "FRAG_NEVER", "value": 0},

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    {"name": "FRAG_LESS", "value": 1},

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    {"name": "FRAG_EQUAL", "value": 2},

214
    {"name": "FRAG_LEQUAL", "value": 3},

215
    {"name": "FRAG_GREATER", "value": 4},

216
    {"name": "FRAG_NOTEQUAL", "value": 5},

217
    {"name": "FRAG_GEQUAL", "value": 6},

218
    {"name": "FRAG_ALWAYS", "value": 7}

219
   ]

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  },

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  "ConservativeZExport": {

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   "entries": [

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    {"name": "EXPORT_ANY_Z", "value": 0},

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    {"name": "EXPORT_LESS_THAN_Z", "value": 1},

225
    {"name": "EXPORT_GREATER_THAN_Z", "value": 2},

226
    {"name": "EXPORT_RESERVED", "value": 3}

227
   ]

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  },

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  "DbPSLControl": {

230
   "entries": [

231
    {"name": "PSLC_AUTO", "value": 0},

232
    {"name": "PSLC_ON_HANG_ONLY", "value": 1},

233
    {"name": "PSLC_ASAP", "value": 2},

234
    {"name": "PSLC_COUNTDOWN", "value": 3}

235
   ]

236
  },

237
  "EXCP_EN": {

238
   "entries": [

239
    {"name": "INVALID", "value": 1},

240
    {"name": "INPUT_DENORMAL", "value": 2},

241
    {"name": "DIVIDE_BY_ZERO", "value": 4},

242
    {"name": "OVERFLOW", "value": 8},

243
    {"name": "UNDERFLOW", "value": 16},

244
    {"name": "INEXACT", "value": 32},

245
    {"name": "INT_DIVIDE_BY_ZERO", "value": 64},

246
    {"name": "ADDRESS_WATCH", "value": 128},

247
    {"name": "MEMORY_VIOLATION", "value": 256}

248
   ]

249
  },

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  "FLOAT_MODE": {

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   "entries": [

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253
    {"name": "FP_64_DENORMS", "value": 192},

254
    {"name": "FP_ALL_DENORMS", "value": 240}

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   ]

256
  },

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  "ForceControl": {

258
   "entries": [

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    {"name": "FORCE_OFF", "value": 0},

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    {"name": "FORCE_ENABLE", "value": 1},

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    {"name": "FORCE_DISABLE", "value": 2},

262
    {"name": "FORCE_RESERVED", "value": 3}

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   ]

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  },

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  "IMG_DATA_FORMAT": {

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   "entries": [

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    {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},

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    {"name": "IMG_DATA_FORMAT_16", "value": 2},

270
    {"name": "IMG_DATA_FORMAT_8_8", "value": 3},

271
    {"name": "IMG_DATA_FORMAT_32", "value": 4},

272
    {"name": "IMG_DATA_FORMAT_16_16", "value": 5},

273
    {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},

274
    {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},

275
    {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},

276
    {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},

277
    {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},

278
    {"name": "IMG_DATA_FORMAT_32_32", "value": 11},

279
    {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},

280
    {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},

281
    {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},

282
    {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},

283
    {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},

284
    {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},

285
    {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},

286
    {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},

287
    {"name": "IMG_DATA_FORMAT_8_24", "value": 20},

288
    {"name": "IMG_DATA_FORMAT_24_8", "value": 21},

289
    {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},

290
    {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23},

291
    {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24},

292
    {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25},

293
    {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26},

294
    {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27},

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    {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28},

296
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297
    {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},

298
    {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},

299
    {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},

300
    {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},

301
    {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},

302
    {"name": "IMG_DATA_FORMAT_BC1", "value": 35},

303
    {"name": "IMG_DATA_FORMAT_BC2", "value": 36},

304
    {"name": "IMG_DATA_FORMAT_BC3", "value": 37},

305
    {"name": "IMG_DATA_FORMAT_BC4", "value": 38},

306
    {"name": "IMG_DATA_FORMAT_BC5", "value": 39},

307
    {"name": "IMG_DATA_FORMAT_BC6", "value": 40},

308
    {"name": "IMG_DATA_FORMAT_BC7", "value": 41},

309
    {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42},

310
    {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},

311
    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},

312
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},

313
    {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},

314
    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},

315
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},

316
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},

317
    {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},

318
    {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},

319
    {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},

320
    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},

321
    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},

322
    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},

323
    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},

324
    {"name": "IMG_DATA_FORMAT_4_4", "value": 57},

325
    {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},

326
    {"name": "IMG_DATA_FORMAT_1", "value": 59},

327
    {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},

328
    {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},

329
    {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},

330
    {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}

331
   ]

332
  },

333
  "IMG_NUM_FORMAT": {

334
   "entries": [

335
    {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},

336
    {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},

337
    {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},

338
    {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},

339
    {"name": "IMG_NUM_FORMAT_UINT", "value": 4},

340
    {"name": "IMG_NUM_FORMAT_SINT", "value": 5},

341
    {"name": "IMG_NUM_FORMAT_SNORM_OGL", "value": 6},

342
    {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},

343
    {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},

344
    {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},

345
    {"name": "IMG_NUM_FORMAT_UBNORM", "value": 10},

346
    {"name": "IMG_NUM_FORMAT_UBNORM_OGL", "value": 11},

347
    {"name": "IMG_NUM_FORMAT_UBINT", "value": 12},

348
    {"name": "IMG_NUM_FORMAT_UBSCALED", "value": 13},

349
    {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},

350
    {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}

351
   ]

352
  },

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  "MacroTileAspect": {

354
   "entries": [

355
    {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},

356
    {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},

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    {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},

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    {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}

359
   ]

360
  },

361
  "MicroTileMode": {

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   "entries": [

363
    {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},

364
    {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},

365
    {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},

366
    {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},

367
    {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}

368
   ]

369
  },

370
  "NumBanks": {

371
   "entries": [

372
    {"name": "ADDR_SURF_2_BANK", "value": 0},

373
    {"name": "ADDR_SURF_4_BANK", "value": 1},

374
    {"name": "ADDR_SURF_8_BANK", "value": 2},

375
    {"name": "ADDR_SURF_16_BANK", "value": 3}

376
   ]

377
  },

378
  "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {

379
   "entries": [

380
    {"name": "X_DRAW_POINTS", "value": 0},

381
    {"name": "X_DRAW_LINES", "value": 1},

382
    {"name": "X_DRAW_TRIANGLES", "value": 2}

383
   ]

384
  },

385
  "PA_SU_SC_MODE_CNTL__POLY_MODE": {

386
   "entries": [

387
    {"name": "X_DISABLE_POLY_MODE", "value": 0},

388
    {"name": "X_DUAL_MODE", "value": 1}

389
   ]

390
  },

391
  "PA_SU_VTX_CNTL__ROUND_MODE": {

392
   "entries": [

393
    {"name": "X_TRUNCATE", "value": 0},

394
    {"name": "X_ROUND", "value": 1},

395
    {"name": "X_ROUND_TO_EVEN", "value": 2},

396
    {"name": "X_ROUND_TO_ODD", "value": 3}

397
   ]

398
  },

399
  "PipeConfig": {

400
   "entries": [

401
    {"name": "ADDR_SURF_P2", "value": 0},

402
    {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},

403
    {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},

404
    {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},

405
    {"name": "ADDR_SURF_P4_8x16", "value": 4},

406
    {"name": "ADDR_SURF_P4_16x16", "value": 5},

407
    {"name": "ADDR_SURF_P4_16x32", "value": 6},

408
    {"name": "ADDR_SURF_P4_32x32", "value": 7},

409
    {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},

410
    {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},

411
    {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},

412
    {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},

413
    {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},

414
    {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},

415
    {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},

416
    {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},

417
    {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},

418
    {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}

419
   ]

420
  },

421
  "PkrMap": {

422
   "entries": [

423
    {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},

424
    {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},

425
    {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},

426
    {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}

427
   ]

428
  },

429
  "PkrXsel": {

430
   "entries": [

431
    {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},

432
    {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},

433
    {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},

434
    {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}

435
   ]

436
  },

437
  "PkrXsel2": {

438
   "entries": [

439
    {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},

440
    {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},

441
    {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},

442
    {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}

443
   ]

444
  },

445
  "PkrYsel": {

446
   "entries": [

447
    {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},

448
    {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},

449
    {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},

450
    {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}

451
   ]

452
  },

453
  "QUANT_MODE": {

454
   "entries": [

455
    {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},

456
    {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},

457
    {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},

458
    {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},

459
    {"name": "X_16_8_FIXED_POINT_1", "value": 4},

460
    {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},

461
    {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},

462
    {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}

463
   ]

464
  },

465
  "ROP3": {

466
   "entries": [

467
    {"name": "ROP3_CLEAR", "value": 0},

468
    {"name": "X_0X05", "value": 5},

469
    {"name": "X_0X0A", "value": 10},

470
    {"name": "X_0X0F", "value": 15},

471
    {"name": "ROP3_NOR", "value": 17},

472
    {"name": "ROP3_AND_INVERTED", "value": 34},

473
    {"name": "ROP3_COPY_INVERTED", "value": 51},

474
    {"name": "ROP3_AND_REVERSE", "value": 68},

475
    {"name": "X_0X50", "value": 80},

476
    {"name": "ROP3_INVERT", "value": 85},

477
    {"name": "X_0X5A", "value": 90},

478
    {"name": "X_0X5F", "value": 95},

479
    {"name": "ROP3_XOR", "value": 102},

480
    {"name": "ROP3_NAND", "value": 119},

481
    {"name": "ROP3_AND", "value": 136},

482
    {"name": "ROP3_EQUIVALENT", "value": 153},

483
    {"name": "X_0XA0", "value": 160},

484
    {"name": "X_0XA5", "value": 165},

485
    {"name": "ROP3_NO_OP", "value": 170},

486
    {"name": "X_0XAF", "value": 175},

487
    {"name": "ROP3_OR_INVERTED", "value": 187},

488
    {"name": "ROP3_COPY", "value": 204},

489
    {"name": "ROP3_OR_REVERSE", "value": 221},

490
    {"name": "ROP3_OR", "value": 238},

491
    {"name": "X_0XF0", "value": 240},

492
    {"name": "X_0XF5", "value": 245},

493
    {"name": "X_0XFA", "value": 250},

494
    {"name": "ROP3_SET", "value": 255}

495
   ]

496
  },

497
  "RbMap": {

498
   "entries": [

499
    {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},

500
    {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},

501
    {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},

502
    {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}

503
   ]

504
  },

505
  "RbXsel": {

506
   "entries": [

507
    {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},

508
    {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}

509
   ]

510
  },

511
  "RbXsel2": {

512
   "entries": [

513
    {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},

514
    {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},

515
    {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},

516
    {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}

517
   ]

518
  },

519
  "RbYsel": {

520
   "entries": [

521
    {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},

522
    {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}

523
   ]

524
  },

525
  "SPI_PNT_SPRITE_OVERRIDE": {

526
   "entries": [

527
    {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},

528
    {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},

529
    {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},

530
    {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},

531
    {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}

532
   ]

533
  },

534
  "SPI_SHADER_EX_FORMAT": {

535
   "entries": [

536
    {"name": "SPI_SHADER_ZERO", "value": 0},

537
    {"name": "SPI_SHADER_32_R", "value": 1},

538
    {"name": "SPI_SHADER_32_GR", "value": 2},

539
    {"name": "SPI_SHADER_32_AR", "value": 3},

540
    {"name": "SPI_SHADER_FP16_ABGR", "value": 4},

541
    {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},

542
    {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},

543
    {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},

544
    {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},

545
    {"name": "SPI_SHADER_32_ABGR", "value": 9}

546
   ]

547
  },

548
  "SPI_SHADER_FORMAT": {

549
   "entries": [

550
    {"name": "SPI_SHADER_NONE", "value": 0},

551
    {"name": "SPI_SHADER_1COMP", "value": 1},

552
    {"name": "SPI_SHADER_2COMP", "value": 2},

553
    {"name": "SPI_SHADER_4COMPRESS", "value": 3},

554
    {"name": "SPI_SHADER_4COMP", "value": 4}

555
   ]

556
  },

557
  "SPM_PERFMON_STATE": {

558
   "entries": [

559
    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},

560
    {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},

561
    {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},

562
    {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},

563
    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},

564
    {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}

565
   ]

566
  },

567
  "SQ_IMG_FILTER_TYPE": {

568
   "entries": [

569
    {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},

570
    {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},

571
    {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}

572
   ]

573
  },

574
  "SQ_RSRC_BUF_TYPE": {

575
   "entries": [

576
    {"name": "SQ_RSRC_BUF", "value": 0},

577
    {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},

578
    {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},

579
    {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}

580
   ]

581
  },

582
  "SQ_RSRC_IMG_TYPE": {

583
   "entries": [

584
    {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},

585
    {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},

586
    {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},

587
    {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},

588
    {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},

589
    {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},

590
    {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},

591
    {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},

592
    {"name": "SQ_RSRC_IMG_1D", "value": 8},

593
    {"name": "SQ_RSRC_IMG_2D", "value": 9},

594
    {"name": "SQ_RSRC_IMG_3D", "value": 10},

595
    {"name": "SQ_RSRC_IMG_CUBE", "value": 11},

596
    {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},

597
    {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},

598
    {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},

599
    {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}

600
   ]

601
  },

602
  "SQ_SEL_XYZW01": {

603
   "entries": [

604
    {"name": "SQ_SEL_0", "value": 0},

605
    {"name": "SQ_SEL_1", "value": 1},

606
    {"name": "SQ_SEL_RESERVED_0", "value": 2},

607
    {"name": "SQ_SEL_RESERVED_1", "value": 3},

608
    {"name": "SQ_SEL_X", "value": 4},

609
    {"name": "SQ_SEL_Y", "value": 5},

610
    {"name": "SQ_SEL_Z", "value": 6},

611
    {"name": "SQ_SEL_W", "value": 7}

612
   ]

613
  },

614
  "SQ_TEX_BORDER_COLOR": {

615
   "entries": [

616
    {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},

617
    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},

618
    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},

619
    {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}

620
   ]

621
  },

622
  "SQ_TEX_CLAMP": {

623
   "entries": [

624
    {"name": "SQ_TEX_WRAP", "value": 0},

625
    {"name": "SQ_TEX_MIRROR", "value": 1},

626
    {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},

627
    {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},

628
    {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},

629
    {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},

630
    {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},

631
    {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}

632
   ]

633
  },

634
  "SQ_TEX_DEPTH_COMPARE": {

635
   "entries": [

636
    {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},

637
    {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},

638
    {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},

639
    {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},

640
    {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},

641
    {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},

642
    {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},

643
    {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}

644
   ]

645
  },

646
  "SQ_TEX_MIP_FILTER": {

647
   "entries": [

648
    {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},

649
    {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},

650
    {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2}

651
   ]

652
  },

653
  "SQ_TEX_XY_FILTER": {

654
   "entries": [

655
    {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},

656
    {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},

657
    {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},

658
    {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}

659
   ]

660
  },

661
  "SQ_TEX_Z_FILTER": {

662
   "entries": [

663
    {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},

664
    {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},

665
    {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}

666
   ]

667
  },

668
  "ScMap": {

669
   "entries": [

670
    {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},

671
    {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},

672
    {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},

673
    {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}

674
   ]

675
  },

676
  "ScXsel": {

677
   "entries": [

678
    {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},

679
    {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},

680
    {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},

681
    {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}

682
   ]

683
  },

684
  "ScYsel": {

685
   "entries": [

686
    {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},

687
    {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},

688
    {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},

689
    {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}

690
   ]

691
  },

692
  "SeMap": {

693
   "entries": [

694
    {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},

695
    {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},

696
    {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},

697
    {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}

698
   ]

699
  },

700
  "SePairMap": {

701
   "entries": [

702
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},

703
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},

704
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},

705
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}

706
   ]

707
  },

708
  "SePairXsel": {

709
   "entries": [

710
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},

711
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},

712
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},

713
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}

714
   ]

715
  },

716
  "SePairYsel": {

717
   "entries": [

718
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},

719
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},

720
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},

721
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}

722
   ]

723
  },

724
  "SeXsel": {

725
   "entries": [

726
    {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},

727
    {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},

728
    {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},

729
    {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}

730
   ]

731
  },

732
  "SeYsel": {

733
   "entries": [

734
    {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},

735
    {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},

736
    {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},

737
    {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}

738
   ]

739
  },

740
  "StencilFormat": {

741
   "entries": [

742
    {"name": "STENCIL_INVALID", "value": 0},

743
    {"name": "STENCIL_8", "value": 1}

744
   ]

745
  },

746
  "StencilOp": {

747
   "entries": [

748
    {"name": "STENCIL_KEEP", "value": 0},

749
    {"name": "STENCIL_ZERO", "value": 1},

750
    {"name": "STENCIL_ONES", "value": 2},

751
    {"name": "STENCIL_REPLACE_TEST", "value": 3},

752
    {"name": "STENCIL_REPLACE_OP", "value": 4},

753
    {"name": "STENCIL_ADD_CLAMP", "value": 5},

754
    {"name": "STENCIL_SUB_CLAMP", "value": 6},

755
    {"name": "STENCIL_INVERT", "value": 7},

756
    {"name": "STENCIL_ADD_WRAP", "value": 8},

757
    {"name": "STENCIL_SUB_WRAP", "value": 9},

758
    {"name": "STENCIL_AND", "value": 10},

759
    {"name": "STENCIL_OR", "value": 11},

760
    {"name": "STENCIL_XOR", "value": 12},

761
    {"name": "STENCIL_NAND", "value": 13},

762
    {"name": "STENCIL_NOR", "value": 14},

763
    {"name": "STENCIL_XNOR", "value": 15}

764
   ]

765
  },

766
  "SurfaceEndian": {

767
   "entries": [

768
    {"name": "ENDIAN_NONE", "value": 0},

769
    {"name": "ENDIAN_8IN16", "value": 1},

770
    {"name": "ENDIAN_8IN32", "value": 2},

771
    {"name": "ENDIAN_8IN64", "value": 3}

772
   ]

773
  },

774
  "SurfaceNumber": {

775
   "entries": [

776
    {"name": "NUMBER_UNORM", "value": 0},

777
    {"name": "NUMBER_SNORM", "value": 1},

778
    {"name": "NUMBER_USCALED", "value": 2},

779
    {"name": "NUMBER_SSCALED", "value": 3},

780
    {"name": "NUMBER_UINT", "value": 4},

781
    {"name": "NUMBER_SINT", "value": 5},

782
    {"name": "NUMBER_SRGB", "value": 6},

783
    {"name": "NUMBER_FLOAT", "value": 7}

784
   ]

785
  },

786
  "SurfaceSwap": {

787
   "entries": [

788
    {"name": "SWAP_STD", "value": 0},

789
    {"name": "SWAP_ALT", "value": 1},

790
    {"name": "SWAP_STD_REV", "value": 2},

791
    {"name": "SWAP_ALT_REV", "value": 3}

792
   ]

793
  },

794
  "TileSplit": {

795
   "entries": [

796
    {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},

797
    {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},

798
    {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},

799
    {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},

800
    {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},

801
    {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},

802
    {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}

803
   ]

804
  },

805
  "VGT_DI_MAJOR_MODE_SELECT": {

806
   "entries": [

807
    {"name": "DI_MAJOR_MODE_0", "value": 0},

808
    {"name": "DI_MAJOR_MODE_1", "value": 1}

809
   ]

810
  },

811
  "VGT_DI_PRIM_TYPE": {

812
   "entries": [

813
    {"name": "DI_PT_NONE", "value": 0},

814
    {"name": "DI_PT_POINTLIST", "value": 1},

815
    {"name": "DI_PT_LINELIST", "value": 2},

816
    {"name": "DI_PT_LINESTRIP", "value": 3},

817
    {"name": "DI_PT_TRILIST", "value": 4},

818
    {"name": "DI_PT_TRIFAN", "value": 5},

819
    {"name": "DI_PT_TRISTRIP", "value": 6},

820
    {"name": "DI_PT_UNUSED_0", "value": 7},

821
    {"name": "DI_PT_UNUSED_1", "value": 8},

822
    {"name": "DI_PT_PATCH", "value": 9},

823
    {"name": "DI_PT_LINELIST_ADJ", "value": 10},

824
    {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},

825
    {"name": "DI_PT_TRILIST_ADJ", "value": 12},

826
    {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},

827
    {"name": "DI_PT_UNUSED_3", "value": 14},

828
    {"name": "DI_PT_UNUSED_4", "value": 15},

829
    {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},

830
    {"name": "DI_PT_RECTLIST", "value": 17},

831
    {"name": "DI_PT_LINELOOP", "value": 18},

832
    {"name": "DI_PT_QUADLIST", "value": 19},

833
    {"name": "DI_PT_QUADSTRIP", "value": 20},

834
    {"name": "DI_PT_POLYGON", "value": 21},

835
    {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},

836
    {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},

837
    {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},

838
    {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},

839
    {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},

840
    {"name": "DI_PT_2D_LINE_STRIP", "value": 27},

841
    {"name": "DI_PT_2D_TRI_STRIP", "value": 28}

842
   ]

843
  },

844
  "VGT_DI_SOURCE_SELECT": {

845
   "entries": [

846
    {"name": "DI_SRC_SEL_DMA", "value": 0},

847
    {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},

848
    {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},

849
    {"name": "DI_SRC_SEL_RESERVED", "value": 3}

850
   ]

851
  },

852
  "VGT_DMA_BUF_TYPE": {

853
   "entries": [

854
    {"name": "VGT_DMA_BUF_MEM", "value": 0},

855
    {"name": "VGT_DMA_BUF_RING", "value": 1},

856
    {"name": "VGT_DMA_BUF_SETUP", "value": 2}

857
   ]

858
  },

859
  "VGT_DMA_SWAP_MODE": {

860
   "entries": [

861
    {"name": "VGT_DMA_SWAP_NONE", "value": 0},

862
    {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},

863
    {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},

864
    {"name": "VGT_DMA_SWAP_WORD", "value": 3}

865
   ]

866
  },

867
  "VGT_EVENT_TYPE": {

868
   "entries": [

869
    {"name": "Reserved_0x00", "value": 0},

870
    {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},

871
    {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},

872
    {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},

873
    {"name": "CACHE_FLUSH_TS", "value": 4},

874
    {"name": "CONTEXT_DONE", "value": 5},

875
    {"name": "CACHE_FLUSH", "value": 6},

876
    {"name": "CS_PARTIAL_FLUSH", "value": 7},

877
    {"name": "VGT_STREAMOUT_SYNC", "value": 8},

878
    {"name": "Reserved_0x09", "value": 9},

879
    {"name": "VGT_STREAMOUT_RESET", "value": 10},

880
    {"name": "END_OF_PIPE_INCR_DE", "value": 11},

881
    {"name": "END_OF_PIPE_IB_END", "value": 12},

882
    {"name": "RST_PIX_CNT", "value": 13},

883
    {"name": "Reserved_0x0E", "value": 14},

884
    {"name": "VS_PARTIAL_FLUSH", "value": 15},

885
    {"name": "PS_PARTIAL_FLUSH", "value": 16},

886
    {"name": "FLUSH_HS_OUTPUT", "value": 17},

887
    {"name": "FLUSH_LS_OUTPUT", "value": 18},

888
    {"name": "Reserved_0x13", "value": 19},

889
    {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},

890
    {"name": "ZPASS_DONE", "value": 21},

891
    {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},

892
    {"name": "PERFCOUNTER_START", "value": 23},

893
    {"name": "PERFCOUNTER_STOP", "value": 24},

894
    {"name": "PIPELINESTAT_START", "value": 25},

895
    {"name": "PIPELINESTAT_STOP", "value": 26},

896
    {"name": "PERFCOUNTER_SAMPLE", "value": 27},

897
    {"name": "FLUSH_ES_OUTPUT", "value": 28},

898
    {"name": "FLUSH_GS_OUTPUT", "value": 29},

899
    {"name": "SAMPLE_PIPELINESTAT", "value": 30},

900
    {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},

901
    {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},

902
    {"name": "RESET_VTX_CNT", "value": 33},

903
    {"name": "BLOCK_CONTEXT_DONE", "value": 34},

904
    {"name": "CS_CONTEXT_DONE", "value": 35},

905
    {"name": "VGT_FLUSH", "value": 36},

906
    {"name": "Reserved_0x25", "value": 37},

907
    {"name": "SQ_NON_EVENT", "value": 38},

908
    {"name": "SC_SEND_DB_VPZ", "value": 39},

909
    {"name": "BOTTOM_OF_PIPE_TS", "value": 40},

910
    {"name": "FLUSH_SX_TS", "value": 41},

911
    {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},

912
    {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},

913
    {"name": "FLUSH_AND_INV_DB_META", "value": 44},

914
    {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},

915
    {"name": "FLUSH_AND_INV_CB_META", "value": 46},

916
    {"name": "CS_DONE", "value": 47},

917
    {"name": "PS_DONE", "value": 48},

918
    {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},

919
    {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},

920
    {"name": "THREAD_TRACE_START", "value": 51},

921
    {"name": "THREAD_TRACE_STOP", "value": 52},

922
    {"name": "THREAD_TRACE_MARKER", "value": 53},

923
    {"name": "THREAD_TRACE_FLUSH", "value": 54},

924
    {"name": "THREAD_TRACE_FINISH", "value": 55},

925
    {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},

926
    {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},

927
    {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},

928
    {"name": "CONTEXT_SUSPEND", "value": 59}

929
   ]

930
  },

931
  "VGT_GS_CUT_MODE": {

932
   "entries": [

933
    {"name": "GS_CUT_1024", "value": 0},

934
    {"name": "GS_CUT_512", "value": 1},

935
    {"name": "GS_CUT_256", "value": 2},

936
    {"name": "GS_CUT_128", "value": 3}

937
   ]

938
  },

939
  "VGT_GS_MODE_TYPE": {

940
   "entries": [

941
    {"name": "GS_OFF", "value": 0},

942
    {"name": "GS_SCENARIO_A", "value": 1},

943
    {"name": "GS_SCENARIO_B", "value": 2},

944
    {"name": "GS_SCENARIO_G", "value": 3},

945
    {"name": "GS_SCENARIO_C", "value": 4},

946
    {"name": "SPRITE_EN", "value": 5}

947
   ]

948
  },

949
  "VGT_GS_OUTPRIM_TYPE": {

950
   "entries": [

951
    {"name": "POINTLIST", "value": 0},

952
    {"name": "LINESTRIP", "value": 1},

953
    {"name": "TRISTRIP", "value": 2}

954
   ]

955
  },

956
  "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {

957
   "entries": [

958
    {"name": "X_8K_DWORDS", "value": 0},

959
    {"name": "X_4K_DWORDS", "value": 1},

960
    {"name": "X_2K_DWORDS", "value": 2},

961
    {"name": "X_1K_DWORDS", "value": 3}

962
   ]

963
  },

964
  "VGT_INDEX_TYPE_MODE": {

965
   "entries": [

966
    {"name": "VGT_INDEX_16", "value": 0},

967
    {"name": "VGT_INDEX_32", "value": 1}

968
   ]

969
  },

970
  "VGT_RDREQ_POLICY": {

971
   "entries": [

972
    {"name": "VGT_POLICY_LRU", "value": 0},

973
    {"name": "VGT_POLICY_STREAM", "value": 1},

974
    {"name": "VGT_POLICY_BYPASS", "value": 2},

975
    {"name": "VGT_POLICY_RESERVED", "value": 3}

976
   ]

977
  },

978
  "VGT_STAGES_ES_EN": {

979
   "entries": [

980
    {"name": "ES_STAGE_OFF", "value": 0},

981
    {"name": "ES_STAGE_DS", "value": 1},

982
    {"name": "ES_STAGE_REAL", "value": 2},

983
    {"name": "RESERVED_ES", "value": 3}

984
   ]

985
  },

986
  "VGT_STAGES_GS_EN": {

987
   "entries": [

988
    {"name": "GS_STAGE_OFF", "value": 0},

989
    {"name": "GS_STAGE_ON", "value": 1}

990
   ]

991
  },

992
  "VGT_STAGES_HS_EN": {

993
   "entries": [

994
    {"name": "HS_STAGE_OFF", "value": 0},

995
    {"name": "HS_STAGE_ON", "value": 1}

996
   ]

997
  },

998
  "VGT_STAGES_LS_EN": {

999
   "entries": [

1000
    {"name": "LS_STAGE_OFF", "value": 0},

1001
    {"name": "LS_STAGE_ON", "value": 1},

1002
    {"name": "CS_STAGE_ON", "value": 2},

1003
    {"name": "RESERVED_LS", "value": 3}

1004
   ]

1005
  },

1006
  "VGT_STAGES_VS_EN": {

1007
   "entries": [

1008
    {"name": "VS_STAGE_REAL", "value": 0},

1009
    {"name": "VS_STAGE_DS", "value": 1},

1010
    {"name": "VS_STAGE_COPY_SHADER", "value": 2},

1011
    {"name": "RESERVED_VS", "value": 3}

1012
   ]

1013
  },

1014
  "VGT_TESS_PARTITION": {

1015
   "entries": [

1016
    {"name": "PART_INTEGER", "value": 0},

1017
    {"name": "PART_POW2", "value": 1},

1018
    {"name": "PART_FRAC_ODD", "value": 2},

1019
    {"name": "PART_FRAC_EVEN", "value": 3}

1020
   ]

1021
  },

1022
  "VGT_TESS_TOPOLOGY": {

1023
   "entries": [

1024
    {"name": "OUTPUT_POINT", "value": 0},

1025
    {"name": "OUTPUT_LINE", "value": 1},

1026
    {"name": "OUTPUT_TRIANGLE_CW", "value": 2},

1027
    {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}

1028
   ]

1029
  },

1030
  "VGT_TESS_TYPE": {

1031
   "entries": [

1032
    {"name": "TESS_ISOLINE", "value": 0},

1033
    {"name": "TESS_TRIANGLE", "value": 1},

1034
    {"name": "TESS_QUAD", "value": 2}

1035
   ]

1036
  },

1037
  "ZFormat": {

1038
   "entries": [

1039
    {"name": "Z_INVALID", "value": 0},

1040
    {"name": "Z_16", "value": 1},

1041
    {"name": "Z_24", "value": 2},

1042
    {"name": "Z_32_FLOAT", "value": 3}

1043
   ]

1044
  },

1045
  "ZLimitSumm": {

1046
   "entries": [

1047
    {"name": "FORCE_SUMM_OFF", "value": 0},

1048
    {"name": "FORCE_SUMM_MINZ", "value": 1},

1049
    {"name": "FORCE_SUMM_MAXZ", "value": 2},

1050
    {"name": "FORCE_SUMM_BOTH", "value": 3}

1051
   ]

1052
  },

1053
  "ZOrder": {

1054
   "entries": [

1055
    {"name": "LATE_Z", "value": 0},

1056
    {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},

1057
    {"name": "RE_Z", "value": 2},

1058
    {"name": "EARLY_Z_THEN_RE_Z", "value": 3}

1059
   ]

1060
  }

1061
 },

1062
 "register_mappings": [

1063
  {

1064
   "chips": ["gfx7"],

1065
   "map": {"at": 68, "to": "mm"},

1066
   "name": "SQ_WAVE_MODE",

1067
   "type_ref": "SQ_WAVE_MODE"

1068
  },

1069
  {

1070
   "chips": ["gfx7"],

1071
   "map": {"at": 72, "to": "mm"},

1072
   "name": "SQ_WAVE_STATUS",

1073
   "type_ref": "SQ_WAVE_STATUS"

1074
  },

1075
  {

1076
   "chips": ["gfx7"],

1077
   "map": {"at": 76, "to": "mm"},

1078
   "name": "SQ_WAVE_TRAPSTS",

1079
   "type_ref": "SQ_WAVE_TRAPSTS"

1080
  },

1081
  {

1082
   "chips": ["gfx7"],

1083
   "map": {"at": 80, "to": "mm"},

1084
   "name": "SQ_WAVE_HW_ID",

1085
   "type_ref": "SQ_WAVE_HW_ID"

1086
  },

1087
  {

1088
   "chips": ["gfx7"],

1089
   "map": {"at": 84, "to": "mm"},

1090
   "name": "SQ_WAVE_GPR_ALLOC",

1091
   "type_ref": "SQ_WAVE_GPR_ALLOC"

1092
  },

1093
  {

1094
   "chips": ["gfx7"],

1095
   "map": {"at": 88, "to": "mm"},

1096
   "name": "SQ_WAVE_LDS_ALLOC",

1097
   "type_ref": "SQ_WAVE_LDS_ALLOC"

1098
  },

1099
  {

1100
   "chips": ["gfx7"],

1101
   "map": {"at": 92, "to": "mm"},

1102
   "name": "SQ_WAVE_IB_STS",

1103
   "type_ref": "SQ_WAVE_IB_STS"

1104
  },

1105
  {

1106
   "chips": ["gfx7"],

1107
   "map": {"at": 96, "to": "mm"},

1108
   "name": "SQ_WAVE_PC_LO"

1109
  },

1110
  {

1111
   "chips": ["gfx7"],

1112
   "map": {"at": 100, "to": "mm"},

1113
   "name": "SQ_WAVE_PC_HI",

1114
   "type_ref": "SQ_WAVE_PC_HI"

1115
  },

1116
  {

1117
   "chips": ["gfx7"],

1118
   "map": {"at": 104, "to": "mm"},

1119
   "name": "SQ_WAVE_INST_DW0"

1120
  },

1121
  {

1122
   "chips": ["gfx7"],

1123
   "map": {"at": 108, "to": "mm"},

1124
   "name": "SQ_WAVE_INST_DW1"

1125
  },

1126
  {

1127
   "chips": ["gfx7"],

1128
   "map": {"at": 112, "to": "mm"},

1129
   "name": "SQ_WAVE_IB_DBG0",

1130
   "type_ref": "SQ_WAVE_IB_DBG0"

1131
  },

1132
  {

1133
   "chips": ["gfx7"],

1134
   "map": {"at": 2480, "to": "mm"},

1135
   "name": "SQ_WAVE_TBA_LO"

1136
  },

1137
  {

1138
   "chips": ["gfx7"],

1139
   "map": {"at": 2484, "to": "mm"},

1140
   "name": "SQ_WAVE_TBA_HI",

1141
   "type_ref": "SQ_WAVE_TBA_HI"

1142
  },

1143
  {

1144
   "chips": ["gfx7"],

1145
   "map": {"at": 2488, "to": "mm"},

1146
   "name": "SQ_WAVE_TMA_LO"

1147
  },

1148
  {

1149
   "chips": ["gfx7"],

1150
   "map": {"at": 2492, "to": "mm"},

1151
   "name": "SQ_WAVE_TMA_HI",

1152
   "type_ref": "SQ_WAVE_TBA_HI"

1153
  },

1154
  {

1155
   "chips": ["gfx7"],

1156
   "map": {"at": 2496, "to": "mm"},

1157
   "name": "SQ_WAVE_TTMP0"

1158
  },

1159
  {

1160
   "chips": ["gfx7"],

1161
   "map": {"at": 2500, "to": "mm"},

1162
   "name": "SQ_WAVE_TTMP1"

1163
  },

1164
  {

1165
   "chips": ["gfx7"],

1166
   "map": {"at": 2504, "to": "mm"},

1167
   "name": "SQ_WAVE_TTMP2"

1168
  },

1169
  {

1170
   "chips": ["gfx7"],

1171
   "map": {"at": 2508, "to": "mm"},

1172
   "name": "SQ_WAVE_TTMP3"

1173
  },

1174
  {

1175
   "chips": ["gfx7"],

1176
   "map": {"at": 2512, "to": "mm"},

1177
   "name": "SQ_WAVE_TTMP4"

1178
  },

1179
  {

1180
   "chips": ["gfx7"],

1181
   "map": {"at": 2516, "to": "mm"},

1182
   "name": "SQ_WAVE_TTMP5"

1183
  },

1184
  {

1185
   "chips": ["gfx7"],

1186
   "map": {"at": 2520, "to": "mm"},

1187
   "name": "SQ_WAVE_TTMP6"

1188
  },

1189
  {

1190
   "chips": ["gfx7"],

1191
   "map": {"at": 2524, "to": "mm"},

1192
   "name": "SQ_WAVE_TTMP7"

1193
  },

1194
  {

1195
   "chips": ["gfx7"],

1196
   "map": {"at": 2528, "to": "mm"},

1197
   "name": "SQ_WAVE_TTMP8"

1198
  },

1199
  {

1200
   "chips": ["gfx7"],

1201
   "map": {"at": 2532, "to": "mm"},

1202
   "name": "SQ_WAVE_TTMP9"

1203
  },

1204
  {

1205
   "chips": ["gfx7"],

1206
   "map": {"at": 2536, "to": "mm"},

1207
   "name": "SQ_WAVE_TTMP10"

1208
  },

1209
  {

1210
   "chips": ["gfx7"],

1211
   "map": {"at": 2540, "to": "mm"},

1212
   "name": "SQ_WAVE_TTMP11"

1213
  },

1214
  {

1215
   "chips": ["gfx7"],

1216
   "map": {"at": 2544, "to": "mm"},

1217
   "name": "SQ_WAVE_M0"

1218
  },

1219
  {

1220
   "chips": ["gfx7"],

1221
   "map": {"at": 2552, "to": "mm"},

1222
   "name": "SQ_WAVE_EXEC_LO"

1223
  },

1224
  {

1225
   "chips": ["gfx7"],

1226
   "map": {"at": 2556, "to": "mm"},

1227
   "name": "SQ_WAVE_EXEC_HI"

1228
  },

1229
  {

1230
   "chips": ["gfx7"],

1231
   "map": {"at": 32776, "to": "mm"},

1232
   "name": "GRBM_STATUS2",

1233
   "type_ref": "GRBM_STATUS2"

1234
  },

1235
  {

1236
   "chips": ["gfx7"],

1237
   "map": {"at": 32784, "to": "mm"},

1238
   "name": "GRBM_STATUS",

1239
   "type_ref": "GRBM_STATUS"

1240
  },

1241
  {

1242
   "chips": ["gfx7"],

1243
   "map": {"at": 32788, "to": "mm"},

1244
   "name": "GRBM_STATUS_SE0",

1245
   "type_ref": "GRBM_STATUS_SE0"

1246
  },

1247
  {

1248
   "chips": ["gfx7"],

1249
   "map": {"at": 32792, "to": "mm"},

1250
   "name": "GRBM_STATUS_SE1",

1251
   "type_ref": "GRBM_STATUS_SE0"

1252
  },

1253
  {

1254
   "chips": ["gfx7"],

1255
   "map": {"at": 32824, "to": "mm"},

1256
   "name": "GRBM_STATUS_SE2",

1257
   "type_ref": "GRBM_STATUS_SE0"

1258
  },

1259
  {

1260
   "chips": ["gfx7"],

1261
   "map": {"at": 32828, "to": "mm"},

1262
   "name": "GRBM_STATUS_SE3",

1263
   "type_ref": "GRBM_STATUS_SE0"

1264
  },

1265
  {

1266
   "chips": ["gfx7"],

1267
   "map": {"at": 33296, "to": "mm"},

1268
   "name": "CP_CPC_STATUS",

1269
   "type_ref": "CP_CPC_STATUS"

1270
  },

1271
  {

1272
   "chips": ["gfx7"],

1273
   "map": {"at": 33300, "to": "mm"},

1274
   "name": "CP_CPC_BUSY_STAT",

1275
   "type_ref": "CP_CPC_BUSY_STAT"

1276
  },

1277
  {

1278
   "chips": ["gfx7"],

1279
   "map": {"at": 33304, "to": "mm"},

1280
   "name": "CP_CPC_STALLED_STAT1",

1281
   "type_ref": "CP_CPC_STALLED_STAT1"

1282
  },

1283
  {

1284
   "chips": ["gfx7"],

1285
   "map": {"at": 33308, "to": "mm"},

1286
   "name": "CP_CPF_STATUS",

1287
   "type_ref": "CP_CPF_STATUS"

1288
  },

1289
  {

1290
   "chips": ["gfx7"],

1291
   "map": {"at": 33312, "to": "mm"},

1292
   "name": "CP_CPF_BUSY_STAT",

1293
   "type_ref": "CP_CPF_BUSY_STAT"

1294
  },

1295
  {

1296
   "chips": ["gfx7"],

1297
   "map": {"at": 33316, "to": "mm"},

1298
   "name": "CP_CPF_STALLED_STAT1",

1299
   "type_ref": "CP_CPF_STALLED_STAT1"

1300
  },

1301
  {

1302
   "chips": ["gfx7"],

1303
   "map": {"at": 33320, "to": "mm"},

1304
   "name": "CP_CPC_MC_CNTL",

1305
   "type_ref": "CP_CPC_MC_CNTL"

1306
  },

1307
  {

1308
   "chips": ["gfx7"],

1309
   "map": {"at": 33324, "to": "mm"},

1310
   "name": "CP_CPC_GRBM_FREE_COUNT",

1311
   "type_ref": "CP_CPC_GRBM_FREE_COUNT"

1312
  },

1313
  {

1314
   "chips": ["gfx7"],

1315
   "map": {"at": 33344, "to": "mm"},

1316
   "name": "CP_CPC_SCRATCH_INDEX",

1317
   "type_ref": "CP_CPC_SCRATCH_INDEX"

1318
  },

1319
  {

1320
   "chips": ["gfx7"],

1321
   "map": {"at": 33348, "to": "mm"},

1322
   "name": "CP_CPC_SCRATCH_DATA"

1323
  },

1324
  {

1325
   "chips": ["gfx7"],

1326
   "map": {"at": 33436, "to": "mm"},

1327
   "name": "CP_CPC_HALT_HYST_COUNT",

1328
   "type_ref": "CP_CPC_HALT_HYST_COUNT"

1329
  },

1330
  {

1331
   "chips": ["gfx7"],

1332
   "map": {"at": 36352, "to": "mm"},

1333
   "name": "SQ_THREAD_TRACE_BASE"

1334
  },

1335
  {

1336
   "chips": ["gfx7"],

1337
   "map": {"at": 36356, "to": "mm"},

1338
   "name": "SQ_THREAD_TRACE_SIZE",

1339
   "type_ref": "SQ_THREAD_TRACE_SIZE"

1340
  },

1341
  {

1342
   "chips": ["gfx7"],

1343
   "map": {"at": 36360, "to": "mm"},

1344
   "name": "SQ_THREAD_TRACE_MASK",

1345
   "type_ref": "SQ_THREAD_TRACE_MASK"

1346
  },

1347
  {

1348
   "chips": ["gfx7"],

1349
   "map": {"at": 36364, "to": "mm"},

1350
   "name": "SQ_THREAD_TRACE_TOKEN_MASK",

1351
   "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"

1352
  },

1353
  {

1354
   "chips": ["gfx7"],

1355
   "map": {"at": 36368, "to": "mm"},

1356
   "name": "SQ_THREAD_TRACE_PERF_MASK",

1357
   "type_ref": "SQ_PERFCOUNTER_MASK"

1358
  },

1359
  {

1360
   "chips": ["gfx7"],

1361
   "map": {"at": 36372, "to": "mm"},

1362
   "name": "SQ_THREAD_TRACE_BASE2",

1363
   "type_ref": "SQ_THREAD_TRACE_BASE2"

1364
  },

1365
  {

1366
   "chips": ["gfx7"],

1367
   "map": {"at": 36376, "to": "mm"},

1368
   "name": "SQ_THREAD_TRACE_TOKEN_MASK2",

1369
   "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK2"

1370
  },

1371
  {

1372
   "chips": ["gfx7"],

1373
   "map": {"at": 36400, "to": "mm"},

1374
   "name": "SQ_THREAD_TRACE_WPTR",

1375
   "type_ref": "SQ_THREAD_TRACE_WPTR"

1376
  },

1377
  {

1378
   "chips": ["gfx7"],

1379
   "map": {"at": 36404, "to": "mm"},

1380
   "name": "SQ_THREAD_TRACE_STATUS",

1381
   "type_ref": "SQ_THREAD_TRACE_STATUS"

1382
  },

1383
  {

1384
   "chips": ["gfx7"],

1385
   "map": {"at": 36408, "to": "mm"},

1386
   "name": "SQ_THREAD_TRACE_MODE",

1387
   "type_ref": "SQ_THREAD_TRACE_MODE"

1388
  },

1389
  {

1390
   "chips": ["gfx7"],

1391
   "map": {"at": 36412, "to": "mm"},

1392
   "name": "SQ_THREAD_TRACE_CTRL",

1393
   "type_ref": "SQ_THREAD_TRACE_CTRL"

1394
  },

1395
  {

1396
   "chips": ["gfx7"],

1397
   "map": {"at": 36416, "to": "mm"},

1398
   "name": "SQ_THREAD_TRACE_CNTR"

1399
  },

1400
  {

1401
   "chips": ["gfx7"],

1402
   "map": {"at": 36424, "to": "mm"},

1403
   "name": "SQ_THREAD_TRACE_HIWATER",

1404
   "type_ref": "SQ_THREAD_TRACE_HIWATER"

1405
  },

1406
  {

1407
   "chips": ["gfx7"],

1408
   "map": {"at": 36608, "to": "mm"},

1409
   "name": "SQ_BUF_RSRC_WORD0"

1410
  },

1411
  {

1412
   "chips": ["gfx7"],

1413
   "map": {"at": 36612, "to": "mm"},

1414
   "name": "SQ_BUF_RSRC_WORD1",

1415
   "type_ref": "SQ_BUF_RSRC_WORD1"

1416
  },

1417
  {

1418
   "chips": ["gfx7"],

1419
   "map": {"at": 36616, "to": "mm"},

1420
   "name": "SQ_BUF_RSRC_WORD2"

1421
  },

1422
  {

1423
   "chips": ["gfx7"],

1424
   "map": {"at": 36620, "to": "mm"},

1425
   "name": "SQ_BUF_RSRC_WORD3",

1426
   "type_ref": "SQ_BUF_RSRC_WORD3"

1427
  },

1428
  {

1429
   "chips": ["gfx7"],

1430
   "map": {"at": 36624, "to": "mm"},

1431
   "name": "SQ_IMG_RSRC_WORD0"

1432
  },

1433
  {

1434
   "chips": ["gfx7"],

1435
   "map": {"at": 36628, "to": "mm"},

1436
   "name": "SQ_IMG_RSRC_WORD1",

1437
   "type_ref": "SQ_IMG_RSRC_WORD1"

1438
  },

1439
  {

1440
   "chips": ["gfx7"],

1441
   "map": {"at": 36632, "to": "mm"},

1442
   "name": "SQ_IMG_RSRC_WORD2",

1443
   "type_ref": "SQ_IMG_RSRC_WORD2"

1444
  },

1445
  {

1446
   "chips": ["gfx7"],

1447
   "map": {"at": 36636, "to": "mm"},

1448
   "name": "SQ_IMG_RSRC_WORD3",

1449
   "type_ref": "SQ_IMG_RSRC_WORD3"

1450
  },

1451
  {

1452
   "chips": ["gfx7"],

1453
   "map": {"at": 36640, "to": "mm"},

1454
   "name": "SQ_IMG_RSRC_WORD4",

1455
   "type_ref": "SQ_IMG_RSRC_WORD4"

1456
  },

1457
  {

1458
   "chips": ["gfx7"],

1459
   "map": {"at": 36644, "to": "mm"},

1460
   "name": "SQ_IMG_RSRC_WORD5",

1461
   "type_ref": "SQ_IMG_RSRC_WORD5"

1462
  },

1463
  {

1464
   "chips": ["gfx7"],

1465
   "map": {"at": 36648, "to": "mm"},

1466
   "name": "SQ_IMG_RSRC_WORD6",

1467
   "type_ref": "SQ_IMG_RSRC_WORD6"

1468
  },

1469
  {

1470
   "chips": ["gfx7"],

1471
   "map": {"at": 36652, "to": "mm"},

1472
   "name": "SQ_IMG_RSRC_WORD7"

1473
  },

1474
  {

1475
   "chips": ["gfx7"],

1476
   "map": {"at": 36656, "to": "mm"},

1477
   "name": "SQ_IMG_SAMP_WORD0",

1478
   "type_ref": "SQ_IMG_SAMP_WORD0"

1479
  },

1480
  {

1481
   "chips": ["gfx7"],

1482
   "map": {"at": 36660, "to": "mm"},

1483
   "name": "SQ_IMG_SAMP_WORD1",

1484
   "type_ref": "SQ_IMG_SAMP_WORD1"

1485
  },

1486
  {

1487
   "chips": ["gfx7"],

1488
   "map": {"at": 36664, "to": "mm"},

1489
   "name": "SQ_IMG_SAMP_WORD2",

1490
   "type_ref": "SQ_IMG_SAMP_WORD2"

1491
  },

1492
  {

1493
   "chips": ["gfx7"],

1494
   "map": {"at": 36668, "to": "mm"},

1495
   "name": "SQ_IMG_SAMP_WORD3",

1496
   "type_ref": "SQ_IMG_SAMP_WORD3"

1497
  },

1498
  {

1499
   "chips": ["gfx7"],

1500
   "map": {"at": 37120, "to": "mm"},

1501
   "name": "SPI_CONFIG_CNTL",

1502
   "type_ref": "SPI_CONFIG_CNTL"

1503
  },

1504
  {

1505
   "chips": ["gfx7"],

1506
   "map": {"at": 39160, "to": "mm"},

1507
   "name": "GB_ADDR_CONFIG",

1508
   "type_ref": "GB_ADDR_CONFIG"

1509
  },

1510
  {

1511
   "chips": ["gfx7"],

1512
   "map": {"at": 39184, "to": "mm"},

1513
   "name": "GB_TILE_MODE0",

1514
   "type_ref": "GB_TILE_MODE0"

1515
  },

1516
  {

1517
   "chips": ["gfx7"],

1518
   "map": {"at": 39188, "to": "mm"},

1519
   "name": "GB_TILE_MODE1",

1520
   "type_ref": "GB_TILE_MODE0"

1521
  },

1522
  {

1523
   "chips": ["gfx7"],

1524
   "map": {"at": 39192, "to": "mm"},

1525
   "name": "GB_TILE_MODE2",

1526
   "type_ref": "GB_TILE_MODE0"

1527
  },

1528
  {

1529
   "chips": ["gfx7"],

1530
   "map": {"at": 39196, "to": "mm"},

1531
   "name": "GB_TILE_MODE3",

1532
   "type_ref": "GB_TILE_MODE0"

1533
  },

1534
  {

1535
   "chips": ["gfx7"],

1536
   "map": {"at": 39200, "to": "mm"},

1537
   "name": "GB_TILE_MODE4",

1538
   "type_ref": "GB_TILE_MODE0"

1539
  },

1540
  {

1541
   "chips": ["gfx7"],

1542
   "map": {"at": 39204, "to": "mm"},

1543
   "name": "GB_TILE_MODE5",

1544
   "type_ref": "GB_TILE_MODE0"

1545
  },

1546
  {

1547
   "chips": ["gfx7"],

1548
   "map": {"at": 39208, "to": "mm"},

1549
   "name": "GB_TILE_MODE6",

1550
   "type_ref": "GB_TILE_MODE0"

1551
  },

1552
  {

1553
   "chips": ["gfx7"],

1554
   "map": {"at": 39212, "to": "mm"},

1555
   "name": "GB_TILE_MODE7",

1556
   "type_ref": "GB_TILE_MODE0"

1557
  },

1558
  {

1559
   "chips": ["gfx7"],

1560
   "map": {"at": 39216, "to": "mm"},

1561
   "name": "GB_TILE_MODE8",

1562
   "type_ref": "GB_TILE_MODE0"

1563
  },

1564
  {

1565
   "chips": ["gfx7"],

1566
   "map": {"at": 39220, "to": "mm"},

1567
   "name": "GB_TILE_MODE9",

1568
   "type_ref": "GB_TILE_MODE0"

1569
  },

1570
  {

1571
   "chips": ["gfx7"],

1572
   "map": {"at": 39224, "to": "mm"},

1573
   "name": "GB_TILE_MODE10",

1574
   "type_ref": "GB_TILE_MODE0"

1575
  },

1576
  {

1577
   "chips": ["gfx7"],

1578
   "map": {"at": 39228, "to": "mm"},

1579
   "name": "GB_TILE_MODE11",

1580
   "type_ref": "GB_TILE_MODE0"

1581
  },

1582
  {

1583
   "chips": ["gfx7"],

1584
   "map": {"at": 39232, "to": "mm"},

1585
   "name": "GB_TILE_MODE12",

1586
   "type_ref": "GB_TILE_MODE0"

1587
  },

1588
  {

1589
   "chips": ["gfx7"],

1590
   "map": {"at": 39236, "to": "mm"},

1591
   "name": "GB_TILE_MODE13",

1592
   "type_ref": "GB_TILE_MODE0"

1593
  },

1594
  {

1595
   "chips": ["gfx7"],

1596
   "map": {"at": 39240, "to": "mm"},

1597
   "name": "GB_TILE_MODE14",

1598
   "type_ref": "GB_TILE_MODE0"

1599
  },

1600
  {

1601
   "chips": ["gfx7"],

1602
   "map": {"at": 39244, "to": "mm"},

1603
   "name": "GB_TILE_MODE15",

1604
   "type_ref": "GB_TILE_MODE0"

1605
  },

1606
  {

1607
   "chips": ["gfx7"],

1608
   "map": {"at": 39248, "to": "mm"},

1609
   "name": "GB_TILE_MODE16",

1610
   "type_ref": "GB_TILE_MODE0"

1611
  },

1612
  {

1613
   "chips": ["gfx7"],

1614
   "map": {"at": 39252, "to": "mm"},

1615
   "name": "GB_TILE_MODE17",

1616
   "type_ref": "GB_TILE_MODE0"

1617
  },

1618
  {

1619
   "chips": ["gfx7"],

1620
   "map": {"at": 39256, "to": "mm"},

1621
   "name": "GB_TILE_MODE18",

1622
   "type_ref": "GB_TILE_MODE0"

1623
  },

1624
  {

1625
   "chips": ["gfx7"],

1626
   "map": {"at": 39260, "to": "mm"},

1627
   "name": "GB_TILE_MODE19",

1628
   "type_ref": "GB_TILE_MODE0"

1629
  },

1630
  {

1631
   "chips": ["gfx7"],

1632
   "map": {"at": 39264, "to": "mm"},

1633
   "name": "GB_TILE_MODE20",

1634
   "type_ref": "GB_TILE_MODE0"

1635
  },

1636
  {

1637
   "chips": ["gfx7"],

1638
   "map": {"at": 39268, "to": "mm"},

1639
   "name": "GB_TILE_MODE21",

1640
   "type_ref": "GB_TILE_MODE0"

1641
  },

1642
  {

1643
   "chips": ["gfx7"],

1644
   "map": {"at": 39272, "to": "mm"},

1645
   "name": "GB_TILE_MODE22",

1646
   "type_ref": "GB_TILE_MODE0"

1647
  },

1648
  {

1649
   "chips": ["gfx7"],

1650
   "map": {"at": 39276, "to": "mm"},

1651
   "name": "GB_TILE_MODE23",

1652
   "type_ref": "GB_TILE_MODE0"

1653
  },

1654
  {

1655
   "chips": ["gfx7"],

1656
   "map": {"at": 39280, "to": "mm"},

1657
   "name": "GB_TILE_MODE24",

1658
   "type_ref": "GB_TILE_MODE0"

1659
  },

1660
  {

1661
   "chips": ["gfx7"],

1662
   "map": {"at": 39284, "to": "mm"},

1663
   "name": "GB_TILE_MODE25",

1664
   "type_ref": "GB_TILE_MODE0"

1665
  },

1666
  {

1667
   "chips": ["gfx7"],

1668
   "map": {"at": 39288, "to": "mm"},

1669
   "name": "GB_TILE_MODE26",

1670
   "type_ref": "GB_TILE_MODE0"

1671
  },

1672
  {

1673
   "chips": ["gfx7"],

1674
   "map": {"at": 39292, "to": "mm"},

1675
   "name": "GB_TILE_MODE27",

1676
   "type_ref": "GB_TILE_MODE0"

1677
  },

1678
  {

1679
   "chips": ["gfx7"],

1680
   "map": {"at": 39296, "to": "mm"},

1681
   "name": "GB_TILE_MODE28",

1682
   "type_ref": "GB_TILE_MODE0"

1683
  },

1684
  {

1685
   "chips": ["gfx7"],

1686
   "map": {"at": 39300, "to": "mm"},

1687
   "name": "GB_TILE_MODE29",

1688
   "type_ref": "GB_TILE_MODE0"

1689
  },

1690
  {

1691
   "chips": ["gfx7"],

1692
   "map": {"at": 39304, "to": "mm"},

1693
   "name": "GB_TILE_MODE30",

1694
   "type_ref": "GB_TILE_MODE0"

1695
  },

1696
  {

1697
   "chips": ["gfx7"],

1698
   "map": {"at": 39308, "to": "mm"},

1699
   "name": "GB_TILE_MODE31",

1700
   "type_ref": "GB_TILE_MODE0"

1701
  },

1702
  {

1703
   "chips": ["gfx7"],

1704
   "map": {"at": 39312, "to": "mm"},

1705
   "name": "GB_MACROTILE_MODE0",

1706
   "type_ref": "GB_MACROTILE_MODE0"

1707
  },

1708
  {

1709
   "chips": ["gfx7"],

1710
   "map": {"at": 39316, "to": "mm"},

1711
   "name": "GB_MACROTILE_MODE1",

1712
   "type_ref": "GB_MACROTILE_MODE0"

1713
  },

1714
  {

1715
   "chips": ["gfx7"],

1716
   "map": {"at": 39320, "to": "mm"},

1717
   "name": "GB_MACROTILE_MODE2",

1718
   "type_ref": "GB_MACROTILE_MODE0"

1719
  },

1720
  {

1721
   "chips": ["gfx7"],

1722
   "map": {"at": 39324, "to": "mm"},

1723
   "name": "GB_MACROTILE_MODE3",

1724
   "type_ref": "GB_MACROTILE_MODE0"

1725
  },

1726
  {

1727
   "chips": ["gfx7"],

1728
   "map": {"at": 39328, "to": "mm"},

1729
   "name": "GB_MACROTILE_MODE4",

1730
   "type_ref": "GB_MACROTILE_MODE0"

1731
  },

1732
  {

1733
   "chips": ["gfx7"],

1734
   "map": {"at": 39332, "to": "mm"},

1735
   "name": "GB_MACROTILE_MODE5",

1736
   "type_ref": "GB_MACROTILE_MODE0"

1737
  },

1738
  {

1739
   "chips": ["gfx7"],

1740
   "map": {"at": 39336, "to": "mm"},

1741
   "name": "GB_MACROTILE_MODE6",

1742
   "type_ref": "GB_MACROTILE_MODE0"

1743
  },

1744
  {

1745
   "chips": ["gfx7"],

1746
   "map": {"at": 39340, "to": "mm"},

1747
   "name": "GB_MACROTILE_MODE7",

1748
   "type_ref": "GB_MACROTILE_MODE0"

1749
  },

1750
  {

1751
   "chips": ["gfx7"],

1752
   "map": {"at": 39344, "to": "mm"},

1753
   "name": "GB_MACROTILE_MODE8",

1754
   "type_ref": "GB_MACROTILE_MODE0"

1755
  },

1756
  {

1757
   "chips": ["gfx7"],

1758
   "map": {"at": 39348, "to": "mm"},

1759
   "name": "GB_MACROTILE_MODE9",

1760
   "type_ref": "GB_MACROTILE_MODE0"

1761
  },

1762
  {

1763
   "chips": ["gfx7"],

1764
   "map": {"at": 39352, "to": "mm"},

1765
   "name": "GB_MACROTILE_MODE10",

1766
   "type_ref": "GB_MACROTILE_MODE0"

1767
  },

1768
  {

1769
   "chips": ["gfx7"],

1770
   "map": {"at": 39356, "to": "mm"},

1771
   "name": "GB_MACROTILE_MODE11",

1772
   "type_ref": "GB_MACROTILE_MODE0"

1773
  },

1774
  {

1775
   "chips": ["gfx7"],

1776
   "map": {"at": 39360, "to": "mm"},

1777
   "name": "GB_MACROTILE_MODE12",

1778
   "type_ref": "GB_MACROTILE_MODE0"

1779
  },

1780
  {

1781
   "chips": ["gfx7"],

1782
   "map": {"at": 39364, "to": "mm"},

1783
   "name": "GB_MACROTILE_MODE13",

1784
   "type_ref": "GB_MACROTILE_MODE0"

1785
  },

1786
  {

1787
   "chips": ["gfx7"],

1788
   "map": {"at": 39368, "to": "mm"},

1789
   "name": "GB_MACROTILE_MODE14",

1790
   "type_ref": "GB_MACROTILE_MODE0"

1791
  },

1792
  {

1793
   "chips": ["gfx7"],

1794
   "map": {"at": 39372, "to": "mm"},

1795
   "name": "GB_MACROTILE_MODE15",

1796
   "type_ref": "GB_MACROTILE_MODE0"

1797
  },

1798
  {

1799
   "chips": ["gfx7"],

1800
   "map": {"at": 45056, "to": "mm"},

1801
   "name": "SPI_SHADER_TBA_LO_PS"

1802
  },

1803
  {

1804
   "chips": ["gfx7"],

1805
   "map": {"at": 45060, "to": "mm"},

1806
   "name": "SPI_SHADER_TBA_HI_PS",

1807
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1808
  },

1809
  {

1810
   "chips": ["gfx7"],

1811
   "map": {"at": 45064, "to": "mm"},

1812
   "name": "SPI_SHADER_TMA_LO_PS"

1813
  },

1814
  {

1815
   "chips": ["gfx7"],

1816
   "map": {"at": 45068, "to": "mm"},

1817
   "name": "SPI_SHADER_TMA_HI_PS",

1818
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1819
  },

1820
  {

1821
   "chips": ["gfx7"],

1822
   "map": {"at": 45084, "to": "mm"},

1823
   "name": "SPI_SHADER_PGM_RSRC3_PS",

1824
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"

1825
  },

1826
  {

1827
   "chips": ["gfx7"],

1828
   "map": {"at": 45088, "to": "mm"},

1829
   "name": "SPI_SHADER_PGM_LO_PS"

1830
  },

1831
  {

1832
   "chips": ["gfx7"],

1833
   "map": {"at": 45092, "to": "mm"},

1834
   "name": "SPI_SHADER_PGM_HI_PS",

1835
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1836
  },

1837
  {

1838
   "chips": ["gfx7"],

1839
   "map": {"at": 45096, "to": "mm"},

1840
   "name": "SPI_SHADER_PGM_RSRC1_PS",

1841
   "type_ref": "SPI_SHADER_PGM_RSRC1_PS"

1842
  },

1843
  {

1844
   "chips": ["gfx7"],

1845
   "map": {"at": 45100, "to": "mm"},

1846
   "name": "SPI_SHADER_PGM_RSRC2_PS",

1847
   "type_ref": "SPI_SHADER_PGM_RSRC2_PS"

1848
  },

1849
  {

1850
   "chips": ["gfx7"],

1851
   "map": {"at": 45104, "to": "mm"},

1852
   "name": "SPI_SHADER_USER_DATA_PS_0"

1853
  },

1854
  {

1855
   "chips": ["gfx7"],

1856
   "map": {"at": 45108, "to": "mm"},

1857
   "name": "SPI_SHADER_USER_DATA_PS_1"

1858
  },

1859
  {

1860
   "chips": ["gfx7"],

1861
   "map": {"at": 45112, "to": "mm"},

1862
   "name": "SPI_SHADER_USER_DATA_PS_2"

1863
  },

1864
  {

1865
   "chips": ["gfx7"],

1866
   "map": {"at": 45116, "to": "mm"},

1867
   "name": "SPI_SHADER_USER_DATA_PS_3"

1868
  },

1869
  {

1870
   "chips": ["gfx7"],

1871
   "map": {"at": 45120, "to": "mm"},

1872
   "name": "SPI_SHADER_USER_DATA_PS_4"

1873
  },

1874
  {

1875
   "chips": ["gfx7"],

1876
   "map": {"at": 45124, "to": "mm"},

1877
   "name": "SPI_SHADER_USER_DATA_PS_5"

1878
  },

1879
  {

1880
   "chips": ["gfx7"],

1881
   "map": {"at": 45128, "to": "mm"},

1882
   "name": "SPI_SHADER_USER_DATA_PS_6"

1883
  },

1884
  {

1885
   "chips": ["gfx7"],

1886
   "map": {"at": 45132, "to": "mm"},

1887
   "name": "SPI_SHADER_USER_DATA_PS_7"

1888
  },

1889
  {

1890
   "chips": ["gfx7"],

1891
   "map": {"at": 45136, "to": "mm"},

1892
   "name": "SPI_SHADER_USER_DATA_PS_8"

1893
  },

1894
  {

1895
   "chips": ["gfx7"],

1896
   "map": {"at": 45140, "to": "mm"},

1897
   "name": "SPI_SHADER_USER_DATA_PS_9"

1898
  },

1899
  {

1900
   "chips": ["gfx7"],

1901
   "map": {"at": 45144, "to": "mm"},

1902
   "name": "SPI_SHADER_USER_DATA_PS_10"

1903
  },

1904
  {

1905
   "chips": ["gfx7"],

1906
   "map": {"at": 45148, "to": "mm"},

1907
   "name": "SPI_SHADER_USER_DATA_PS_11"

1908
  },

1909
  {

1910
   "chips": ["gfx7"],

1911
   "map": {"at": 45152, "to": "mm"},

1912
   "name": "SPI_SHADER_USER_DATA_PS_12"

1913
  },

1914
  {

1915
   "chips": ["gfx7"],

1916
   "map": {"at": 45156, "to": "mm"},

1917
   "name": "SPI_SHADER_USER_DATA_PS_13"

1918
  },

1919
  {

1920
   "chips": ["gfx7"],

1921
   "map": {"at": 45160, "to": "mm"},

1922
   "name": "SPI_SHADER_USER_DATA_PS_14"

1923
  },

1924
  {

1925
   "chips": ["gfx7"],

1926
   "map": {"at": 45164, "to": "mm"},

1927
   "name": "SPI_SHADER_USER_DATA_PS_15"

1928
  },

1929
  {

1930
   "chips": ["gfx7"],

1931
   "map": {"at": 45312, "to": "mm"},

1932
   "name": "SPI_SHADER_TBA_LO_VS"

1933
  },

1934
  {

1935
   "chips": ["gfx7"],

1936
   "map": {"at": 45316, "to": "mm"},

1937
   "name": "SPI_SHADER_TBA_HI_VS",

1938
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1939
  },

1940
  {

1941
   "chips": ["gfx7"],

1942
   "map": {"at": 45320, "to": "mm"},

1943
   "name": "SPI_SHADER_TMA_LO_VS"

1944
  },

1945
  {

1946
   "chips": ["gfx7"],

1947
   "map": {"at": 45324, "to": "mm"},

1948
   "name": "SPI_SHADER_TMA_HI_VS",

1949
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1950
  },

1951
  {

1952
   "chips": ["gfx7"],

1953
   "map": {"at": 45336, "to": "mm"},

1954
   "name": "SPI_SHADER_PGM_RSRC3_VS",

1955
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"

1956
  },

1957
  {

1958
   "chips": ["gfx7"],

1959
   "map": {"at": 45340, "to": "mm"},

1960
   "name": "SPI_SHADER_LATE_ALLOC_VS",

1961
   "type_ref": "SPI_SHADER_LATE_ALLOC_VS"

1962
  },

1963
  {

1964
   "chips": ["gfx7"],

1965
   "map": {"at": 45344, "to": "mm"},

1966
   "name": "SPI_SHADER_PGM_LO_VS"

1967
  },

1968
  {

1969
   "chips": ["gfx7"],

1970
   "map": {"at": 45348, "to": "mm"},

1971
   "name": "SPI_SHADER_PGM_HI_VS",

1972
   "type_ref": "SPI_SHADER_TBA_HI_PS"

1973
  },

1974
  {

1975
   "chips": ["gfx7"],

1976
   "map": {"at": 45352, "to": "mm"},

1977
   "name": "SPI_SHADER_PGM_RSRC1_VS",

1978
   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"

1979
  },

1980
  {

1981
   "chips": ["gfx7"],

1982
   "map": {"at": 45356, "to": "mm"},

1983
   "name": "SPI_SHADER_PGM_RSRC2_VS",

1984
   "type_ref": "SPI_SHADER_PGM_RSRC2_VS"

1985
  },

1986
  {

1987
   "chips": ["gfx7"],

1988
   "map": {"at": 45360, "to": "mm"},

1989
   "name": "SPI_SHADER_USER_DATA_VS_0"

1990
  },

1991
  {

1992
   "chips": ["gfx7"],

1993
   "map": {"at": 45364, "to": "mm"},

1994
   "name": "SPI_SHADER_USER_DATA_VS_1"

1995
  },

1996
  {

1997
   "chips": ["gfx7"],

1998
   "map": {"at": 45368, "to": "mm"},

1999
   "name": "SPI_SHADER_USER_DATA_VS_2"

2000
  },

2001
  {

2002
   "chips": ["gfx7"],

2003
   "map": {"at": 45372, "to": "mm"},

2004
   "name": "SPI_SHADER_USER_DATA_VS_3"

2005
  },

2006
  {

2007
   "chips": ["gfx7"],

2008
   "map": {"at": 45376, "to": "mm"},

2009
   "name": "SPI_SHADER_USER_DATA_VS_4"

2010
  },

2011
  {

2012
   "chips": ["gfx7"],

2013
   "map": {"at": 45380, "to": "mm"},

2014
   "name": "SPI_SHADER_USER_DATA_VS_5"

2015
  },

2016
  {

2017
   "chips": ["gfx7"],

2018
   "map": {"at": 45384, "to": "mm"},

2019
   "name": "SPI_SHADER_USER_DATA_VS_6"

2020
  },

2021
  {

2022
   "chips": ["gfx7"],

2023
   "map": {"at": 45388, "to": "mm"},

2024
   "name": "SPI_SHADER_USER_DATA_VS_7"

2025
  },

2026
  {

2027
   "chips": ["gfx7"],

2028
   "map": {"at": 45392, "to": "mm"},

2029
   "name": "SPI_SHADER_USER_DATA_VS_8"

2030
  },

2031
  {

2032
   "chips": ["gfx7"],

2033
   "map": {"at": 45396, "to": "mm"},

2034
   "name": "SPI_SHADER_USER_DATA_VS_9"

2035
  },

2036
  {

2037
   "chips": ["gfx7"],

2038
   "map": {"at": 45400, "to": "mm"},

2039
   "name": "SPI_SHADER_USER_DATA_VS_10"

2040
  },

2041
  {

2042
   "chips": ["gfx7"],

2043
   "map": {"at": 45404, "to": "mm"},

2044
   "name": "SPI_SHADER_USER_DATA_VS_11"

2045
  },

2046
  {

2047
   "chips": ["gfx7"],

2048
   "map": {"at": 45408, "to": "mm"},

2049
   "name": "SPI_SHADER_USER_DATA_VS_12"

2050
  },

2051
  {

2052
   "chips": ["gfx7"],

2053
   "map": {"at": 45412, "to": "mm"},

2054
   "name": "SPI_SHADER_USER_DATA_VS_13"

2055
  },

2056
  {

2057
   "chips": ["gfx7"],

2058
   "map": {"at": 45416, "to": "mm"},

2059
   "name": "SPI_SHADER_USER_DATA_VS_14"

2060
  },

2061
  {

2062
   "chips": ["gfx7"],

2063
   "map": {"at": 45420, "to": "mm"},

2064
   "name": "SPI_SHADER_USER_DATA_VS_15"

2065
  },

2066
  {

2067
   "chips": ["gfx7"],

2068
   "map": {"at": 45552, "to": "mm"},

2069
   "name": "SPI_SHADER_PGM_RSRC2_ES_VS",

2070
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"

2071
  },

2072
  {

2073
   "chips": ["gfx7"],

2074
   "map": {"at": 45556, "to": "mm"},

2075
   "name": "SPI_SHADER_PGM_RSRC2_LS_VS",

2076
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"

2077
  },

2078
  {

2079
   "chips": ["gfx7"],

2080
   "map": {"at": 45568, "to": "mm"},

2081
   "name": "SPI_SHADER_TBA_LO_GS"

2082
  },

2083
  {

2084
   "chips": ["gfx7"],

2085
   "map": {"at": 45572, "to": "mm"},

2086
   "name": "SPI_SHADER_TBA_HI_GS",

2087
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2088
  },

2089
  {

2090
   "chips": ["gfx7"],

2091
   "map": {"at": 45576, "to": "mm"},

2092
   "name": "SPI_SHADER_TMA_LO_GS"

2093
  },

2094
  {

2095
   "chips": ["gfx7"],

2096
   "map": {"at": 45580, "to": "mm"},

2097
   "name": "SPI_SHADER_TMA_HI_GS",

2098
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2099
  },

2100
  {

2101
   "chips": ["gfx7"],

2102
   "map": {"at": 45596, "to": "mm"},

2103
   "name": "SPI_SHADER_PGM_RSRC3_GS",

2104
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"

2105
  },

2106
  {

2107
   "chips": ["gfx7"],

2108
   "map": {"at": 45600, "to": "mm"},

2109
   "name": "SPI_SHADER_PGM_LO_GS"

2110
  },

2111
  {

2112
   "chips": ["gfx7"],

2113
   "map": {"at": 45604, "to": "mm"},

2114
   "name": "SPI_SHADER_PGM_HI_GS",

2115
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2116
  },

2117
  {

2118
   "chips": ["gfx7"],

2119
   "map": {"at": 45608, "to": "mm"},

2120
   "name": "SPI_SHADER_PGM_RSRC1_GS",

2121
   "type_ref": "SPI_SHADER_PGM_RSRC1_GS"

2122
  },

2123
  {

2124
   "chips": ["gfx7"],

2125
   "map": {"at": 45612, "to": "mm"},

2126
   "name": "SPI_SHADER_PGM_RSRC2_GS",

2127
   "type_ref": "SPI_SHADER_PGM_RSRC2_GS"

2128
  },

2129
  {

2130
   "chips": ["gfx7"],

2131
   "map": {"at": 45616, "to": "mm"},

2132
   "name": "SPI_SHADER_USER_DATA_GS_0"

2133
  },

2134
  {

2135
   "chips": ["gfx7"],

2136
   "map": {"at": 45620, "to": "mm"},

2137
   "name": "SPI_SHADER_USER_DATA_GS_1"

2138
  },

2139
  {

2140
   "chips": ["gfx7"],

2141
   "map": {"at": 45624, "to": "mm"},

2142
   "name": "SPI_SHADER_USER_DATA_GS_2"

2143
  },

2144
  {

2145
   "chips": ["gfx7"],

2146
   "map": {"at": 45628, "to": "mm"},

2147
   "name": "SPI_SHADER_USER_DATA_GS_3"

2148
  },

2149
  {

2150
   "chips": ["gfx7"],

2151
   "map": {"at": 45632, "to": "mm"},

2152
   "name": "SPI_SHADER_USER_DATA_GS_4"

2153
  },

2154
  {

2155
   "chips": ["gfx7"],

2156
   "map": {"at": 45636, "to": "mm"},

2157
   "name": "SPI_SHADER_USER_DATA_GS_5"

2158
  },

2159
  {

2160
   "chips": ["gfx7"],

2161
   "map": {"at": 45640, "to": "mm"},

2162
   "name": "SPI_SHADER_USER_DATA_GS_6"

2163
  },

2164
  {

2165
   "chips": ["gfx7"],

2166
   "map": {"at": 45644, "to": "mm"},

2167
   "name": "SPI_SHADER_USER_DATA_GS_7"

2168
  },

2169
  {

2170
   "chips": ["gfx7"],

2171
   "map": {"at": 45648, "to": "mm"},

2172
   "name": "SPI_SHADER_USER_DATA_GS_8"

2173
  },

2174
  {

2175
   "chips": ["gfx7"],

2176
   "map": {"at": 45652, "to": "mm"},

2177
   "name": "SPI_SHADER_USER_DATA_GS_9"

2178
  },

2179
  {

2180
   "chips": ["gfx7"],

2181
   "map": {"at": 45656, "to": "mm"},

2182
   "name": "SPI_SHADER_USER_DATA_GS_10"

2183
  },

2184
  {

2185
   "chips": ["gfx7"],

2186
   "map": {"at": 45660, "to": "mm"},

2187
   "name": "SPI_SHADER_USER_DATA_GS_11"

2188
  },

2189
  {

2190
   "chips": ["gfx7"],

2191
   "map": {"at": 45664, "to": "mm"},

2192
   "name": "SPI_SHADER_USER_DATA_GS_12"

2193
  },

2194
  {

2195
   "chips": ["gfx7"],

2196
   "map": {"at": 45668, "to": "mm"},

2197
   "name": "SPI_SHADER_USER_DATA_GS_13"

2198
  },

2199
  {

2200
   "chips": ["gfx7"],

2201
   "map": {"at": 45672, "to": "mm"},

2202
   "name": "SPI_SHADER_USER_DATA_GS_14"

2203
  },

2204
  {

2205
   "chips": ["gfx7"],

2206
   "map": {"at": 45676, "to": "mm"},

2207
   "name": "SPI_SHADER_USER_DATA_GS_15"

2208
  },

2209
  {

2210
   "chips": ["gfx7"],

2211
   "map": {"at": 45808, "to": "mm"},

2212
   "name": "SPI_SHADER_PGM_RSRC2_ES_GS",

2213
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"

2214
  },

2215
  {

2216
   "chips": ["gfx7"],

2217
   "map": {"at": 45824, "to": "mm"},

2218
   "name": "SPI_SHADER_TBA_LO_ES"

2219
  },

2220
  {

2221
   "chips": ["gfx7"],

2222
   "map": {"at": 45828, "to": "mm"},

2223
   "name": "SPI_SHADER_TBA_HI_ES",

2224
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2225
  },

2226
  {

2227
   "chips": ["gfx7"],

2228
   "map": {"at": 45832, "to": "mm"},

2229
   "name": "SPI_SHADER_TMA_LO_ES"

2230
  },

2231
  {

2232
   "chips": ["gfx7"],

2233
   "map": {"at": 45836, "to": "mm"},

2234
   "name": "SPI_SHADER_TMA_HI_ES",

2235
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2236
  },

2237
  {

2238
   "chips": ["gfx7"],

2239
   "map": {"at": 45852, "to": "mm"},

2240
   "name": "SPI_SHADER_PGM_RSRC3_ES",

2241
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"

2242
  },

2243
  {

2244
   "chips": ["gfx7"],

2245
   "map": {"at": 45856, "to": "mm"},

2246
   "name": "SPI_SHADER_PGM_LO_ES"

2247
  },

2248
  {

2249
   "chips": ["gfx7"],

2250
   "map": {"at": 45860, "to": "mm"},

2251
   "name": "SPI_SHADER_PGM_HI_ES",

2252
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2253
  },

2254
  {

2255
   "chips": ["gfx7"],

2256
   "map": {"at": 45864, "to": "mm"},

2257
   "name": "SPI_SHADER_PGM_RSRC1_ES",

2258
   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"

2259
  },

2260
  {

2261
   "chips": ["gfx7"],

2262
   "map": {"at": 45868, "to": "mm"},

2263
   "name": "SPI_SHADER_PGM_RSRC2_ES",

2264
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"

2265
  },

2266
  {

2267
   "chips": ["gfx7"],

2268
   "map": {"at": 45872, "to": "mm"},

2269
   "name": "SPI_SHADER_USER_DATA_ES_0"

2270
  },

2271
  {

2272
   "chips": ["gfx7"],

2273
   "map": {"at": 45876, "to": "mm"},

2274
   "name": "SPI_SHADER_USER_DATA_ES_1"

2275
  },

2276
  {

2277
   "chips": ["gfx7"],

2278
   "map": {"at": 45880, "to": "mm"},

2279
   "name": "SPI_SHADER_USER_DATA_ES_2"

2280
  },

2281
  {

2282
   "chips": ["gfx7"],

2283
   "map": {"at": 45884, "to": "mm"},

2284
   "name": "SPI_SHADER_USER_DATA_ES_3"

2285
  },

2286
  {

2287
   "chips": ["gfx7"],

2288
   "map": {"at": 45888, "to": "mm"},

2289
   "name": "SPI_SHADER_USER_DATA_ES_4"

2290
  },

2291
  {

2292
   "chips": ["gfx7"],

2293
   "map": {"at": 45892, "to": "mm"},

2294
   "name": "SPI_SHADER_USER_DATA_ES_5"

2295
  },

2296
  {

2297
   "chips": ["gfx7"],

2298
   "map": {"at": 45896, "to": "mm"},

2299
   "name": "SPI_SHADER_USER_DATA_ES_6"

2300
  },

2301
  {

2302
   "chips": ["gfx7"],

2303
   "map": {"at": 45900, "to": "mm"},

2304
   "name": "SPI_SHADER_USER_DATA_ES_7"

2305
  },

2306
  {

2307
   "chips": ["gfx7"],

2308
   "map": {"at": 45904, "to": "mm"},

2309
   "name": "SPI_SHADER_USER_DATA_ES_8"

2310
  },

2311
  {

2312
   "chips": ["gfx7"],

2313
   "map": {"at": 45908, "to": "mm"},

2314
   "name": "SPI_SHADER_USER_DATA_ES_9"

2315
  },

2316
  {

2317
   "chips": ["gfx7"],

2318
   "map": {"at": 45912, "to": "mm"},

2319
   "name": "SPI_SHADER_USER_DATA_ES_10"

2320
  },

2321
  {

2322
   "chips": ["gfx7"],

2323
   "map": {"at": 45916, "to": "mm"},

2324
   "name": "SPI_SHADER_USER_DATA_ES_11"

2325
  },

2326
  {

2327
   "chips": ["gfx7"],

2328
   "map": {"at": 45920, "to": "mm"},

2329
   "name": "SPI_SHADER_USER_DATA_ES_12"

2330
  },

2331
  {

2332
   "chips": ["gfx7"],

2333
   "map": {"at": 45924, "to": "mm"},

2334
   "name": "SPI_SHADER_USER_DATA_ES_13"

2335
  },

2336
  {

2337
   "chips": ["gfx7"],

2338
   "map": {"at": 45928, "to": "mm"},

2339
   "name": "SPI_SHADER_USER_DATA_ES_14"

2340
  },

2341
  {

2342
   "chips": ["gfx7"],

2343
   "map": {"at": 45932, "to": "mm"},

2344
   "name": "SPI_SHADER_USER_DATA_ES_15"

2345
  },

2346
  {

2347
   "chips": ["gfx7"],

2348
   "map": {"at": 46068, "to": "mm"},

2349
   "name": "SPI_SHADER_PGM_RSRC2_LS_ES",

2350
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"

2351
  },

2352
  {

2353
   "chips": ["gfx7"],

2354
   "map": {"at": 46080, "to": "mm"},

2355
   "name": "SPI_SHADER_TBA_LO_HS"

2356
  },

2357
  {

2358
   "chips": ["gfx7"],

2359
   "map": {"at": 46084, "to": "mm"},

2360
   "name": "SPI_SHADER_TBA_HI_HS",

2361
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2362
  },

2363
  {

2364
   "chips": ["gfx7"],

2365
   "map": {"at": 46088, "to": "mm"},

2366
   "name": "SPI_SHADER_TMA_LO_HS"

2367
  },

2368
  {

2369
   "chips": ["gfx7"],

2370
   "map": {"at": 46092, "to": "mm"},

2371
   "name": "SPI_SHADER_TMA_HI_HS",

2372
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2373
  },

2374
  {

2375
   "chips": ["gfx7"],

2376
   "map": {"at": 46108, "to": "mm"},

2377
   "name": "SPI_SHADER_PGM_RSRC3_HS",

2378
   "type_ref": "SPI_SHADER_PGM_RSRC3_HS"

2379
  },

2380
  {

2381
   "chips": ["gfx7"],

2382
   "map": {"at": 46112, "to": "mm"},

2383
   "name": "SPI_SHADER_PGM_LO_HS"

2384
  },

2385
  {

2386
   "chips": ["gfx7"],

2387
   "map": {"at": 46116, "to": "mm"},

2388
   "name": "SPI_SHADER_PGM_HI_HS",

2389
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2390
  },

2391
  {

2392
   "chips": ["gfx7"],

2393
   "map": {"at": 46120, "to": "mm"},

2394
   "name": "SPI_SHADER_PGM_RSRC1_HS",

2395
   "type_ref": "SPI_SHADER_PGM_RSRC1_HS"

2396
  },

2397
  {

2398
   "chips": ["gfx7"],

2399
   "map": {"at": 46124, "to": "mm"},

2400
   "name": "SPI_SHADER_PGM_RSRC2_HS",

2401
   "type_ref": "SPI_SHADER_PGM_RSRC2_HS"

2402
  },

2403
  {

2404
   "chips": ["gfx7"],

2405
   "map": {"at": 46128, "to": "mm"},

2406
   "name": "SPI_SHADER_USER_DATA_HS_0"

2407
  },

2408
  {

2409
   "chips": ["gfx7"],

2410
   "map": {"at": 46132, "to": "mm"},

2411
   "name": "SPI_SHADER_USER_DATA_HS_1"

2412
  },

2413
  {

2414
   "chips": ["gfx7"],

2415
   "map": {"at": 46136, "to": "mm"},

2416
   "name": "SPI_SHADER_USER_DATA_HS_2"

2417
  },

2418
  {

2419
   "chips": ["gfx7"],

2420
   "map": {"at": 46140, "to": "mm"},

2421
   "name": "SPI_SHADER_USER_DATA_HS_3"

2422
  },

2423
  {

2424
   "chips": ["gfx7"],

2425
   "map": {"at": 46144, "to": "mm"},

2426
   "name": "SPI_SHADER_USER_DATA_HS_4"

2427
  },

2428
  {

2429
   "chips": ["gfx7"],

2430
   "map": {"at": 46148, "to": "mm"},

2431
   "name": "SPI_SHADER_USER_DATA_HS_5"

2432
  },

2433
  {

2434
   "chips": ["gfx7"],

2435
   "map": {"at": 46152, "to": "mm"},

2436
   "name": "SPI_SHADER_USER_DATA_HS_6"

2437
  },

2438
  {

2439
   "chips": ["gfx7"],

2440
   "map": {"at": 46156, "to": "mm"},

2441
   "name": "SPI_SHADER_USER_DATA_HS_7"

2442
  },

2443
  {

2444
   "chips": ["gfx7"],

2445
   "map": {"at": 46160, "to": "mm"},

2446
   "name": "SPI_SHADER_USER_DATA_HS_8"

2447
  },

2448
  {

2449
   "chips": ["gfx7"],

2450
   "map": {"at": 46164, "to": "mm"},

2451
   "name": "SPI_SHADER_USER_DATA_HS_9"

2452
  },

2453
  {

2454
   "chips": ["gfx7"],

2455
   "map": {"at": 46168, "to": "mm"},

2456
   "name": "SPI_SHADER_USER_DATA_HS_10"

2457
  },

2458
  {

2459
   "chips": ["gfx7"],

2460
   "map": {"at": 46172, "to": "mm"},

2461
   "name": "SPI_SHADER_USER_DATA_HS_11"

2462
  },

2463
  {

2464
   "chips": ["gfx7"],

2465
   "map": {"at": 46176, "to": "mm"},

2466
   "name": "SPI_SHADER_USER_DATA_HS_12"

2467
  },

2468
  {

2469
   "chips": ["gfx7"],

2470
   "map": {"at": 46180, "to": "mm"},

2471
   "name": "SPI_SHADER_USER_DATA_HS_13"

2472
  },

2473
  {

2474
   "chips": ["gfx7"],

2475
   "map": {"at": 46184, "to": "mm"},

2476
   "name": "SPI_SHADER_USER_DATA_HS_14"

2477
  },

2478
  {

2479
   "chips": ["gfx7"],

2480
   "map": {"at": 46188, "to": "mm"},

2481
   "name": "SPI_SHADER_USER_DATA_HS_15"

2482
  },

2483
  {

2484
   "chips": ["gfx7"],

2485
   "map": {"at": 46324, "to": "mm"},

2486
   "name": "SPI_SHADER_PGM_RSRC2_LS_HS",

2487
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"

2488
  },

2489
  {

2490
   "chips": ["gfx7"],

2491
   "map": {"at": 46336, "to": "mm"},

2492
   "name": "SPI_SHADER_TBA_LO_LS"

2493
  },

2494
  {

2495
   "chips": ["gfx7"],

2496
   "map": {"at": 46340, "to": "mm"},

2497
   "name": "SPI_SHADER_TBA_HI_LS",

2498
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2499
  },

2500
  {

2501
   "chips": ["gfx7"],

2502
   "map": {"at": 46344, "to": "mm"},

2503
   "name": "SPI_SHADER_TMA_LO_LS"

2504
  },

2505
  {

2506
   "chips": ["gfx7"],

2507
   "map": {"at": 46348, "to": "mm"},

2508
   "name": "SPI_SHADER_TMA_HI_LS",

2509
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2510
  },

2511
  {

2512
   "chips": ["gfx7"],

2513
   "map": {"at": 46364, "to": "mm"},

2514
   "name": "SPI_SHADER_PGM_RSRC3_LS",

2515
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"

2516
  },

2517
  {

2518
   "chips": ["gfx7"],

2519
   "map": {"at": 46368, "to": "mm"},

2520
   "name": "SPI_SHADER_PGM_LO_LS"

2521
  },

2522
  {

2523
   "chips": ["gfx7"],

2524
   "map": {"at": 46372, "to": "mm"},

2525
   "name": "SPI_SHADER_PGM_HI_LS",

2526
   "type_ref": "SPI_SHADER_TBA_HI_PS"

2527
  },

2528
  {

2529
   "chips": ["gfx7"],

2530
   "map": {"at": 46376, "to": "mm"},

2531
   "name": "SPI_SHADER_PGM_RSRC1_LS",

2532
   "type_ref": "SPI_SHADER_PGM_RSRC1_LS"

2533
  },

2534
  {

2535
   "chips": ["gfx7"],

2536
   "map": {"at": 46380, "to": "mm"},

2537
   "name": "SPI_SHADER_PGM_RSRC2_LS",

2538
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"

2539
  },

2540
  {

2541
   "chips": ["gfx7"],

2542
   "map": {"at": 46384, "to": "mm"},

2543
   "name": "SPI_SHADER_USER_DATA_LS_0"

2544
  },

2545
  {

2546
   "chips": ["gfx7"],

2547
   "map": {"at": 46388, "to": "mm"},

2548
   "name": "SPI_SHADER_USER_DATA_LS_1"

2549
  },

2550
  {

2551
   "chips": ["gfx7"],

2552
   "map": {"at": 46392, "to": "mm"},

2553
   "name": "SPI_SHADER_USER_DATA_LS_2"

2554
  },

2555
  {

2556
   "chips": ["gfx7"],

2557
   "map": {"at": 46396, "to": "mm"},

2558
   "name": "SPI_SHADER_USER_DATA_LS_3"

2559
  },

2560
  {

2561
   "chips": ["gfx7"],

2562
   "map": {"at": 46400, "to": "mm"},

2563
   "name": "SPI_SHADER_USER_DATA_LS_4"

2564
  },

2565
  {

2566
   "chips": ["gfx7"],

2567
   "map": {"at": 46404, "to": "mm"},

2568
   "name": "SPI_SHADER_USER_DATA_LS_5"

2569
  },

2570
  {

2571
   "chips": ["gfx7"],

2572
   "map": {"at": 46408, "to": "mm"},

2573
   "name": "SPI_SHADER_USER_DATA_LS_6"

2574
  },

2575
  {

2576
   "chips": ["gfx7"],

2577
   "map": {"at": 46412, "to": "mm"},

2578
   "name": "SPI_SHADER_USER_DATA_LS_7"

2579
  },

2580
  {

2581
   "chips": ["gfx7"],

2582
   "map": {"at": 46416, "to": "mm"},

2583
   "name": "SPI_SHADER_USER_DATA_LS_8"

2584
  },

2585
  {

2586
   "chips": ["gfx7"],

2587
   "map": {"at": 46420, "to": "mm"},

2588
   "name": "SPI_SHADER_USER_DATA_LS_9"

2589
  },

2590
  {

2591
   "chips": ["gfx7"],

2592
   "map": {"at": 46424, "to": "mm"},

2593
   "name": "SPI_SHADER_USER_DATA_LS_10"

2594
  },

2595
  {

2596
   "chips": ["gfx7"],

2597
   "map": {"at": 46428, "to": "mm"},

2598
   "name": "SPI_SHADER_USER_DATA_LS_11"

2599
  },

2600
  {

2601
   "chips": ["gfx7"],

2602
   "map": {"at": 46432, "to": "mm"},

2603
   "name": "SPI_SHADER_USER_DATA_LS_12"

2604
  },

2605
  {

2606
   "chips": ["gfx7"],

2607
   "map": {"at": 46436, "to": "mm"},

2608
   "name": "SPI_SHADER_USER_DATA_LS_13"

2609
  },

2610
  {

2611
   "chips": ["gfx7"],

2612
   "map": {"at": 46440, "to": "mm"},

2613
   "name": "SPI_SHADER_USER_DATA_LS_14"

2614
  },

2615
  {

2616
   "chips": ["gfx7"],

2617
   "map": {"at": 46444, "to": "mm"},

2618
   "name": "SPI_SHADER_USER_DATA_LS_15"

2619
  },

2620
  {

2621
   "chips": ["gfx7"],

2622
   "map": {"at": 47104, "to": "mm"},

2623
   "name": "COMPUTE_DISPATCH_INITIATOR",

2624
   "type_ref": "COMPUTE_DISPATCH_INITIATOR"

2625
  },

2626
  {

2627
   "chips": ["gfx7"],

2628
   "map": {"at": 47108, "to": "mm"},

2629
   "name": "COMPUTE_DIM_X"

2630
  },

2631
  {

2632
   "chips": ["gfx7"],

2633
   "map": {"at": 47112, "to": "mm"},

2634
   "name": "COMPUTE_DIM_Y"

2635
  },

2636
  {

2637
   "chips": ["gfx7"],

2638
   "map": {"at": 47116, "to": "mm"},

2639
   "name": "COMPUTE_DIM_Z"

2640
  },

2641
  {

2642
   "chips": ["gfx7"],

2643
   "map": {"at": 47120, "to": "mm"},

2644
   "name": "COMPUTE_START_X"

2645
  },

2646
  {

2647
   "chips": ["gfx7"],

2648
   "map": {"at": 47124, "to": "mm"},

2649
   "name": "COMPUTE_START_Y"

2650
  },

2651
  {

2652
   "chips": ["gfx7"],

2653
   "map": {"at": 47128, "to": "mm"},

2654
   "name": "COMPUTE_START_Z"

2655
  },

2656
  {

2657
   "chips": ["gfx7"],

2658
   "map": {"at": 47132, "to": "mm"},

2659
   "name": "COMPUTE_NUM_THREAD_X",

2660
   "type_ref": "COMPUTE_NUM_THREAD_X"

2661
  },

2662
  {

2663
   "chips": ["gfx7"],

2664
   "map": {"at": 47136, "to": "mm"},

2665
   "name": "COMPUTE_NUM_THREAD_Y",

2666
   "type_ref": "COMPUTE_NUM_THREAD_X"

2667
  },

2668
  {

2669
   "chips": ["gfx7"],

2670
   "map": {"at": 47140, "to": "mm"},

2671
   "name": "COMPUTE_NUM_THREAD_Z",

2672
   "type_ref": "COMPUTE_NUM_THREAD_X"

2673
  },

2674
  {

2675
   "chips": ["gfx7"],

2676
   "map": {"at": 47144, "to": "mm"},

2677
   "name": "COMPUTE_PIPELINESTAT_ENABLE",

2678
   "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"

2679
  },

2680
  {

2681
   "chips": ["gfx7"],

2682
   "map": {"at": 47148, "to": "mm"},

2683
   "name": "COMPUTE_PERFCOUNT_ENABLE",

2684
   "type_ref": "COMPUTE_PERFCOUNT_ENABLE"

2685
  },

2686
  {

2687
   "chips": ["gfx7"],

2688
   "map": {"at": 47152, "to": "mm"},

2689
   "name": "COMPUTE_PGM_LO"

2690
  },

2691
  {

2692
   "chips": ["gfx7"],

2693
   "map": {"at": 47156, "to": "mm"},

2694
   "name": "COMPUTE_PGM_HI",

2695
   "type_ref": "COMPUTE_PGM_HI"

2696
  },

2697
  {

2698
   "chips": ["gfx7"],

2699
   "map": {"at": 47160, "to": "mm"},

2700
   "name": "COMPUTE_TBA_LO"

2701
  },

2702
  {

2703
   "chips": ["gfx7"],

2704
   "map": {"at": 47164, "to": "mm"},

2705
   "name": "COMPUTE_TBA_HI",

2706
   "type_ref": "COMPUTE_TBA_HI"

2707
  },

2708
  {

2709
   "chips": ["gfx7"],

2710
   "map": {"at": 47168, "to": "mm"},

2711
   "name": "COMPUTE_TMA_LO"

2712
  },

2713
  {

2714
   "chips": ["gfx7"],

2715
   "map": {"at": 47172, "to": "mm"},

2716
   "name": "COMPUTE_TMA_HI",

2717
   "type_ref": "COMPUTE_TBA_HI"

2718
  },

2719
  {

2720
   "chips": ["gfx7"],

2721
   "map": {"at": 47176, "to": "mm"},

2722
   "name": "COMPUTE_PGM_RSRC1",

2723
   "type_ref": "COMPUTE_PGM_RSRC1"

2724
  },

2725
  {

2726
   "chips": ["gfx7"],

2727
   "map": {"at": 47180, "to": "mm"},

2728
   "name": "COMPUTE_PGM_RSRC2",

2729
   "type_ref": "COMPUTE_PGM_RSRC2"

2730
  },

2731
  {

2732
   "chips": ["gfx7"],

2733
   "map": {"at": 47184, "to": "mm"},

2734
   "name": "COMPUTE_VMID",

2735
   "type_ref": "COMPUTE_VMID"

2736
  },

2737
  {

2738
   "chips": ["gfx7"],

2739
   "map": {"at": 47188, "to": "mm"},

2740
   "name": "COMPUTE_RESOURCE_LIMITS",

2741
   "type_ref": "COMPUTE_RESOURCE_LIMITS"

2742
  },

2743
  {

2744
   "chips": ["gfx7"],

2745
   "map": {"at": 47192, "to": "mm"},

2746
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",

2747
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"

2748
  },

2749
  {

2750
   "chips": ["gfx7"],

2751
   "map": {"at": 47196, "to": "mm"},

2752
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",

2753
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"

2754
  },

2755
  {

2756
   "chips": ["gfx7"],

2757
   "map": {"at": 47200, "to": "mm"},

2758
   "name": "COMPUTE_TMPRING_SIZE",

2759
   "type_ref": "COMPUTE_TMPRING_SIZE"

2760
  },

2761
  {

2762
   "chips": ["gfx7"],

2763
   "map": {"at": 47204, "to": "mm"},

2764
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",

2765
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"

2766
  },

2767
  {

2768
   "chips": ["gfx7"],

2769
   "map": {"at": 47208, "to": "mm"},

2770
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",

2771
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"

2772
  },

2773
  {

2774
   "chips": ["gfx7"],

2775
   "map": {"at": 47212, "to": "mm"},

2776
   "name": "COMPUTE_RESTART_X"

2777
  },

2778
  {

2779
   "chips": ["gfx7"],

2780
   "map": {"at": 47216, "to": "mm"},

2781
   "name": "COMPUTE_RESTART_Y"

2782
  },

2783
  {

2784
   "chips": ["gfx7"],

2785
   "map": {"at": 47220, "to": "mm"},

2786
   "name": "COMPUTE_RESTART_Z"

2787
  },

2788
  {

2789
   "chips": ["gfx7"],

2790
   "map": {"at": 47224, "to": "mm"},

2791
   "name": "COMPUTE_THREAD_TRACE_ENABLE",

2792
   "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"

2793
  },

2794
  {

2795
   "chips": ["gfx7"],

2796
   "map": {"at": 47228, "to": "mm"},

2797
   "name": "COMPUTE_MISC_RESERVED",

2798
   "type_ref": "COMPUTE_MISC_RESERVED"

2799
  },

2800
  {

2801
   "chips": ["gfx7"],

2802
   "map": {"at": 47360, "to": "mm"},

2803
   "name": "COMPUTE_USER_DATA_0"

2804
  },

2805
  {

2806
   "chips": ["gfx7"],

2807
   "map": {"at": 47364, "to": "mm"},

2808
   "name": "COMPUTE_USER_DATA_1"

2809
  },

2810
  {

2811
   "chips": ["gfx7"],

2812
   "map": {"at": 47368, "to": "mm"},

2813
   "name": "COMPUTE_USER_DATA_2"

2814
  },

2815
  {

2816
   "chips": ["gfx7"],

2817
   "map": {"at": 47372, "to": "mm"},

2818
   "name": "COMPUTE_USER_DATA_3"

2819
  },

2820
  {

2821
   "chips": ["gfx7"],

2822
   "map": {"at": 47376, "to": "mm"},

2823
   "name": "COMPUTE_USER_DATA_4"

2824
  },

2825
  {

2826
   "chips": ["gfx7"],

2827
   "map": {"at": 47380, "to": "mm"},

2828
   "name": "COMPUTE_USER_DATA_5"

2829
  },

2830
  {

2831
   "chips": ["gfx7"],

2832
   "map": {"at": 47384, "to": "mm"},

2833
   "name": "COMPUTE_USER_DATA_6"

2834
  },

2835
  {

2836
   "chips": ["gfx7"],

2837
   "map": {"at": 47388, "to": "mm"},

2838
   "name": "COMPUTE_USER_DATA_7"

2839
  },

2840
  {

2841
   "chips": ["gfx7"],

2842
   "map": {"at": 47392, "to": "mm"},

2843
   "name": "COMPUTE_USER_DATA_8"

2844
  },

2845
  {

2846
   "chips": ["gfx7"],

2847
   "map": {"at": 47396, "to": "mm"},

2848
   "name": "COMPUTE_USER_DATA_9"

2849
  },

2850
  {

2851
   "chips": ["gfx7"],

2852
   "map": {"at": 47400, "to": "mm"},

2853
   "name": "COMPUTE_USER_DATA_10"

2854
  },

2855
  {

2856
   "chips": ["gfx7"],

2857
   "map": {"at": 47404, "to": "mm"},

2858
   "name": "COMPUTE_USER_DATA_11"

2859
  },

2860
  {

2861
   "chips": ["gfx7"],

2862
   "map": {"at": 47408, "to": "mm"},

2863
   "name": "COMPUTE_USER_DATA_12"

2864
  },

2865
  {

2866
   "chips": ["gfx7"],

2867
   "map": {"at": 47412, "to": "mm"},

2868
   "name": "COMPUTE_USER_DATA_13"

2869
  },

2870
  {

2871
   "chips": ["gfx7"],

2872
   "map": {"at": 47416, "to": "mm"},

2873
   "name": "COMPUTE_USER_DATA_14"

2874
  },

2875
  {

2876
   "chips": ["gfx7"],

2877
   "map": {"at": 47420, "to": "mm"},

2878
   "name": "COMPUTE_USER_DATA_15"

2879
  },

2880
  {

2881
   "chips": ["gfx7"],

2882
   "map": {"at": 163840, "to": "mm"},

2883
   "name": "DB_RENDER_CONTROL",

2884
   "type_ref": "DB_RENDER_CONTROL"

2885
  },

2886
  {

2887
   "chips": ["gfx7"],

2888
   "map": {"at": 163844, "to": "mm"},

2889
   "name": "DB_COUNT_CONTROL",

2890
   "type_ref": "DB_COUNT_CONTROL"

2891
  },

2892
  {

2893
   "chips": ["gfx7"],

2894
   "map": {"at": 163848, "to": "mm"},

2895
   "name": "DB_DEPTH_VIEW",

2896
   "type_ref": "DB_DEPTH_VIEW"

2897
  },

2898
  {

2899
   "chips": ["gfx7"],

2900
   "map": {"at": 163852, "to": "mm"},

2901
   "name": "DB_RENDER_OVERRIDE",

2902
   "type_ref": "DB_RENDER_OVERRIDE"

2903
  },

2904
  {

2905
   "chips": ["gfx7"],

2906
   "map": {"at": 163856, "to": "mm"},

2907
   "name": "DB_RENDER_OVERRIDE2",

2908
   "type_ref": "DB_RENDER_OVERRIDE2"

2909
  },

2910
  {

2911
   "chips": ["gfx7"],

2912
   "map": {"at": 163860, "to": "mm"},

2913
   "name": "DB_HTILE_DATA_BASE"

2914
  },

2915
  {

2916
   "chips": ["gfx7"],

2917
   "map": {"at": 163872, "to": "mm"},

2918
   "name": "DB_DEPTH_BOUNDS_MIN"

2919
  },

2920
  {

2921
   "chips": ["gfx7"],

2922
   "map": {"at": 163876, "to": "mm"},

2923
   "name": "DB_DEPTH_BOUNDS_MAX"

2924
  },

2925
  {

2926
   "chips": ["gfx7"],

2927
   "map": {"at": 163880, "to": "mm"},

2928
   "name": "DB_STENCIL_CLEAR",

2929
   "type_ref": "DB_STENCIL_CLEAR"

2930
  },

2931
  {

2932
   "chips": ["gfx7"],

2933
   "map": {"at": 163884, "to": "mm"},

2934
   "name": "DB_DEPTH_CLEAR"

2935
  },

2936
  {

2937
   "chips": ["gfx7"],

2938
   "map": {"at": 163888, "to": "mm"},

2939
   "name": "PA_SC_SCREEN_SCISSOR_TL",

2940
   "type_ref": "PA_SC_SCREEN_SCISSOR_TL"

2941
  },

2942
  {

2943
   "chips": ["gfx7"],

2944
   "map": {"at": 163892, "to": "mm"},

2945
   "name": "PA_SC_SCREEN_SCISSOR_BR",

2946
   "type_ref": "PA_SC_SCREEN_SCISSOR_BR"

2947
  },

2948
  {

2949
   "chips": ["gfx7"],

2950
   "map": {"at": 163900, "to": "mm"},

2951
   "name": "DB_DEPTH_INFO",

2952
   "type_ref": "DB_DEPTH_INFO"

2953
  },

2954
  {

2955
   "chips": ["gfx7"],

2956
   "map": {"at": 163904, "to": "mm"},

2957
   "name": "DB_Z_INFO",

2958
   "type_ref": "DB_Z_INFO"

2959
  },

2960
  {

2961
   "chips": ["gfx7"],

2962
   "map": {"at": 163908, "to": "mm"},

2963
   "name": "DB_STENCIL_INFO",

2964
   "type_ref": "DB_STENCIL_INFO"

2965
  },

2966
  {

2967
   "chips": ["gfx7"],

2968
   "map": {"at": 163912, "to": "mm"},

2969
   "name": "DB_Z_READ_BASE"

2970
  },

2971
  {

2972
   "chips": ["gfx7"],

2973
   "map": {"at": 163916, "to": "mm"},

2974
   "name": "DB_STENCIL_READ_BASE"

2975
  },

2976
  {

2977
   "chips": ["gfx7"],

2978
   "map": {"at": 163920, "to": "mm"},

2979
   "name": "DB_Z_WRITE_BASE"

2980
  },

2981
  {

2982
   "chips": ["gfx7"],

2983
   "map": {"at": 163924, "to": "mm"},

2984
   "name": "DB_STENCIL_WRITE_BASE"

2985
  },

2986
  {

2987
   "chips": ["gfx7"],

2988
   "map": {"at": 163928, "to": "mm"},

2989
   "name": "DB_DEPTH_SIZE",

2990
   "type_ref": "DB_DEPTH_SIZE"

2991
  },

2992
  {

2993
   "chips": ["gfx7"],

2994
   "map": {"at": 163932, "to": "mm"},

2995
   "name": "DB_DEPTH_SLICE",

2996
   "type_ref": "DB_DEPTH_SLICE"

2997
  },

2998
  {

2999
   "chips": ["gfx7"],

3000
   "map": {"at": 163968, "to": "mm"},

3001
   "name": "TA_BC_BASE_ADDR"

3002
  },

3003
  {

3004
   "chips": ["gfx7"],

3005
   "map": {"at": 163972, "to": "mm"},

3006
   "name": "TA_BC_BASE_ADDR_HI",

3007
   "type_ref": "TA_BC_BASE_ADDR_HI"

3008
  },

3009
  {

3010
   "chips": ["gfx7"],

3011
   "map": {"at": 164328, "to": "mm"},

3012
   "name": "COHER_DEST_BASE_HI_0"

3013
  },

3014
  {

3015
   "chips": ["gfx7"],

3016
   "map": {"at": 164332, "to": "mm"},

3017
   "name": "COHER_DEST_BASE_HI_1"

3018
  },

3019
  {

3020
   "chips": ["gfx7"],

3021
   "map": {"at": 164336, "to": "mm"},

3022
   "name": "COHER_DEST_BASE_HI_2"

3023
  },

3024
  {

3025
   "chips": ["gfx7"],

3026
   "map": {"at": 164340, "to": "mm"},

3027
   "name": "COHER_DEST_BASE_HI_3"

3028
  },

3029
  {

3030
   "chips": ["gfx7"],

3031
   "map": {"at": 164344, "to": "mm"},

3032
   "name": "COHER_DEST_BASE_2"

3033
  },

3034
  {

3035
   "chips": ["gfx7"],

3036
   "map": {"at": 164348, "to": "mm"},

3037
   "name": "COHER_DEST_BASE_3"

3038
  },

3039
  {

3040
   "chips": ["gfx7"],

3041
   "map": {"at": 164352, "to": "mm"},

3042
   "name": "PA_SC_WINDOW_OFFSET",

3043
   "type_ref": "PA_SC_WINDOW_OFFSET"

3044
  },

3045
  {

3046
   "chips": ["gfx7"],

3047
   "map": {"at": 164356, "to": "mm"},

3048
   "name": "PA_SC_WINDOW_SCISSOR_TL",

3049
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3050
  },

3051
  {

3052
   "chips": ["gfx7"],

3053
   "map": {"at": 164360, "to": "mm"},

3054
   "name": "PA_SC_WINDOW_SCISSOR_BR",

3055
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3056
  },

3057
  {

3058
   "chips": ["gfx7"],

3059
   "map": {"at": 164364, "to": "mm"},

3060
   "name": "PA_SC_CLIPRECT_RULE",

3061
   "type_ref": "PA_SC_CLIPRECT_RULE"

3062
  },

3063
  {

3064
   "chips": ["gfx7"],

3065
   "map": {"at": 164368, "to": "mm"},

3066
   "name": "PA_SC_CLIPRECT_0_TL",

3067
   "type_ref": "PA_SC_CLIPRECT_0_TL"

3068
  },

3069
  {

3070
   "chips": ["gfx7"],

3071
   "map": {"at": 164372, "to": "mm"},

3072
   "name": "PA_SC_CLIPRECT_0_BR",

3073
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3074
  },

3075
  {

3076
   "chips": ["gfx7"],

3077
   "map": {"at": 164376, "to": "mm"},

3078
   "name": "PA_SC_CLIPRECT_1_TL",

3079
   "type_ref": "PA_SC_CLIPRECT_0_TL"

3080
  },

3081
  {

3082
   "chips": ["gfx7"],

3083
   "map": {"at": 164380, "to": "mm"},

3084
   "name": "PA_SC_CLIPRECT_1_BR",

3085
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3086
  },

3087
  {

3088
   "chips": ["gfx7"],

3089
   "map": {"at": 164384, "to": "mm"},

3090
   "name": "PA_SC_CLIPRECT_2_TL",

3091
   "type_ref": "PA_SC_CLIPRECT_0_TL"

3092
  },

3093
  {

3094
   "chips": ["gfx7"],

3095
   "map": {"at": 164388, "to": "mm"},

3096
   "name": "PA_SC_CLIPRECT_2_BR",

3097
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3098
  },

3099
  {

3100
   "chips": ["gfx7"],

3101
   "map": {"at": 164392, "to": "mm"},

3102
   "name": "PA_SC_CLIPRECT_3_TL",

3103
   "type_ref": "PA_SC_CLIPRECT_0_TL"

3104
  },

3105
  {

3106
   "chips": ["gfx7"],

3107
   "map": {"at": 164396, "to": "mm"},

3108
   "name": "PA_SC_CLIPRECT_3_BR",

3109
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3110
  },

3111
  {

3112
   "chips": ["gfx7"],

3113
   "map": {"at": 164400, "to": "mm"},

3114
   "name": "PA_SC_EDGERULE",

3115
   "type_ref": "PA_SC_EDGERULE"

3116
  },

3117
  {

3118
   "chips": ["gfx7"],

3119
   "map": {"at": 164404, "to": "mm"},

3120
   "name": "PA_SU_HARDWARE_SCREEN_OFFSET",

3121
   "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"

3122
  },

3123
  {

3124
   "chips": ["gfx7"],

3125
   "map": {"at": 164408, "to": "mm"},

3126
   "name": "CB_TARGET_MASK",

3127
   "type_ref": "CB_TARGET_MASK"

3128
  },

3129
  {

3130
   "chips": ["gfx7"],

3131
   "map": {"at": 164412, "to": "mm"},

3132
   "name": "CB_SHADER_MASK",

3133
   "type_ref": "CB_SHADER_MASK"

3134
  },

3135
  {

3136
   "chips": ["gfx7"],

3137
   "map": {"at": 164416, "to": "mm"},

3138
   "name": "PA_SC_GENERIC_SCISSOR_TL",

3139
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3140
  },

3141
  {

3142
   "chips": ["gfx7"],

3143
   "map": {"at": 164420, "to": "mm"},

3144
   "name": "PA_SC_GENERIC_SCISSOR_BR",

3145
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3146
  },

3147
  {

3148
   "chips": ["gfx7"],

3149
   "map": {"at": 164424, "to": "mm"},

3150
   "name": "COHER_DEST_BASE_0"

3151
  },

3152
  {

3153
   "chips": ["gfx7"],

3154
   "map": {"at": 164428, "to": "mm"},

3155
   "name": "COHER_DEST_BASE_1"

3156
  },

3157
  {

3158
   "chips": ["gfx7"],

3159
   "map": {"at": 164432, "to": "mm"},

3160
   "name": "PA_SC_VPORT_SCISSOR_0_TL",

3161
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3162
  },

3163
  {

3164
   "chips": ["gfx7"],

3165
   "map": {"at": 164436, "to": "mm"},

3166
   "name": "PA_SC_VPORT_SCISSOR_0_BR",

3167
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3168
  },

3169
  {

3170
   "chips": ["gfx7"],

3171
   "map": {"at": 164440, "to": "mm"},

3172
   "name": "PA_SC_VPORT_SCISSOR_1_TL",

3173
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3174
  },

3175
  {

3176
   "chips": ["gfx7"],

3177
   "map": {"at": 164444, "to": "mm"},

3178
   "name": "PA_SC_VPORT_SCISSOR_1_BR",

3179
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3180
  },

3181
  {

3182
   "chips": ["gfx7"],

3183
   "map": {"at": 164448, "to": "mm"},

3184
   "name": "PA_SC_VPORT_SCISSOR_2_TL",

3185
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3186
  },

3187
  {

3188
   "chips": ["gfx7"],

3189
   "map": {"at": 164452, "to": "mm"},

3190
   "name": "PA_SC_VPORT_SCISSOR_2_BR",

3191
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3192
  },

3193
  {

3194
   "chips": ["gfx7"],

3195
   "map": {"at": 164456, "to": "mm"},

3196
   "name": "PA_SC_VPORT_SCISSOR_3_TL",

3197
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3198
  },

3199
  {

3200
   "chips": ["gfx7"],

3201
   "map": {"at": 164460, "to": "mm"},

3202
   "name": "PA_SC_VPORT_SCISSOR_3_BR",

3203
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3204
  },

3205
  {

3206
   "chips": ["gfx7"],

3207
   "map": {"at": 164464, "to": "mm"},

3208
   "name": "PA_SC_VPORT_SCISSOR_4_TL",

3209
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3210
  },

3211
  {

3212
   "chips": ["gfx7"],

3213
   "map": {"at": 164468, "to": "mm"},

3214
   "name": "PA_SC_VPORT_SCISSOR_4_BR",

3215
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3216
  },

3217
  {

3218
   "chips": ["gfx7"],

3219
   "map": {"at": 164472, "to": "mm"},

3220
   "name": "PA_SC_VPORT_SCISSOR_5_TL",

3221
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3222
  },

3223
  {

3224
   "chips": ["gfx7"],

3225
   "map": {"at": 164476, "to": "mm"},

3226
   "name": "PA_SC_VPORT_SCISSOR_5_BR",

3227
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3228
  },

3229
  {

3230
   "chips": ["gfx7"],

3231
   "map": {"at": 164480, "to": "mm"},

3232
   "name": "PA_SC_VPORT_SCISSOR_6_TL",

3233
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3234
  },

3235
  {

3236
   "chips": ["gfx7"],

3237
   "map": {"at": 164484, "to": "mm"},

3238
   "name": "PA_SC_VPORT_SCISSOR_6_BR",

3239
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3240
  },

3241
  {

3242
   "chips": ["gfx7"],

3243
   "map": {"at": 164488, "to": "mm"},

3244
   "name": "PA_SC_VPORT_SCISSOR_7_TL",

3245
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3246
  },

3247
  {

3248
   "chips": ["gfx7"],

3249
   "map": {"at": 164492, "to": "mm"},

3250
   "name": "PA_SC_VPORT_SCISSOR_7_BR",

3251
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3252
  },

3253
  {

3254
   "chips": ["gfx7"],

3255
   "map": {"at": 164496, "to": "mm"},

3256
   "name": "PA_SC_VPORT_SCISSOR_8_TL",

3257
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3258
  },

3259
  {

3260
   "chips": ["gfx7"],

3261
   "map": {"at": 164500, "to": "mm"},

3262
   "name": "PA_SC_VPORT_SCISSOR_8_BR",

3263
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3264
  },

3265
  {

3266
   "chips": ["gfx7"],

3267
   "map": {"at": 164504, "to": "mm"},

3268
   "name": "PA_SC_VPORT_SCISSOR_9_TL",

3269
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3270
  },

3271
  {

3272
   "chips": ["gfx7"],

3273
   "map": {"at": 164508, "to": "mm"},

3274
   "name": "PA_SC_VPORT_SCISSOR_9_BR",

3275
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3276
  },

3277
  {

3278
   "chips": ["gfx7"],

3279
   "map": {"at": 164512, "to": "mm"},

3280
   "name": "PA_SC_VPORT_SCISSOR_10_TL",

3281
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3282
  },

3283
  {

3284
   "chips": ["gfx7"],

3285
   "map": {"at": 164516, "to": "mm"},

3286
   "name": "PA_SC_VPORT_SCISSOR_10_BR",

3287
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3288
  },

3289
  {

3290
   "chips": ["gfx7"],

3291
   "map": {"at": 164520, "to": "mm"},

3292
   "name": "PA_SC_VPORT_SCISSOR_11_TL",

3293
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3294
  },

3295
  {

3296
   "chips": ["gfx7"],

3297
   "map": {"at": 164524, "to": "mm"},

3298
   "name": "PA_SC_VPORT_SCISSOR_11_BR",

3299
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3300
  },

3301
  {

3302
   "chips": ["gfx7"],

3303
   "map": {"at": 164528, "to": "mm"},

3304
   "name": "PA_SC_VPORT_SCISSOR_12_TL",

3305
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3306
  },

3307
  {

3308
   "chips": ["gfx7"],

3309
   "map": {"at": 164532, "to": "mm"},

3310
   "name": "PA_SC_VPORT_SCISSOR_12_BR",

3311
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3312
  },

3313
  {

3314
   "chips": ["gfx7"],

3315
   "map": {"at": 164536, "to": "mm"},

3316
   "name": "PA_SC_VPORT_SCISSOR_13_TL",

3317
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3318
  },

3319
  {

3320
   "chips": ["gfx7"],

3321
   "map": {"at": 164540, "to": "mm"},

3322
   "name": "PA_SC_VPORT_SCISSOR_13_BR",

3323
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3324
  },

3325
  {

3326
   "chips": ["gfx7"],

3327
   "map": {"at": 164544, "to": "mm"},

3328
   "name": "PA_SC_VPORT_SCISSOR_14_TL",

3329
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3330
  },

3331
  {

3332
   "chips": ["gfx7"],

3333
   "map": {"at": 164548, "to": "mm"},

3334
   "name": "PA_SC_VPORT_SCISSOR_14_BR",

3335
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3336
  },

3337
  {

3338
   "chips": ["gfx7"],

3339
   "map": {"at": 164552, "to": "mm"},

3340
   "name": "PA_SC_VPORT_SCISSOR_15_TL",

3341
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"

3342
  },

3343
  {

3344
   "chips": ["gfx7"],

3345
   "map": {"at": 164556, "to": "mm"},

3346
   "name": "PA_SC_VPORT_SCISSOR_15_BR",

3347
   "type_ref": "PA_SC_CLIPRECT_0_BR"

3348
  },

3349
  {

3350
   "chips": ["gfx7"],

3351
   "map": {"at": 164560, "to": "mm"},

3352
   "name": "PA_SC_VPORT_ZMIN_0"

3353
  },

3354
  {

3355
   "chips": ["gfx7"],

3356
   "map": {"at": 164564, "to": "mm"},

3357
   "name": "PA_SC_VPORT_ZMAX_0"

3358
  },

3359
  {

3360
   "chips": ["gfx7"],

3361
   "map": {"at": 164568, "to": "mm"},

3362
   "name": "PA_SC_VPORT_ZMIN_1"

3363
  },

3364
  {

3365
   "chips": ["gfx7"],

3366
   "map": {"at": 164572, "to": "mm"},

3367
   "name": "PA_SC_VPORT_ZMAX_1"

3368
  },

3369
  {

3370
   "chips": ["gfx7"],

3371
   "map": {"at": 164576, "to": "mm"},

3372
   "name": "PA_SC_VPORT_ZMIN_2"

3373
  },

3374
  {

3375
   "chips": ["gfx7"],

3376
   "map": {"at": 164580, "to": "mm"},

3377
   "name": "PA_SC_VPORT_ZMAX_2"

3378
  },

3379
  {

3380
   "chips": ["gfx7"],

3381
   "map": {"at": 164584, "to": "mm"},

3382
   "name": "PA_SC_VPORT_ZMIN_3"

3383
  },

3384
  {

3385
   "chips": ["gfx7"],

3386
   "map": {"at": 164588, "to": "mm"},

3387
   "name": "PA_SC_VPORT_ZMAX_3"

3388
  },

3389
  {

3390
   "chips": ["gfx7"],

3391
   "map": {"at": 164592, "to": "mm"},

3392
   "name": "PA_SC_VPORT_ZMIN_4"

3393
  },

3394
  {

3395
   "chips": ["gfx7"],

3396
   "map": {"at": 164596, "to": "mm"},

3397
   "name": "PA_SC_VPORT_ZMAX_4"

3398
  },

3399
  {

3400
   "chips": ["gfx7"],

3401
   "map": {"at": 164600, "to": "mm"},

3402
   "name": "PA_SC_VPORT_ZMIN_5"

3403
  },

3404
  {

3405
   "chips": ["gfx7"],

3406
   "map": {"at": 164604, "to": "mm"},

3407
   "name": "PA_SC_VPORT_ZMAX_5"

3408
  },

3409
  {

3410
   "chips": ["gfx7"],

3411
   "map": {"at": 164608, "to": "mm"},

3412
   "name": "PA_SC_VPORT_ZMIN_6"

3413
  },

3414
  {

3415
   "chips": ["gfx7"],

3416
   "map": {"at": 164612, "to": "mm"},

3417
   "name": "PA_SC_VPORT_ZMAX_6"

3418
  },

3419
  {

3420
   "chips": ["gfx7"],

3421
   "map": {"at": 164616, "to": "mm"},

3422
   "name": "PA_SC_VPORT_ZMIN_7"

3423
  },

3424
  {

3425
   "chips": ["gfx7"],

3426
   "map": {"at": 164620, "to": "mm"},

3427
   "name": "PA_SC_VPORT_ZMAX_7"

3428
  },

3429
  {

3430
   "chips": ["gfx7"],

3431
   "map": {"at": 164624, "to": "mm"},

3432
   "name": "PA_SC_VPORT_ZMIN_8"

3433
  },

3434
  {

3435
   "chips": ["gfx7"],

3436
   "map": {"at": 164628, "to": "mm"},

3437
   "name": "PA_SC_VPORT_ZMAX_8"

3438
  },

3439
  {

3440
   "chips": ["gfx7"],

3441
   "map": {"at": 164632, "to": "mm"},

3442
   "name": "PA_SC_VPORT_ZMIN_9"

3443
  },

3444
  {

3445
   "chips": ["gfx7"],

3446
   "map": {"at": 164636, "to": "mm"},

3447
   "name": "PA_SC_VPORT_ZMAX_9"

3448
  },

3449
  {

3450
   "chips": ["gfx7"],

3451
   "map": {"at": 164640, "to": "mm"},

3452
   "name": "PA_SC_VPORT_ZMIN_10"

3453
  },

3454
  {

3455
   "chips": ["gfx7"],

3456
   "map": {"at": 164644, "to": "mm"},

3457
   "name": "PA_SC_VPORT_ZMAX_10"

3458
  },

3459
  {

3460
   "chips": ["gfx7"],

3461
   "map": {"at": 164648, "to": "mm"},

3462
   "name": "PA_SC_VPORT_ZMIN_11"

3463
  },

3464
  {

3465
   "chips": ["gfx7"],

3466
   "map": {"at": 164652, "to": "mm"},

3467
   "name": "PA_SC_VPORT_ZMAX_11"

3468
  },

3469
  {

3470
   "chips": ["gfx7"],

3471
   "map": {"at": 164656, "to": "mm"},

3472
   "name": "PA_SC_VPORT_ZMIN_12"

3473
  },

3474
  {

3475
   "chips": ["gfx7"],

3476
   "map": {"at": 164660, "to": "mm"},

3477
   "name": "PA_SC_VPORT_ZMAX_12"

3478
  },

3479
  {

3480
   "chips": ["gfx7"],

3481
   "map": {"at": 164664, "to": "mm"},

3482
   "name": "PA_SC_VPORT_ZMIN_13"

3483
  },

3484
  {

3485
   "chips": ["gfx7"],

3486
   "map": {"at": 164668, "to": "mm"},

3487
   "name": "PA_SC_VPORT_ZMAX_13"

3488
  },

3489
  {

3490
   "chips": ["gfx7"],

3491
   "map": {"at": 164672, "to": "mm"},

3492
   "name": "PA_SC_VPORT_ZMIN_14"

3493
  },

3494
  {

3495
   "chips": ["gfx7"],

3496
   "map": {"at": 164676, "to": "mm"},

3497
   "name": "PA_SC_VPORT_ZMAX_14"

3498
  },

3499
  {

3500
   "chips": ["gfx7"],

3501
   "map": {"at": 164680, "to": "mm"},

3502
   "name": "PA_SC_VPORT_ZMIN_15"

3503
  },

3504
  {

3505
   "chips": ["gfx7"],

3506
   "map": {"at": 164684, "to": "mm"},

3507
   "name": "PA_SC_VPORT_ZMAX_15"

3508
  },

3509
  {

3510
   "chips": ["gfx7"],

3511
   "map": {"at": 164688, "to": "mm"},

3512
   "name": "PA_SC_RASTER_CONFIG",

3513
   "type_ref": "PA_SC_RASTER_CONFIG"

3514
  },

3515
  {

3516
   "chips": ["gfx7"],

3517
   "map": {"at": 164692, "to": "mm"},

3518
   "name": "PA_SC_RASTER_CONFIG_1",

3519
   "type_ref": "PA_SC_RASTER_CONFIG_1"

3520
  },

3521
  {

3522
   "chips": ["gfx7"],

3523
   "map": {"at": 164696, "to": "mm"},

3524
   "name": "PA_SC_SCREEN_EXTENT_CONTROL",

3525
   "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"

3526
  },

3527
  {

3528
   "chips": ["gfx7"],

3529
   "map": {"at": 164704, "to": "mm"},

3530
   "name": "CP_PERFMON_CNTX_CNTL",

3531
   "type_ref": "CP_PERFMON_CNTX_CNTL"

3532
  },

3533
  {

3534
   "chips": ["gfx7"],

3535
   "map": {"at": 164708, "to": "mm"},

3536
   "name": "CP_RINGID",

3537
   "type_ref": "CP_RINGID"

3538
  },

3539
  {

3540
   "chips": ["gfx7"],

3541
   "map": {"at": 164712, "to": "mm"},

3542
   "name": "CP_VMID",

3543
   "type_ref": "CP_VMID"

3544
  },

3545
  {

3546
   "chips": ["gfx7"],

3547
   "map": {"at": 164864, "to": "mm"},

3548
   "name": "VGT_MAX_VTX_INDX"

3549
  },

3550
  {

3551
   "chips": ["gfx7"],

3552
   "map": {"at": 164868, "to": "mm"},

3553
   "name": "VGT_MIN_VTX_INDX"

3554
  },

3555
  {

3556
   "chips": ["gfx7"],

3557
   "map": {"at": 164872, "to": "mm"},

3558
   "name": "VGT_INDX_OFFSET"

3559
  },

3560
  {

3561
   "chips": ["gfx7"],

3562
   "map": {"at": 164876, "to": "mm"},

3563
   "name": "VGT_MULTI_PRIM_IB_RESET_INDX"

3564
  },

3565
  {

3566
   "chips": ["gfx7"],

3567
   "map": {"at": 164884, "to": "mm"},

3568
   "name": "CB_BLEND_RED"

3569
  },

3570
  {

3571
   "chips": ["gfx7"],

3572
   "map": {"at": 164888, "to": "mm"},

3573
   "name": "CB_BLEND_GREEN"

3574
  },

3575
  {

3576
   "chips": ["gfx7"],

3577
   "map": {"at": 164892, "to": "mm"},

3578
   "name": "CB_BLEND_BLUE"

3579
  },

3580
  {

3581
   "chips": ["gfx7"],

3582
   "map": {"at": 164896, "to": "mm"},

3583
   "name": "CB_BLEND_ALPHA"

3584
  },

3585
  {

3586
   "chips": ["gfx7"],

3587
   "map": {"at": 164908, "to": "mm"},

3588
   "name": "DB_STENCIL_CONTROL",

3589
   "type_ref": "DB_STENCIL_CONTROL"

3590
  },

3591
  {

3592
   "chips": ["gfx7"],

3593
   "map": {"at": 164912, "to": "mm"},

3594
   "name": "DB_STENCILREFMASK",

3595
   "type_ref": "DB_STENCILREFMASK"

3596
  },

3597
  {

3598
   "chips": ["gfx7"],

3599
   "map": {"at": 164916, "to": "mm"},

3600
   "name": "DB_STENCILREFMASK_BF",

3601
   "type_ref": "DB_STENCILREFMASK_BF"

3602
  },

3603
  {

3604
   "chips": ["gfx7"],

3605
   "map": {"at": 164924, "to": "mm"},

3606
   "name": "PA_CL_VPORT_XSCALE"

3607
  },

3608
  {

3609
   "chips": ["gfx7"],

3610
   "map": {"at": 164928, "to": "mm"},

3611
   "name": "PA_CL_VPORT_XOFFSET"

3612
  },

3613
  {

3614
   "chips": ["gfx7"],

3615
   "map": {"at": 164932, "to": "mm"},

3616
   "name": "PA_CL_VPORT_YSCALE"

3617
  },

3618
  {

3619
   "chips": ["gfx7"],

3620
   "map": {"at": 164936, "to": "mm"},

3621
   "name": "PA_CL_VPORT_YOFFSET"

3622
  },

3623
  {

3624
   "chips": ["gfx7"],

3625
   "map": {"at": 164940, "to": "mm"},

3626
   "name": "PA_CL_VPORT_ZSCALE"

3627
  },

3628
  {

3629
   "chips": ["gfx7"],

3630
   "map": {"at": 164944, "to": "mm"},

3631
   "name": "PA_CL_VPORT_ZOFFSET"

3632
  },

3633
  {

3634
   "chips": ["gfx7"],

3635
   "map": {"at": 164948, "to": "mm"},

3636
   "name": "PA_CL_VPORT_XSCALE_1"

3637
  },

3638
  {

3639
   "chips": ["gfx7"],

3640
   "map": {"at": 164952, "to": "mm"},

3641
   "name": "PA_CL_VPORT_XOFFSET_1"

3642
  },

3643
  {

3644
   "chips": ["gfx7"],

3645
   "map": {"at": 164956, "to": "mm"},

3646
   "name": "PA_CL_VPORT_YSCALE_1"

3647
  },

3648
  {

3649
   "chips": ["gfx7"],

3650
   "map": {"at": 164960, "to": "mm"},

3651
   "name": "PA_CL_VPORT_YOFFSET_1"

3652
  },

3653
  {

3654
   "chips": ["gfx7"],

3655
   "map": {"at": 164964, "to": "mm"},

3656
   "name": "PA_CL_VPORT_ZSCALE_1"

3657
  },

3658
  {

3659
   "chips": ["gfx7"],

3660
   "map": {"at": 164968, "to": "mm"},

3661
   "name": "PA_CL_VPORT_ZOFFSET_1"

3662
  },

3663
  {

3664
   "chips": ["gfx7"],

3665
   "map": {"at": 164972, "to": "mm"},

3666
   "name": "PA_CL_VPORT_XSCALE_2"

3667
  },

3668
  {

3669
   "chips": ["gfx7"],

3670
   "map": {"at": 164976, "to": "mm"},

3671
   "name": "PA_CL_VPORT_XOFFSET_2"

3672
  },

3673
  {

3674
   "chips": ["gfx7"],

3675
   "map": {"at": 164980, "to": "mm"},

3676
   "name": "PA_CL_VPORT_YSCALE_2"

3677
  },

3678
  {

3679
   "chips": ["gfx7"],

3680
   "map": {"at": 164984, "to": "mm"},

3681
   "name": "PA_CL_VPORT_YOFFSET_2"

3682
  },

3683
  {

3684
   "chips": ["gfx7"],

3685
   "map": {"at": 164988, "to": "mm"},

3686
   "name": "PA_CL_VPORT_ZSCALE_2"

3687
  },

3688
  {

3689
   "chips": ["gfx7"],

3690
   "map": {"at": 164992, "to": "mm"},

3691
   "name": "PA_CL_VPORT_ZOFFSET_2"

3692
  },

3693
  {

3694
   "chips": ["gfx7"],

3695
   "map": {"at": 164996, "to": "mm"},

3696
   "name": "PA_CL_VPORT_XSCALE_3"

3697
  },

3698
  {

3699
   "chips": ["gfx7"],

3700
   "map": {"at": 165000, "to": "mm"},

3701
   "name": "PA_CL_VPORT_XOFFSET_3"

3702
  },

3703
  {

3704
   "chips": ["gfx7"],

3705
   "map": {"at": 165004, "to": "mm"},

3706
   "name": "PA_CL_VPORT_YSCALE_3"

3707
  },

3708
  {

3709
   "chips": ["gfx7"],

3710
   "map": {"at": 165008, "to": "mm"},

3711
   "name": "PA_CL_VPORT_YOFFSET_3"

3712
  },

3713
  {

3714
   "chips": ["gfx7"],

3715
   "map": {"at": 165012, "to": "mm"},

3716
   "name": "PA_CL_VPORT_ZSCALE_3"

3717
  },

3718
  {

3719
   "chips": ["gfx7"],

3720
   "map": {"at": 165016, "to": "mm"},

3721
   "name": "PA_CL_VPORT_ZOFFSET_3"

3722
  },

3723
  {

3724
   "chips": ["gfx7"],

3725
   "map": {"at": 165020, "to": "mm"},

3726
   "name": "PA_CL_VPORT_XSCALE_4"

3727
  },

3728
  {

3729
   "chips": ["gfx7"],

3730
   "map": {"at": 165024, "to": "mm"},

3731
   "name": "PA_CL_VPORT_XOFFSET_4"

3732
  },

3733
  {

3734
   "chips": ["gfx7"],

3735
   "map": {"at": 165028, "to": "mm"},

3736
   "name": "PA_CL_VPORT_YSCALE_4"

3737
  },

3738
  {

3739
   "chips": ["gfx7"],

3740
   "map": {"at": 165032, "to": "mm"},

3741
   "name": "PA_CL_VPORT_YOFFSET_4"

3742
  },

3743
  {

3744
   "chips": ["gfx7"],

3745
   "map": {"at": 165036, "to": "mm"},

3746
   "name": "PA_CL_VPORT_ZSCALE_4"

3747
  },

3748
  {

3749
   "chips": ["gfx7"],

3750
   "map": {"at": 165040, "to": "mm"},

3751
   "name": "PA_CL_VPORT_ZOFFSET_4"

3752
  },

3753
  {

3754
   "chips": ["gfx7"],

3755
   "map": {"at": 165044, "to": "mm"},

3756
   "name": "PA_CL_VPORT_XSCALE_5"

3757
  },

3758
  {

3759
   "chips": ["gfx7"],

3760
   "map": {"at": 165048, "to": "mm"},

3761
   "name": "PA_CL_VPORT_XOFFSET_5"

3762
  },

3763
  {

3764
   "chips": ["gfx7"],

3765
   "map": {"at": 165052, "to": "mm"},

3766
   "name": "PA_CL_VPORT_YSCALE_5"

3767
  },

3768
  {

3769
   "chips": ["gfx7"],

3770
   "map": {"at": 165056, "to": "mm"},

3771
   "name": "PA_CL_VPORT_YOFFSET_5"

3772
  },

3773
  {

3774
   "chips": ["gfx7"],

3775
   "map": {"at": 165060, "to": "mm"},

3776
   "name": "PA_CL_VPORT_ZSCALE_5"

3777
  },

3778
  {

3779
   "chips": ["gfx7"],

3780
   "map": {"at": 165064, "to": "mm"},

3781
   "name": "PA_CL_VPORT_ZOFFSET_5"

3782
  },

3783
  {

3784
   "chips": ["gfx7"],

3785
   "map": {"at": 165068, "to": "mm"},

3786
   "name": "PA_CL_VPORT_XSCALE_6"

3787
  },

3788
  {

3789
   "chips": ["gfx7"],

3790
   "map": {"at": 165072, "to": "mm"},

3791
   "name": "PA_CL_VPORT_XOFFSET_6"

3792
  },

3793
  {

3794
   "chips": ["gfx7"],

3795
   "map": {"at": 165076, "to": "mm"},

3796
   "name": "PA_CL_VPORT_YSCALE_6"

3797
  },

3798
  {

3799
   "chips": ["gfx7"],

3800
   "map": {"at": 165080, "to": "mm"},

3801
   "name": "PA_CL_VPORT_YOFFSET_6"

3802
  },

3803
  {

3804
   "chips": ["gfx7"],

3805
   "map": {"at": 165084, "to": "mm"},

3806
   "name": "PA_CL_VPORT_ZSCALE_6"

3807
  },

3808
  {

3809
   "chips": ["gfx7"],

3810
   "map": {"at": 165088, "to": "mm"},

3811
   "name": "PA_CL_VPORT_ZOFFSET_6"

3812
  },

3813
  {

3814
   "chips": ["gfx7"],

3815
   "map": {"at": 165092, "to": "mm"},

3816
   "name": "PA_CL_VPORT_XSCALE_7"

3817
  },

3818
  {

3819
   "chips": ["gfx7"],

3820
   "map": {"at": 165096, "to": "mm"},

3821
   "name": "PA_CL_VPORT_XOFFSET_7"

3822
  },

3823
  {

3824
   "chips": ["gfx7"],

3825
   "map": {"at": 165100, "to": "mm"},

3826
   "name": "PA_CL_VPORT_YSCALE_7"

3827
  },

3828
  {

3829
   "chips": ["gfx7"],

3830
   "map": {"at": 165104, "to": "mm"},

3831
   "name": "PA_CL_VPORT_YOFFSET_7"

3832
  },

3833
  {

3834
   "chips": ["gfx7"],

3835
   "map": {"at": 165108, "to": "mm"},

3836
   "name": "PA_CL_VPORT_ZSCALE_7"

3837
  },

3838
  {

3839
   "chips": ["gfx7"],

3840
   "map": {"at": 165112, "to": "mm"},

3841
   "name": "PA_CL_VPORT_ZOFFSET_7"

3842
  },

3843
  {

3844
   "chips": ["gfx7"],

3845
   "map": {"at": 165116, "to": "mm"},

3846
   "name": "PA_CL_VPORT_XSCALE_8"

3847
  },

3848
  {

3849
   "chips": ["gfx7"],

3850
   "map": {"at": 165120, "to": "mm"},

3851
   "name": "PA_CL_VPORT_XOFFSET_8"

3852
  },

3853
  {

3854
   "chips": ["gfx7"],

3855
   "map": {"at": 165124, "to": "mm"},

3856
   "name": "PA_CL_VPORT_YSCALE_8"

3857
  },

3858
  {

3859
   "chips": ["gfx7"],

3860
   "map": {"at": 165128, "to": "mm"},

3861
   "name": "PA_CL_VPORT_YOFFSET_8"

3862
  },

3863
  {

3864
   "chips": ["gfx7"],

3865
   "map": {"at": 165132, "to": "mm"},

3866
   "name": "PA_CL_VPORT_ZSCALE_8"

3867
  },

3868
  {

3869
   "chips": ["gfx7"],

3870
   "map": {"at": 165136, "to": "mm"},

3871
   "name": "PA_CL_VPORT_ZOFFSET_8"

3872
  },

3873
  {

3874
   "chips": ["gfx7"],

3875
   "map": {"at": 165140, "to": "mm"},

3876
   "name": "PA_CL_VPORT_XSCALE_9"

3877
  },

3878
  {

3879
   "chips": ["gfx7"],

3880
   "map": {"at": 165144, "to": "mm"},

3881
   "name": "PA_CL_VPORT_XOFFSET_9"

3882
  },

3883
  {

3884
   "chips": ["gfx7"],

3885
   "map": {"at": 165148, "to": "mm"},

3886
   "name": "PA_CL_VPORT_YSCALE_9"

3887
  },

3888
  {

3889
   "chips": ["gfx7"],

3890
   "map": {"at": 165152, "to": "mm"},

3891
   "name": "PA_CL_VPORT_YOFFSET_9"

3892
  },

3893
  {

3894
   "chips": ["gfx7"],

3895
   "map": {"at": 165156, "to": "mm"},

3896
   "name": "PA_CL_VPORT_ZSCALE_9"

3897
  },

3898
  {

3899
   "chips": ["gfx7"],

3900
   "map": {"at": 165160, "to": "mm"},

3901
   "name": "PA_CL_VPORT_ZOFFSET_9"

3902
  },

3903
  {

3904
   "chips": ["gfx7"],

3905
   "map": {"at": 165164, "to": "mm"},

3906
   "name": "PA_CL_VPORT_XSCALE_10"

3907
  },

3908
  {

3909
   "chips": ["gfx7"],

3910
   "map": {"at": 165168, "to": "mm"},

3911
   "name": "PA_CL_VPORT_XOFFSET_10"

3912
  },

3913
  {

3914
   "chips": ["gfx7"],

3915
   "map": {"at": 165172, "to": "mm"},

3916
   "name": "PA_CL_VPORT_YSCALE_10"

3917
  },

3918
  {

3919
   "chips": ["gfx7"],

3920
   "map": {"at": 165176, "to": "mm"},

3921
   "name": "PA_CL_VPORT_YOFFSET_10"

3922
  },

3923
  {

3924
   "chips": ["gfx7"],

3925
   "map": {"at": 165180, "to": "mm"},

3926
   "name": "PA_CL_VPORT_ZSCALE_10"

3927
  },

3928
  {

3929
   "chips": ["gfx7"],

3930
   "map": {"at": 165184, "to": "mm"},

3931
   "name": "PA_CL_VPORT_ZOFFSET_10"

3932
  },

3933
  {

3934
   "chips": ["gfx7"],

3935
   "map": {"at": 165188, "to": "mm"},

3936
   "name": "PA_CL_VPORT_XSCALE_11"

3937
  },

3938
  {

3939
   "chips": ["gfx7"],

3940
   "map": {"at": 165192, "to": "mm"},

3941
   "name": "PA_CL_VPORT_XOFFSET_11"

3942
  },

3943
  {

3944
   "chips": ["gfx7"],

3945
   "map": {"at": 165196, "to": "mm"},

3946
   "name": "PA_CL_VPORT_YSCALE_11"

3947
  },

3948
  {

3949
   "chips": ["gfx7"],

3950
   "map": {"at": 165200, "to": "mm"},

3951
   "name": "PA_CL_VPORT_YOFFSET_11"

3952
  },

3953
  {

3954
   "chips": ["gfx7"],

3955
   "map": {"at": 165204, "to": "mm"},

3956
   "name": "PA_CL_VPORT_ZSCALE_11"

3957
  },

3958
  {

3959
   "chips": ["gfx7"],

3960
   "map": {"at": 165208, "to": "mm"},

3961
   "name": "PA_CL_VPORT_ZOFFSET_11"

3962
  },

3963
  {

3964
   "chips": ["gfx7"],

3965
   "map": {"at": 165212, "to": "mm"},

3966
   "name": "PA_CL_VPORT_XSCALE_12"

3967
  },

3968
  {

3969
   "chips": ["gfx7"],

3970
   "map": {"at": 165216, "to": "mm"},

3971
   "name": "PA_CL_VPORT_XOFFSET_12"

3972
  },

3973
  {

3974
   "chips": ["gfx7"],

3975
   "map": {"at": 165220, "to": "mm"},

3976
   "name": "PA_CL_VPORT_YSCALE_12"

3977
  },

3978
  {

3979
   "chips": ["gfx7"],

3980
   "map": {"at": 165224, "to": "mm"},

3981
   "name": "PA_CL_VPORT_YOFFSET_12"

3982
  },

3983
  {

3984
   "chips": ["gfx7"],

3985
   "map": {"at": 165228, "to": "mm"},

3986
   "name": "PA_CL_VPORT_ZSCALE_12"

3987
  },

3988
  {

3989
   "chips": ["gfx7"],

3990
   "map": {"at": 165232, "to": "mm"},

3991
   "name": "PA_CL_VPORT_ZOFFSET_12"

3992
  },

3993
  {

3994
   "chips": ["gfx7"],

3995
   "map": {"at": 165236, "to": "mm"},

3996
   "name": "PA_CL_VPORT_XSCALE_13"

3997
  },

3998
  {

3999
   "chips": ["gfx7"],

4000
   "map": {"at": 165240, "to": "mm"},

4001
   "name": "PA_CL_VPORT_XOFFSET_13"

4002
  },

4003
  {

4004
   "chips": ["gfx7"],

4005
   "map": {"at": 165244, "to": "mm"},

4006
   "name": "PA_CL_VPORT_YSCALE_13"

4007
  },

4008
  {

4009
   "chips": ["gfx7"],

4010
   "map": {"at": 165248, "to": "mm"},

4011
   "name": "PA_CL_VPORT_YOFFSET_13"

4012
  },

4013
  {

4014
   "chips": ["gfx7"],

4015
   "map": {"at": 165252, "to": "mm"},

4016
   "name": "PA_CL_VPORT_ZSCALE_13"

4017
  },

4018
  {

4019
   "chips": ["gfx7"],

4020
   "map": {"at": 165256, "to": "mm"},

4021
   "name": "PA_CL_VPORT_ZOFFSET_13"

4022
  },

4023
  {

4024
   "chips": ["gfx7"],

4025
   "map": {"at": 165260, "to": "mm"},

4026
   "name": "PA_CL_VPORT_XSCALE_14"

4027
  },

4028
  {

4029
   "chips": ["gfx7"],

4030
   "map": {"at": 165264, "to": "mm"},

4031
   "name": "PA_CL_VPORT_XOFFSET_14"

4032
  },

4033
  {

4034
   "chips": ["gfx7"],

4035
   "map": {"at": 165268, "to": "mm"},

4036
   "name": "PA_CL_VPORT_YSCALE_14"

4037
  },

4038
  {

4039
   "chips": ["gfx7"],

4040
   "map": {"at": 165272, "to": "mm"},

4041
   "name": "PA_CL_VPORT_YOFFSET_14"

4042
  },

4043
  {

4044
   "chips": ["gfx7"],

4045
   "map": {"at": 165276, "to": "mm"},

4046
   "name": "PA_CL_VPORT_ZSCALE_14"

4047
  },

4048
  {

4049
   "chips": ["gfx7"],

4050
   "map": {"at": 165280, "to": "mm"},

4051
   "name": "PA_CL_VPORT_ZOFFSET_14"

4052
  },

4053
  {

4054
   "chips": ["gfx7"],

4055
   "map": {"at": 165284, "to": "mm"},

4056
   "name": "PA_CL_VPORT_XSCALE_15"

4057
  },

4058
  {

4059
   "chips": ["gfx7"],

4060
   "map": {"at": 165288, "to": "mm"},

4061
   "name": "PA_CL_VPORT_XOFFSET_15"

4062
  },

4063
  {

4064
   "chips": ["gfx7"],

4065
   "map": {"at": 165292, "to": "mm"},

4066
   "name": "PA_CL_VPORT_YSCALE_15"

4067
  },

4068
  {

4069
   "chips": ["gfx7"],

4070
   "map": {"at": 165296, "to": "mm"},

4071
   "name": "PA_CL_VPORT_YOFFSET_15"

4072
  },

4073
  {

4074
   "chips": ["gfx7"],

4075
   "map": {"at": 165300, "to": "mm"},

4076
   "name": "PA_CL_VPORT_ZSCALE_15"

4077
  },

4078
  {

4079
   "chips": ["gfx7"],

4080
   "map": {"at": 165304, "to": "mm"},

4081
   "name": "PA_CL_VPORT_ZOFFSET_15"

4082
  },

4083
  {

4084
   "chips": ["gfx7"],

4085
   "map": {"at": 165308, "to": "mm"},

4086
   "name": "PA_CL_UCP_0_X"

4087
  },

4088
  {

4089
   "chips": ["gfx7"],

4090
   "map": {"at": 165312, "to": "mm"},

4091
   "name": "PA_CL_UCP_0_Y"

4092
  },

4093
  {

4094
   "chips": ["gfx7"],

4095
   "map": {"at": 165316, "to": "mm"},

4096
   "name": "PA_CL_UCP_0_Z"

4097
  },

4098
  {

4099
   "chips": ["gfx7"],

4100
   "map": {"at": 165320, "to": "mm"},

4101
   "name": "PA_CL_UCP_0_W"

4102
  },

4103
  {

4104
   "chips": ["gfx7"],

4105
   "map": {"at": 165324, "to": "mm"},

4106
   "name": "PA_CL_UCP_1_X"

4107
  },

4108
  {

4109
   "chips": ["gfx7"],

4110
   "map": {"at": 165328, "to": "mm"},

4111
   "name": "PA_CL_UCP_1_Y"

4112
  },

4113
  {

4114
   "chips": ["gfx7"],

4115
   "map": {"at": 165332, "to": "mm"},

4116
   "name": "PA_CL_UCP_1_Z"

4117
  },

4118
  {

4119
   "chips": ["gfx7"],

4120
   "map": {"at": 165336, "to": "mm"},

4121
   "name": "PA_CL_UCP_1_W"

4122
  },

4123
  {

4124
   "chips": ["gfx7"],

4125
   "map": {"at": 165340, "to": "mm"},

4126
   "name": "PA_CL_UCP_2_X"

4127
  },

4128
  {

4129
   "chips": ["gfx7"],

4130
   "map": {"at": 165344, "to": "mm"},

4131
   "name": "PA_CL_UCP_2_Y"

4132
  },

4133
  {

4134
   "chips": ["gfx7"],

4135
   "map": {"at": 165348, "to": "mm"},

4136
   "name": "PA_CL_UCP_2_Z"

4137
  },

4138
  {

4139
   "chips": ["gfx7"],

4140
   "map": {"at": 165352, "to": "mm"},

4141
   "name": "PA_CL_UCP_2_W"

4142
  },

4143
  {

4144
   "chips": ["gfx7"],

4145
   "map": {"at": 165356, "to": "mm"},

4146
   "name": "PA_CL_UCP_3_X"

4147
  },

4148
  {

4149
   "chips": ["gfx7"],

4150
   "map": {"at": 165360, "to": "mm"},

4151
   "name": "PA_CL_UCP_3_Y"

4152
  },

4153
  {

4154
   "chips": ["gfx7"],

4155
   "map": {"at": 165364, "to": "mm"},

4156
   "name": "PA_CL_UCP_3_Z"

4157
  },

4158
  {

4159
   "chips": ["gfx7"],

4160
   "map": {"at": 165368, "to": "mm"},

4161
   "name": "PA_CL_UCP_3_W"

4162
  },

4163
  {

4164
   "chips": ["gfx7"],

4165
   "map": {"at": 165372, "to": "mm"},

4166
   "name": "PA_CL_UCP_4_X"

4167
  },

4168
  {

4169
   "chips": ["gfx7"],

4170
   "map": {"at": 165376, "to": "mm"},

4171
   "name": "PA_CL_UCP_4_Y"

4172
  },

4173
  {

4174
   "chips": ["gfx7"],

4175
   "map": {"at": 165380, "to": "mm"},

4176
   "name": "PA_CL_UCP_4_Z"

4177
  },

4178
  {

4179
   "chips": ["gfx7"],

4180
   "map": {"at": 165384, "to": "mm"},

4181
   "name": "PA_CL_UCP_4_W"

4182
  },

4183
  {

4184
   "chips": ["gfx7"],

4185
   "map": {"at": 165388, "to": "mm"},

4186
   "name": "PA_CL_UCP_5_X"

4187
  },

4188
  {

4189
   "chips": ["gfx7"],

4190
   "map": {"at": 165392, "to": "mm"},

4191
   "name": "PA_CL_UCP_5_Y"

4192
  },

4193
  {

4194
   "chips": ["gfx7"],

4195
   "map": {"at": 165396, "to": "mm"},

4196
   "name": "PA_CL_UCP_5_Z"

4197
  },

4198
  {

4199
   "chips": ["gfx7"],

4200
   "map": {"at": 165400, "to": "mm"},

4201
   "name": "PA_CL_UCP_5_W"

4202
  },

4203
  {

4204
   "chips": ["gfx7"],

4205
   "map": {"at": 165444, "to": "mm"},

4206
   "name": "SPI_PS_INPUT_CNTL_0",

4207
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4208
  },

4209
  {

4210
   "chips": ["gfx7"],

4211
   "map": {"at": 165448, "to": "mm"},

4212
   "name": "SPI_PS_INPUT_CNTL_1",

4213
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4214
  },

4215
  {

4216
   "chips": ["gfx7"],

4217
   "map": {"at": 165452, "to": "mm"},

4218
   "name": "SPI_PS_INPUT_CNTL_2",

4219
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4220
  },

4221
  {

4222
   "chips": ["gfx7"],

4223
   "map": {"at": 165456, "to": "mm"},

4224
   "name": "SPI_PS_INPUT_CNTL_3",

4225
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4226
  },

4227
  {

4228
   "chips": ["gfx7"],

4229
   "map": {"at": 165460, "to": "mm"},

4230
   "name": "SPI_PS_INPUT_CNTL_4",

4231
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4232
  },

4233
  {

4234
   "chips": ["gfx7"],

4235
   "map": {"at": 165464, "to": "mm"},

4236
   "name": "SPI_PS_INPUT_CNTL_5",

4237
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4238
  },

4239
  {

4240
   "chips": ["gfx7"],

4241
   "map": {"at": 165468, "to": "mm"},

4242
   "name": "SPI_PS_INPUT_CNTL_6",

4243
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4244
  },

4245
  {

4246
   "chips": ["gfx7"],

4247
   "map": {"at": 165472, "to": "mm"},

4248
   "name": "SPI_PS_INPUT_CNTL_7",

4249
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4250
  },

4251
  {

4252
   "chips": ["gfx7"],

4253
   "map": {"at": 165476, "to": "mm"},

4254
   "name": "SPI_PS_INPUT_CNTL_8",

4255
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4256
  },

4257
  {

4258
   "chips": ["gfx7"],

4259
   "map": {"at": 165480, "to": "mm"},

4260
   "name": "SPI_PS_INPUT_CNTL_9",

4261
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4262
  },

4263
  {

4264
   "chips": ["gfx7"],

4265
   "map": {"at": 165484, "to": "mm"},

4266
   "name": "SPI_PS_INPUT_CNTL_10",

4267
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4268
  },

4269
  {

4270
   "chips": ["gfx7"],

4271
   "map": {"at": 165488, "to": "mm"},

4272
   "name": "SPI_PS_INPUT_CNTL_11",

4273
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4274
  },

4275
  {

4276
   "chips": ["gfx7"],

4277
   "map": {"at": 165492, "to": "mm"},

4278
   "name": "SPI_PS_INPUT_CNTL_12",

4279
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4280
  },

4281
  {

4282
   "chips": ["gfx7"],

4283
   "map": {"at": 165496, "to": "mm"},

4284
   "name": "SPI_PS_INPUT_CNTL_13",

4285
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4286
  },

4287
  {

4288
   "chips": ["gfx7"],

4289
   "map": {"at": 165500, "to": "mm"},

4290
   "name": "SPI_PS_INPUT_CNTL_14",

4291
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4292
  },

4293
  {

4294
   "chips": ["gfx7"],

4295
   "map": {"at": 165504, "to": "mm"},

4296
   "name": "SPI_PS_INPUT_CNTL_15",

4297
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4298
  },

4299
  {

4300
   "chips": ["gfx7"],

4301
   "map": {"at": 165508, "to": "mm"},

4302
   "name": "SPI_PS_INPUT_CNTL_16",

4303
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4304
  },

4305
  {

4306
   "chips": ["gfx7"],

4307
   "map": {"at": 165512, "to": "mm"},

4308
   "name": "SPI_PS_INPUT_CNTL_17",

4309
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4310
  },

4311
  {

4312
   "chips": ["gfx7"],

4313
   "map": {"at": 165516, "to": "mm"},

4314
   "name": "SPI_PS_INPUT_CNTL_18",

4315
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4316
  },

4317
  {

4318
   "chips": ["gfx7"],

4319
   "map": {"at": 165520, "to": "mm"},

4320
   "name": "SPI_PS_INPUT_CNTL_19",

4321
   "type_ref": "SPI_PS_INPUT_CNTL_0"

4322
  },

4323
  {

4324
   "chips": ["gfx7"],

4325
   "map": {"at": 165524, "to": "mm"},

4326
   "name": "SPI_PS_INPUT_CNTL_20",

4327
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4328
  },

4329
  {

4330
   "chips": ["gfx7"],

4331
   "map": {"at": 165528, "to": "mm"},

4332
   "name": "SPI_PS_INPUT_CNTL_21",

4333
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4334
  },

4335
  {

4336
   "chips": ["gfx7"],

4337
   "map": {"at": 165532, "to": "mm"},

4338
   "name": "SPI_PS_INPUT_CNTL_22",

4339
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4340
  },

4341
  {

4342
   "chips": ["gfx7"],

4343
   "map": {"at": 165536, "to": "mm"},

4344
   "name": "SPI_PS_INPUT_CNTL_23",

4345
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4346
  },

4347
  {

4348
   "chips": ["gfx7"],

4349
   "map": {"at": 165540, "to": "mm"},

4350
   "name": "SPI_PS_INPUT_CNTL_24",

4351
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4352
  },

4353
  {

4354
   "chips": ["gfx7"],

4355
   "map": {"at": 165544, "to": "mm"},

4356
   "name": "SPI_PS_INPUT_CNTL_25",

4357
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4358
  },

4359
  {

4360
   "chips": ["gfx7"],

4361
   "map": {"at": 165548, "to": "mm"},

4362
   "name": "SPI_PS_INPUT_CNTL_26",

4363
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4364
  },

4365
  {

4366
   "chips": ["gfx7"],

4367
   "map": {"at": 165552, "to": "mm"},

4368
   "name": "SPI_PS_INPUT_CNTL_27",

4369
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4370
  },

4371
  {

4372
   "chips": ["gfx7"],

4373
   "map": {"at": 165556, "to": "mm"},

4374
   "name": "SPI_PS_INPUT_CNTL_28",

4375
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4376
  },

4377
  {

4378
   "chips": ["gfx7"],

4379
   "map": {"at": 165560, "to": "mm"},

4380
   "name": "SPI_PS_INPUT_CNTL_29",

4381
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4382
  },

4383
  {

4384
   "chips": ["gfx7"],

4385
   "map": {"at": 165564, "to": "mm"},

4386
   "name": "SPI_PS_INPUT_CNTL_30",

4387
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4388
  },

4389
  {

4390
   "chips": ["gfx7"],

4391
   "map": {"at": 165568, "to": "mm"},

4392
   "name": "SPI_PS_INPUT_CNTL_31",

4393
   "type_ref": "SPI_PS_INPUT_CNTL_20"

4394
  },

4395
  {

4396
   "chips": ["gfx7"],

4397
   "map": {"at": 165572, "to": "mm"},

4398
   "name": "SPI_VS_OUT_CONFIG",

4399
   "type_ref": "SPI_VS_OUT_CONFIG"

4400
  },

4401
  {

4402
   "chips": ["gfx7"],

4403
   "map": {"at": 165580, "to": "mm"},

4404
   "name": "SPI_PS_INPUT_ENA",

4405
   "type_ref": "SPI_PS_INPUT_ENA"

4406
  },

4407
  {

4408
   "chips": ["gfx7"],

4409
   "map": {"at": 165584, "to": "mm"},

4410
   "name": "SPI_PS_INPUT_ADDR",

4411
   "type_ref": "SPI_PS_INPUT_ENA"

4412
  },

4413
  {

4414
   "chips": ["gfx7"],

4415
   "map": {"at": 165588, "to": "mm"},

4416
   "name": "SPI_INTERP_CONTROL_0",

4417
   "type_ref": "SPI_INTERP_CONTROL_0"

4418
  },

4419
  {

4420
   "chips": ["gfx7"],

4421
   "map": {"at": 165592, "to": "mm"},

4422
   "name": "SPI_PS_IN_CONTROL",

4423
   "type_ref": "SPI_PS_IN_CONTROL"

4424
  },

4425
  {

4426
   "chips": ["gfx7"],

4427
   "map": {"at": 165600, "to": "mm"},

4428
   "name": "SPI_BARYC_CNTL",

4429
   "type_ref": "SPI_BARYC_CNTL"

4430
  },

4431
  {

4432
   "chips": ["gfx7"],

4433
   "map": {"at": 165608, "to": "mm"},

4434
   "name": "SPI_TMPRING_SIZE",

4435
   "type_ref": "COMPUTE_TMPRING_SIZE"

4436
  },

4437
  {

4438
   "chips": ["gfx7"],

4439
   "map": {"at": 165644, "to": "mm"},

4440
   "name": "SPI_SHADER_POS_FORMAT",

4441
   "type_ref": "SPI_SHADER_POS_FORMAT"

4442
  },

4443
  {

4444
   "chips": ["gfx7"],

4445
   "map": {"at": 165648, "to": "mm"},

4446
   "name": "SPI_SHADER_Z_FORMAT",

4447
   "type_ref": "SPI_SHADER_Z_FORMAT"

4448
  },

4449
  {

4450
   "chips": ["gfx7"],

4451
   "map": {"at": 165652, "to": "mm"},

4452
   "name": "SPI_SHADER_COL_FORMAT",

4453
   "type_ref": "SPI_SHADER_COL_FORMAT"

4454
  },

4455
  {

4456
   "chips": ["gfx7"],

4457
   "map": {"at": 165760, "to": "mm"},

4458
   "name": "CB_BLEND0_CONTROL",

4459
   "type_ref": "CB_BLEND0_CONTROL"

4460
  },

4461
  {

4462
   "chips": ["gfx7"],

4463
   "map": {"at": 165764, "to": "mm"},

4464
   "name": "CB_BLEND1_CONTROL",

4465
   "type_ref": "CB_BLEND0_CONTROL"

4466
  },

4467
  {

4468
   "chips": ["gfx7"],

4469
   "map": {"at": 165768, "to": "mm"},

4470
   "name": "CB_BLEND2_CONTROL",

4471
   "type_ref": "CB_BLEND0_CONTROL"

4472
  },

4473
  {

4474
   "chips": ["gfx7"],

4475
   "map": {"at": 165772, "to": "mm"},

4476
   "name": "CB_BLEND3_CONTROL",

4477
   "type_ref": "CB_BLEND0_CONTROL"

4478
  },

4479
  {

4480
   "chips": ["gfx7"],

4481
   "map": {"at": 165776, "to": "mm"},

4482
   "name": "CB_BLEND4_CONTROL",

4483
   "type_ref": "CB_BLEND0_CONTROL"

4484
  },

4485
  {

4486
   "chips": ["gfx7"],

4487
   "map": {"at": 165780, "to": "mm"},

4488
   "name": "CB_BLEND5_CONTROL",

4489
   "type_ref": "CB_BLEND0_CONTROL"

4490
  },

4491
  {

4492
   "chips": ["gfx7"],

4493
   "map": {"at": 165784, "to": "mm"},

4494
   "name": "CB_BLEND6_CONTROL",

4495
   "type_ref": "CB_BLEND0_CONTROL"

4496
  },

4497
  {

4498
   "chips": ["gfx7"],

4499
   "map": {"at": 165788, "to": "mm"},

4500
   "name": "CB_BLEND7_CONTROL",

4501
   "type_ref": "CB_BLEND0_CONTROL"

4502
  },

4503
  {

4504
   "chips": ["gfx7"],

4505
   "map": {"at": 165836, "to": "mm"},

4506
   "name": "CS_COPY_STATE",

4507
   "type_ref": "CS_COPY_STATE"

4508
  },

4509
  {

4510
   "chips": ["gfx7"],

4511
   "map": {"at": 165840, "to": "mm"},

4512
   "name": "GFX_COPY_STATE",

4513
   "type_ref": "CS_COPY_STATE"

4514
  },

4515
  {

4516
   "chips": ["gfx7"],

4517
   "map": {"at": 165844, "to": "mm"},

4518
   "name": "PA_CL_POINT_X_RAD"

4519
  },

4520
  {

4521
   "chips": ["gfx7"],

4522
   "map": {"at": 165848, "to": "mm"},

4523
   "name": "PA_CL_POINT_Y_RAD"

4524
  },

4525
  {

4526
   "chips": ["gfx7"],

4527
   "map": {"at": 165852, "to": "mm"},

4528
   "name": "PA_CL_POINT_SIZE"

4529
  },

4530
  {

4531
   "chips": ["gfx7"],

4532
   "map": {"at": 165856, "to": "mm"},

4533
   "name": "PA_CL_POINT_CULL_RAD"

4534
  },

4535
  {

4536
   "chips": ["gfx7"],

4537
   "map": {"at": 165860, "to": "mm"},

4538
   "name": "VGT_DMA_BASE_HI",

4539
   "type_ref": "VGT_DMA_BASE_HI"

4540
  },

4541
  {

4542
   "chips": ["gfx7"],

4543
   "map": {"at": 165864, "to": "mm"},

4544
   "name": "VGT_DMA_BASE"

4545
  },

4546
  {

4547
   "chips": ["gfx7"],

4548
   "map": {"at": 165872, "to": "mm"},

4549
   "name": "VGT_DRAW_INITIATOR",

4550
   "type_ref": "VGT_DRAW_INITIATOR"

4551
  },

4552
  {

4553
   "chips": ["gfx7"],

4554
   "map": {"at": 165876, "to": "mm"},

4555
   "name": "VGT_IMMED_DATA"

4556
  },

4557
  {

4558
   "chips": ["gfx7"],

4559
   "map": {"at": 165880, "to": "mm"},

4560
   "name": "VGT_EVENT_ADDRESS_REG",

4561
   "type_ref": "VGT_EVENT_ADDRESS_REG"

4562
  },

4563
  {

4564
   "chips": ["gfx7"],

4565
   "map": {"at": 165888, "to": "mm"},

4566
   "name": "DB_DEPTH_CONTROL",

4567
   "type_ref": "DB_DEPTH_CONTROL"

4568
  },

4569
  {

4570
   "chips": ["gfx7"],

4571
   "map": {"at": 165892, "to": "mm"},

4572
   "name": "DB_EQAA",

4573
   "type_ref": "DB_EQAA"

4574
  },

4575
  {

4576
   "chips": ["gfx7"],

4577
   "map": {"at": 165896, "to": "mm"},

4578
   "name": "CB_COLOR_CONTROL",

4579
   "type_ref": "CB_COLOR_CONTROL"

4580
  },

4581
  {

4582
   "chips": ["gfx7"],

4583
   "map": {"at": 165900, "to": "mm"},

4584
   "name": "DB_SHADER_CONTROL",

4585
   "type_ref": "DB_SHADER_CONTROL"

4586
  },

4587
  {

4588
   "chips": ["gfx7"],

4589
   "map": {"at": 165904, "to": "mm"},

4590
   "name": "PA_CL_CLIP_CNTL",

4591
   "type_ref": "PA_CL_CLIP_CNTL"

4592
  },

4593
  {

4594
   "chips": ["gfx7"],

4595
   "map": {"at": 165908, "to": "mm"},

4596
   "name": "PA_SU_SC_MODE_CNTL",

4597
   "type_ref": "PA_SU_SC_MODE_CNTL"

4598
  },

4599
  {

4600
   "chips": ["gfx7"],

4601
   "map": {"at": 165912, "to": "mm"},

4602
   "name": "PA_CL_VTE_CNTL",

4603
   "type_ref": "PA_CL_VTE_CNTL"

4604
  },

4605
  {

4606
   "chips": ["gfx7"],

4607
   "map": {"at": 165916, "to": "mm"},

4608
   "name": "PA_CL_VS_OUT_CNTL",

4609
   "type_ref": "PA_CL_VS_OUT_CNTL"

4610
  },

4611
  {

4612
   "chips": ["gfx7"],

4613
   "map": {"at": 165920, "to": "mm"},

4614
   "name": "PA_CL_NANINF_CNTL",

4615
   "type_ref": "PA_CL_NANINF_CNTL"

4616
  },

4617
  {

4618
   "chips": ["gfx7"],

4619
   "map": {"at": 165924, "to": "mm"},

4620
   "name": "PA_SU_LINE_STIPPLE_CNTL",

4621
   "type_ref": "PA_SU_LINE_STIPPLE_CNTL"

4622
  },

4623
  {

4624
   "chips": ["gfx7"],

4625
   "map": {"at": 165928, "to": "mm"},

4626
   "name": "PA_SU_LINE_STIPPLE_SCALE"

4627
  },

4628
  {

4629
   "chips": ["gfx7"],

4630
   "map": {"at": 165932, "to": "mm"},

4631
   "name": "PA_SU_PRIM_FILTER_CNTL",

4632
   "type_ref": "PA_SU_PRIM_FILTER_CNTL"

4633
  },

4634
  {

4635
   "chips": ["gfx7"],

4636
   "map": {"at": 166400, "to": "mm"},

4637
   "name": "PA_SU_POINT_SIZE",

4638
   "type_ref": "PA_SU_POINT_SIZE"

4639
  },

4640
  {

4641
   "chips": ["gfx7"],

4642
   "map": {"at": 166404, "to": "mm"},

4643
   "name": "PA_SU_POINT_MINMAX",

4644
   "type_ref": "PA_SU_POINT_MINMAX"

4645
  },

4646
  {

4647
   "chips": ["gfx7"],

4648
   "map": {"at": 166408, "to": "mm"},

4649
   "name": "PA_SU_LINE_CNTL",

4650
   "type_ref": "PA_SU_LINE_CNTL"

4651
  },

4652
  {

4653
   "chips": ["gfx7"],

4654
   "map": {"at": 166412, "to": "mm"},

4655
   "name": "PA_SC_LINE_STIPPLE",

4656
   "type_ref": "PA_SC_LINE_STIPPLE"

4657
  },

4658
  {

4659
   "chips": ["gfx7"],

4660
   "map": {"at": 166416, "to": "mm"},

4661
   "name": "VGT_OUTPUT_PATH_CNTL",

4662
   "type_ref": "VGT_OUTPUT_PATH_CNTL"

4663
  },

4664
  {

4665
   "chips": ["gfx7"],

4666
   "map": {"at": 166420, "to": "mm"},

4667
   "name": "VGT_HOS_CNTL",

4668
   "type_ref": "VGT_HOS_CNTL"

4669
  },

4670
  {

4671
   "chips": ["gfx7"],

4672
   "map": {"at": 166424, "to": "mm"},

4673
   "name": "VGT_HOS_MAX_TESS_LEVEL"

4674
  },

4675
  {

4676
   "chips": ["gfx7"],

4677
   "map": {"at": 166428, "to": "mm"},

4678
   "name": "VGT_HOS_MIN_TESS_LEVEL"

4679
  },

4680
  {

4681
   "chips": ["gfx7"],

4682
   "map": {"at": 166432, "to": "mm"},

4683
   "name": "VGT_HOS_REUSE_DEPTH",

4684
   "type_ref": "VGT_HOS_REUSE_DEPTH"

4685
  },

4686
  {

4687
   "chips": ["gfx7"],

4688
   "map": {"at": 166436, "to": "mm"},

4689
   "name": "VGT_GROUP_PRIM_TYPE",

4690
   "type_ref": "VGT_GROUP_PRIM_TYPE"

4691
  },

4692
  {

4693
   "chips": ["gfx7"],

4694
   "map": {"at": 166440, "to": "mm"},

4695
   "name": "VGT_GROUP_FIRST_DECR",

4696
   "type_ref": "VGT_GROUP_FIRST_DECR"

4697
  },

4698
  {

4699
   "chips": ["gfx7"],

4700
   "map": {"at": 166444, "to": "mm"},

4701
   "name": "VGT_GROUP_DECR",

4702
   "type_ref": "VGT_GROUP_DECR"

4703
  },

4704
  {

4705
   "chips": ["gfx7"],

4706
   "map": {"at": 166448, "to": "mm"},

4707
   "name": "VGT_GROUP_VECT_0_CNTL",

4708
   "type_ref": "VGT_GROUP_VECT_0_CNTL"

4709
  },

4710
  {

4711
   "chips": ["gfx7"],

4712
   "map": {"at": 166452, "to": "mm"},

4713
   "name": "VGT_GROUP_VECT_1_CNTL",

4714
   "type_ref": "VGT_GROUP_VECT_0_CNTL"

4715
  },

4716
  {

4717
   "chips": ["gfx7"],

4718
   "map": {"at": 166456, "to": "mm"},

4719
   "name": "VGT_GROUP_VECT_0_FMT_CNTL",

4720
   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"

4721
  },

4722
  {

4723
   "chips": ["gfx7"],

4724
   "map": {"at": 166460, "to": "mm"},

4725
   "name": "VGT_GROUP_VECT_1_FMT_CNTL",

4726
   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"

4727
  },

4728
  {

4729
   "chips": ["gfx7"],

4730
   "map": {"at": 166464, "to": "mm"},

4731
   "name": "VGT_GS_MODE",

4732
   "type_ref": "VGT_GS_MODE"

4733
  },

4734
  {

4735
   "chips": ["gfx7"],

4736
   "map": {"at": 166468, "to": "mm"},

4737
   "name": "VGT_GS_ONCHIP_CNTL",

4738
   "type_ref": "VGT_GS_ONCHIP_CNTL"

4739
  },

4740
  {

4741
   "chips": ["gfx7"],

4742
   "map": {"at": 166472, "to": "mm"},

4743
   "name": "PA_SC_MODE_CNTL_0",

4744
   "type_ref": "PA_SC_MODE_CNTL_0"

4745
  },

4746
  {

4747
   "chips": ["gfx7"],

4748
   "map": {"at": 166476, "to": "mm"},

4749
   "name": "PA_SC_MODE_CNTL_1",

4750
   "type_ref": "PA_SC_MODE_CNTL_1"

4751
  },

4752
  {

4753
   "chips": ["gfx7"],

4754
   "map": {"at": 166480, "to": "mm"},

4755
   "name": "VGT_ENHANCE"

4756
  },

4757
  {

4758
   "chips": ["gfx7"],

4759
   "map": {"at": 166484, "to": "mm"},

4760
   "name": "VGT_GS_PER_ES",

4761
   "type_ref": "VGT_GS_PER_ES"

4762
  },

4763
  {

4764
   "chips": ["gfx7"],

4765
   "map": {"at": 166488, "to": "mm"},

4766
   "name": "VGT_ES_PER_GS",

4767
   "type_ref": "VGT_ES_PER_GS"

4768
  },

4769
  {

4770
   "chips": ["gfx7"],

4771
   "map": {"at": 166492, "to": "mm"},

4772
   "name": "VGT_GS_PER_VS",

4773
   "type_ref": "VGT_GS_PER_VS"

4774
  },

4775
  {

4776
   "chips": ["gfx7"],

4777
   "map": {"at": 166496, "to": "mm"},

4778
   "name": "VGT_GSVS_RING_OFFSET_1",

4779
   "type_ref": "VGT_GSVS_RING_OFFSET_1"

4780
  },

4781
  {

4782
   "chips": ["gfx7"],

4783
   "map": {"at": 166500, "to": "mm"},

4784
   "name": "VGT_GSVS_RING_OFFSET_2",

4785
   "type_ref": "VGT_GSVS_RING_OFFSET_1"

4786
  },

4787
  {

4788
   "chips": ["gfx7"],

4789
   "map": {"at": 166504, "to": "mm"},

4790
   "name": "VGT_GSVS_RING_OFFSET_3",

4791
   "type_ref": "VGT_GSVS_RING_OFFSET_1"

4792
  },

4793
  {

4794
   "chips": ["gfx7"],

4795
   "map": {"at": 166508, "to": "mm"},

4796
   "name": "VGT_GS_OUT_PRIM_TYPE",

4797
   "type_ref": "VGT_GS_OUT_PRIM_TYPE"

4798
  },

4799
  {

4800
   "chips": ["gfx7"],

4801
   "map": {"at": 166512, "to": "mm"},

4802
   "name": "IA_ENHANCE"

4803
  },

4804
  {

4805
   "chips": ["gfx7"],

4806
   "map": {"at": 166516, "to": "mm"},

4807
   "name": "VGT_DMA_SIZE"

4808
  },

4809
  {

4810
   "chips": ["gfx7"],

4811
   "map": {"at": 166520, "to": "mm"},

4812
   "name": "VGT_DMA_MAX_SIZE"

4813
  },

4814
  {

4815
   "chips": ["gfx7"],

4816
   "map": {"at": 166524, "to": "mm"},

4817
   "name": "VGT_DMA_INDEX_TYPE",

4818
   "type_ref": "VGT_DMA_INDEX_TYPE"

4819
  },

4820
  {

4821
   "chips": ["gfx7"],

4822
   "map": {"at": 166528, "to": "mm"},

4823
   "name": "WD_ENHANCE"

4824
  },

4825
  {

4826
   "chips": ["gfx7"],

4827
   "map": {"at": 166532, "to": "mm"},

4828
   "name": "VGT_PRIMITIVEID_EN",

4829
   "type_ref": "VGT_PRIMITIVEID_EN"

4830
  },

4831
  {

4832
   "chips": ["gfx7"],

4833
   "map": {"at": 166536, "to": "mm"},

4834
   "name": "VGT_DMA_NUM_INSTANCES"

4835
  },

4836
  {

4837
   "chips": ["gfx7"],

4838
   "map": {"at": 166540, "to": "mm"},

4839
   "name": "VGT_PRIMITIVEID_RESET"

4840
  },

4841
  {

4842
   "chips": ["gfx7"],

4843
   "map": {"at": 166544, "to": "mm"},

4844
   "name": "VGT_EVENT_INITIATOR",

4845
   "type_ref": "VGT_EVENT_INITIATOR"

4846
  },

4847
  {

4848
   "chips": ["gfx7"],

4849
   "map": {"at": 166548, "to": "mm"},

4850
   "name": "VGT_MULTI_PRIM_IB_RESET_EN",

4851
   "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"

4852
  },

4853
  {

4854
   "chips": ["gfx7"],

4855
   "map": {"at": 166560, "to": "mm"},

4856
   "name": "VGT_INSTANCE_STEP_RATE_0"

4857
  },

4858
  {

4859
   "chips": ["gfx7"],

4860
   "map": {"at": 166564, "to": "mm"},

4861
   "name": "VGT_INSTANCE_STEP_RATE_1"

4862
  },

4863
  {

4864
   "chips": ["gfx7"],

4865
   "map": {"at": 166568, "to": "mm"},

4866
   "name": "IA_MULTI_VGT_PARAM",

4867
   "type_ref": "IA_MULTI_VGT_PARAM"

4868
  },

4869
  {

4870
   "chips": ["gfx7"],

4871
   "map": {"at": 166572, "to": "mm"},

4872
   "name": "VGT_ESGS_RING_ITEMSIZE",

4873
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

4874
  },

4875
  {

4876
   "chips": ["gfx7"],

4877
   "map": {"at": 166576, "to": "mm"},

4878
   "name": "VGT_GSVS_RING_ITEMSIZE",

4879
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

4880
  },

4881
  {

4882
   "chips": ["gfx7"],

4883
   "map": {"at": 166580, "to": "mm"},

4884
   "name": "VGT_REUSE_OFF",

4885
   "type_ref": "VGT_REUSE_OFF"

4886
  },

4887
  {

4888
   "chips": ["gfx7"],

4889
   "map": {"at": 166584, "to": "mm"},

4890
   "name": "VGT_VTX_CNT_EN",

4891
   "type_ref": "VGT_VTX_CNT_EN"

4892
  },

4893
  {

4894
   "chips": ["gfx7"],

4895
   "map": {"at": 166588, "to": "mm"},

4896
   "name": "DB_HTILE_SURFACE",

4897
   "type_ref": "DB_HTILE_SURFACE"

4898
  },

4899
  {

4900
   "chips": ["gfx7"],

4901
   "map": {"at": 166592, "to": "mm"},

4902
   "name": "DB_SRESULTS_COMPARE_STATE0",

4903
   "type_ref": "DB_SRESULTS_COMPARE_STATE0"

4904
  },

4905
  {

4906
   "chips": ["gfx7"],

4907
   "map": {"at": 166596, "to": "mm"},

4908
   "name": "DB_SRESULTS_COMPARE_STATE1",

4909
   "type_ref": "DB_SRESULTS_COMPARE_STATE1"

4910
  },

4911
  {

4912
   "chips": ["gfx7"],

4913
   "map": {"at": 166600, "to": "mm"},

4914
   "name": "DB_PRELOAD_CONTROL",

4915
   "type_ref": "DB_PRELOAD_CONTROL"

4916
  },

4917
  {

4918
   "chips": ["gfx7"],

4919
   "map": {"at": 166608, "to": "mm"},

4920
   "name": "VGT_STRMOUT_BUFFER_SIZE_0"

4921
  },

4922
  {

4923
   "chips": ["gfx7"],

4924
   "map": {"at": 166612, "to": "mm"},

4925
   "name": "VGT_STRMOUT_VTX_STRIDE_0",

4926
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"

4927
  },

4928
  {

4929
   "chips": ["gfx7"],

4930
   "map": {"at": 166620, "to": "mm"},

4931
   "name": "VGT_STRMOUT_BUFFER_OFFSET_0"

4932
  },

4933
  {

4934
   "chips": ["gfx7"],

4935
   "map": {"at": 166624, "to": "mm"},

4936
   "name": "VGT_STRMOUT_BUFFER_SIZE_1"

4937
  },

4938
  {

4939
   "chips": ["gfx7"],

4940
   "map": {"at": 166628, "to": "mm"},

4941
   "name": "VGT_STRMOUT_VTX_STRIDE_1",

4942
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"

4943
  },

4944
  {

4945
   "chips": ["gfx7"],

4946
   "map": {"at": 166636, "to": "mm"},

4947
   "name": "VGT_STRMOUT_BUFFER_OFFSET_1"

4948
  },

4949
  {

4950
   "chips": ["gfx7"],

4951
   "map": {"at": 166640, "to": "mm"},

4952
   "name": "VGT_STRMOUT_BUFFER_SIZE_2"

4953
  },

4954
  {

4955
   "chips": ["gfx7"],

4956
   "map": {"at": 166644, "to": "mm"},

4957
   "name": "VGT_STRMOUT_VTX_STRIDE_2",

4958
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"

4959
  },

4960
  {

4961
   "chips": ["gfx7"],

4962
   "map": {"at": 166652, "to": "mm"},

4963
   "name": "VGT_STRMOUT_BUFFER_OFFSET_2"

4964
  },

4965
  {

4966
   "chips": ["gfx7"],

4967
   "map": {"at": 166656, "to": "mm"},

4968
   "name": "VGT_STRMOUT_BUFFER_SIZE_3"

4969
  },

4970
  {

4971
   "chips": ["gfx7"],

4972
   "map": {"at": 166660, "to": "mm"},

4973
   "name": "VGT_STRMOUT_VTX_STRIDE_3",

4974
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"

4975
  },

4976
  {

4977
   "chips": ["gfx7"],

4978
   "map": {"at": 166668, "to": "mm"},

4979
   "name": "VGT_STRMOUT_BUFFER_OFFSET_3"

4980
  },

4981
  {

4982
   "chips": ["gfx7"],

4983
   "map": {"at": 166696, "to": "mm"},

4984
   "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"

4985
  },

4986
  {

4987
   "chips": ["gfx7"],

4988
   "map": {"at": 166700, "to": "mm"},

4989
   "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"

4990
  },

4991
  {

4992
   "chips": ["gfx7"],

4993
   "map": {"at": 166704, "to": "mm"},

4994
   "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",

4995
   "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"

4996
  },

4997
  {

4998
   "chips": ["gfx7"],

4999
   "map": {"at": 166712, "to": "mm"},

5000
   "name": "VGT_GS_MAX_VERT_OUT",

5001
   "type_ref": "VGT_GS_MAX_VERT_OUT"

5002
  },

5003
  {

5004
   "chips": ["gfx7"],

5005
   "map": {"at": 166740, "to": "mm"},

5006
   "name": "VGT_SHADER_STAGES_EN",

5007
   "type_ref": "VGT_SHADER_STAGES_EN"

5008
  },

5009
  {

5010
   "chips": ["gfx7"],

5011
   "map": {"at": 166744, "to": "mm"},

5012
   "name": "VGT_LS_HS_CONFIG",

5013
   "type_ref": "VGT_LS_HS_CONFIG"

5014
  },

5015
  {

5016
   "chips": ["gfx7"],

5017
   "map": {"at": 166748, "to": "mm"},

5018
   "name": "VGT_GS_VERT_ITEMSIZE",

5019
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

5020
  },

5021
  {

5022
   "chips": ["gfx7"],

5023
   "map": {"at": 166752, "to": "mm"},

5024
   "name": "VGT_GS_VERT_ITEMSIZE_1",

5025
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

5026
  },

5027
  {

5028
   "chips": ["gfx7"],

5029
   "map": {"at": 166756, "to": "mm"},

5030
   "name": "VGT_GS_VERT_ITEMSIZE_2",

5031
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

5032
  },

5033
  {

5034
   "chips": ["gfx7"],

5035
   "map": {"at": 166760, "to": "mm"},

5036
   "name": "VGT_GS_VERT_ITEMSIZE_3",

5037
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"

5038
  },

5039
  {

5040
   "chips": ["gfx7"],

5041
   "map": {"at": 166764, "to": "mm"},

5042
   "name": "VGT_TF_PARAM",

5043
   "type_ref": "VGT_TF_PARAM"

5044
  },

5045
  {

5046
   "chips": ["gfx7"],

5047
   "map": {"at": 166768, "to": "mm"},

5048
   "name": "DB_ALPHA_TO_MASK",

5049
   "type_ref": "DB_ALPHA_TO_MASK"

5050
  },

5051
  {

5052
   "chips": ["gfx7"],

5053
   "map": {"at": 166772, "to": "mm"},

5054
   "name": "VGT_DISPATCH_DRAW_INDEX"

5055
  },

5056
  {

5057
   "chips": ["gfx7"],

5058
   "map": {"at": 166776, "to": "mm"},

5059
   "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",

5060
   "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"

5061
  },

5062
  {

5063
   "chips": ["gfx7"],

5064
   "map": {"at": 166780, "to": "mm"},

5065
   "name": "PA_SU_POLY_OFFSET_CLAMP"

5066
  },

5067
  {

5068
   "chips": ["gfx7"],

5069
   "map": {"at": 166784, "to": "mm"},

5070
   "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"

5071
  },

5072
  {

5073
   "chips": ["gfx7"],

5074
   "map": {"at": 166788, "to": "mm"},

5075
   "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"

5076
  },

5077
  {

5078
   "chips": ["gfx7"],

5079
   "map": {"at": 166792, "to": "mm"},

5080
   "name": "PA_SU_POLY_OFFSET_BACK_SCALE"

5081
  },

5082
  {

5083
   "chips": ["gfx7"],

5084
   "map": {"at": 166796, "to": "mm"},

5085
   "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"

5086
  },

5087
  {

5088
   "chips": ["gfx7"],

5089
   "map": {"at": 166800, "to": "mm"},

5090
   "name": "VGT_GS_INSTANCE_CNT",

5091
   "type_ref": "VGT_GS_INSTANCE_CNT"

5092
  },

5093
  {

5094
   "chips": ["gfx7"],

5095
   "map": {"at": 166804, "to": "mm"},

5096
   "name": "VGT_STRMOUT_CONFIG",

5097
   "type_ref": "VGT_STRMOUT_CONFIG"

5098
  },

5099
  {

5100
   "chips": ["gfx7"],

5101
   "map": {"at": 166808, "to": "mm"},

5102
   "name": "VGT_STRMOUT_BUFFER_CONFIG",

5103
   "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"

5104
  },

5105
  {

5106
   "chips": ["gfx7"],

5107
   "map": {"at": 166868, "to": "mm"},

5108
   "name": "PA_SC_CENTROID_PRIORITY_0",

5109
   "type_ref": "PA_SC_CENTROID_PRIORITY_0"

5110
  },

5111
  {

5112
   "chips": ["gfx7"],

5113
   "map": {"at": 166872, "to": "mm"},

5114
   "name": "PA_SC_CENTROID_PRIORITY_1",

5115
   "type_ref": "PA_SC_CENTROID_PRIORITY_1"

5116
  },

5117
  {

5118
   "chips": ["gfx7"],

5119
   "map": {"at": 166876, "to": "mm"},

5120
   "name": "PA_SC_LINE_CNTL",

5121
   "type_ref": "PA_SC_LINE_CNTL"

5122
  },

5123
  {

5124
   "chips": ["gfx7"],

5125
   "map": {"at": 166880, "to": "mm"},

5126
   "name": "PA_SC_AA_CONFIG",

5127
   "type_ref": "PA_SC_AA_CONFIG"

5128
  },

5129
  {

5130
   "chips": ["gfx7"],

5131
   "map": {"at": 166884, "to": "mm"},

5132
   "name": "PA_SU_VTX_CNTL",

5133
   "type_ref": "PA_SU_VTX_CNTL"

5134
  },

5135
  {

5136
   "chips": ["gfx7"],

5137
   "map": {"at": 166888, "to": "mm"},

5138
   "name": "PA_CL_GB_VERT_CLIP_ADJ"

5139
  },

5140
  {

5141
   "chips": ["gfx7"],

5142
   "map": {"at": 166892, "to": "mm"},

5143
   "name": "PA_CL_GB_VERT_DISC_ADJ"

5144
  },

5145
  {

5146
   "chips": ["gfx7"],

5147
   "map": {"at": 166896, "to": "mm"},

5148
   "name": "PA_CL_GB_HORZ_CLIP_ADJ"

5149
  },

5150
  {

5151
   "chips": ["gfx7"],

5152
   "map": {"at": 166900, "to": "mm"},

5153
   "name": "PA_CL_GB_HORZ_DISC_ADJ"

5154
  },

5155
  {

5156
   "chips": ["gfx7"],

5157
   "map": {"at": 166904, "to": "mm"},

5158
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",

5159
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"

5160
  },

5161
  {

5162
   "chips": ["gfx7"],

5163
   "map": {"at": 166908, "to": "mm"},

5164
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",

5165
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"

5166
  },

5167
  {

5168
   "chips": ["gfx7"],

5169
   "map": {"at": 166912, "to": "mm"},

5170
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",

5171
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"

5172
  },

5173
  {

5174
   "chips": ["gfx7"],

5175
   "map": {"at": 166916, "to": "mm"},

5176
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",

5177
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"

5178
  },

5179
  {

5180
   "chips": ["gfx7"],

5181
   "map": {"at": 166920, "to": "mm"},

5182
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",

5183
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"

5184
  },

5185
  {

5186
   "chips": ["gfx7"],

5187
   "map": {"at": 166924, "to": "mm"},

5188
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",

5189
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"

5190
  },

5191
  {

5192
   "chips": ["gfx7"],

5193
   "map": {"at": 166928, "to": "mm"},

5194
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",

5195
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"

5196
  },

5197
  {

5198
   "chips": ["gfx7"],

5199
   "map": {"at": 166932, "to": "mm"},

5200
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",

5201
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"

5202
  },

5203
  {

5204
   "chips": ["gfx7"],

5205
   "map": {"at": 166936, "to": "mm"},

5206
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",

5207
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"

5208
  },

5209
  {

5210
   "chips": ["gfx7"],

5211
   "map": {"at": 166940, "to": "mm"},

5212
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",

5213
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"

5214
  },

5215
  {

5216
   "chips": ["gfx7"],

5217
   "map": {"at": 166944, "to": "mm"},

5218
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",

5219
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"

5220
  },

5221
  {

5222
   "chips": ["gfx7"],

5223
   "map": {"at": 166948, "to": "mm"},

5224
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",

5225
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"

5226
  },

5227
  {

5228
   "chips": ["gfx7"],

5229
   "map": {"at": 166952, "to": "mm"},

5230
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",

5231
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"

5232
  },

5233
  {

5234
   "chips": ["gfx7"],

5235
   "map": {"at": 166956, "to": "mm"},

5236
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",

5237
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"

5238
  },

5239
  {

5240
   "chips": ["gfx7"],

5241
   "map": {"at": 166960, "to": "mm"},

5242
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",

5243
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"

5244
  },

5245
  {

5246
   "chips": ["gfx7"],

5247
   "map": {"at": 166964, "to": "mm"},

5248
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",

5249
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"

5250
  },

5251
  {

5252
   "chips": ["gfx7"],

5253
   "map": {"at": 166968, "to": "mm"},

5254
   "name": "PA_SC_AA_MASK_X0Y0_X1Y0",

5255
   "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"

5256
  },

5257
  {

5258
   "chips": ["gfx7"],

5259
   "map": {"at": 166972, "to": "mm"},

5260
   "name": "PA_SC_AA_MASK_X0Y1_X1Y1",

5261
   "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"

5262
  },

5263
  {

5264
   "chips": ["gfx7"],

5265
   "map": {"at": 167000, "to": "mm"},

5266
   "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",

5267
   "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"

5268
  },

5269
  {

5270
   "chips": ["gfx7"],

5271
   "map": {"at": 167004, "to": "mm"},

5272
   "name": "VGT_OUT_DEALLOC_CNTL",

5273
   "type_ref": "VGT_OUT_DEALLOC_CNTL"

5274
  },

5275
  {

5276
   "chips": ["gfx7"],

5277
   "map": {"at": 167008, "to": "mm"},

5278
   "name": "CB_COLOR0_BASE"

5279
  },

5280
  {

5281
   "chips": ["gfx7"],

5282
   "map": {"at": 167012, "to": "mm"},

5283
   "name": "CB_COLOR0_PITCH",

5284
   "type_ref": "CB_COLOR0_PITCH"

5285
  },

5286
  {

5287
   "chips": ["gfx7"],

5288
   "map": {"at": 167016, "to": "mm"},

5289
   "name": "CB_COLOR0_SLICE",

5290
   "type_ref": "CB_COLOR0_SLICE"

5291
  },

5292
  {

5293
   "chips": ["gfx7"],

5294
   "map": {"at": 167020, "to": "mm"},

5295
   "name": "CB_COLOR0_VIEW",

5296
   "type_ref": "CB_COLOR0_VIEW"

5297
  },

5298
  {

5299
   "chips": ["gfx7"],

5300
   "map": {"at": 167024, "to": "mm"},

5301
   "name": "CB_COLOR0_INFO",

5302
   "type_ref": "CB_COLOR0_INFO"

5303
  },

5304
  {

5305
   "chips": ["gfx7"],

5306
   "map": {"at": 167028, "to": "mm"},

5307
   "name": "CB_COLOR0_ATTRIB",

5308
   "type_ref": "CB_COLOR0_ATTRIB"

5309
  },

5310
  {

5311
   "chips": ["gfx7"],

5312
   "map": {"at": 167036, "to": "mm"},

5313
   "name": "CB_COLOR0_CMASK"

5314
  },

5315
  {

5316
   "chips": ["gfx7"],

5317
   "map": {"at": 167040, "to": "mm"},

5318
   "name": "CB_COLOR0_CMASK_SLICE",

5319
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5320
  },

5321
  {

5322
   "chips": ["gfx7"],

5323
   "map": {"at": 167044, "to": "mm"},

5324
   "name": "CB_COLOR0_FMASK"

5325
  },

5326
  {

5327
   "chips": ["gfx7"],

5328
   "map": {"at": 167048, "to": "mm"},

5329
   "name": "CB_COLOR0_FMASK_SLICE",

5330
   "type_ref": "CB_COLOR0_SLICE"

5331
  },

5332
  {

5333
   "chips": ["gfx7"],

5334
   "map": {"at": 167052, "to": "mm"},

5335
   "name": "CB_COLOR0_CLEAR_WORD0"

5336
  },

5337
  {

5338
   "chips": ["gfx7"],

5339
   "map": {"at": 167056, "to": "mm"},

5340
   "name": "CB_COLOR0_CLEAR_WORD1"

5341
  },

5342
  {

5343
   "chips": ["gfx7"],

5344
   "map": {"at": 167068, "to": "mm"},

5345
   "name": "CB_COLOR1_BASE"

5346
  },

5347
  {

5348
   "chips": ["gfx7"],

5349
   "map": {"at": 167072, "to": "mm"},

5350
   "name": "CB_COLOR1_PITCH",

5351
   "type_ref": "CB_COLOR0_PITCH"

5352
  },

5353
  {

5354
   "chips": ["gfx7"],

5355
   "map": {"at": 167076, "to": "mm"},

5356
   "name": "CB_COLOR1_SLICE",

5357
   "type_ref": "CB_COLOR0_SLICE"

5358
  },

5359
  {

5360
   "chips": ["gfx7"],

5361
   "map": {"at": 167080, "to": "mm"},

5362
   "name": "CB_COLOR1_VIEW",

5363
   "type_ref": "CB_COLOR0_VIEW"

5364
  },

5365
  {

5366
   "chips": ["gfx7"],

5367
   "map": {"at": 167084, "to": "mm"},

5368
   "name": "CB_COLOR1_INFO",

5369
   "type_ref": "CB_COLOR0_INFO"

5370
  },

5371
  {

5372
   "chips": ["gfx7"],

5373
   "map": {"at": 167088, "to": "mm"},

5374
   "name": "CB_COLOR1_ATTRIB",

5375
   "type_ref": "CB_COLOR0_ATTRIB"

5376
  },

5377
  {

5378
   "chips": ["gfx7"],

5379
   "map": {"at": 167096, "to": "mm"},

5380
   "name": "CB_COLOR1_CMASK"

5381
  },

5382
  {

5383
   "chips": ["gfx7"],

5384
   "map": {"at": 167100, "to": "mm"},

5385
   "name": "CB_COLOR1_CMASK_SLICE",

5386
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5387
  },

5388
  {

5389
   "chips": ["gfx7"],

5390
   "map": {"at": 167104, "to": "mm"},

5391
   "name": "CB_COLOR1_FMASK"

5392
  },

5393
  {

5394
   "chips": ["gfx7"],

5395
   "map": {"at": 167108, "to": "mm"},

5396
   "name": "CB_COLOR1_FMASK_SLICE",

5397
   "type_ref": "CB_COLOR0_SLICE"

5398
  },

5399
  {

5400
   "chips": ["gfx7"],

5401
   "map": {"at": 167112, "to": "mm"},

5402
   "name": "CB_COLOR1_CLEAR_WORD0"

5403
  },

5404
  {

5405
   "chips": ["gfx7"],

5406
   "map": {"at": 167116, "to": "mm"},

5407
   "name": "CB_COLOR1_CLEAR_WORD1"

5408
  },

5409
  {

5410
   "chips": ["gfx7"],

5411
   "map": {"at": 167128, "to": "mm"},

5412
   "name": "CB_COLOR2_BASE"

5413
  },

5414
  {

5415
   "chips": ["gfx7"],

5416
   "map": {"at": 167132, "to": "mm"},

5417
   "name": "CB_COLOR2_PITCH",

5418
   "type_ref": "CB_COLOR0_PITCH"

5419
  },

5420
  {

5421
   "chips": ["gfx7"],

5422
   "map": {"at": 167136, "to": "mm"},

5423
   "name": "CB_COLOR2_SLICE",

5424
   "type_ref": "CB_COLOR0_SLICE"

5425
  },

5426
  {

5427
   "chips": ["gfx7"],

5428
   "map": {"at": 167140, "to": "mm"},

5429
   "name": "CB_COLOR2_VIEW",

5430
   "type_ref": "CB_COLOR0_VIEW"

5431
  },

5432
  {

5433
   "chips": ["gfx7"],

5434
   "map": {"at": 167144, "to": "mm"},

5435
   "name": "CB_COLOR2_INFO",

5436
   "type_ref": "CB_COLOR0_INFO"

5437
  },

5438
  {

5439
   "chips": ["gfx7"],

5440
   "map": {"at": 167148, "to": "mm"},

5441
   "name": "CB_COLOR2_ATTRIB",

5442
   "type_ref": "CB_COLOR0_ATTRIB"

5443
  },

5444
  {

5445
   "chips": ["gfx7"],

5446
   "map": {"at": 167156, "to": "mm"},

5447
   "name": "CB_COLOR2_CMASK"

5448
  },

5449
  {

5450
   "chips": ["gfx7"],

5451
   "map": {"at": 167160, "to": "mm"},

5452
   "name": "CB_COLOR2_CMASK_SLICE",

5453
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5454
  },

5455
  {

5456
   "chips": ["gfx7"],

5457
   "map": {"at": 167164, "to": "mm"},

5458
   "name": "CB_COLOR2_FMASK"

5459
  },

5460
  {

5461
   "chips": ["gfx7"],

5462
   "map": {"at": 167168, "to": "mm"},

5463
   "name": "CB_COLOR2_FMASK_SLICE",

5464
   "type_ref": "CB_COLOR0_SLICE"

5465
  },

5466
  {

5467
   "chips": ["gfx7"],

5468
   "map": {"at": 167172, "to": "mm"},

5469
   "name": "CB_COLOR2_CLEAR_WORD0"

5470
  },

5471
  {

5472
   "chips": ["gfx7"],

5473
   "map": {"at": 167176, "to": "mm"},

5474
   "name": "CB_COLOR2_CLEAR_WORD1"

5475
  },

5476
  {

5477
   "chips": ["gfx7"],

5478
   "map": {"at": 167188, "to": "mm"},

5479
   "name": "CB_COLOR3_BASE"

5480
  },

5481
  {

5482
   "chips": ["gfx7"],

5483
   "map": {"at": 167192, "to": "mm"},

5484
   "name": "CB_COLOR3_PITCH",

5485
   "type_ref": "CB_COLOR0_PITCH"

5486
  },

5487
  {

5488
   "chips": ["gfx7"],

5489
   "map": {"at": 167196, "to": "mm"},

5490
   "name": "CB_COLOR3_SLICE",

5491
   "type_ref": "CB_COLOR0_SLICE"

5492
  },

5493
  {

5494
   "chips": ["gfx7"],

5495
   "map": {"at": 167200, "to": "mm"},

5496
   "name": "CB_COLOR3_VIEW",

5497
   "type_ref": "CB_COLOR0_VIEW"

5498
  },

5499
  {

5500
   "chips": ["gfx7"],

5501
   "map": {"at": 167204, "to": "mm"},

5502
   "name": "CB_COLOR3_INFO",

5503
   "type_ref": "CB_COLOR0_INFO"

5504
  },

5505
  {

5506
   "chips": ["gfx7"],

5507
   "map": {"at": 167208, "to": "mm"},

5508
   "name": "CB_COLOR3_ATTRIB",

5509
   "type_ref": "CB_COLOR0_ATTRIB"

5510
  },

5511
  {

5512
   "chips": ["gfx7"],

5513
   "map": {"at": 167216, "to": "mm"},

5514
   "name": "CB_COLOR3_CMASK"

5515
  },

5516
  {

5517
   "chips": ["gfx7"],

5518
   "map": {"at": 167220, "to": "mm"},

5519
   "name": "CB_COLOR3_CMASK_SLICE",

5520
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5521
  },

5522
  {

5523
   "chips": ["gfx7"],

5524
   "map": {"at": 167224, "to": "mm"},

5525
   "name": "CB_COLOR3_FMASK"

5526
  },

5527
  {

5528
   "chips": ["gfx7"],

5529
   "map": {"at": 167228, "to": "mm"},

5530
   "name": "CB_COLOR3_FMASK_SLICE",

5531
   "type_ref": "CB_COLOR0_SLICE"

5532
  },

5533
  {

5534
   "chips": ["gfx7"],

5535
   "map": {"at": 167232, "to": "mm"},

5536
   "name": "CB_COLOR3_CLEAR_WORD0"

5537
  },

5538
  {

5539
   "chips": ["gfx7"],

5540
   "map": {"at": 167236, "to": "mm"},

5541
   "name": "CB_COLOR3_CLEAR_WORD1"

5542
  },

5543
  {

5544
   "chips": ["gfx7"],

5545
   "map": {"at": 167248, "to": "mm"},

5546
   "name": "CB_COLOR4_BASE"

5547
  },

5548
  {

5549
   "chips": ["gfx7"],

5550
   "map": {"at": 167252, "to": "mm"},

5551
   "name": "CB_COLOR4_PITCH",

5552
   "type_ref": "CB_COLOR0_PITCH"

5553
  },

5554
  {

5555
   "chips": ["gfx7"],

5556
   "map": {"at": 167256, "to": "mm"},

5557
   "name": "CB_COLOR4_SLICE",

5558
   "type_ref": "CB_COLOR0_SLICE"

5559
  },

5560
  {

5561
   "chips": ["gfx7"],

5562
   "map": {"at": 167260, "to": "mm"},

5563
   "name": "CB_COLOR4_VIEW",

5564
   "type_ref": "CB_COLOR0_VIEW"

5565
  },

5566
  {

5567
   "chips": ["gfx7"],

5568
   "map": {"at": 167264, "to": "mm"},

5569
   "name": "CB_COLOR4_INFO",

5570
   "type_ref": "CB_COLOR0_INFO"

5571
  },

5572
  {

5573
   "chips": ["gfx7"],

5574
   "map": {"at": 167268, "to": "mm"},

5575
   "name": "CB_COLOR4_ATTRIB",

5576
   "type_ref": "CB_COLOR0_ATTRIB"

5577
  },

5578
  {

5579
   "chips": ["gfx7"],

5580
   "map": {"at": 167276, "to": "mm"},

5581
   "name": "CB_COLOR4_CMASK"

5582
  },

5583
  {

5584
   "chips": ["gfx7"],

5585
   "map": {"at": 167280, "to": "mm"},

5586
   "name": "CB_COLOR4_CMASK_SLICE",

5587
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5588
  },

5589
  {

5590
   "chips": ["gfx7"],

5591
   "map": {"at": 167284, "to": "mm"},

5592
   "name": "CB_COLOR4_FMASK"

5593
  },

5594
  {

5595
   "chips": ["gfx7"],

5596
   "map": {"at": 167288, "to": "mm"},

5597
   "name": "CB_COLOR4_FMASK_SLICE",

5598
   "type_ref": "CB_COLOR0_SLICE"

5599
  },

5600
  {

5601
   "chips": ["gfx7"],

5602
   "map": {"at": 167292, "to": "mm"},

5603
   "name": "CB_COLOR4_CLEAR_WORD0"

5604
  },

5605
  {

5606
   "chips": ["gfx7"],

5607
   "map": {"at": 167296, "to": "mm"},

5608
   "name": "CB_COLOR4_CLEAR_WORD1"

5609
  },

5610
  {

5611
   "chips": ["gfx7"],

5612
   "map": {"at": 167308, "to": "mm"},

5613
   "name": "CB_COLOR5_BASE"

5614
  },

5615
  {

5616
   "chips": ["gfx7"],

5617
   "map": {"at": 167312, "to": "mm"},

5618
   "name": "CB_COLOR5_PITCH",

5619
   "type_ref": "CB_COLOR0_PITCH"

5620
  },

5621
  {

5622
   "chips": ["gfx7"],

5623
   "map": {"at": 167316, "to": "mm"},

5624
   "name": "CB_COLOR5_SLICE",

5625
   "type_ref": "CB_COLOR0_SLICE"

5626
  },

5627
  {

5628
   "chips": ["gfx7"],

5629
   "map": {"at": 167320, "to": "mm"},

5630
   "name": "CB_COLOR5_VIEW",

5631
   "type_ref": "CB_COLOR0_VIEW"

5632
  },

5633
  {

5634
   "chips": ["gfx7"],

5635
   "map": {"at": 167324, "to": "mm"},

5636
   "name": "CB_COLOR5_INFO",

5637
   "type_ref": "CB_COLOR0_INFO"

5638
  },

5639
  {

5640
   "chips": ["gfx7"],

5641
   "map": {"at": 167328, "to": "mm"},

5642
   "name": "CB_COLOR5_ATTRIB",

5643
   "type_ref": "CB_COLOR0_ATTRIB"

5644
  },

5645
  {

5646
   "chips": ["gfx7"],

5647
   "map": {"at": 167336, "to": "mm"},

5648
   "name": "CB_COLOR5_CMASK"

5649
  },

5650
  {

5651
   "chips": ["gfx7"],

5652
   "map": {"at": 167340, "to": "mm"},

5653
   "name": "CB_COLOR5_CMASK_SLICE",

5654
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5655
  },

5656
  {

5657
   "chips": ["gfx7"],

5658
   "map": {"at": 167344, "to": "mm"},

5659
   "name": "CB_COLOR5_FMASK"

5660
  },

5661
  {

5662
   "chips": ["gfx7"],

5663
   "map": {"at": 167348, "to": "mm"},

5664
   "name": "CB_COLOR5_FMASK_SLICE",

5665
   "type_ref": "CB_COLOR0_SLICE"

5666
  },

5667
  {

5668
   "chips": ["gfx7"],

5669
   "map": {"at": 167352, "to": "mm"},

5670
   "name": "CB_COLOR5_CLEAR_WORD0"

5671
  },

5672
  {

5673
   "chips": ["gfx7"],

5674
   "map": {"at": 167356, "to": "mm"},

5675
   "name": "CB_COLOR5_CLEAR_WORD1"

5676
  },

5677
  {

5678
   "chips": ["gfx7"],

5679
   "map": {"at": 167368, "to": "mm"},

5680
   "name": "CB_COLOR6_BASE"

5681
  },

5682
  {

5683
   "chips": ["gfx7"],

5684
   "map": {"at": 167372, "to": "mm"},

5685
   "name": "CB_COLOR6_PITCH",

5686
   "type_ref": "CB_COLOR0_PITCH"

5687
  },

5688
  {

5689
   "chips": ["gfx7"],

5690
   "map": {"at": 167376, "to": "mm"},

5691
   "name": "CB_COLOR6_SLICE",

5692
   "type_ref": "CB_COLOR0_SLICE"

5693
  },

5694
  {

5695
   "chips": ["gfx7"],

5696
   "map": {"at": 167380, "to": "mm"},

5697
   "name": "CB_COLOR6_VIEW",

5698
   "type_ref": "CB_COLOR0_VIEW"

5699
  },

5700
  {

5701
   "chips": ["gfx7"],

5702
   "map": {"at": 167384, "to": "mm"},

5703
   "name": "CB_COLOR6_INFO",

5704
   "type_ref": "CB_COLOR0_INFO"

5705
  },

5706
  {

5707
   "chips": ["gfx7"],

5708
   "map": {"at": 167388, "to": "mm"},

5709
   "name": "CB_COLOR6_ATTRIB",

5710
   "type_ref": "CB_COLOR0_ATTRIB"

5711
  },

5712
  {

5713
   "chips": ["gfx7"],

5714
   "map": {"at": 167396, "to": "mm"},

5715
   "name": "CB_COLOR6_CMASK"

5716
  },

5717
  {

5718
   "chips": ["gfx7"],

5719
   "map": {"at": 167400, "to": "mm"},

5720
   "name": "CB_COLOR6_CMASK_SLICE",

5721
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5722
  },

5723
  {

5724
   "chips": ["gfx7"],

5725
   "map": {"at": 167404, "to": "mm"},

5726
   "name": "CB_COLOR6_FMASK"

5727
  },

5728
  {

5729
   "chips": ["gfx7"],

5730
   "map": {"at": 167408, "to": "mm"},

5731
   "name": "CB_COLOR6_FMASK_SLICE",

5732
   "type_ref": "CB_COLOR0_SLICE"

5733
  },

5734
  {

5735
   "chips": ["gfx7"],

5736
   "map": {"at": 167412, "to": "mm"},

5737
   "name": "CB_COLOR6_CLEAR_WORD0"

5738
  },

5739
  {

5740
   "chips": ["gfx7"],

5741
   "map": {"at": 167416, "to": "mm"},

5742
   "name": "CB_COLOR6_CLEAR_WORD1"

5743
  },

5744
  {

5745
   "chips": ["gfx7"],

5746
   "map": {"at": 167428, "to": "mm"},

5747
   "name": "CB_COLOR7_BASE"

5748
  },

5749
  {

5750
   "chips": ["gfx7"],

5751
   "map": {"at": 167432, "to": "mm"},

5752
   "name": "CB_COLOR7_PITCH",

5753
   "type_ref": "CB_COLOR0_PITCH"

5754
  },

5755
  {

5756
   "chips": ["gfx7"],

5757
   "map": {"at": 167436, "to": "mm"},

5758
   "name": "CB_COLOR7_SLICE",

5759
   "type_ref": "CB_COLOR0_SLICE"

5760
  },

5761
  {

5762
   "chips": ["gfx7"],

5763
   "map": {"at": 167440, "to": "mm"},

5764
   "name": "CB_COLOR7_VIEW",

5765
   "type_ref": "CB_COLOR0_VIEW"

5766
  },

5767
  {

5768
   "chips": ["gfx7"],

5769
   "map": {"at": 167444, "to": "mm"},

5770
   "name": "CB_COLOR7_INFO",

5771
   "type_ref": "CB_COLOR0_INFO"

5772
  },

5773
  {

5774
   "chips": ["gfx7"],

5775
   "map": {"at": 167448, "to": "mm"},

5776
   "name": "CB_COLOR7_ATTRIB",

5777
   "type_ref": "CB_COLOR0_ATTRIB"

5778
  },

5779
  {

5780
   "chips": ["gfx7"],

5781
   "map": {"at": 167456, "to": "mm"},

5782
   "name": "CB_COLOR7_CMASK"

5783
  },

5784
  {

5785
   "chips": ["gfx7"],

5786
   "map": {"at": 167460, "to": "mm"},

5787
   "name": "CB_COLOR7_CMASK_SLICE",

5788
   "type_ref": "CB_COLOR0_CMASK_SLICE"

5789
  },

5790
  {

5791
   "chips": ["gfx7"],

5792
   "map": {"at": 167464, "to": "mm"},

5793
   "name": "CB_COLOR7_FMASK"

5794
  },

5795
  {

5796
   "chips": ["gfx7"],

5797
   "map": {"at": 167468, "to": "mm"},

5798
   "name": "CB_COLOR7_FMASK_SLICE",

5799
   "type_ref": "CB_COLOR0_SLICE"

5800
  },

5801
  {

5802
   "chips": ["gfx7"],

5803
   "map": {"at": 167472, "to": "mm"},

5804
   "name": "CB_COLOR7_CLEAR_WORD0"

5805
  },

5806
  {

5807
   "chips": ["gfx7"],

5808
   "map": {"at": 167476, "to": "mm"},

5809
   "name": "CB_COLOR7_CLEAR_WORD1"

5810
  },

5811
  {

5812
   "chips": ["gfx7"],

5813
   "map": {"at": 196608, "to": "mm"},

5814
   "name": "CP_EOP_DONE_ADDR_LO",

5815
   "type_ref": "CP_EOP_DONE_ADDR_LO"

5816
  },

5817
  {

5818
   "chips": ["gfx7"],

5819
   "map": {"at": 196612, "to": "mm"},

5820
   "name": "CP_EOP_DONE_ADDR_HI",

5821
   "type_ref": "CP_EOP_DONE_ADDR_HI"

5822
  },

5823
  {

5824
   "chips": ["gfx7"],

5825
   "map": {"at": 196616, "to": "mm"},

5826
   "name": "CP_EOP_DONE_DATA_LO"

5827
  },

5828
  {

5829
   "chips": ["gfx7"],

5830
   "map": {"at": 196620, "to": "mm"},

5831
   "name": "CP_EOP_DONE_DATA_HI"

5832
  },

5833
  {

5834
   "chips": ["gfx7"],

5835
   "map": {"at": 196624, "to": "mm"},

5836
   "name": "CP_EOP_LAST_FENCE_LO"

5837
  },

5838
  {

5839
   "chips": ["gfx7"],

5840
   "map": {"at": 196628, "to": "mm"},

5841
   "name": "CP_EOP_LAST_FENCE_HI"

5842
  },

5843
  {

5844
   "chips": ["gfx7"],

5845
   "map": {"at": 196632, "to": "mm"},

5846
   "name": "CP_STREAM_OUT_ADDR_LO",

5847
   "type_ref": "CP_STREAM_OUT_ADDR_LO"

5848
  },

5849
  {

5850
   "chips": ["gfx7"],

5851
   "map": {"at": 196636, "to": "mm"},

5852
   "name": "CP_STREAM_OUT_ADDR_HI",

5853
   "type_ref": "CP_STREAM_OUT_ADDR_HI"

5854
  },

5855
  {

5856
   "chips": ["gfx7"],

5857
   "map": {"at": 196640, "to": "mm"},

5858
   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"

5859
  },

5860
  {

5861
   "chips": ["gfx7"],

5862
   "map": {"at": 196644, "to": "mm"},

5863
   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"

5864
  },

5865
  {

5866
   "chips": ["gfx7"],

5867
   "map": {"at": 196648, "to": "mm"},

5868
   "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"

5869
  },

5870
  {

5871
   "chips": ["gfx7"],

5872
   "map": {"at": 196652, "to": "mm"},

5873
   "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"

5874
  },

5875
  {

5876
   "chips": ["gfx7"],

5877
   "map": {"at": 196656, "to": "mm"},

5878
   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"

5879
  },

5880
  {

5881
   "chips": ["gfx7"],

5882
   "map": {"at": 196660, "to": "mm"},

5883
   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"

5884
  },

5885
  {

5886
   "chips": ["gfx7"],

5887
   "map": {"at": 196664, "to": "mm"},

5888
   "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"

5889
  },

5890
  {

5891
   "chips": ["gfx7"],

5892
   "map": {"at": 196668, "to": "mm"},

5893
   "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"

5894
  },

5895
  {

5896
   "chips": ["gfx7"],

5897
   "map": {"at": 196672, "to": "mm"},

5898
   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"

5899
  },

5900
  {

5901
   "chips": ["gfx7"],

5902
   "map": {"at": 196676, "to": "mm"},

5903
   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"

5904
  },

5905
  {

5906
   "chips": ["gfx7"],

5907
   "map": {"at": 196680, "to": "mm"},

5908
   "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"

5909
  },

5910
  {

5911
   "chips": ["gfx7"],

5912
   "map": {"at": 196684, "to": "mm"},

5913
   "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"

5914
  },

5915
  {

5916
   "chips": ["gfx7"],

5917
   "map": {"at": 196688, "to": "mm"},

5918
   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"

5919
  },

5920
  {

5921
   "chips": ["gfx7"],

5922
   "map": {"at": 196692, "to": "mm"},

5923
   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"

5924
  },

5925
  {

5926
   "chips": ["gfx7"],

5927
   "map": {"at": 196696, "to": "mm"},

5928
   "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"

5929
  },

5930
  {

5931
   "chips": ["gfx7"],

5932
   "map": {"at": 196700, "to": "mm"},

5933
   "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"

5934
  },

5935
  {

5936
   "chips": ["gfx7"],

5937
   "map": {"at": 196704, "to": "mm"},

5938
   "name": "CP_PIPE_STATS_ADDR_LO",

5939
   "type_ref": "CP_PIPE_STATS_ADDR_LO"

5940
  },

5941
  {

5942
   "chips": ["gfx7"],

5943
   "map": {"at": 196708, "to": "mm"},

5944
   "name": "CP_PIPE_STATS_ADDR_HI",

5945
   "type_ref": "CP_PIPE_STATS_ADDR_HI"

5946
  },

5947
  {

5948
   "chips": ["gfx7"],

5949
   "map": {"at": 196712, "to": "mm"},

5950
   "name": "CP_VGT_IAVERT_COUNT_LO"

5951
  },

5952
  {

5953
   "chips": ["gfx7"],

5954
   "map": {"at": 196716, "to": "mm"},

5955
   "name": "CP_VGT_IAVERT_COUNT_HI"

5956
  },

5957
  {

5958
   "chips": ["gfx7"],

5959
   "map": {"at": 196720, "to": "mm"},

5960
   "name": "CP_VGT_IAPRIM_COUNT_LO"

5961
  },

5962
  {

5963
   "chips": ["gfx7"],

5964
   "map": {"at": 196724, "to": "mm"},

5965
   "name": "CP_VGT_IAPRIM_COUNT_HI"

5966
  },

5967
  {

5968
   "chips": ["gfx7"],

5969
   "map": {"at": 196728, "to": "mm"},

5970
   "name": "CP_VGT_GSPRIM_COUNT_LO"

5971
  },

5972
  {

5973
   "chips": ["gfx7"],

5974
   "map": {"at": 196732, "to": "mm"},

5975
   "name": "CP_VGT_GSPRIM_COUNT_HI"

5976
  },

5977
  {

5978
   "chips": ["gfx7"],

5979
   "map": {"at": 196736, "to": "mm"},

5980
   "name": "CP_VGT_VSINVOC_COUNT_LO"

5981
  },

5982
  {

5983
   "chips": ["gfx7"],

5984
   "map": {"at": 196740, "to": "mm"},

5985
   "name": "CP_VGT_VSINVOC_COUNT_HI"

5986
  },

5987
  {

5988
   "chips": ["gfx7"],

5989
   "map": {"at": 196744, "to": "mm"},

5990
   "name": "CP_VGT_GSINVOC_COUNT_LO"

5991
  },

5992
  {

5993
   "chips": ["gfx7"],

5994
   "map": {"at": 196748, "to": "mm"},

5995
   "name": "CP_VGT_GSINVOC_COUNT_HI"

5996
  },

5997
  {

5998
   "chips": ["gfx7"],

5999
   "map": {"at": 196752, "to": "mm"},

6000
   "name": "CP_VGT_HSINVOC_COUNT_LO"

6001
  },

6002
  {

6003
   "chips": ["gfx7"],

6004
   "map": {"at": 196756, "to": "mm"},

6005
   "name": "CP_VGT_HSINVOC_COUNT_HI"

6006
  },

6007
  {

6008
   "chips": ["gfx7"],

6009
   "map": {"at": 196760, "to": "mm"},

6010
   "name": "CP_VGT_DSINVOC_COUNT_LO"

6011
  },

6012
  {

6013
   "chips": ["gfx7"],

6014
   "map": {"at": 196764, "to": "mm"},

6015
   "name": "CP_VGT_DSINVOC_COUNT_HI"

6016
  },

6017
  {

6018
   "chips": ["gfx7"],

6019
   "map": {"at": 196768, "to": "mm"},

6020
   "name": "CP_PA_CINVOC_COUNT_LO"

6021
  },

6022
  {

6023
   "chips": ["gfx7"],

6024
   "map": {"at": 196772, "to": "mm"},

6025
   "name": "CP_PA_CINVOC_COUNT_HI"

6026
  },

6027
  {

6028
   "chips": ["gfx7"],

6029
   "map": {"at": 196776, "to": "mm"},

6030
   "name": "CP_PA_CPRIM_COUNT_LO"

6031
  },

6032
  {

6033
   "chips": ["gfx7"],

6034
   "map": {"at": 196780, "to": "mm"},

6035
   "name": "CP_PA_CPRIM_COUNT_HI"

6036
  },

6037
  {

6038
   "chips": ["gfx7"],

6039
   "map": {"at": 196784, "to": "mm"},

6040
   "name": "CP_SC_PSINVOC_COUNT0_LO"

6041
  },

6042
  {

6043
   "chips": ["gfx7"],

6044
   "map": {"at": 196788, "to": "mm"},

6045
   "name": "CP_SC_PSINVOC_COUNT0_HI"

6046
  },

6047
  {

6048
   "chips": ["gfx7"],

6049
   "map": {"at": 196792, "to": "mm"},

6050
   "name": "CP_SC_PSINVOC_COUNT1_LO"

6051
  },

6052
  {

6053
   "chips": ["gfx7"],

6054
   "map": {"at": 196796, "to": "mm"},

6055
   "name": "CP_SC_PSINVOC_COUNT1_HI"

6056
  },

6057
  {

6058
   "chips": ["gfx7"],

6059
   "map": {"at": 196800, "to": "mm"},

6060
   "name": "CP_VGT_CSINVOC_COUNT_LO"

6061
  },

6062
  {

6063
   "chips": ["gfx7"],

6064
   "map": {"at": 196804, "to": "mm"},

6065
   "name": "CP_VGT_CSINVOC_COUNT_HI"

6066
  },

6067
  {

6068
   "chips": ["gfx7"],

6069
   "map": {"at": 196860, "to": "mm"},

6070
   "name": "CP_STRMOUT_CNTL",

6071
   "type_ref": "CP_STRMOUT_CNTL"

6072
  },

6073
  {

6074
   "chips": ["gfx7"],

6075
   "map": {"at": 196864, "to": "mm"},

6076
   "name": "SCRATCH_REG0"

6077
  },

6078
  {

6079
   "chips": ["gfx7"],

6080
   "map": {"at": 196868, "to": "mm"},

6081
   "name": "SCRATCH_REG1"

6082
  },

6083
  {

6084
   "chips": ["gfx7"],

6085
   "map": {"at": 196872, "to": "mm"},

6086
   "name": "SCRATCH_REG2"

6087
  },

6088
  {

6089
   "chips": ["gfx7"],

6090
   "map": {"at": 196876, "to": "mm"},

6091
   "name": "SCRATCH_REG3"

6092
  },

6093
  {

6094
   "chips": ["gfx7"],

6095
   "map": {"at": 196880, "to": "mm"},

6096
   "name": "SCRATCH_REG4"

6097
  },

6098
  {

6099
   "chips": ["gfx7"],

6100
   "map": {"at": 196884, "to": "mm"},

6101
   "name": "SCRATCH_REG5"

6102
  },

6103
  {

6104
   "chips": ["gfx7"],

6105
   "map": {"at": 196888, "to": "mm"},

6106
   "name": "SCRATCH_REG6"

6107
  },

6108
  {

6109
   "chips": ["gfx7"],

6110
   "map": {"at": 196892, "to": "mm"},

6111
   "name": "SCRATCH_REG7"

6112
  },

6113
  {

6114
   "chips": ["gfx7"],

6115
   "map": {"at": 196928, "to": "mm"},

6116
   "name": "SCRATCH_UMSK",

6117
   "type_ref": "SCRATCH_UMSK"

6118
  },

6119
  {

6120
   "chips": ["gfx7"],

6121
   "map": {"at": 196932, "to": "mm"},

6122
   "name": "SCRATCH_ADDR"

6123
  },

6124
  {

6125
   "chips": ["gfx7"],

6126
   "map": {"at": 196936, "to": "mm"},

6127
   "name": "CP_PFP_ATOMIC_PREOP_LO"

6128
  },

6129
  {

6130
   "chips": ["gfx7"],

6131
   "map": {"at": 196940, "to": "mm"},

6132
   "name": "CP_PFP_ATOMIC_PREOP_HI"

6133
  },

6134
  {

6135
   "chips": ["gfx7"],

6136
   "map": {"at": 196944, "to": "mm"},

6137
   "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"

6138
  },

6139
  {

6140
   "chips": ["gfx7"],

6141
   "map": {"at": 196948, "to": "mm"},

6142
   "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"

6143
  },

6144
  {

6145
   "chips": ["gfx7"],

6146
   "map": {"at": 196952, "to": "mm"},

6147
   "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"

6148
  },

6149
  {

6150
   "chips": ["gfx7"],

6151
   "map": {"at": 196956, "to": "mm"},

6152
   "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"

6153
  },

6154
  {

6155
   "chips": ["gfx7"],

6156
   "map": {"at": 196960, "to": "mm"},

6157
   "name": "CP_APPEND_ADDR_LO",

6158
   "type_ref": "CP_APPEND_ADDR_LO"

6159
  },

6160
  {

6161
   "chips": ["gfx7"],

6162
   "map": {"at": 196964, "to": "mm"},

6163
   "name": "CP_APPEND_ADDR_HI",

6164
   "type_ref": "CP_APPEND_ADDR_HI"

6165
  },

6166
  {

6167
   "chips": ["gfx7"],

6168
   "map": {"at": 196968, "to": "mm"},

6169
   "name": "CP_APPEND_DATA"

6170
  },

6171
  {

6172
   "chips": ["gfx7"],

6173
   "map": {"at": 196972, "to": "mm"},

6174
   "name": "CP_APPEND_LAST_CS_FENCE"

6175
  },

6176
  {

6177
   "chips": ["gfx7"],

6178
   "map": {"at": 196976, "to": "mm"},

6179
   "name": "CP_APPEND_LAST_PS_FENCE"

6180
  },

6181
  {

6182
   "chips": ["gfx7"],

6183
   "map": {"at": 196980, "to": "mm"},

6184
   "name": "CP_ATOMIC_PREOP_LO"

6185
  },

6186
  {

6187
   "chips": ["gfx7"],

6188
   "map": {"at": 196984, "to": "mm"},

6189
   "name": "CP_ATOMIC_PREOP_HI"

6190
  },

6191
  {

6192
   "chips": ["gfx7"],

6193
   "map": {"at": 196988, "to": "mm"},

6194
   "name": "CP_GDS_ATOMIC0_PREOP_LO"

6195
  },

6196
  {

6197
   "chips": ["gfx7"],

6198
   "map": {"at": 196992, "to": "mm"},

6199
   "name": "CP_GDS_ATOMIC0_PREOP_HI"

6200
  },

6201
  {

6202
   "chips": ["gfx7"],

6203
   "map": {"at": 196996, "to": "mm"},

6204
   "name": "CP_GDS_ATOMIC1_PREOP_LO"

6205
  },

6206
  {

6207
   "chips": ["gfx7"],

6208
   "map": {"at": 197000, "to": "mm"},

6209
   "name": "CP_GDS_ATOMIC1_PREOP_HI"

6210
  },

6211
  {

6212
   "chips": ["gfx7"],

6213
   "map": {"at": 197028, "to": "mm"},

6214
   "name": "CP_ME_MC_WADDR_LO",

6215
   "type_ref": "CP_ME_MC_WADDR_LO"

6216
  },

6217
  {

6218
   "chips": ["gfx7"],

6219
   "map": {"at": 197032, "to": "mm"},

6220
   "name": "CP_ME_MC_WADDR_HI",

6221
   "type_ref": "CP_ME_MC_WADDR_HI"

6222
  },

6223
  {

6224
   "chips": ["gfx7"],

6225
   "map": {"at": 197036, "to": "mm"},

6226
   "name": "CP_ME_MC_WDATA_LO"

6227
  },

6228
  {

6229
   "chips": ["gfx7"],

6230
   "map": {"at": 197040, "to": "mm"},

6231
   "name": "CP_ME_MC_WDATA_HI"

6232
  },

6233
  {

6234
   "chips": ["gfx7"],

6235
   "map": {"at": 197044, "to": "mm"},

6236
   "name": "CP_ME_MC_RADDR_LO",

6237
   "type_ref": "CP_ME_MC_RADDR_LO"

6238
  },

6239
  {

6240
   "chips": ["gfx7"],

6241
   "map": {"at": 197048, "to": "mm"},

6242
   "name": "CP_ME_MC_RADDR_HI",

6243
   "type_ref": "CP_ME_MC_RADDR_HI"

6244
  },

6245
  {

6246
   "chips": ["gfx7"],

6247
   "map": {"at": 197052, "to": "mm"},

6248
   "name": "CP_SEM_WAIT_TIMER"

6249
  },

6250
  {

6251
   "chips": ["gfx7"],

6252
   "map": {"at": 197056, "to": "mm"},

6253
   "name": "CP_SIG_SEM_ADDR_LO",

6254
   "type_ref": "CP_SIG_SEM_ADDR_LO"

6255
  },

6256
  {

6257
   "chips": ["gfx7"],

6258
   "map": {"at": 197060, "to": "mm"},

6259
   "name": "CP_SIG_SEM_ADDR_HI",

6260
   "type_ref": "CP_SIG_SEM_ADDR_HI"

6261
  },

6262
  {

6263
   "chips": ["gfx7"],

6264
   "map": {"at": 197072, "to": "mm"},

6265
   "name": "CP_WAIT_REG_MEM_TIMEOUT"

6266
  },

6267
  {

6268
   "chips": ["gfx7"],

6269
   "map": {"at": 197076, "to": "mm"},

6270
   "name": "CP_WAIT_SEM_ADDR_LO",

6271
   "type_ref": "CP_SIG_SEM_ADDR_LO"

6272
  },

6273
  {

6274
   "chips": ["gfx7"],

6275
   "map": {"at": 197080, "to": "mm"},

6276
   "name": "CP_WAIT_SEM_ADDR_HI",

6277
   "type_ref": "CP_SIG_SEM_ADDR_HI"

6278
  },

6279
  {

6280
   "chips": ["gfx7"],

6281
   "map": {"at": 197084, "to": "mm"},

6282
   "name": "CP_DMA_PFP_CONTROL",

6283
   "type_ref": "CP_DMA_ME_CONTROL"

6284
  },

6285
  {

6286
   "chips": ["gfx7"],

6287
   "map": {"at": 197088, "to": "mm"},

6288
   "name": "CP_DMA_ME_CONTROL",

6289
   "type_ref": "CP_DMA_ME_CONTROL"

6290
  },

6291
  {

6292
   "chips": ["gfx7"],

6293
   "map": {"at": 197092, "to": "mm"},

6294
   "name": "CP_COHER_BASE_HI",

6295
   "type_ref": "CP_COHER_BASE_HI"

6296
  },

6297
  {

6298
   "chips": ["gfx7"],

6299
   "map": {"at": 197100, "to": "mm"},

6300
   "name": "CP_COHER_START_DELAY",

6301
   "type_ref": "CP_COHER_START_DELAY"

6302
  },

6303
  {

6304
   "chips": ["gfx7"],

6305
   "map": {"at": 197104, "to": "mm"},

6306
   "name": "CP_COHER_CNTL",

6307
   "type_ref": "CP_COHER_CNTL"

6308
  },

6309
  {

6310
   "chips": ["gfx7"],

6311
   "map": {"at": 197108, "to": "mm"},

6312
   "name": "CP_COHER_SIZE"

6313
  },

6314
  {

6315
   "chips": ["gfx7"],

6316
   "map": {"at": 197112, "to": "mm"},

6317
   "name": "CP_COHER_BASE"

6318
  },

6319
  {

6320
   "chips": ["gfx7"],

6321
   "map": {"at": 197116, "to": "mm"},

6322
   "name": "CP_COHER_STATUS",

6323
   "type_ref": "CP_COHER_STATUS"

6324
  },

6325
  {

6326
   "chips": ["gfx7"],

6327
   "map": {"at": 197120, "to": "mm"},

6328
   "name": "CP_DMA_ME_SRC_ADDR"

6329
  },

6330
  {

6331
   "chips": ["gfx7"],

6332
   "map": {"at": 197124, "to": "mm"},

6333
   "name": "CP_DMA_ME_SRC_ADDR_HI",

6334
   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"

6335
  },

6336
  {

6337
   "chips": ["gfx7"],

6338
   "map": {"at": 197128, "to": "mm"},

6339
   "name": "CP_DMA_ME_DST_ADDR"

6340
  },

6341
  {

6342
   "chips": ["gfx7"],

6343
   "map": {"at": 197132, "to": "mm"},

6344
   "name": "CP_DMA_ME_DST_ADDR_HI",

6345
   "type_ref": "CP_DMA_ME_DST_ADDR_HI"

6346
  },

6347
  {

6348
   "chips": ["gfx7"],

6349
   "map": {"at": 197136, "to": "mm"},

6350
   "name": "CP_DMA_ME_COMMAND",

6351
   "type_ref": "CP_DMA_ME_COMMAND"

6352
  },

6353
  {

6354
   "chips": ["gfx7"],

6355
   "map": {"at": 197140, "to": "mm"},

6356
   "name": "CP_DMA_PFP_SRC_ADDR"

6357
  },

6358
  {

6359
   "chips": ["gfx7"],

6360
   "map": {"at": 197144, "to": "mm"},

6361
   "name": "CP_DMA_PFP_SRC_ADDR_HI",

6362
   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"

6363
  },

6364
  {

6365
   "chips": ["gfx7"],

6366
   "map": {"at": 197148, "to": "mm"},

6367
   "name": "CP_DMA_PFP_DST_ADDR"

6368
  },

6369
  {

6370
   "chips": ["gfx7"],

6371
   "map": {"at": 197152, "to": "mm"},

6372
   "name": "CP_DMA_PFP_DST_ADDR_HI",

6373
   "type_ref": "CP_DMA_ME_DST_ADDR_HI"

6374
  },

6375
  {

6376
   "chips": ["gfx7"],

6377
   "map": {"at": 197156, "to": "mm"},

6378
   "name": "CP_DMA_PFP_COMMAND",

6379
   "type_ref": "CP_DMA_ME_COMMAND"

6380
  },

6381
  {

6382
   "chips": ["gfx7"],

6383
   "map": {"at": 197160, "to": "mm"},

6384
   "name": "CP_DMA_CNTL",

6385
   "type_ref": "CP_DMA_CNTL"

6386
  },

6387
  {

6388
   "chips": ["gfx7"],

6389
   "map": {"at": 197164, "to": "mm"},

6390
   "name": "CP_DMA_READ_TAGS",

6391
   "type_ref": "CP_DMA_READ_TAGS"

6392
  },

6393
  {

6394
   "chips": ["gfx7"],

6395
   "map": {"at": 197168, "to": "mm"},

6396
   "name": "CP_COHER_SIZE_HI",

6397
   "type_ref": "CP_COHER_SIZE_HI"

6398
  },

6399
  {

6400
   "chips": ["gfx7"],

6401
   "map": {"at": 197172, "to": "mm"},

6402
   "name": "CP_PFP_IB_CONTROL",

6403
   "type_ref": "CP_PFP_IB_CONTROL"

6404
  },

6405
  {

6406
   "chips": ["gfx7"],

6407
   "map": {"at": 197176, "to": "mm"},

6408
   "name": "CP_PFP_LOAD_CONTROL",

6409
   "type_ref": "CP_PFP_LOAD_CONTROL"

6410
  },

6411
  {

6412
   "chips": ["gfx7"],

6413
   "map": {"at": 197180, "to": "mm"},

6414
   "name": "CP_SCRATCH_INDEX",

6415
   "type_ref": "CP_CPC_SCRATCH_INDEX"

6416
  },

6417
  {

6418
   "chips": ["gfx7"],

6419
   "map": {"at": 197184, "to": "mm"},

6420
   "name": "CP_SCRATCH_DATA"

6421
  },

6422
  {

6423
   "chips": ["gfx7"],

6424
   "map": {"at": 197188, "to": "mm"},

6425
   "name": "CP_RB_OFFSET",

6426
   "type_ref": "CP_RB_OFFSET"

6427
  },

6428
  {

6429
   "chips": ["gfx7"],

6430
   "map": {"at": 197192, "to": "mm"},

6431
   "name": "CP_IB1_OFFSET",

6432
   "type_ref": "CP_IB1_OFFSET"

6433
  },

6434
  {

6435
   "chips": ["gfx7"],

6436
   "map": {"at": 197196, "to": "mm"},

6437
   "name": "CP_IB2_OFFSET",

6438
   "type_ref": "CP_IB2_OFFSET"

6439
  },

6440
  {

6441
   "chips": ["gfx7"],

6442
   "map": {"at": 197200, "to": "mm"},

6443
   "name": "CP_IB1_PREAMBLE_BEGIN",

6444
   "type_ref": "CP_IB1_PREAMBLE_BEGIN"

6445
  },

6446
  {

6447
   "chips": ["gfx7"],

6448
   "map": {"at": 197204, "to": "mm"},

6449
   "name": "CP_IB1_PREAMBLE_END",

6450
   "type_ref": "CP_IB1_PREAMBLE_END"

6451
  },

6452
  {

6453
   "chips": ["gfx7"],

6454
   "map": {"at": 197208, "to": "mm"},

6455
   "name": "CP_IB2_PREAMBLE_BEGIN",

6456
   "type_ref": "CP_IB2_PREAMBLE_BEGIN"

6457
  },

6458
  {

6459
   "chips": ["gfx7"],

6460
   "map": {"at": 197212, "to": "mm"},

6461
   "name": "CP_IB2_PREAMBLE_END",

6462
   "type_ref": "CP_IB2_PREAMBLE_END"

6463
  },

6464
  {

6465
   "chips": ["gfx7"],

6466
   "map": {"at": 197216, "to": "mm"},

6467
   "name": "CP_CE_IB1_OFFSET",

6468
   "type_ref": "CP_IB1_OFFSET"

6469
  },

6470
  {

6471
   "chips": ["gfx7"],

6472
   "map": {"at": 197220, "to": "mm"},

6473
   "name": "CP_CE_IB2_OFFSET",

6474
   "type_ref": "CP_IB2_OFFSET"

6475
  },

6476
  {

6477
   "chips": ["gfx7"],

6478
   "map": {"at": 197224, "to": "mm"},

6479
   "name": "CP_CE_COUNTER"

6480
  },

6481
  {

6482
   "chips": ["gfx7"],

6483
   "map": {"at": 197388, "to": "mm"},

6484
   "name": "CP_CE_INIT_BASE_LO",

6485
   "type_ref": "CP_CE_INIT_BASE_LO"

6486
  },

6487
  {

6488
   "chips": ["gfx7"],

6489
   "map": {"at": 197392, "to": "mm"},

6490
   "name": "CP_CE_INIT_BASE_HI",

6491
   "type_ref": "CP_CE_INIT_BASE_HI"

6492
  },

6493
  {

6494
   "chips": ["gfx7"],

6495
   "map": {"at": 197396, "to": "mm"},

6496
   "name": "CP_CE_INIT_BUFSZ",

6497
   "type_ref": "CP_CE_INIT_BUFSZ"

6498
  },

6499
  {

6500
   "chips": ["gfx7"],

6501
   "map": {"at": 197400, "to": "mm"},

6502
   "name": "CP_CE_IB1_BASE_LO",

6503
   "type_ref": "CP_CE_IB1_BASE_LO"

6504
  },

6505
  {

6506
   "chips": ["gfx7"],

6507
   "map": {"at": 197404, "to": "mm"},

6508
   "name": "CP_CE_IB1_BASE_HI",

6509
   "type_ref": "CP_CE_IB1_BASE_HI"

6510
  },

6511
  {

6512
   "chips": ["gfx7"],

6513
   "map": {"at": 197408, "to": "mm"},

6514
   "name": "CP_CE_IB1_BUFSZ",

6515
   "type_ref": "CP_CE_IB1_BUFSZ"

6516
  },

6517
  {

6518
   "chips": ["gfx7"],

6519
   "map": {"at": 197412, "to": "mm"},

6520
   "name": "CP_CE_IB2_BASE_LO",

6521
   "type_ref": "CP_CE_IB2_BASE_LO"

6522
  },

6523
  {

6524
   "chips": ["gfx7"],

6525
   "map": {"at": 197416, "to": "mm"},

6526
   "name": "CP_CE_IB2_BASE_HI",

6527
   "type_ref": "CP_CE_IB2_BASE_HI"

6528
  },

6529
  {

6530
   "chips": ["gfx7"],

6531
   "map": {"at": 197420, "to": "mm"},

6532
   "name": "CP_CE_IB2_BUFSZ",

6533
   "type_ref": "CP_CE_IB2_BUFSZ"

6534
  },

6535
  {

6536
   "chips": ["gfx7"],

6537
   "map": {"at": 197424, "to": "mm"},

6538
   "name": "CP_IB1_BASE_LO",

6539
   "type_ref": "CP_CE_IB1_BASE_LO"

6540
  },

6541
  {

6542
   "chips": ["gfx7"],

6543
   "map": {"at": 197428, "to": "mm"},

6544
   "name": "CP_IB1_BASE_HI",

6545
   "type_ref": "CP_CE_IB1_BASE_HI"

6546
  },

6547
  {

6548
   "chips": ["gfx7"],

6549
   "map": {"at": 197432, "to": "mm"},

6550
   "name": "CP_IB1_BUFSZ",

6551
   "type_ref": "CP_CE_IB1_BUFSZ"

6552
  },

6553
  {

6554
   "chips": ["gfx7"],

6555
   "map": {"at": 197436, "to": "mm"},

6556
   "name": "CP_IB2_BASE_LO",

6557
   "type_ref": "CP_CE_IB2_BASE_LO"

6558
  },

6559
  {

6560
   "chips": ["gfx7"],

6561
   "map": {"at": 197440, "to": "mm"},

6562
   "name": "CP_IB2_BASE_HI",

6563
   "type_ref": "CP_CE_IB2_BASE_HI"

6564
  },

6565
  {

6566
   "chips": ["gfx7"],

6567
   "map": {"at": 197444, "to": "mm"},

6568
   "name": "CP_IB2_BUFSZ",

6569
   "type_ref": "CP_CE_IB2_BUFSZ"

6570
  },

6571
  {

6572
   "chips": ["gfx7"],

6573
   "map": {"at": 197448, "to": "mm"},

6574
   "name": "CP_ST_BASE_LO",

6575
   "type_ref": "CP_ST_BASE_LO"

6576
  },

6577
  {

6578
   "chips": ["gfx7"],

6579
   "map": {"at": 197452, "to": "mm"},

6580
   "name": "CP_ST_BASE_HI",

6581
   "type_ref": "CP_ST_BASE_HI"

6582
  },

6583
  {

6584
   "chips": ["gfx7"],

6585
   "map": {"at": 197456, "to": "mm"},

6586
   "name": "CP_ST_BUFSZ",

6587
   "type_ref": "CP_ST_BUFSZ"

6588
  },

6589
  {

6590
   "chips": ["gfx7"],

6591
   "map": {"at": 197460, "to": "mm"},

6592
   "name": "CP_EOP_DONE_EVENT_CNTL",

6593
   "type_ref": "CP_EOP_DONE_EVENT_CNTL"

6594
  },

6595
  {

6596
   "chips": ["gfx7"],

6597
   "map": {"at": 197464, "to": "mm"},

6598
   "name": "CP_EOP_DONE_DATA_CNTL",

6599
   "type_ref": "CP_EOP_DONE_DATA_CNTL"

6600
  },

6601
  {

6602
   "chips": ["gfx7"],

6603
   "map": {"at": 198656, "to": "mm"},

6604
   "name": "GRBM_GFX_INDEX",

6605
   "type_ref": "GRBM_GFX_INDEX"

6606
  },

6607
  {

6608
   "chips": ["gfx7"],

6609
   "map": {"at": 198912, "to": "mm"},

6610
   "name": "VGT_ESGS_RING_SIZE"

6611
  },

6612
  {

6613
   "chips": ["gfx7"],

6614
   "map": {"at": 198916, "to": "mm"},

6615
   "name": "VGT_GSVS_RING_SIZE"

6616
  },

6617
  {

6618
   "chips": ["gfx7"],

6619
   "map": {"at": 198920, "to": "mm"},

6620
   "name": "VGT_PRIMITIVE_TYPE",

6621
   "type_ref": "VGT_PRIMITIVE_TYPE"

6622
  },

6623
  {

6624
   "chips": ["gfx7"],

6625
   "map": {"at": 198924, "to": "mm"},

6626
   "name": "VGT_INDEX_TYPE",

6627
   "type_ref": "VGT_INDEX_TYPE"

6628
  },

6629
  {

6630
   "chips": ["gfx7"],

6631
   "map": {"at": 198928, "to": "mm"},

6632
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"

6633
  },

6634
  {

6635
   "chips": ["gfx7"],

6636
   "map": {"at": 198932, "to": "mm"},

6637
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"

6638
  },

6639
  {

6640
   "chips": ["gfx7"],

6641
   "map": {"at": 198936, "to": "mm"},

6642
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"

6643
  },

6644
  {

6645
   "chips": ["gfx7"],

6646
   "map": {"at": 198940, "to": "mm"},

6647
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"

6648
  },

6649
  {

6650
   "chips": ["gfx7"],

6651
   "map": {"at": 198960, "to": "mm"},

6652
   "name": "VGT_NUM_INDICES"

6653
  },

6654
  {

6655
   "chips": ["gfx7"],

6656
   "map": {"at": 198964, "to": "mm"},

6657
   "name": "VGT_NUM_INSTANCES"

6658
  },

6659
  {

6660
   "chips": ["gfx7"],

6661
   "map": {"at": 198968, "to": "mm"},

6662
   "name": "VGT_TF_RING_SIZE",

6663
   "type_ref": "VGT_TF_RING_SIZE"

6664
  },

6665
  {

6666
   "chips": ["gfx7"],

6667
   "map": {"at": 198972, "to": "mm"},

6668
   "name": "VGT_HS_OFFCHIP_PARAM",

6669
   "type_ref": "VGT_HS_OFFCHIP_PARAM"

6670
  },

6671
  {

6672
   "chips": ["gfx7"],

6673
   "map": {"at": 198976, "to": "mm"},

6674
   "name": "VGT_TF_MEMORY_BASE"

6675
  },

6676
  {

6677
   "chips": ["gfx7"],

6678
   "map": {"at": 199168, "to": "mm"},

6679
   "name": "PA_SU_LINE_STIPPLE_VALUE",

6680
   "type_ref": "PA_SU_LINE_STIPPLE_VALUE"

6681
  },

6682
  {

6683
   "chips": ["gfx7"],

6684
   "map": {"at": 199172, "to": "mm"},

6685
   "name": "PA_SC_LINE_STIPPLE_STATE",

6686
   "type_ref": "PA_SC_LINE_STIPPLE_STATE"

6687
  },

6688
  {

6689
   "chips": ["gfx7"],

6690
   "map": {"at": 199184, "to": "mm"},

6691
   "name": "PA_SC_SCREEN_EXTENT_MIN_0",

6692
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"

6693
  },

6694
  {

6695
   "chips": ["gfx7"],

6696
   "map": {"at": 199188, "to": "mm"},

6697
   "name": "PA_SC_SCREEN_EXTENT_MAX_0",

6698
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"

6699
  },

6700
  {

6701
   "chips": ["gfx7"],

6702
   "map": {"at": 199192, "to": "mm"},

6703
   "name": "PA_SC_SCREEN_EXTENT_MIN_1",

6704
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"

6705
  },

6706
  {

6707
   "chips": ["gfx7"],

6708
   "map": {"at": 199212, "to": "mm"},

6709
   "name": "PA_SC_SCREEN_EXTENT_MAX_1",

6710
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"

6711
  },

6712
  {

6713
   "chips": ["gfx7"],

6714
   "map": {"at": 199296, "to": "mm"},

6715
   "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",

6716
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"

6717
  },

6718
  {

6719
   "chips": ["gfx7"],

6720
   "map": {"at": 199300, "to": "mm"},

6721
   "name": "PA_SC_P3D_TRAP_SCREEN_H",

6722
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"

6723
  },

6724
  {

6725
   "chips": ["gfx7"],

6726
   "map": {"at": 199304, "to": "mm"},

6727
   "name": "PA_SC_P3D_TRAP_SCREEN_V",

6728
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"

6729
  },

6730
  {

6731
   "chips": ["gfx7"],

6732
   "map": {"at": 199308, "to": "mm"},

6733
   "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",

6734
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6735
  },

6736
  {

6737
   "chips": ["gfx7"],

6738
   "map": {"at": 199312, "to": "mm"},

6739
   "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",

6740
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6741
  },

6742
  {

6743
   "chips": ["gfx7"],

6744
   "map": {"at": 199328, "to": "mm"},

6745
   "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",

6746
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"

6747
  },

6748
  {

6749
   "chips": ["gfx7"],

6750
   "map": {"at": 199332, "to": "mm"},

6751
   "name": "PA_SC_HP3D_TRAP_SCREEN_H",

6752
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"

6753
  },

6754
  {

6755
   "chips": ["gfx7"],

6756
   "map": {"at": 199336, "to": "mm"},

6757
   "name": "PA_SC_HP3D_TRAP_SCREEN_V",

6758
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"

6759
  },

6760
  {

6761
   "chips": ["gfx7"],

6762
   "map": {"at": 199340, "to": "mm"},

6763
   "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",

6764
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6765
  },

6766
  {

6767
   "chips": ["gfx7"],

6768
   "map": {"at": 199344, "to": "mm"},

6769
   "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",

6770
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6771
  },

6772
  {

6773
   "chips": ["gfx7"],

6774
   "map": {"at": 199360, "to": "mm"},

6775
   "name": "PA_SC_TRAP_SCREEN_HV_EN",

6776
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"

6777
  },

6778
  {

6779
   "chips": ["gfx7"],

6780
   "map": {"at": 199364, "to": "mm"},

6781
   "name": "PA_SC_TRAP_SCREEN_H",

6782
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"

6783
  },

6784
  {

6785
   "chips": ["gfx7"],

6786
   "map": {"at": 199368, "to": "mm"},

6787
   "name": "PA_SC_TRAP_SCREEN_V",

6788
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"

6789
  },

6790
  {

6791
   "chips": ["gfx7"],

6792
   "map": {"at": 199372, "to": "mm"},

6793
   "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",

6794
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6795
  },

6796
  {

6797
   "chips": ["gfx7"],

6798
   "map": {"at": 199376, "to": "mm"},

6799
   "name": "PA_SC_TRAP_SCREEN_COUNT",

6800
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

6801
  },

6802
  {

6803
   "chips": ["gfx7"],

6804
   "map": {"at": 199936, "to": "mm"},

6805
   "name": "SQ_THREAD_TRACE_USERDATA_0"

6806
  },

6807
  {

6808
   "chips": ["gfx7"],

6809
   "map": {"at": 199940, "to": "mm"},

6810
   "name": "SQ_THREAD_TRACE_USERDATA_1"

6811
  },

6812
  {

6813
   "chips": ["gfx7"],

6814
   "map": {"at": 199944, "to": "mm"},

6815
   "name": "SQ_THREAD_TRACE_USERDATA_2"

6816
  },

6817
  {

6818
   "chips": ["gfx7"],

6819
   "map": {"at": 199948, "to": "mm"},

6820
   "name": "SQ_THREAD_TRACE_USERDATA_3"

6821
  },

6822
  {

6823
   "chips": ["gfx7"],

6824
   "map": {"at": 199968, "to": "mm"},

6825
   "name": "SQC_CACHES",

6826
   "type_ref": "SQC_CACHES"

6827
  },

6828
  {

6829
   "chips": ["gfx7"],

6830
   "map": {"at": 200192, "to": "mm"},

6831
   "name": "TA_CS_BC_BASE_ADDR"

6832
  },

6833
  {

6834
   "chips": ["gfx7"],

6835
   "map": {"at": 200196, "to": "mm"},

6836
   "name": "TA_CS_BC_BASE_ADDR_HI",

6837
   "type_ref": "TA_BC_BASE_ADDR_HI"

6838
  },

6839
  {

6840
   "chips": ["gfx7"],

6841
   "map": {"at": 200448, "to": "mm"},

6842
   "name": "DB_OCCLUSION_COUNT0_LOW"

6843
  },

6844
  {

6845
   "chips": ["gfx7"],

6846
   "map": {"at": 200452, "to": "mm"},

6847
   "name": "DB_OCCLUSION_COUNT0_HI",

6848
   "type_ref": "DB_ZPASS_COUNT_HI"

6849
  },

6850
  {

6851
   "chips": ["gfx7"],

6852
   "map": {"at": 200456, "to": "mm"},

6853
   "name": "DB_OCCLUSION_COUNT1_LOW"

6854
  },

6855
  {

6856
   "chips": ["gfx7"],

6857
   "map": {"at": 200460, "to": "mm"},

6858
   "name": "DB_OCCLUSION_COUNT1_HI",

6859
   "type_ref": "DB_ZPASS_COUNT_HI"

6860
  },

6861
  {

6862
   "chips": ["gfx7"],

6863
   "map": {"at": 200464, "to": "mm"},

6864
   "name": "DB_OCCLUSION_COUNT2_LOW"

6865
  },

6866
  {

6867
   "chips": ["gfx7"],

6868
   "map": {"at": 200468, "to": "mm"},

6869
   "name": "DB_OCCLUSION_COUNT2_HI",

6870
   "type_ref": "DB_ZPASS_COUNT_HI"

6871
  },

6872
  {

6873
   "chips": ["gfx7"],

6874
   "map": {"at": 200472, "to": "mm"},

6875
   "name": "DB_OCCLUSION_COUNT3_LOW"

6876
  },

6877
  {

6878
   "chips": ["gfx7"],

6879
   "map": {"at": 200476, "to": "mm"},

6880
   "name": "DB_OCCLUSION_COUNT3_HI",

6881
   "type_ref": "DB_ZPASS_COUNT_HI"

6882
  },

6883
  {

6884
   "chips": ["gfx7"],

6885
   "map": {"at": 200696, "to": "mm"},

6886
   "name": "DB_ZPASS_COUNT_LOW"

6887
  },

6888
  {

6889
   "chips": ["gfx7"],

6890
   "map": {"at": 200700, "to": "mm"},

6891
   "name": "DB_ZPASS_COUNT_HI",

6892
   "type_ref": "DB_ZPASS_COUNT_HI"

6893
  },

6894
  {

6895
   "chips": ["gfx7"],

6896
   "map": {"at": 200704, "to": "mm"},

6897
   "name": "GDS_RD_ADDR"

6898
  },

6899
  {

6900
   "chips": ["gfx7"],

6901
   "map": {"at": 200708, "to": "mm"},

6902
   "name": "GDS_RD_DATA"

6903
  },

6904
  {

6905
   "chips": ["gfx7"],

6906
   "map": {"at": 200712, "to": "mm"},

6907
   "name": "GDS_RD_BURST_ADDR"

6908
  },

6909
  {

6910
   "chips": ["gfx7"],

6911
   "map": {"at": 200716, "to": "mm"},

6912
   "name": "GDS_RD_BURST_COUNT"

6913
  },

6914
  {

6915
   "chips": ["gfx7"],

6916
   "map": {"at": 200720, "to": "mm"},

6917
   "name": "GDS_RD_BURST_DATA"

6918
  },

6919
  {

6920
   "chips": ["gfx7"],

6921
   "map": {"at": 200724, "to": "mm"},

6922
   "name": "GDS_WR_ADDR"

6923
  },

6924
  {

6925
   "chips": ["gfx7"],

6926
   "map": {"at": 200728, "to": "mm"},

6927
   "name": "GDS_WR_DATA"

6928
  },

6929
  {

6930
   "chips": ["gfx7"],

6931
   "map": {"at": 200732, "to": "mm"},

6932
   "name": "GDS_WR_BURST_ADDR"

6933
  },

6934
  {

6935
   "chips": ["gfx7"],

6936
   "map": {"at": 200736, "to": "mm"},

6937
   "name": "GDS_WR_BURST_DATA"

6938
  },

6939
  {

6940
   "chips": ["gfx7"],

6941
   "map": {"at": 200740, "to": "mm"},

6942
   "name": "GDS_WRITE_COMPLETE"

6943
  },

6944
  {

6945
   "chips": ["gfx7"],

6946
   "map": {"at": 200744, "to": "mm"},

6947
   "name": "GDS_ATOM_CNTL",

6948
   "type_ref": "GDS_ATOM_CNTL"

6949
  },

6950
  {

6951
   "chips": ["gfx7"],

6952
   "map": {"at": 200748, "to": "mm"},

6953
   "name": "GDS_ATOM_COMPLETE",

6954
   "type_ref": "GDS_ATOM_COMPLETE"

6955
  },

6956
  {

6957
   "chips": ["gfx7"],

6958
   "map": {"at": 200752, "to": "mm"},

6959
   "name": "GDS_ATOM_BASE",

6960
   "type_ref": "GDS_ATOM_BASE"

6961
  },

6962
  {

6963
   "chips": ["gfx7"],

6964
   "map": {"at": 200756, "to": "mm"},

6965
   "name": "GDS_ATOM_SIZE",

6966
   "type_ref": "GDS_ATOM_SIZE"

6967
  },

6968
  {

6969
   "chips": ["gfx7"],

6970
   "map": {"at": 200760, "to": "mm"},

6971
   "name": "GDS_ATOM_OFFSET0",

6972
   "type_ref": "GDS_ATOM_OFFSET0"

6973
  },

6974
  {

6975
   "chips": ["gfx7"],

6976
   "map": {"at": 200764, "to": "mm"},

6977
   "name": "GDS_ATOM_OFFSET1",

6978
   "type_ref": "GDS_ATOM_OFFSET1"

6979
  },

6980
  {

6981
   "chips": ["gfx7"],

6982
   "map": {"at": 200768, "to": "mm"},

6983
   "name": "GDS_ATOM_DST"

6984
  },

6985
  {

6986
   "chips": ["gfx7"],

6987
   "map": {"at": 200772, "to": "mm"},

6988
   "name": "GDS_ATOM_OP",

6989
   "type_ref": "GDS_ATOM_OP"

6990
  },

6991
  {

6992
   "chips": ["gfx7"],

6993
   "map": {"at": 200776, "to": "mm"},

6994
   "name": "GDS_ATOM_SRC0"

6995
  },

6996
  {

6997
   "chips": ["gfx7"],

6998
   "map": {"at": 200780, "to": "mm"},

6999
   "name": "GDS_ATOM_SRC0_U"

7000
  },

7001
  {

7002
   "chips": ["gfx7"],

7003
   "map": {"at": 200784, "to": "mm"},

7004
   "name": "GDS_ATOM_SRC1"

7005
  },

7006
  {

7007
   "chips": ["gfx7"],

7008
   "map": {"at": 200788, "to": "mm"},

7009
   "name": "GDS_ATOM_SRC1_U"

7010
  },

7011
  {

7012
   "chips": ["gfx7"],

7013
   "map": {"at": 200792, "to": "mm"},

7014
   "name": "GDS_ATOM_READ0"

7015
  },

7016
  {

7017
   "chips": ["gfx7"],

7018
   "map": {"at": 200796, "to": "mm"},

7019
   "name": "GDS_ATOM_READ0_U"

7020
  },

7021
  {

7022
   "chips": ["gfx7"],

7023
   "map": {"at": 200800, "to": "mm"},

7024
   "name": "GDS_ATOM_READ1"

7025
  },

7026
  {

7027
   "chips": ["gfx7"],

7028
   "map": {"at": 200804, "to": "mm"},

7029
   "name": "GDS_ATOM_READ1_U"

7030
  },

7031
  {

7032
   "chips": ["gfx7"],

7033
   "map": {"at": 200808, "to": "mm"},

7034
   "name": "GDS_GWS_RESOURCE_CNTL",

7035
   "type_ref": "GDS_GWS_RESOURCE_CNTL"

7036
  },

7037
  {

7038
   "chips": ["gfx7"],

7039
   "map": {"at": 200812, "to": "mm"},

7040
   "name": "GDS_GWS_RESOURCE",

7041
   "type_ref": "GDS_GWS_RESOURCE"

7042
  },

7043
  {

7044
   "chips": ["gfx7"],

7045
   "map": {"at": 200816, "to": "mm"},

7046
   "name": "GDS_GWS_RESOURCE_CNT",

7047
   "type_ref": "GDS_GWS_RESOURCE_CNT"

7048
  },

7049
  {

7050
   "chips": ["gfx7"],

7051
   "map": {"at": 200820, "to": "mm"},

7052
   "name": "GDS_OA_CNTL",

7053
   "type_ref": "GDS_OA_CNTL"

7054
  },

7055
  {

7056
   "chips": ["gfx7"],

7057
   "map": {"at": 200824, "to": "mm"},

7058
   "name": "GDS_OA_COUNTER"

7059
  },

7060
  {

7061
   "chips": ["gfx7"],

7062
   "map": {"at": 200828, "to": "mm"},

7063
   "name": "GDS_OA_ADDRESS",

7064
   "type_ref": "GDS_OA_ADDRESS"

7065
  },

7066
  {

7067
   "chips": ["gfx7"],

7068
   "map": {"at": 200832, "to": "mm"},

7069
   "name": "GDS_OA_INCDEC",

7070
   "type_ref": "GDS_OA_INCDEC"

7071
  },

7072
  {

7073
   "chips": ["gfx7"],

7074
   "map": {"at": 200836, "to": "mm"},

7075
   "name": "GDS_OA_RING_SIZE"

7076
  },

7077
  {

7078
   "chips": ["gfx7"],

7079
   "map": {"at": 212992, "to": "mm"},

7080
   "name": "CPG_PERFCOUNTER1_LO"

7081
  },

7082
  {

7083
   "chips": ["gfx7"],

7084
   "map": {"at": 212996, "to": "mm"},

7085
   "name": "CPG_PERFCOUNTER1_HI"

7086
  },

7087
  {

7088
   "chips": ["gfx7"],

7089
   "map": {"at": 213000, "to": "mm"},

7090
   "name": "CPG_PERFCOUNTER0_LO"

7091
  },

7092
  {

7093
   "chips": ["gfx7"],

7094
   "map": {"at": 213004, "to": "mm"},

7095
   "name": "CPG_PERFCOUNTER0_HI"

7096
  },

7097
  {

7098
   "chips": ["gfx7"],

7099
   "map": {"at": 213008, "to": "mm"},

7100
   "name": "CPC_PERFCOUNTER1_LO"

7101
  },

7102
  {

7103
   "chips": ["gfx7"],

7104
   "map": {"at": 213012, "to": "mm"},

7105
   "name": "CPC_PERFCOUNTER1_HI"

7106
  },

7107
  {

7108
   "chips": ["gfx7"],

7109
   "map": {"at": 213016, "to": "mm"},

7110
   "name": "CPC_PERFCOUNTER0_LO"

7111
  },

7112
  {

7113
   "chips": ["gfx7"],

7114
   "map": {"at": 213020, "to": "mm"},

7115
   "name": "CPC_PERFCOUNTER0_HI"

7116
  },

7117
  {

7118
   "chips": ["gfx7"],

7119
   "map": {"at": 213024, "to": "mm"},

7120
   "name": "CPF_PERFCOUNTER1_LO"

7121
  },

7122
  {

7123
   "chips": ["gfx7"],

7124
   "map": {"at": 213028, "to": "mm"},

7125
   "name": "CPF_PERFCOUNTER1_HI"

7126
  },

7127
  {

7128
   "chips": ["gfx7"],

7129
   "map": {"at": 213032, "to": "mm"},

7130
   "name": "CPF_PERFCOUNTER0_LO"

7131
  },

7132
  {

7133
   "chips": ["gfx7"],

7134
   "map": {"at": 213036, "to": "mm"},

7135
   "name": "CPF_PERFCOUNTER0_HI"

7136
  },

7137
  {

7138
   "chips": ["gfx7"],

7139
   "map": {"at": 213248, "to": "mm"},

7140
   "name": "GRBM_PERFCOUNTER0_LO"

7141
  },

7142
  {

7143
   "chips": ["gfx7"],

7144
   "map": {"at": 213252, "to": "mm"},

7145
   "name": "GRBM_PERFCOUNTER0_HI"

7146
  },

7147
  {

7148
   "chips": ["gfx7"],

7149
   "map": {"at": 213260, "to": "mm"},

7150
   "name": "GRBM_PERFCOUNTER1_LO"

7151
  },

7152
  {

7153
   "chips": ["gfx7"],

7154
   "map": {"at": 213264, "to": "mm"},

7155
   "name": "GRBM_PERFCOUNTER1_HI"

7156
  },

7157
  {

7158
   "chips": ["gfx7"],

7159
   "map": {"at": 213268, "to": "mm"},

7160
   "name": "GRBM_SE0_PERFCOUNTER_LO"

7161
  },

7162
  {

7163
   "chips": ["gfx7"],

7164
   "map": {"at": 213272, "to": "mm"},

7165
   "name": "GRBM_SE0_PERFCOUNTER_HI"

7166
  },

7167
  {

7168
   "chips": ["gfx7"],

7169
   "map": {"at": 213276, "to": "mm"},

7170
   "name": "GRBM_SE1_PERFCOUNTER_LO"

7171
  },

7172
  {

7173
   "chips": ["gfx7"],

7174
   "map": {"at": 213280, "to": "mm"},

7175
   "name": "GRBM_SE1_PERFCOUNTER_HI"

7176
  },

7177
  {

7178
   "chips": ["gfx7"],

7179
   "map": {"at": 213284, "to": "mm"},

7180
   "name": "GRBM_SE2_PERFCOUNTER_LO"

7181
  },

7182
  {

7183
   "chips": ["gfx7"],

7184
   "map": {"at": 213288, "to": "mm"},

7185
   "name": "GRBM_SE2_PERFCOUNTER_HI"

7186
  },

7187
  {

7188
   "chips": ["gfx7"],

7189
   "map": {"at": 213292, "to": "mm"},

7190
   "name": "GRBM_SE3_PERFCOUNTER_LO"

7191
  },

7192
  {

7193
   "chips": ["gfx7"],

7194
   "map": {"at": 213296, "to": "mm"},

7195
   "name": "GRBM_SE3_PERFCOUNTER_HI"

7196
  },

7197
  {

7198
   "chips": ["gfx7"],

7199
   "map": {"at": 213504, "to": "mm"},

7200
   "name": "WD_PERFCOUNTER0_LO"

7201
  },

7202
  {

7203
   "chips": ["gfx7"],

7204
   "map": {"at": 213508, "to": "mm"},

7205
   "name": "WD_PERFCOUNTER0_HI"

7206
  },

7207
  {

7208
   "chips": ["gfx7"],

7209
   "map": {"at": 213512, "to": "mm"},

7210
   "name": "WD_PERFCOUNTER1_LO"

7211
  },

7212
  {

7213
   "chips": ["gfx7"],

7214
   "map": {"at": 213516, "to": "mm"},

7215
   "name": "WD_PERFCOUNTER1_HI"

7216
  },

7217
  {

7218
   "chips": ["gfx7"],

7219
   "map": {"at": 213520, "to": "mm"},

7220
   "name": "WD_PERFCOUNTER2_LO"

7221
  },

7222
  {

7223
   "chips": ["gfx7"],

7224
   "map": {"at": 213524, "to": "mm"},

7225
   "name": "WD_PERFCOUNTER2_HI"

7226
  },

7227
  {

7228
   "chips": ["gfx7"],

7229
   "map": {"at": 213528, "to": "mm"},

7230
   "name": "WD_PERFCOUNTER3_LO"

7231
  },

7232
  {

7233
   "chips": ["gfx7"],

7234
   "map": {"at": 213532, "to": "mm"},

7235
   "name": "WD_PERFCOUNTER3_HI"

7236
  },

7237
  {

7238
   "chips": ["gfx7"],

7239
   "map": {"at": 213536, "to": "mm"},

7240
   "name": "IA_PERFCOUNTER0_LO"

7241
  },

7242
  {

7243
   "chips": ["gfx7"],

7244
   "map": {"at": 213540, "to": "mm"},

7245
   "name": "IA_PERFCOUNTER0_HI"

7246
  },

7247
  {

7248
   "chips": ["gfx7"],

7249
   "map": {"at": 213544, "to": "mm"},

7250
   "name": "IA_PERFCOUNTER1_LO"

7251
  },

7252
  {

7253
   "chips": ["gfx7"],

7254
   "map": {"at": 213548, "to": "mm"},

7255
   "name": "IA_PERFCOUNTER1_HI"

7256
  },

7257
  {

7258
   "chips": ["gfx7"],

7259
   "map": {"at": 213552, "to": "mm"},

7260
   "name": "IA_PERFCOUNTER2_LO"

7261
  },

7262
  {

7263
   "chips": ["gfx7"],

7264
   "map": {"at": 213556, "to": "mm"},

7265
   "name": "IA_PERFCOUNTER2_HI"

7266
  },

7267
  {

7268
   "chips": ["gfx7"],

7269
   "map": {"at": 213560, "to": "mm"},

7270
   "name": "IA_PERFCOUNTER3_LO"

7271
  },

7272
  {

7273
   "chips": ["gfx7"],

7274
   "map": {"at": 213564, "to": "mm"},

7275
   "name": "IA_PERFCOUNTER3_HI"

7276
  },

7277
  {

7278
   "chips": ["gfx7"],

7279
   "map": {"at": 213568, "to": "mm"},

7280
   "name": "VGT_PERFCOUNTER0_LO"

7281
  },

7282
  {

7283
   "chips": ["gfx7"],

7284
   "map": {"at": 213572, "to": "mm"},

7285
   "name": "VGT_PERFCOUNTER0_HI"

7286
  },

7287
  {

7288
   "chips": ["gfx7"],

7289
   "map": {"at": 213576, "to": "mm"},

7290
   "name": "VGT_PERFCOUNTER1_LO"

7291
  },

7292
  {

7293
   "chips": ["gfx7"],

7294
   "map": {"at": 213580, "to": "mm"},

7295
   "name": "VGT_PERFCOUNTER1_HI"

7296
  },

7297
  {

7298
   "chips": ["gfx7"],

7299
   "map": {"at": 213584, "to": "mm"},

7300
   "name": "VGT_PERFCOUNTER2_LO"

7301
  },

7302
  {

7303
   "chips": ["gfx7"],

7304
   "map": {"at": 213588, "to": "mm"},

7305
   "name": "VGT_PERFCOUNTER2_HI"

7306
  },

7307
  {

7308
   "chips": ["gfx7"],

7309
   "map": {"at": 213592, "to": "mm"},

7310
   "name": "VGT_PERFCOUNTER3_LO"

7311
  },

7312
  {

7313
   "chips": ["gfx7"],

7314
   "map": {"at": 213596, "to": "mm"},

7315
   "name": "VGT_PERFCOUNTER3_HI"

7316
  },

7317
  {

7318
   "chips": ["gfx7"],

7319
   "map": {"at": 214016, "to": "mm"},

7320
   "name": "PA_SU_PERFCOUNTER0_LO"

7321
  },

7322
  {

7323
   "chips": ["gfx7"],

7324
   "map": {"at": 214020, "to": "mm"},

7325
   "name": "PA_SU_PERFCOUNTER0_HI",

7326
   "type_ref": "PA_SU_PERFCOUNTER0_HI"

7327
  },

7328
  {

7329
   "chips": ["gfx7"],

7330
   "map": {"at": 214024, "to": "mm"},

7331
   "name": "PA_SU_PERFCOUNTER1_LO"

7332
  },

7333
  {

7334
   "chips": ["gfx7"],

7335
   "map": {"at": 214028, "to": "mm"},

7336
   "name": "PA_SU_PERFCOUNTER1_HI",

7337
   "type_ref": "PA_SU_PERFCOUNTER0_HI"

7338
  },

7339
  {

7340
   "chips": ["gfx7"],

7341
   "map": {"at": 214032, "to": "mm"},

7342
   "name": "PA_SU_PERFCOUNTER2_LO"

7343
  },

7344
  {

7345
   "chips": ["gfx7"],

7346
   "map": {"at": 214036, "to": "mm"},

7347
   "name": "PA_SU_PERFCOUNTER2_HI",

7348
   "type_ref": "PA_SU_PERFCOUNTER0_HI"

7349
  },

7350
  {

7351
   "chips": ["gfx7"],

7352
   "map": {"at": 214040, "to": "mm"},

7353
   "name": "PA_SU_PERFCOUNTER3_LO"

7354
  },

7355
  {

7356
   "chips": ["gfx7"],

7357
   "map": {"at": 214044, "to": "mm"},

7358
   "name": "PA_SU_PERFCOUNTER3_HI",

7359
   "type_ref": "PA_SU_PERFCOUNTER0_HI"

7360
  },

7361
  {

7362
   "chips": ["gfx7"],

7363
   "map": {"at": 214272, "to": "mm"},

7364
   "name": "PA_SC_PERFCOUNTER0_LO"

7365
  },

7366
  {

7367
   "chips": ["gfx7"],

7368
   "map": {"at": 214276, "to": "mm"},

7369
   "name": "PA_SC_PERFCOUNTER0_HI"

7370
  },

7371
  {

7372
   "chips": ["gfx7"],

7373
   "map": {"at": 214280, "to": "mm"},

7374
   "name": "PA_SC_PERFCOUNTER1_LO"

7375
  },

7376
  {

7377
   "chips": ["gfx7"],

7378
   "map": {"at": 214284, "to": "mm"},

7379
   "name": "PA_SC_PERFCOUNTER1_HI"

7380
  },

7381
  {

7382
   "chips": ["gfx7"],

7383
   "map": {"at": 214288, "to": "mm"},

7384
   "name": "PA_SC_PERFCOUNTER2_LO"

7385
  },

7386
  {

7387
   "chips": ["gfx7"],

7388
   "map": {"at": 214292, "to": "mm"},

7389
   "name": "PA_SC_PERFCOUNTER2_HI"

7390
  },

7391
  {

7392
   "chips": ["gfx7"],

7393
   "map": {"at": 214296, "to": "mm"},

7394
   "name": "PA_SC_PERFCOUNTER3_LO"

7395
  },

7396
  {

7397
   "chips": ["gfx7"],

7398
   "map": {"at": 214300, "to": "mm"},

7399
   "name": "PA_SC_PERFCOUNTER3_HI"

7400
  },

7401
  {

7402
   "chips": ["gfx7"],

7403
   "map": {"at": 214304, "to": "mm"},

7404
   "name": "PA_SC_PERFCOUNTER4_LO"

7405
  },

7406
  {

7407
   "chips": ["gfx7"],

7408
   "map": {"at": 214308, "to": "mm"},

7409
   "name": "PA_SC_PERFCOUNTER4_HI"

7410
  },

7411
  {

7412
   "chips": ["gfx7"],

7413
   "map": {"at": 214312, "to": "mm"},

7414
   "name": "PA_SC_PERFCOUNTER5_LO"

7415
  },

7416
  {

7417
   "chips": ["gfx7"],

7418
   "map": {"at": 214316, "to": "mm"},

7419
   "name": "PA_SC_PERFCOUNTER5_HI"

7420
  },

7421
  {

7422
   "chips": ["gfx7"],

7423
   "map": {"at": 214320, "to": "mm"},

7424
   "name": "PA_SC_PERFCOUNTER6_LO"

7425
  },

7426
  {

7427
   "chips": ["gfx7"],

7428
   "map": {"at": 214324, "to": "mm"},

7429
   "name": "PA_SC_PERFCOUNTER6_HI"

7430
  },

7431
  {

7432
   "chips": ["gfx7"],

7433
   "map": {"at": 214328, "to": "mm"},

7434
   "name": "PA_SC_PERFCOUNTER7_LO"

7435
  },

7436
  {

7437
   "chips": ["gfx7"],

7438
   "map": {"at": 214332, "to": "mm"},

7439
   "name": "PA_SC_PERFCOUNTER7_HI"

7440
  },

7441
  {

7442
   "chips": ["gfx7"],

7443
   "map": {"at": 214528, "to": "mm"},

7444
   "name": "SPI_PERFCOUNTER0_HI"

7445
  },

7446
  {

7447
   "chips": ["gfx7"],

7448
   "map": {"at": 214532, "to": "mm"},

7449
   "name": "SPI_PERFCOUNTER0_LO"

7450
  },

7451
  {

7452
   "chips": ["gfx7"],

7453
   "map": {"at": 214536, "to": "mm"},

7454
   "name": "SPI_PERFCOUNTER1_HI"

7455
  },

7456
  {

7457
   "chips": ["gfx7"],

7458
   "map": {"at": 214540, "to": "mm"},

7459
   "name": "SPI_PERFCOUNTER1_LO"

7460
  },

7461
  {

7462
   "chips": ["gfx7"],

7463
   "map": {"at": 214544, "to": "mm"},

7464
   "name": "SPI_PERFCOUNTER2_HI"

7465
  },

7466
  {

7467
   "chips": ["gfx7"],

7468
   "map": {"at": 214548, "to": "mm"},

7469
   "name": "SPI_PERFCOUNTER2_LO"

7470
  },

7471
  {

7472
   "chips": ["gfx7"],

7473
   "map": {"at": 214552, "to": "mm"},

7474
   "name": "SPI_PERFCOUNTER3_HI"

7475
  },

7476
  {

7477
   "chips": ["gfx7"],

7478
   "map": {"at": 214556, "to": "mm"},

7479
   "name": "SPI_PERFCOUNTER3_LO"

7480
  },

7481
  {

7482
   "chips": ["gfx7"],

7483
   "map": {"at": 214560, "to": "mm"},

7484
   "name": "SPI_PERFCOUNTER4_HI"

7485
  },

7486
  {

7487
   "chips": ["gfx7"],

7488
   "map": {"at": 214564, "to": "mm"},

7489
   "name": "SPI_PERFCOUNTER4_LO"

7490
  },

7491
  {

7492
   "chips": ["gfx7"],

7493
   "map": {"at": 214568, "to": "mm"},

7494
   "name": "SPI_PERFCOUNTER5_HI"

7495
  },

7496
  {

7497
   "chips": ["gfx7"],

7498
   "map": {"at": 214572, "to": "mm"},

7499
   "name": "SPI_PERFCOUNTER5_LO"

7500
  },

7501
  {

7502
   "chips": ["gfx7"],

7503
   "map": {"at": 214784, "to": "mm"},

7504
   "name": "SQ_PERFCOUNTER0_LO"

7505
  },

7506
  {

7507
   "chips": ["gfx7"],

7508
   "map": {"at": 214788, "to": "mm"},

7509
   "name": "SQ_PERFCOUNTER0_HI"

7510
  },

7511
  {

7512
   "chips": ["gfx7"],

7513
   "map": {"at": 214792, "to": "mm"},

7514
   "name": "SQ_PERFCOUNTER1_LO"

7515
  },

7516
  {

7517
   "chips": ["gfx7"],

7518
   "map": {"at": 214796, "to": "mm"},

7519
   "name": "SQ_PERFCOUNTER1_HI"

7520
  },

7521
  {

7522
   "chips": ["gfx7"],

7523
   "map": {"at": 214800, "to": "mm"},

7524
   "name": "SQ_PERFCOUNTER2_LO"

7525
  },

7526
  {

7527
   "chips": ["gfx7"],

7528
   "map": {"at": 214804, "to": "mm"},

7529
   "name": "SQ_PERFCOUNTER2_HI"

7530
  },

7531
  {

7532
   "chips": ["gfx7"],

7533
   "map": {"at": 214808, "to": "mm"},

7534
   "name": "SQ_PERFCOUNTER3_LO"

7535
  },

7536
  {

7537
   "chips": ["gfx7"],

7538
   "map": {"at": 214812, "to": "mm"},

7539
   "name": "SQ_PERFCOUNTER3_HI"

7540
  },

7541
  {

7542
   "chips": ["gfx7"],

7543
   "map": {"at": 214816, "to": "mm"},

7544
   "name": "SQ_PERFCOUNTER4_LO"

7545
  },

7546
  {

7547
   "chips": ["gfx7"],

7548
   "map": {"at": 214820, "to": "mm"},

7549
   "name": "SQ_PERFCOUNTER4_HI"

7550
  },

7551
  {

7552
   "chips": ["gfx7"],

7553
   "map": {"at": 214824, "to": "mm"},

7554
   "name": "SQ_PERFCOUNTER5_LO"

7555
  },

7556
  {

7557
   "chips": ["gfx7"],

7558
   "map": {"at": 214828, "to": "mm"},

7559
   "name": "SQ_PERFCOUNTER5_HI"

7560
  },

7561
  {

7562
   "chips": ["gfx7"],

7563
   "map": {"at": 214832, "to": "mm"},

7564
   "name": "SQ_PERFCOUNTER6_LO"

7565
  },

7566
  {

7567
   "chips": ["gfx7"],

7568
   "map": {"at": 214836, "to": "mm"},

7569
   "name": "SQ_PERFCOUNTER6_HI"

7570
  },

7571
  {

7572
   "chips": ["gfx7"],

7573
   "map": {"at": 214840, "to": "mm"},

7574
   "name": "SQ_PERFCOUNTER7_LO"

7575
  },

7576
  {

7577
   "chips": ["gfx7"],

7578
   "map": {"at": 214844, "to": "mm"},

7579
   "name": "SQ_PERFCOUNTER7_HI"

7580
  },

7581
  {

7582
   "chips": ["gfx7"],

7583
   "map": {"at": 214848, "to": "mm"},

7584
   "name": "SQ_PERFCOUNTER8_LO"

7585
  },

7586
  {

7587
   "chips": ["gfx7"],

7588
   "map": {"at": 214852, "to": "mm"},

7589
   "name": "SQ_PERFCOUNTER8_HI"

7590
  },

7591
  {

7592
   "chips": ["gfx7"],

7593
   "map": {"at": 214856, "to": "mm"},

7594
   "name": "SQ_PERFCOUNTER9_LO"

7595
  },

7596
  {

7597
   "chips": ["gfx7"],

7598
   "map": {"at": 214860, "to": "mm"},

7599
   "name": "SQ_PERFCOUNTER9_HI"

7600
  },

7601
  {

7602
   "chips": ["gfx7"],

7603
   "map": {"at": 214864, "to": "mm"},

7604
   "name": "SQ_PERFCOUNTER10_LO"

7605
  },

7606
  {

7607
   "chips": ["gfx7"],

7608
   "map": {"at": 214868, "to": "mm"},

7609
   "name": "SQ_PERFCOUNTER10_HI"

7610
  },

7611
  {

7612
   "chips": ["gfx7"],

7613
   "map": {"at": 214872, "to": "mm"},

7614
   "name": "SQ_PERFCOUNTER11_LO"

7615
  },

7616
  {

7617
   "chips": ["gfx7"],

7618
   "map": {"at": 214876, "to": "mm"},

7619
   "name": "SQ_PERFCOUNTER11_HI"

7620
  },

7621
  {

7622
   "chips": ["gfx7"],

7623
   "map": {"at": 214880, "to": "mm"},

7624
   "name": "SQ_PERFCOUNTER12_LO"

7625
  },

7626
  {

7627
   "chips": ["gfx7"],

7628
   "map": {"at": 214884, "to": "mm"},

7629
   "name": "SQ_PERFCOUNTER12_HI"

7630
  },

7631
  {

7632
   "chips": ["gfx7"],

7633
   "map": {"at": 214888, "to": "mm"},

7634
   "name": "SQ_PERFCOUNTER13_LO"

7635
  },

7636
  {

7637
   "chips": ["gfx7"],

7638
   "map": {"at": 214892, "to": "mm"},

7639
   "name": "SQ_PERFCOUNTER13_HI"

7640
  },

7641
  {

7642
   "chips": ["gfx7"],

7643
   "map": {"at": 214896, "to": "mm"},

7644
   "name": "SQ_PERFCOUNTER14_LO"

7645
  },

7646
  {

7647
   "chips": ["gfx7"],

7648
   "map": {"at": 214900, "to": "mm"},

7649
   "name": "SQ_PERFCOUNTER14_HI"

7650
  },

7651
  {

7652
   "chips": ["gfx7"],

7653
   "map": {"at": 214904, "to": "mm"},

7654
   "name": "SQ_PERFCOUNTER15_LO"

7655
  },

7656
  {

7657
   "chips": ["gfx7"],

7658
   "map": {"at": 214908, "to": "mm"},

7659
   "name": "SQ_PERFCOUNTER15_HI"

7660
  },

7661
  {

7662
   "chips": ["gfx7"],

7663
   "map": {"at": 215296, "to": "mm"},

7664
   "name": "SX_PERFCOUNTER0_LO"

7665
  },

7666
  {

7667
   "chips": ["gfx7"],

7668
   "map": {"at": 215300, "to": "mm"},

7669
   "name": "SX_PERFCOUNTER0_HI"

7670
  },

7671
  {

7672
   "chips": ["gfx7"],

7673
   "map": {"at": 215304, "to": "mm"},

7674
   "name": "SX_PERFCOUNTER1_LO"

7675
  },

7676
  {

7677
   "chips": ["gfx7"],

7678
   "map": {"at": 215308, "to": "mm"},

7679
   "name": "SX_PERFCOUNTER1_HI"

7680
  },

7681
  {

7682
   "chips": ["gfx7"],

7683
   "map": {"at": 215312, "to": "mm"},

7684
   "name": "SX_PERFCOUNTER2_LO"

7685
  },

7686
  {

7687
   "chips": ["gfx7"],

7688
   "map": {"at": 215316, "to": "mm"},

7689
   "name": "SX_PERFCOUNTER2_HI"

7690
  },

7691
  {

7692
   "chips": ["gfx7"],

7693
   "map": {"at": 215320, "to": "mm"},

7694
   "name": "SX_PERFCOUNTER3_LO"

7695
  },

7696
  {

7697
   "chips": ["gfx7"],

7698
   "map": {"at": 215324, "to": "mm"},

7699
   "name": "SX_PERFCOUNTER3_HI"

7700
  },

7701
  {

7702
   "chips": ["gfx7"],

7703
   "map": {"at": 215552, "to": "mm"},

7704
   "name": "GDS_PERFCOUNTER0_LO"

7705
  },

7706
  {

7707
   "chips": ["gfx7"],

7708
   "map": {"at": 215556, "to": "mm"},

7709
   "name": "GDS_PERFCOUNTER0_HI"

7710
  },

7711
  {

7712
   "chips": ["gfx7"],

7713
   "map": {"at": 215560, "to": "mm"},

7714
   "name": "GDS_PERFCOUNTER1_LO"

7715
  },

7716
  {

7717
   "chips": ["gfx7"],

7718
   "map": {"at": 215564, "to": "mm"},

7719
   "name": "GDS_PERFCOUNTER1_HI"

7720
  },

7721
  {

7722
   "chips": ["gfx7"],

7723
   "map": {"at": 215568, "to": "mm"},

7724
   "name": "GDS_PERFCOUNTER2_LO"

7725
  },

7726
  {

7727
   "chips": ["gfx7"],

7728
   "map": {"at": 215572, "to": "mm"},

7729
   "name": "GDS_PERFCOUNTER2_HI"

7730
  },

7731
  {

7732
   "chips": ["gfx7"],

7733
   "map": {"at": 215576, "to": "mm"},

7734
   "name": "GDS_PERFCOUNTER3_LO"

7735
  },

7736
  {

7737
   "chips": ["gfx7"],

7738
   "map": {"at": 215580, "to": "mm"},

7739
   "name": "GDS_PERFCOUNTER3_HI"

7740
  },

7741
  {

7742
   "chips": ["gfx7"],

7743
   "map": {"at": 215808, "to": "mm"},

7744
   "name": "TA_PERFCOUNTER0_LO"

7745
  },

7746
  {

7747
   "chips": ["gfx7"],

7748
   "map": {"at": 215812, "to": "mm"},

7749
   "name": "TA_PERFCOUNTER0_HI"

7750
  },

7751
  {

7752
   "chips": ["gfx7"],

7753
   "map": {"at": 215816, "to": "mm"},

7754
   "name": "TA_PERFCOUNTER1_LO"

7755
  },

7756
  {

7757
   "chips": ["gfx7"],

7758
   "map": {"at": 215820, "to": "mm"},

7759
   "name": "TA_PERFCOUNTER1_HI"

7760
  },

7761
  {

7762
   "chips": ["gfx7"],

7763
   "map": {"at": 216064, "to": "mm"},

7764
   "name": "TD_PERFCOUNTER0_LO"

7765
  },

7766
  {

7767
   "chips": ["gfx7"],

7768
   "map": {"at": 216068, "to": "mm"},

7769
   "name": "TD_PERFCOUNTER0_HI"

7770
  },

7771
  {

7772
   "chips": ["gfx7"],

7773
   "map": {"at": 216072, "to": "mm"},

7774
   "name": "TD_PERFCOUNTER1_LO"

7775
  },

7776
  {

7777
   "chips": ["gfx7"],

7778
   "map": {"at": 216076, "to": "mm"},

7779
   "name": "TD_PERFCOUNTER1_HI"

7780
  },

7781
  {

7782
   "chips": ["gfx7"],

7783
   "map": {"at": 216320, "to": "mm"},

7784
   "name": "TCP_PERFCOUNTER0_LO"

7785
  },

7786
  {

7787
   "chips": ["gfx7"],

7788
   "map": {"at": 216324, "to": "mm"},

7789
   "name": "TCP_PERFCOUNTER0_HI"

7790
  },

7791
  {

7792
   "chips": ["gfx7"],

7793
   "map": {"at": 216328, "to": "mm"},

7794
   "name": "TCP_PERFCOUNTER1_LO"

7795
  },

7796
  {

7797
   "chips": ["gfx7"],

7798
   "map": {"at": 216332, "to": "mm"},

7799
   "name": "TCP_PERFCOUNTER1_HI"

7800
  },

7801
  {

7802
   "chips": ["gfx7"],

7803
   "map": {"at": 216336, "to": "mm"},

7804
   "name": "TCP_PERFCOUNTER2_LO"

7805
  },

7806
  {

7807
   "chips": ["gfx7"],

7808
   "map": {"at": 216340, "to": "mm"},

7809
   "name": "TCP_PERFCOUNTER2_HI"

7810
  },

7811
  {

7812
   "chips": ["gfx7"],

7813
   "map": {"at": 216344, "to": "mm"},

7814
   "name": "TCP_PERFCOUNTER3_LO"

7815
  },

7816
  {

7817
   "chips": ["gfx7"],

7818
   "map": {"at": 216348, "to": "mm"},

7819
   "name": "TCP_PERFCOUNTER3_HI"

7820
  },

7821
  {

7822
   "chips": ["gfx7"],

7823
   "map": {"at": 216576, "to": "mm"},

7824
   "name": "TCC_PERFCOUNTER0_LO"

7825
  },

7826
  {

7827
   "chips": ["gfx7"],

7828
   "map": {"at": 216580, "to": "mm"},

7829
   "name": "TCC_PERFCOUNTER0_HI"

7830
  },

7831
  {

7832
   "chips": ["gfx7"],

7833
   "map": {"at": 216584, "to": "mm"},

7834
   "name": "TCC_PERFCOUNTER1_LO"

7835
  },

7836
  {

7837
   "chips": ["gfx7"],

7838
   "map": {"at": 216588, "to": "mm"},

7839
   "name": "TCC_PERFCOUNTER1_HI"

7840
  },

7841
  {

7842
   "chips": ["gfx7"],

7843
   "map": {"at": 216592, "to": "mm"},

7844
   "name": "TCC_PERFCOUNTER2_LO"

7845
  },

7846
  {

7847
   "chips": ["gfx7"],

7848
   "map": {"at": 216596, "to": "mm"},

7849
   "name": "TCC_PERFCOUNTER2_HI"

7850
  },

7851
  {

7852
   "chips": ["gfx7"],

7853
   "map": {"at": 216600, "to": "mm"},

7854
   "name": "TCC_PERFCOUNTER3_LO"

7855
  },

7856
  {

7857
   "chips": ["gfx7"],

7858
   "map": {"at": 216604, "to": "mm"},

7859
   "name": "TCC_PERFCOUNTER3_HI"

7860
  },

7861
  {

7862
   "chips": ["gfx7"],

7863
   "map": {"at": 216640, "to": "mm"},

7864
   "name": "TCA_PERFCOUNTER0_LO"

7865
  },

7866
  {

7867
   "chips": ["gfx7"],

7868
   "map": {"at": 216644, "to": "mm"},

7869
   "name": "TCA_PERFCOUNTER0_HI"

7870
  },

7871
  {

7872
   "chips": ["gfx7"],

7873
   "map": {"at": 216648, "to": "mm"},

7874
   "name": "TCA_PERFCOUNTER1_LO"

7875
  },

7876
  {

7877
   "chips": ["gfx7"],

7878
   "map": {"at": 216652, "to": "mm"},

7879
   "name": "TCA_PERFCOUNTER1_HI"

7880
  },

7881
  {

7882
   "chips": ["gfx7"],

7883
   "map": {"at": 216656, "to": "mm"},

7884
   "name": "TCA_PERFCOUNTER2_LO"

7885
  },

7886
  {

7887
   "chips": ["gfx7"],

7888
   "map": {"at": 216660, "to": "mm"},

7889
   "name": "TCA_PERFCOUNTER2_HI"

7890
  },

7891
  {

7892
   "chips": ["gfx7"],

7893
   "map": {"at": 216664, "to": "mm"},

7894
   "name": "TCA_PERFCOUNTER3_LO"

7895
  },

7896
  {

7897
   "chips": ["gfx7"],

7898
   "map": {"at": 216668, "to": "mm"},

7899
   "name": "TCA_PERFCOUNTER3_HI"

7900
  },

7901
  {

7902
   "chips": ["gfx7"],

7903
   "map": {"at": 216704, "to": "mm"},

7904
   "name": "TCS_PERFCOUNTER0_LO"

7905
  },

7906
  {

7907
   "chips": ["gfx7"],

7908
   "map": {"at": 216708, "to": "mm"},

7909
   "name": "TCS_PERFCOUNTER0_HI"

7910
  },

7911
  {

7912
   "chips": ["gfx7"],

7913
   "map": {"at": 216712, "to": "mm"},

7914
   "name": "TCS_PERFCOUNTER1_LO"

7915
  },

7916
  {

7917
   "chips": ["gfx7"],

7918
   "map": {"at": 216716, "to": "mm"},

7919
   "name": "TCS_PERFCOUNTER1_HI"

7920
  },

7921
  {

7922
   "chips": ["gfx7"],

7923
   "map": {"at": 216720, "to": "mm"},

7924
   "name": "TCS_PERFCOUNTER2_LO"

7925
  },

7926
  {

7927
   "chips": ["gfx7"],

7928
   "map": {"at": 216724, "to": "mm"},

7929
   "name": "TCS_PERFCOUNTER2_HI"

7930
  },

7931
  {

7932
   "chips": ["gfx7"],

7933
   "map": {"at": 216728, "to": "mm"},

7934
   "name": "TCS_PERFCOUNTER3_LO"

7935
  },

7936
  {

7937
   "chips": ["gfx7"],

7938
   "map": {"at": 216732, "to": "mm"},

7939
   "name": "TCS_PERFCOUNTER3_HI"

7940
  },

7941
  {

7942
   "chips": ["gfx7"],

7943
   "map": {"at": 217112, "to": "mm"},

7944
   "name": "CB_PERFCOUNTER0_LO"

7945
  },

7946
  {

7947
   "chips": ["gfx7"],

7948
   "map": {"at": 217116, "to": "mm"},

7949
   "name": "CB_PERFCOUNTER0_HI"

7950
  },

7951
  {

7952
   "chips": ["gfx7"],

7953
   "map": {"at": 217120, "to": "mm"},

7954
   "name": "CB_PERFCOUNTER1_LO"

7955
  },

7956
  {

7957
   "chips": ["gfx7"],

7958
   "map": {"at": 217124, "to": "mm"},

7959
   "name": "CB_PERFCOUNTER1_HI"

7960
  },

7961
  {

7962
   "chips": ["gfx7"],

7963
   "map": {"at": 217128, "to": "mm"},

7964
   "name": "CB_PERFCOUNTER2_LO"

7965
  },

7966
  {

7967
   "chips": ["gfx7"],

7968
   "map": {"at": 217132, "to": "mm"},

7969
   "name": "CB_PERFCOUNTER2_HI"

7970
  },

7971
  {

7972
   "chips": ["gfx7"],

7973
   "map": {"at": 217136, "to": "mm"},

7974
   "name": "CB_PERFCOUNTER3_LO"

7975
  },

7976
  {

7977
   "chips": ["gfx7"],

7978
   "map": {"at": 217140, "to": "mm"},

7979
   "name": "CB_PERFCOUNTER3_HI"

7980
  },

7981
  {

7982
   "chips": ["gfx7"],

7983
   "map": {"at": 217344, "to": "mm"},

7984
   "name": "DB_PERFCOUNTER0_LO"

7985
  },

7986
  {

7987
   "chips": ["gfx7"],

7988
   "map": {"at": 217348, "to": "mm"},

7989
   "name": "DB_PERFCOUNTER0_HI"

7990
  },

7991
  {

7992
   "chips": ["gfx7"],

7993
   "map": {"at": 217352, "to": "mm"},

7994
   "name": "DB_PERFCOUNTER1_LO"

7995
  },

7996
  {

7997
   "chips": ["gfx7"],

7998
   "map": {"at": 217356, "to": "mm"},

7999
   "name": "DB_PERFCOUNTER1_HI"

8000
  },

8001
  {

8002
   "chips": ["gfx7"],

8003
   "map": {"at": 217360, "to": "mm"},

8004
   "name": "DB_PERFCOUNTER2_LO"

8005
  },

8006
  {

8007
   "chips": ["gfx7"],

8008
   "map": {"at": 217364, "to": "mm"},

8009
   "name": "DB_PERFCOUNTER2_HI"

8010
  },

8011
  {

8012
   "chips": ["gfx7"],

8013
   "map": {"at": 217368, "to": "mm"},

8014
   "name": "DB_PERFCOUNTER3_LO"

8015
  },

8016
  {

8017
   "chips": ["gfx7"],

8018
   "map": {"at": 217372, "to": "mm"},

8019
   "name": "DB_PERFCOUNTER3_HI"

8020
  },

8021
  {

8022
   "chips": ["gfx7"],

8023
   "map": {"at": 217600, "to": "mm"},

8024
   "name": "RLC_PERFCOUNTER0_LO"

8025
  },

8026
  {

8027
   "chips": ["gfx7"],

8028
   "map": {"at": 217604, "to": "mm"},

8029
   "name": "RLC_PERFCOUNTER0_HI"

8030
  },

8031
  {

8032
   "chips": ["gfx7"],

8033
   "map": {"at": 217608, "to": "mm"},

8034
   "name": "RLC_PERFCOUNTER1_LO"

8035
  },

8036
  {

8037
   "chips": ["gfx7"],

8038
   "map": {"at": 217612, "to": "mm"},

8039
   "name": "RLC_PERFCOUNTER1_HI"

8040
  },

8041
  {

8042
   "chips": ["gfx7"],

8043
   "map": {"at": 221184, "to": "mm"},

8044
   "name": "CPG_PERFCOUNTER1_SELECT",

8045
   "type_ref": "CPG_PERFCOUNTER1_SELECT"

8046
  },

8047
  {

8048
   "chips": ["gfx7"],

8049
   "map": {"at": 221188, "to": "mm"},

8050
   "name": "CPG_PERFCOUNTER0_SELECT1",

8051
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"

8052
  },

8053
  {

8054
   "chips": ["gfx7"],

8055
   "map": {"at": 221192, "to": "mm"},

8056
   "name": "CPG_PERFCOUNTER0_SELECT",

8057
   "type_ref": "CPG_PERFCOUNTER0_SELECT"

8058
  },

8059
  {

8060
   "chips": ["gfx7"],

8061
   "map": {"at": 221196, "to": "mm"},

8062
   "name": "CPC_PERFCOUNTER1_SELECT",

8063
   "type_ref": "CPG_PERFCOUNTER1_SELECT"

8064
  },

8065
  {

8066
   "chips": ["gfx7"],

8067
   "map": {"at": 221200, "to": "mm"},

8068
   "name": "CPC_PERFCOUNTER0_SELECT1",

8069
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"

8070
  },

8071
  {

8072
   "chips": ["gfx7"],

8073
   "map": {"at": 221204, "to": "mm"},

8074
   "name": "CPF_PERFCOUNTER1_SELECT",

8075
   "type_ref": "CPG_PERFCOUNTER1_SELECT"

8076
  },

8077
  {

8078
   "chips": ["gfx7"],

8079
   "map": {"at": 221208, "to": "mm"},

8080
   "name": "CPF_PERFCOUNTER0_SELECT1",

8081
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"

8082
  },

8083
  {

8084
   "chips": ["gfx7"],

8085
   "map": {"at": 221212, "to": "mm"},

8086
   "name": "CPF_PERFCOUNTER0_SELECT",

8087
   "type_ref": "CPG_PERFCOUNTER0_SELECT"

8088
  },

8089
  {

8090
   "chips": ["gfx7"],

8091
   "map": {"at": 221216, "to": "mm"},

8092
   "name": "CP_PERFMON_CNTL",

8093
   "type_ref": "CP_PERFMON_CNTL"

8094
  },

8095
  {

8096
   "chips": ["gfx7"],

8097
   "map": {"at": 221220, "to": "mm"},

8098
   "name": "CPC_PERFCOUNTER0_SELECT",

8099
   "type_ref": "CPG_PERFCOUNTER0_SELECT"

8100
  },

8101
  {

8102
   "chips": ["gfx7"],

8103
   "map": {"at": 221248, "to": "mm"},

8104
   "name": "CP_DRAW_OBJECT"

8105
  },

8106
  {

8107
   "chips": ["gfx7"],

8108
   "map": {"at": 221252, "to": "mm"},

8109
   "name": "CP_DRAW_OBJECT_COUNTER",

8110
   "type_ref": "CP_DRAW_OBJECT_COUNTER"

8111
  },

8112
  {

8113
   "chips": ["gfx7"],

8114
   "map": {"at": 221256, "to": "mm"},

8115
   "name": "CP_DRAW_WINDOW_MASK_HI"

8116
  },

8117
  {

8118
   "chips": ["gfx7"],

8119
   "map": {"at": 221260, "to": "mm"},

8120
   "name": "CP_DRAW_WINDOW_HI"

8121
  },

8122
  {

8123
   "chips": ["gfx7"],

8124
   "map": {"at": 221264, "to": "mm"},

8125
   "name": "CP_DRAW_WINDOW_LO",

8126
   "type_ref": "CP_DRAW_WINDOW_LO"

8127
  },

8128
  {

8129
   "chips": ["gfx7"],

8130
   "map": {"at": 221268, "to": "mm"},

8131
   "name": "CP_DRAW_WINDOW_CNTL",

8132
   "type_ref": "CP_DRAW_WINDOW_CNTL"

8133
  },

8134
  {

8135
   "chips": ["gfx7"],

8136
   "map": {"at": 221440, "to": "mm"},

8137
   "name": "GRBM_PERFCOUNTER0_SELECT",

8138
   "type_ref": "GRBM_PERFCOUNTER0_SELECT"

8139
  },

8140
  {

8141
   "chips": ["gfx7"],

8142
   "map": {"at": 221444, "to": "mm"},

8143
   "name": "GRBM_PERFCOUNTER1_SELECT",

8144
   "type_ref": "GRBM_PERFCOUNTER0_SELECT"

8145
  },

8146
  {

8147
   "chips": ["gfx7"],

8148
   "map": {"at": 221448, "to": "mm"},

8149
   "name": "GRBM_SE0_PERFCOUNTER_SELECT",

8150
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"

8151
  },

8152
  {

8153
   "chips": ["gfx7"],

8154
   "map": {"at": 221452, "to": "mm"},

8155
   "name": "GRBM_SE1_PERFCOUNTER_SELECT",

8156
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"

8157
  },

8158
  {

8159
   "chips": ["gfx7"],

8160
   "map": {"at": 221456, "to": "mm"},

8161
   "name": "GRBM_SE2_PERFCOUNTER_SELECT",

8162
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"

8163
  },

8164
  {

8165
   "chips": ["gfx7"],

8166
   "map": {"at": 221460, "to": "mm"},

8167
   "name": "GRBM_SE3_PERFCOUNTER_SELECT",

8168
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"

8169
  },

8170
  {

8171
   "chips": ["gfx7"],

8172
   "map": {"at": 221696, "to": "mm"},

8173
   "name": "WD_PERFCOUNTER0_SELECT",

8174
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8175
  },

8176
  {

8177
   "chips": ["gfx7"],

8178
   "map": {"at": 221700, "to": "mm"},

8179
   "name": "WD_PERFCOUNTER1_SELECT",

8180
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8181
  },

8182
  {

8183
   "chips": ["gfx7"],

8184
   "map": {"at": 221704, "to": "mm"},

8185
   "name": "WD_PERFCOUNTER2_SELECT",

8186
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8187
  },

8188
  {

8189
   "chips": ["gfx7"],

8190
   "map": {"at": 221708, "to": "mm"},

8191
   "name": "WD_PERFCOUNTER3_SELECT",

8192
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8193
  },

8194
  {

8195
   "chips": ["gfx7"],

8196
   "map": {"at": 221712, "to": "mm"},

8197
   "name": "IA_PERFCOUNTER0_SELECT",

8198
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8199
  },

8200
  {

8201
   "chips": ["gfx7"],

8202
   "map": {"at": 221716, "to": "mm"},

8203
   "name": "IA_PERFCOUNTER1_SELECT",

8204
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8205
  },

8206
  {

8207
   "chips": ["gfx7"],

8208
   "map": {"at": 221720, "to": "mm"},

8209
   "name": "IA_PERFCOUNTER2_SELECT",

8210
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8211
  },

8212
  {

8213
   "chips": ["gfx7"],

8214
   "map": {"at": 221724, "to": "mm"},

8215
   "name": "IA_PERFCOUNTER3_SELECT",

8216
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8217
  },

8218
  {

8219
   "chips": ["gfx7"],

8220
   "map": {"at": 221728, "to": "mm"},

8221
   "name": "IA_PERFCOUNTER0_SELECT1",

8222
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8223
  },

8224
  {

8225
   "chips": ["gfx7"],

8226
   "map": {"at": 221744, "to": "mm"},

8227
   "name": "VGT_PERFCOUNTER0_SELECT",

8228
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8229
  },

8230
  {

8231
   "chips": ["gfx7"],

8232
   "map": {"at": 221748, "to": "mm"},

8233
   "name": "VGT_PERFCOUNTER1_SELECT",

8234
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8235
  },

8236
  {

8237
   "chips": ["gfx7"],

8238
   "map": {"at": 221752, "to": "mm"},

8239
   "name": "VGT_PERFCOUNTER2_SELECT",

8240
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8241
  },

8242
  {

8243
   "chips": ["gfx7"],

8244
   "map": {"at": 221756, "to": "mm"},

8245
   "name": "VGT_PERFCOUNTER3_SELECT",

8246
   "type_ref": "VGT_PERFCOUNTER2_SELECT"

8247
  },

8248
  {

8249
   "chips": ["gfx7"],

8250
   "map": {"at": 221760, "to": "mm"},

8251
   "name": "VGT_PERFCOUNTER0_SELECT1",

8252
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8253
  },

8254
  {

8255
   "chips": ["gfx7"],

8256
   "map": {"at": 221764, "to": "mm"},

8257
   "name": "VGT_PERFCOUNTER1_SELECT1",

8258
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8259
  },

8260
  {

8261
   "chips": ["gfx7"],

8262
   "map": {"at": 221776, "to": "mm"},

8263
   "name": "VGT_PERFCOUNTER_SEID_MASK",

8264
   "type_ref": "VGT_PERFCOUNTER_SEID_MASK"

8265
  },

8266
  {

8267
   "chips": ["gfx7"],

8268
   "map": {"at": 222208, "to": "mm"},

8269
   "name": "PA_SU_PERFCOUNTER0_SELECT",

8270
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8271
  },

8272
  {

8273
   "chips": ["gfx7"],

8274
   "map": {"at": 222212, "to": "mm"},

8275
   "name": "PA_SU_PERFCOUNTER0_SELECT1",

8276
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8277
  },

8278
  {

8279
   "chips": ["gfx7"],

8280
   "map": {"at": 222216, "to": "mm"},

8281
   "name": "PA_SU_PERFCOUNTER1_SELECT",

8282
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8283
  },

8284
  {

8285
   "chips": ["gfx7"],

8286
   "map": {"at": 222220, "to": "mm"},

8287
   "name": "PA_SU_PERFCOUNTER1_SELECT1",

8288
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8289
  },

8290
  {

8291
   "chips": ["gfx7"],

8292
   "map": {"at": 222224, "to": "mm"},

8293
   "name": "PA_SU_PERFCOUNTER2_SELECT",

8294
   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"

8295
  },

8296
  {

8297
   "chips": ["gfx7"],

8298
   "map": {"at": 222228, "to": "mm"},

8299
   "name": "PA_SU_PERFCOUNTER3_SELECT",

8300
   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"

8301
  },

8302
  {

8303
   "chips": ["gfx7"],

8304
   "map": {"at": 222464, "to": "mm"},

8305
   "name": "PA_SC_PERFCOUNTER0_SELECT",

8306
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8307
  },

8308
  {

8309
   "chips": ["gfx7"],

8310
   "map": {"at": 222468, "to": "mm"},

8311
   "name": "PA_SC_PERFCOUNTER0_SELECT1",

8312
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8313
  },

8314
  {

8315
   "chips": ["gfx7"],

8316
   "map": {"at": 222472, "to": "mm"},

8317
   "name": "PA_SC_PERFCOUNTER1_SELECT",

8318
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8319
  },

8320
  {

8321
   "chips": ["gfx7"],

8322
   "map": {"at": 222476, "to": "mm"},

8323
   "name": "PA_SC_PERFCOUNTER2_SELECT",

8324
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8325
  },

8326
  {

8327
   "chips": ["gfx7"],

8328
   "map": {"at": 222480, "to": "mm"},

8329
   "name": "PA_SC_PERFCOUNTER3_SELECT",

8330
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8331
  },

8332
  {

8333
   "chips": ["gfx7"],

8334
   "map": {"at": 222484, "to": "mm"},

8335
   "name": "PA_SC_PERFCOUNTER4_SELECT",

8336
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8337
  },

8338
  {

8339
   "chips": ["gfx7"],

8340
   "map": {"at": 222488, "to": "mm"},

8341
   "name": "PA_SC_PERFCOUNTER5_SELECT",

8342
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8343
  },

8344
  {

8345
   "chips": ["gfx7"],

8346
   "map": {"at": 222492, "to": "mm"},

8347
   "name": "PA_SC_PERFCOUNTER6_SELECT",

8348
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8349
  },

8350
  {

8351
   "chips": ["gfx7"],

8352
   "map": {"at": 222496, "to": "mm"},

8353
   "name": "PA_SC_PERFCOUNTER7_SELECT",

8354
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"

8355
  },

8356
  {

8357
   "chips": ["gfx7"],

8358
   "map": {"at": 222720, "to": "mm"},

8359
   "name": "SPI_PERFCOUNTER0_SELECT",

8360
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8361
  },

8362
  {

8363
   "chips": ["gfx7"],

8364
   "map": {"at": 222724, "to": "mm"},

8365
   "name": "SPI_PERFCOUNTER1_SELECT",

8366
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8367
  },

8368
  {

8369
   "chips": ["gfx7"],

8370
   "map": {"at": 222728, "to": "mm"},

8371
   "name": "SPI_PERFCOUNTER2_SELECT",

8372
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8373
  },

8374
  {

8375
   "chips": ["gfx7"],

8376
   "map": {"at": 222732, "to": "mm"},

8377
   "name": "SPI_PERFCOUNTER3_SELECT",

8378
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"

8379
  },

8380
  {

8381
   "chips": ["gfx7"],

8382
   "map": {"at": 222736, "to": "mm"},

8383
   "name": "SPI_PERFCOUNTER0_SELECT1",

8384
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8385
  },

8386
  {

8387
   "chips": ["gfx7"],

8388
   "map": {"at": 222740, "to": "mm"},

8389
   "name": "SPI_PERFCOUNTER1_SELECT1",

8390
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8391
  },

8392
  {

8393
   "chips": ["gfx7"],

8394
   "map": {"at": 222744, "to": "mm"},

8395
   "name": "SPI_PERFCOUNTER2_SELECT1",

8396
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8397
  },

8398
  {

8399
   "chips": ["gfx7"],

8400
   "map": {"at": 222748, "to": "mm"},

8401
   "name": "SPI_PERFCOUNTER3_SELECT1",

8402
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"

8403
  },

8404
  {

8405
   "chips": ["gfx7"],

8406
   "map": {"at": 222752, "to": "mm"},

8407
   "name": "SPI_PERFCOUNTER4_SELECT",

8408
   "type_ref": "SPI_PERFCOUNTER4_SELECT"

8409
  },

8410
  {

8411
   "chips": ["gfx7"],

8412
   "map": {"at": 222756, "to": "mm"},

8413
   "name": "SPI_PERFCOUNTER5_SELECT",

8414
   "type_ref": "SPI_PERFCOUNTER4_SELECT"

8415
  },

8416
  {

8417
   "chips": ["gfx7"],

8418
   "map": {"at": 222760, "to": "mm"},

8419
   "name": "SPI_PERFCOUNTER_BINS",

8420
   "type_ref": "SPI_PERFCOUNTER_BINS"

8421
  },

8422
  {

8423
   "chips": ["gfx7"],

8424
   "map": {"at": 222976, "to": "mm"},

8425
   "name": "SQ_PERFCOUNTER0_SELECT",

8426
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8427
  },

8428
  {

8429
   "chips": ["gfx7"],

8430
   "map": {"at": 222980, "to": "mm"},

8431
   "name": "SQ_PERFCOUNTER1_SELECT",

8432
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8433
  },

8434
  {

8435
   "chips": ["gfx7"],

8436
   "map": {"at": 222984, "to": "mm"},

8437
   "name": "SQ_PERFCOUNTER2_SELECT",

8438
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8439
  },

8440
  {

8441
   "chips": ["gfx7"],

8442
   "map": {"at": 222988, "to": "mm"},

8443
   "name": "SQ_PERFCOUNTER3_SELECT",

8444
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8445
  },

8446
  {

8447
   "chips": ["gfx7"],

8448
   "map": {"at": 222992, "to": "mm"},

8449
   "name": "SQ_PERFCOUNTER4_SELECT",

8450
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8451
  },

8452
  {

8453
   "chips": ["gfx7"],

8454
   "map": {"at": 222996, "to": "mm"},

8455
   "name": "SQ_PERFCOUNTER5_SELECT",

8456
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8457
  },

8458
  {

8459
   "chips": ["gfx7"],

8460
   "map": {"at": 223000, "to": "mm"},

8461
   "name": "SQ_PERFCOUNTER6_SELECT",

8462
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8463
  },

8464
  {

8465
   "chips": ["gfx7"],

8466
   "map": {"at": 223004, "to": "mm"},

8467
   "name": "SQ_PERFCOUNTER7_SELECT",

8468
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8469
  },

8470
  {

8471
   "chips": ["gfx7"],

8472
   "map": {"at": 223008, "to": "mm"},

8473
   "name": "SQ_PERFCOUNTER8_SELECT",

8474
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8475
  },

8476
  {

8477
   "chips": ["gfx7"],

8478
   "map": {"at": 223012, "to": "mm"},

8479
   "name": "SQ_PERFCOUNTER9_SELECT",

8480
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8481
  },

8482
  {

8483
   "chips": ["gfx7"],

8484
   "map": {"at": 223016, "to": "mm"},

8485
   "name": "SQ_PERFCOUNTER10_SELECT",

8486
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8487
  },

8488
  {

8489
   "chips": ["gfx7"],

8490
   "map": {"at": 223020, "to": "mm"},

8491
   "name": "SQ_PERFCOUNTER11_SELECT",

8492
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8493
  },

8494
  {

8495
   "chips": ["gfx7"],

8496
   "map": {"at": 223024, "to": "mm"},

8497
   "name": "SQ_PERFCOUNTER12_SELECT",

8498
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8499
  },

8500
  {

8501
   "chips": ["gfx7"],

8502
   "map": {"at": 223028, "to": "mm"},

8503
   "name": "SQ_PERFCOUNTER13_SELECT",

8504
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8505
  },

8506
  {

8507
   "chips": ["gfx7"],

8508
   "map": {"at": 223032, "to": "mm"},

8509
   "name": "SQ_PERFCOUNTER14_SELECT",

8510
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8511
  },

8512
  {

8513
   "chips": ["gfx7"],

8514
   "map": {"at": 223036, "to": "mm"},

8515
   "name": "SQ_PERFCOUNTER15_SELECT",

8516
   "type_ref": "SQ_PERFCOUNTER0_SELECT"

8517
  },

8518
  {

8519
   "chips": ["gfx7"],

8520
   "map": {"at": 223104, "to": "mm"},

8521
   "name": "SQ_PERFCOUNTER_CTRL",

8522
   "type_ref": "SQ_PERFCOUNTER_CTRL"

8523
  },

8524
  {

8525
   "chips": ["gfx7"],

8526
   "map": {"at": 223108, "to": "mm"},

8527
   "name": "SQ_PERFCOUNTER_MASK",

8528
   "type_ref": "SQ_PERFCOUNTER_MASK"

8529
  },

8530
  {

8531
   "chips": ["gfx7"],

8532
   "map": {"at": 223112, "to": "mm"},

8533
   "name": "SQ_PERFCOUNTER_CTRL2",

8534
   "type_ref": "SQ_PERFCOUNTER_CTRL2"

8535
  },

8536
  {

8537
   "chips": ["gfx7"],

8538
   "map": {"at": 223488, "to": "mm"},

8539
   "name": "SX_PERFCOUNTER0_SELECT",

8540
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8541
  },

8542
  {

8543
   "chips": ["gfx7"],

8544
   "map": {"at": 223492, "to": "mm"},

8545
   "name": "SX_PERFCOUNTER1_SELECT",

8546
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8547
  },

8548
  {

8549
   "chips": ["gfx7"],

8550
   "map": {"at": 223496, "to": "mm"},

8551
   "name": "SX_PERFCOUNTER2_SELECT",

8552
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8553
  },

8554
  {

8555
   "chips": ["gfx7"],

8556
   "map": {"at": 223500, "to": "mm"},

8557
   "name": "SX_PERFCOUNTER3_SELECT",

8558
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8559
  },

8560
  {

8561
   "chips": ["gfx7"],

8562
   "map": {"at": 223504, "to": "mm"},

8563
   "name": "SX_PERFCOUNTER0_SELECT1",

8564
   "type_ref": "SX_PERFCOUNTER0_SELECT1"

8565
  },

8566
  {

8567
   "chips": ["gfx7"],

8568
   "map": {"at": 223508, "to": "mm"},

8569
   "name": "SX_PERFCOUNTER1_SELECT1",

8570
   "type_ref": "SX_PERFCOUNTER0_SELECT1"

8571
  },

8572
  {

8573
   "chips": ["gfx7"],

8574
   "map": {"at": 223744, "to": "mm"},

8575
   "name": "GDS_PERFCOUNTER0_SELECT",

8576
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8577
  },

8578
  {

8579
   "chips": ["gfx7"],

8580
   "map": {"at": 223748, "to": "mm"},

8581
   "name": "GDS_PERFCOUNTER1_SELECT",

8582
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8583
  },

8584
  {

8585
   "chips": ["gfx7"],

8586
   "map": {"at": 223752, "to": "mm"},

8587
   "name": "GDS_PERFCOUNTER2_SELECT",

8588
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8589
  },

8590
  {

8591
   "chips": ["gfx7"],

8592
   "map": {"at": 223756, "to": "mm"},

8593
   "name": "GDS_PERFCOUNTER3_SELECT",

8594
   "type_ref": "SX_PERFCOUNTER0_SELECT"

8595
  },

8596
  {

8597
   "chips": ["gfx7"],

8598
   "map": {"at": 223760, "to": "mm"},

8599
   "name": "GDS_PERFCOUNTER0_SELECT1",

8600
   "type_ref": "SX_PERFCOUNTER0_SELECT1"

8601
  },

8602
  {

8603
   "chips": ["gfx7"],

8604
   "map": {"at": 224000, "to": "mm"},

8605
   "name": "TA_PERFCOUNTER0_SELECT",

8606
   "type_ref": "TD_PERFCOUNTER0_SELECT"

8607
  },

8608
  {

8609
   "chips": ["gfx7"],

8610
   "map": {"at": 224004, "to": "mm"},

8611
   "name": "TA_PERFCOUNTER0_SELECT1",

8612
   "type_ref": "TD_PERFCOUNTER0_SELECT1"

8613
  },

8614
  {

8615
   "chips": ["gfx7"],

8616
   "map": {"at": 224008, "to": "mm"},

8617
   "name": "TA_PERFCOUNTER1_SELECT",

8618
   "type_ref": "TD_PERFCOUNTER0_SELECT"

8619
  },

8620
  {

8621
   "chips": ["gfx7"],

8622
   "map": {"at": 224256, "to": "mm"},

8623
   "name": "TD_PERFCOUNTER0_SELECT",

8624
   "type_ref": "TD_PERFCOUNTER0_SELECT"

8625
  },

8626
  {

8627
   "chips": ["gfx7"],

8628
   "map": {"at": 224260, "to": "mm"},

8629
   "name": "TD_PERFCOUNTER0_SELECT1",

8630
   "type_ref": "TD_PERFCOUNTER0_SELECT1"

8631
  },

8632
  {

8633
   "chips": ["gfx7"],

8634
   "map": {"at": 224264, "to": "mm"},

8635
   "name": "TD_PERFCOUNTER1_SELECT",

8636
   "type_ref": "TD_PERFCOUNTER0_SELECT"

8637
  },

8638
  {

8639
   "chips": ["gfx7"],

8640
   "map": {"at": 224512, "to": "mm"},

8641
   "name": "TCP_PERFCOUNTER0_SELECT",

8642
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8643
  },

8644
  {

8645
   "chips": ["gfx7"],

8646
   "map": {"at": 224516, "to": "mm"},

8647
   "name": "TCP_PERFCOUNTER0_SELECT1",

8648
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8649
  },

8650
  {

8651
   "chips": ["gfx7"],

8652
   "map": {"at": 224520, "to": "mm"},

8653
   "name": "TCP_PERFCOUNTER1_SELECT",

8654
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8655
  },

8656
  {

8657
   "chips": ["gfx7"],

8658
   "map": {"at": 224524, "to": "mm"},

8659
   "name": "TCP_PERFCOUNTER1_SELECT1",

8660
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8661
  },

8662
  {

8663
   "chips": ["gfx7"],

8664
   "map": {"at": 224528, "to": "mm"},

8665
   "name": "TCP_PERFCOUNTER2_SELECT",

8666
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8667
  },

8668
  {

8669
   "chips": ["gfx7"],

8670
   "map": {"at": 224532, "to": "mm"},

8671
   "name": "TCP_PERFCOUNTER3_SELECT",

8672
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8673
  },

8674
  {

8675
   "chips": ["gfx7"],

8676
   "map": {"at": 224768, "to": "mm"},

8677
   "name": "TCC_PERFCOUNTER0_SELECT",

8678
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8679
  },

8680
  {

8681
   "chips": ["gfx7"],

8682
   "map": {"at": 224772, "to": "mm"},

8683
   "name": "TCC_PERFCOUNTER0_SELECT1",

8684
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"

8685
  },

8686
  {

8687
   "chips": ["gfx7"],

8688
   "map": {"at": 224776, "to": "mm"},

8689
   "name": "TCC_PERFCOUNTER1_SELECT",

8690
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8691
  },

8692
  {

8693
   "chips": ["gfx7"],

8694
   "map": {"at": 224780, "to": "mm"},

8695
   "name": "TCC_PERFCOUNTER1_SELECT1",

8696
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"

8697
  },

8698
  {

8699
   "chips": ["gfx7"],

8700
   "map": {"at": 224784, "to": "mm"},

8701
   "name": "TCC_PERFCOUNTER2_SELECT",

8702
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8703
  },

8704
  {

8705
   "chips": ["gfx7"],

8706
   "map": {"at": 224788, "to": "mm"},

8707
   "name": "TCC_PERFCOUNTER3_SELECT",

8708
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8709
  },

8710
  {

8711
   "chips": ["gfx7"],

8712
   "map": {"at": 224832, "to": "mm"},

8713
   "name": "TCA_PERFCOUNTER0_SELECT",

8714
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8715
  },

8716
  {

8717
   "chips": ["gfx7"],

8718
   "map": {"at": 224836, "to": "mm"},

8719
   "name": "TCA_PERFCOUNTER0_SELECT1",

8720
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"

8721
  },

8722
  {

8723
   "chips": ["gfx7"],

8724
   "map": {"at": 224840, "to": "mm"},

8725
   "name": "TCA_PERFCOUNTER1_SELECT",

8726
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8727
  },

8728
  {

8729
   "chips": ["gfx7"],

8730
   "map": {"at": 224844, "to": "mm"},

8731
   "name": "TCA_PERFCOUNTER1_SELECT1",

8732
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"

8733
  },

8734
  {

8735
   "chips": ["gfx7"],

8736
   "map": {"at": 224848, "to": "mm"},

8737
   "name": "TCA_PERFCOUNTER2_SELECT",

8738
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8739
  },

8740
  {

8741
   "chips": ["gfx7"],

8742
   "map": {"at": 224852, "to": "mm"},

8743
   "name": "TCA_PERFCOUNTER3_SELECT",

8744
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8745
  },

8746
  {

8747
   "chips": ["gfx7"],

8748
   "map": {"at": 224896, "to": "mm"},

8749
   "name": "TCS_PERFCOUNTER0_SELECT",

8750
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8751
  },

8752
  {

8753
   "chips": ["gfx7"],

8754
   "map": {"at": 224900, "to": "mm"},

8755
   "name": "TCS_PERFCOUNTER0_SELECT1",

8756
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"

8757
  },

8758
  {

8759
   "chips": ["gfx7"],

8760
   "map": {"at": 224904, "to": "mm"},

8761
   "name": "TCS_PERFCOUNTER1_SELECT",

8762
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8763
  },

8764
  {

8765
   "chips": ["gfx7"],

8766
   "map": {"at": 224908, "to": "mm"},

8767
   "name": "TCS_PERFCOUNTER2_SELECT",

8768
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8769
  },

8770
  {

8771
   "chips": ["gfx7"],

8772
   "map": {"at": 224912, "to": "mm"},

8773
   "name": "TCS_PERFCOUNTER3_SELECT",

8774
   "type_ref": "TCC_PERFCOUNTER2_SELECT"

8775
  },

8776
  {

8777
   "chips": ["gfx7"],

8778
   "map": {"at": 225280, "to": "mm"},

8779
   "name": "CB_PERFCOUNTER_FILTER",

8780
   "type_ref": "CB_PERFCOUNTER_FILTER"

8781
  },

8782
  {

8783
   "chips": ["gfx7"],

8784
   "map": {"at": 225284, "to": "mm"},

8785
   "name": "CB_PERFCOUNTER0_SELECT",

8786
   "type_ref": "CB_PERFCOUNTER0_SELECT"

8787
  },

8788
  {

8789
   "chips": ["gfx7"],

8790
   "map": {"at": 225288, "to": "mm"},

8791
   "name": "CB_PERFCOUNTER0_SELECT1",

8792
   "type_ref": "CB_PERFCOUNTER0_SELECT1"

8793
  },

8794
  {

8795
   "chips": ["gfx7"],

8796
   "map": {"at": 225292, "to": "mm"},

8797
   "name": "CB_PERFCOUNTER1_SELECT",

8798
   "type_ref": "CB_PERFCOUNTER1_SELECT"

8799
  },

8800
  {

8801
   "chips": ["gfx7"],

8802
   "map": {"at": 225296, "to": "mm"},

8803
   "name": "CB_PERFCOUNTER2_SELECT",

8804
   "type_ref": "CB_PERFCOUNTER1_SELECT"

8805
  },

8806
  {

8807
   "chips": ["gfx7"],

8808
   "map": {"at": 225300, "to": "mm"},

8809
   "name": "CB_PERFCOUNTER3_SELECT",

8810
   "type_ref": "CB_PERFCOUNTER1_SELECT"

8811
  },

8812
  {

8813
   "chips": ["gfx7"],

8814
   "map": {"at": 225536, "to": "mm"},

8815
   "name": "DB_PERFCOUNTER0_SELECT",

8816
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8817
  },

8818
  {

8819
   "chips": ["gfx7"],

8820
   "map": {"at": 225540, "to": "mm"},

8821
   "name": "DB_PERFCOUNTER0_SELECT1",

8822
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8823
  },

8824
  {

8825
   "chips": ["gfx7"],

8826
   "map": {"at": 225544, "to": "mm"},

8827
   "name": "DB_PERFCOUNTER1_SELECT",

8828
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8829
  },

8830
  {

8831
   "chips": ["gfx7"],

8832
   "map": {"at": 225548, "to": "mm"},

8833
   "name": "DB_PERFCOUNTER1_SELECT1",

8834
   "type_ref": "DB_PERFCOUNTER0_SELECT1"

8835
  },

8836
  {

8837
   "chips": ["gfx7"],

8838
   "map": {"at": 225552, "to": "mm"},

8839
   "name": "DB_PERFCOUNTER2_SELECT",

8840
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8841
  },

8842
  {

8843
   "chips": ["gfx7"],

8844
   "map": {"at": 225560, "to": "mm"},

8845
   "name": "DB_PERFCOUNTER3_SELECT",

8846
   "type_ref": "DB_PERFCOUNTER0_SELECT"

8847
  },

8848
  {

8849
   "chips": ["gfx7"],

8850
   "map": {"at": 225792, "to": "mm"},

8851
   "name": "RLC_SPM_PERFMON_CNTL",

8852
   "type_ref": "RLC_SPM_PERFMON_CNTL"

8853
  },

8854
  {

8855
   "chips": ["gfx7"],

8856
   "map": {"at": 225796, "to": "mm"},

8857
   "name": "RLC_SPM_PERFMON_RING_BASE_LO"

8858
  },

8859
  {

8860
   "chips": ["gfx7"],

8861
   "map": {"at": 225800, "to": "mm"},

8862
   "name": "RLC_SPM_PERFMON_RING_BASE_HI",

8863
   "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"

8864
  },

8865
  {

8866
   "chips": ["gfx7"],

8867
   "map": {"at": 225804, "to": "mm"},

8868
   "name": "RLC_SPM_PERFMON_RING_SIZE"

8869
  },

8870
  {

8871
   "chips": ["gfx7"],

8872
   "map": {"at": 225808, "to": "mm"},

8873
   "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",

8874
   "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"

8875
  },

8876
  {

8877
   "chips": ["gfx7"],

8878
   "map": {"at": 225812, "to": "mm"},

8879
   "name": "RLC_SPM_SE_MUXSEL_ADDR"

8880
  },

8881
  {

8882
   "chips": ["gfx7"],

8883
   "map": {"at": 225816, "to": "mm"},

8884
   "name": "RLC_SPM_SE_MUXSEL_DATA"

8885
  },

8886
  {

8887
   "chips": ["gfx7"],

8888
   "map": {"at": 225820, "to": "mm"},

8889
   "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",

8890
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8891
  },

8892
  {

8893
   "chips": ["gfx7"],

8894
   "map": {"at": 225824, "to": "mm"},

8895
   "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",

8896
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8897
  },

8898
  {

8899
   "chips": ["gfx7"],

8900
   "map": {"at": 225828, "to": "mm"},

8901
   "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",

8902
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8903
  },

8904
  {

8905
   "chips": ["gfx7"],

8906
   "map": {"at": 225832, "to": "mm"},

8907
   "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",

8908
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8909
  },

8910
  {

8911
   "chips": ["gfx7"],

8912
   "map": {"at": 225836, "to": "mm"},

8913
   "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",

8914
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8915
  },

8916
  {

8917
   "chips": ["gfx7"],

8918
   "map": {"at": 225840, "to": "mm"},

8919
   "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",

8920
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8921
  },

8922
  {

8923
   "chips": ["gfx7"],

8924
   "map": {"at": 225844, "to": "mm"},

8925
   "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",

8926
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8927
  },

8928
  {

8929
   "chips": ["gfx7"],

8930
   "map": {"at": 225848, "to": "mm"},

8931
   "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",

8932
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8933
  },

8934
  {

8935
   "chips": ["gfx7"],

8936
   "map": {"at": 225856, "to": "mm"},

8937
   "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",

8938
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8939
  },

8940
  {

8941
   "chips": ["gfx7"],

8942
   "map": {"at": 225860, "to": "mm"},

8943
   "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",

8944
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8945
  },

8946
  {

8947
   "chips": ["gfx7"],

8948
   "map": {"at": 225864, "to": "mm"},

8949
   "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",

8950
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8951
  },

8952
  {

8953
   "chips": ["gfx7"],

8954
   "map": {"at": 225868, "to": "mm"},

8955
   "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",

8956
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8957
  },

8958
  {

8959
   "chips": ["gfx7"],

8960
   "map": {"at": 225872, "to": "mm"},

8961
   "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",

8962
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8963
  },

8964
  {

8965
   "chips": ["gfx7"],

8966
   "map": {"at": 225876, "to": "mm"},

8967
   "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",

8968
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8969
  },

8970
  {

8971
   "chips": ["gfx7"],

8972
   "map": {"at": 225880, "to": "mm"},

8973
   "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",

8974
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8975
  },

8976
  {

8977
   "chips": ["gfx7"],

8978
   "map": {"at": 225884, "to": "mm"},

8979
   "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",

8980
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8981
  },

8982
  {

8983
   "chips": ["gfx7"],

8984
   "map": {"at": 225888, "to": "mm"},

8985
   "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",

8986
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8987
  },

8988
  {

8989
   "chips": ["gfx7"],

8990
   "map": {"at": 225892, "to": "mm"},

8991
   "name": "RLC_SPM_TCS_PERFMON_SAMPLE_DELAY",

8992
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8993
  },

8994
  {

8995
   "chips": ["gfx7"],

8996
   "map": {"at": 225896, "to": "mm"},

8997
   "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",

8998
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

8999
  },

9000
  {

9001
   "chips": ["gfx7"],

9002
   "map": {"at": 225900, "to": "mm"},

9003
   "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"

9004
  },

9005
  {

9006
   "chips": ["gfx7"],

9007
   "map": {"at": 225904, "to": "mm"},

9008
   "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"

9009
  },

9010
  {

9011
   "chips": ["gfx7"],

9012
   "map": {"at": 225908, "to": "mm"},

9013
   "name": "RLC_SPM_RING_RDPTR"

9014
  },

9015
  {

9016
   "chips": ["gfx7"],

9017
   "map": {"at": 225912, "to": "mm"},

9018
   "name": "RLC_SPM_SEGMENT_THRESHOLD"

9019
  },

9020
  {

9021
   "chips": ["gfx7"],

9022
   "map": {"at": 225916, "to": "mm"},

9023
   "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",

9024
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

9025
  },

9026
  {

9027
   "chips": ["gfx7"],

9028
   "map": {"at": 225920, "to": "mm"},

9029
   "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",

9030
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

9031
  },

9032
  {

9033
   "chips": ["gfx7"],

9034
   "map": {"at": 225924, "to": "mm"},

9035
   "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",

9036
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

9037
  },

9038
  {

9039
   "chips": ["gfx7"],

9040
   "map": {"at": 225928, "to": "mm"},

9041
   "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",

9042
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"

9043
  },

9044
  {

9045
   "chips": ["gfx7"],

9046
   "map": {"at": 226048, "to": "mm"},

9047
   "name": "RLC_PERFMON_CNTL",

9048
   "type_ref": "RLC_PERFMON_CNTL"

9049
  },

9050
  {

9051
   "chips": ["gfx7"],

9052
   "map": {"at": 226052, "to": "mm"},

9053
   "name": "RLC_PERFCOUNTER0_SELECT",

9054
   "type_ref": "RLC_PERFCOUNTER0_SELECT"

9055
  },

9056
  {

9057
   "chips": ["gfx7"],

9058
   "map": {"at": 226056, "to": "mm"},

9059
   "name": "RLC_PERFCOUNTER1_SELECT",

9060
   "type_ref": "RLC_PERFCOUNTER0_SELECT"

9061
  }

9062
 ],

9063
 "register_types": {

9064
  "CB_BLEND0_CONTROL": {

9065
   "fields": [

9066
    {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},

9067
    {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},

9068
    {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},

9069
    {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},

9070
    {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},

9071
    {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},

9072
    {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},

9073
    {"bits": [30, 30], "name": "ENABLE"},

9074
    {"bits": [31, 31], "name": "DISABLE_ROP3"}

9075
   ]

9076
  },

9077
  "CB_COLOR0_ATTRIB": {

9078
   "fields": [

9079
    {"bits": [0, 4], "name": "TILE_MODE_INDEX"},

9080
    {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},

9081
    {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},

9082
    {"bits": [12, 14], "name": "NUM_SAMPLES"},

9083
    {"bits": [15, 16], "name": "NUM_FRAGMENTS"},

9084
    {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}

9085
   ]

9086
  },

9087
  "CB_COLOR0_CMASK_SLICE": {

9088
   "fields": [

9089
    {"bits": [0, 13], "name": "TILE_MAX"}

9090
   ]

9091
  },

9092
  "CB_COLOR0_INFO": {

9093
   "fields": [

9094
    {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},

9095
    {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},

9096
    {"bits": [7, 7], "name": "LINEAR_GENERAL"},

9097
    {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},

9098
    {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},

9099
    {"bits": [13, 13], "name": "FAST_CLEAR"},

9100
    {"bits": [14, 14], "name": "COMPRESSION"},

9101
    {"bits": [15, 15], "name": "BLEND_CLAMP"},

9102
    {"bits": [16, 16], "name": "BLEND_BYPASS"},

9103
    {"bits": [17, 17], "name": "SIMPLE_FLOAT"},

9104
    {"bits": [18, 18], "name": "ROUND_MODE"},

9105
    {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},

9106
    {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},

9107
    {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},

9108
    {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}

9109
   ]

9110
  },

9111
  "CB_COLOR0_PITCH": {

9112
   "fields": [

9113
    {"bits": [0, 10], "name": "TILE_MAX"},

9114
    {"bits": [20, 30], "name": "FMASK_TILE_MAX"}

9115
   ]

9116
  },

9117
  "CB_COLOR0_SLICE": {

9118
   "fields": [

9119
    {"bits": [0, 21], "name": "TILE_MAX"}

9120
   ]

9121
  },

9122
  "CB_COLOR0_VIEW": {

9123
   "fields": [

9124
    {"bits": [0, 10], "name": "SLICE_START"},

9125
    {"bits": [13, 23], "name": "SLICE_MAX"}

9126
   ]

9127
  },

9128
  "CB_COLOR_CONTROL": {

9129
   "fields": [

9130
    {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},

9131
    {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},

9132
    {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}

9133
   ]

9134
  },

9135
  "CB_PERFCOUNTER0_SELECT": {

9136
   "fields": [

9137
    {"bits": [0, 8], "name": "PERF_SEL"},

9138
    {"bits": [10, 18], "name": "PERF_SEL1"},

9139
    {"bits": [20, 23], "name": "CNTR_MODE"},

9140
    {"bits": [24, 27], "name": "PERF_MODE1"},

9141
    {"bits": [28, 31], "name": "PERF_MODE"}

9142
   ]

9143
  },

9144
  "CB_PERFCOUNTER0_SELECT1": {

9145
   "fields": [

9146
    {"bits": [0, 8], "name": "PERF_SEL2"},

9147
    {"bits": [10, 18], "name": "PERF_SEL3"},

9148
    {"bits": [24, 27], "name": "PERF_MODE3"},

9149
    {"bits": [28, 31], "name": "PERF_MODE2"}

9150
   ]

9151
  },

9152
  "CB_PERFCOUNTER1_SELECT": {

9153
   "fields": [

9154
    {"bits": [0, 8], "name": "PERF_SEL"},

9155
    {"bits": [28, 31], "name": "PERF_MODE"}

9156
   ]

9157
  },

9158
  "CB_PERFCOUNTER_FILTER": {

9159
   "fields": [

9160
    {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},

9161
    {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},

9162
    {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},

9163
    {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},

9164
    {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},

9165
    {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},

9166
    {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},

9167
    {"bits": [13, 15], "name": "MRT_FILTER_SEL"},

9168
    {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},

9169
    {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},

9170
    {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},

9171
    {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}

9172
   ]

9173
  },

9174
  "CB_SHADER_MASK": {

9175
   "fields": [

9176
    {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},

9177
    {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},

9178
    {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},

9179
    {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},

9180
    {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},

9181
    {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},

9182
    {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},

9183
    {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}

9184
   ]

9185
  },

9186
  "CB_TARGET_MASK": {

9187
   "fields": [

9188
    {"bits": [0, 3], "name": "TARGET0_ENABLE"},

9189
    {"bits": [4, 7], "name": "TARGET1_ENABLE"},

9190
    {"bits": [8, 11], "name": "TARGET2_ENABLE"},

9191
    {"bits": [12, 15], "name": "TARGET3_ENABLE"},

9192
    {"bits": [16, 19], "name": "TARGET4_ENABLE"},

9193
    {"bits": [20, 23], "name": "TARGET5_ENABLE"},

9194
    {"bits": [24, 27], "name": "TARGET6_ENABLE"},

9195
    {"bits": [28, 31], "name": "TARGET7_ENABLE"}

9196
   ]

9197
  },

9198
  "COMPUTE_DISPATCH_INITIATOR": {

9199
   "fields": [

9200
    {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},

9201
    {"bits": [1, 1], "name": "PARTIAL_TG_EN"},

9202
    {"bits": [2, 2], "name": "FORCE_START_AT_000"},

9203
    {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},

9204
    {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},

9205
    {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},

9206
    {"bits": [6, 6], "name": "ORDER_MODE"},

9207
    {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},

9208
    {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},

9209
    {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},

9210
    {"bits": [12, 12], "name": "DATA_ATC"},

9211
    {"bits": [14, 14], "name": "RESTORE"}

9212
   ]

9213
  },

9214
  "COMPUTE_MISC_RESERVED": {

9215
   "fields": [

9216
    {"bits": [0, 1], "name": "SEND_SEID"},

9217
    {"bits": [2, 2], "name": "RESERVED2"},

9218
    {"bits": [3, 3], "name": "RESERVED3"},

9219
    {"bits": [4, 4], "name": "RESERVED4"}

9220
   ]

9221
  },

9222
  "COMPUTE_NUM_THREAD_X": {

9223
   "fields": [

9224
    {"bits": [0, 15], "name": "NUM_THREAD_FULL"},

9225
    {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}

9226
   ]

9227
  },

9228
  "COMPUTE_PERFCOUNT_ENABLE": {

9229
   "fields": [

9230
    {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}

9231
   ]

9232
  },

9233
  "COMPUTE_PGM_HI": {

9234
   "fields": [

9235
    {"bits": [0, 7], "name": "DATA"},

9236
    {"bits": [8, 8], "name": "INST_ATC"}

9237
   ]

9238
  },

9239
  "COMPUTE_PGM_RSRC1": {

9240
   "fields": [

9241
    {"bits": [0, 5], "name": "VGPRS"},

9242
    {"bits": [6, 9], "name": "SGPRS"},

9243
    {"bits": [10, 11], "name": "PRIORITY"},

9244
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

9245
    {"bits": [20, 20], "name": "PRIV"},

9246
    {"bits": [21, 21], "name": "DX10_CLAMP"},

9247
    {"bits": [22, 22], "name": "DEBUG_MODE"},

9248
    {"bits": [23, 23], "name": "IEEE_MODE"},

9249
    {"bits": [24, 24], "name": "BULKY"},

9250
    {"bits": [25, 25], "name": "CDBG_USER"}

9251
   ]

9252
  },

9253
  "COMPUTE_PGM_RSRC2": {

9254
   "fields": [

9255
    {"bits": [0, 0], "name": "SCRATCH_EN"},

9256
    {"bits": [1, 5], "name": "USER_SGPR"},

9257
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

9258
    {"bits": [7, 7], "name": "TGID_X_EN"},

9259
    {"bits": [8, 8], "name": "TGID_Y_EN"},

9260
    {"bits": [9, 9], "name": "TGID_Z_EN"},

9261
    {"bits": [10, 10], "name": "TG_SIZE_EN"},

9262
    {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},

9263
    {"bits": [13, 14], "name": "EXCP_EN_MSB"},

9264
    {"bits": [15, 23], "name": "LDS_SIZE"},

9265
    {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

9266
   ]

9267
  },

9268
  "COMPUTE_PIPELINESTAT_ENABLE": {

9269
   "fields": [

9270
    {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}

9271
   ]

9272
  },

9273
  "COMPUTE_RESOURCE_LIMITS": {

9274
   "fields": [

9275
    {"bits": [0, 9], "name": "WAVES_PER_SH"},

9276
    {"bits": [12, 15], "name": "TG_PER_CU"},

9277
    {"bits": [16, 21], "name": "LOCK_THRESHOLD"},

9278
    {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},

9279
    {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},

9280
    {"bits": [24, 26], "name": "CU_GROUP_COUNT"}

9281
   ]

9282
  },

9283
  "COMPUTE_STATIC_THREAD_MGMT_SE0": {

9284
   "fields": [

9285
    {"bits": [0, 15], "name": "SH0_CU_EN"},

9286
    {"bits": [16, 31], "name": "SH1_CU_EN"}

9287
   ]

9288
  },

9289
  "COMPUTE_TBA_HI": {

9290
   "fields": [

9291
    {"bits": [0, 7], "name": "DATA"}

9292
   ]

9293
  },

9294
  "COMPUTE_THREAD_TRACE_ENABLE": {

9295
   "fields": [

9296
    {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}

9297
   ]

9298
  },

9299
  "COMPUTE_TMPRING_SIZE": {

9300
   "fields": [

9301
    {"bits": [0, 11], "name": "WAVES"},

9302
    {"bits": [12, 24], "name": "WAVESIZE"}

9303
   ]

9304
  },

9305
  "COMPUTE_VMID": {

9306
   "fields": [

9307
    {"bits": [0, 3], "name": "DATA"}

9308
   ]

9309
  },

9310
  "CPG_PERFCOUNTER0_SELECT": {

9311
   "fields": [

9312
    {"bits": [0, 5], "name": "PERF_SEL"},

9313
    {"bits": [10, 15], "name": "PERF_SEL1"},

9314
    {"bits": [20, 23], "name": "CNTR_MODE"}

9315
   ]

9316
  },

9317
  "CPG_PERFCOUNTER0_SELECT1": {

9318
   "fields": [

9319
    {"bits": [0, 5], "name": "PERF_SEL2"},

9320
    {"bits": [10, 15], "name": "PERF_SEL3"}

9321
   ]

9322
  },

9323
  "CPG_PERFCOUNTER1_SELECT": {

9324
   "fields": [

9325
    {"bits": [0, 5], "name": "PERF_SEL"}

9326
   ]

9327
  },

9328
  "CP_APPEND_ADDR_HI": {

9329
   "fields": [

9330
    {"bits": [0, 15], "name": "MEM_ADDR_HI"},

9331
    {"bits": [16, 16], "name": "CS_PS_SEL"},

9332
    {"bits": [29, 31], "name": "COMMAND"}

9333
   ]

9334
  },

9335
  "CP_APPEND_ADDR_LO": {

9336
   "fields": [

9337
    {"bits": [2, 31], "name": "MEM_ADDR_LO"}

9338
   ]

9339
  },

9340
  "CP_CE_IB1_BASE_HI": {

9341
   "fields": [

9342
    {"bits": [0, 15], "name": "IB1_BASE_HI"}

9343
   ]

9344
  },

9345
  "CP_CE_IB1_BASE_LO": {

9346
   "fields": [

9347
    {"bits": [2, 31], "name": "IB1_BASE_LO"}

9348
   ]

9349
  },

9350
  "CP_CE_IB1_BUFSZ": {

9351
   "fields": [

9352
    {"bits": [0, 19], "name": "IB1_BUFSZ"}

9353
   ]

9354
  },

9355
  "CP_CE_IB2_BASE_HI": {

9356
   "fields": [

9357
    {"bits": [0, 15], "name": "IB2_BASE_HI"}

9358
   ]

9359
  },

9360
  "CP_CE_IB2_BASE_LO": {

9361
   "fields": [

9362
    {"bits": [2, 31], "name": "IB2_BASE_LO"}

9363
   ]

9364
  },

9365
  "CP_CE_IB2_BUFSZ": {

9366
   "fields": [

9367
    {"bits": [0, 19], "name": "IB2_BUFSZ"}

9368
   ]

9369
  },

9370
  "CP_CE_INIT_BASE_HI": {

9371
   "fields": [

9372
    {"bits": [0, 15], "name": "INIT_BASE_HI"}

9373
   ]

9374
  },

9375
  "CP_CE_INIT_BASE_LO": {

9376
   "fields": [

9377
    {"bits": [5, 31], "name": "INIT_BASE_LO"}

9378
   ]

9379
  },

9380
  "CP_CE_INIT_BUFSZ": {

9381
   "fields": [

9382
    {"bits": [0, 11], "name": "INIT_BUFSZ"}

9383
   ]

9384
  },

9385
  "CP_COHER_BASE_HI": {

9386
   "fields": [

9387
    {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}

9388
   ]

9389
  },

9390
  "CP_COHER_CNTL": {

9391
   "fields": [

9392
    {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},

9393
    {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},

9394
    {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},

9395
    {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},

9396
    {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},

9397
    {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},

9398
    {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},

9399
    {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},

9400
    {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},

9401
    {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},

9402
    {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},

9403
    {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},

9404
    {"bits": [16, 16], "name": "TC_VOL_ACTION_ENA"},

9405
    {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},

9406
    {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},

9407
    {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},

9408
    {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},

9409
    {"bits": [23, 23], "name": "TC_ACTION_ENA"},

9410
    {"bits": [25, 25], "name": "CB_ACTION_ENA"},

9411
    {"bits": [26, 26], "name": "DB_ACTION_ENA"},

9412
    {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},

9413
    {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},

9414
    {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}

9415
   ]

9416
  },

9417
  "CP_COHER_SIZE_HI": {

9418
   "fields": [

9419
    {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}

9420
   ]

9421
  },

9422
  "CP_COHER_START_DELAY": {

9423
   "fields": [

9424
    {"bits": [0, 5], "name": "START_DELAY_COUNT"}

9425
   ]

9426
  },

9427
  "CP_COHER_STATUS": {

9428
   "fields": [

9429
    {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},

9430
    {"bits": [24, 25], "name": "MEID"},

9431
    {"bits": [30, 30], "name": "PHASE1_STATUS"},

9432
    {"bits": [31, 31], "name": "STATUS"}

9433
   ]

9434
  },

9435
  "CP_CPC_BUSY_STAT": {

9436
   "fields": [

9437
    {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},

9438
    {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},

9439
    {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},

9440
    {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},

9441
    {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},

9442
    {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},

9443
    {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},

9444
    {"bits": [7, 7], "name": "MEC1_TC_BUSY"},

9445
    {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},

9446
    {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},

9447
    {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},

9448
    {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},

9449
    {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},

9450
    {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},

9451
    {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},

9452
    {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},

9453
    {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},

9454
    {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},

9455
    {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},

9456
    {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},

9457
    {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},

9458
    {"bits": [23, 23], "name": "MEC2_TC_BUSY"},

9459
    {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},

9460
    {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},

9461
    {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},

9462
    {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},

9463
    {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},

9464
    {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}

9465
   ]

9466
  },

9467
  "CP_CPC_GRBM_FREE_COUNT": {

9468
   "fields": [

9469
    {"bits": [0, 5], "name": "FREE_COUNT"}

9470
   ]

9471
  },

9472
  "CP_CPC_HALT_HYST_COUNT": {

9473
   "fields": [

9474
    {"bits": [0, 3], "name": "COUNT"}

9475
   ]

9476
  },

9477
  "CP_CPC_MC_CNTL": {

9478
   "fields": [

9479
    {"bits": [0, 4], "name": "PACK_DELAY_CNT"}

9480
   ]

9481
  },

9482
  "CP_CPC_SCRATCH_INDEX": {

9483
   "fields": [

9484
    {"bits": [0, 7], "name": "SCRATCH_INDEX"}

9485
   ]

9486
  },

9487
  "CP_CPC_STALLED_STAT1": {

9488
   "fields": [

9489
    {"bits": [0, 0], "name": "MIU_RDREQ_FREE_STALL"},

9490
    {"bits": [1, 1], "name": "MIU_WRREQ_FREE_STALL"},

9491
    {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},

9492
    {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},

9493
    {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},

9494
    {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},

9495
    {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},

9496
    {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},

9497
    {"bits": [11, 11], "name": "MEC1_WAIT_ON_MC_READ"},

9498
    {"bits": [12, 12], "name": "MEC1_WAIT_ON_MC_WR_ACK"},

9499
    {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},

9500
    {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},

9501
    {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},

9502
    {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},

9503
    {"bits": [19, 19], "name": "MEC2_WAIT_ON_MC_READ"},

9504
    {"bits": [20, 20], "name": "MEC2_WAIT_ON_MC_WR_ACK"},

9505
    {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"}

9506
   ]

9507
  },

9508
  "CP_CPC_STATUS": {

9509
   "fields": [

9510
    {"bits": [0, 0], "name": "MEC1_BUSY"},

9511
    {"bits": [1, 1], "name": "MEC2_BUSY"},

9512
    {"bits": [2, 2], "name": "DC0_BUSY"},

9513
    {"bits": [3, 3], "name": "DC1_BUSY"},

9514
    {"bits": [4, 4], "name": "RCIU1_BUSY"},

9515
    {"bits": [5, 5], "name": "RCIU2_BUSY"},

9516
    {"bits": [6, 6], "name": "ROQ1_BUSY"},

9517
    {"bits": [7, 7], "name": "ROQ2_BUSY"},

9518
    {"bits": [8, 8], "name": "MIU_RDREQ_BUSY"},

9519
    {"bits": [9, 9], "name": "MIU_WRREQ_BUSY"},

9520
    {"bits": [10, 10], "name": "TCIU_BUSY"},

9521
    {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},

9522
    {"bits": [12, 12], "name": "QU_BUSY"},

9523
    {"bits": [29, 29], "name": "CPG_CPC_BUSY"},

9524
    {"bits": [30, 30], "name": "CPF_CPC_BUSY"},

9525
    {"bits": [31, 31], "name": "CPC_BUSY"}

9526
   ]

9527
  },

9528
  "CP_CPF_BUSY_STAT": {

9529
   "fields": [

9530
    {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},

9531
    {"bits": [1, 1], "name": "CSF_RING_BUSY"},

9532
    {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},

9533
    {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},

9534
    {"bits": [4, 4], "name": "CSF_STATE_BUSY"},

9535
    {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},

9536
    {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},

9537
    {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},

9538
    {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},

9539
    {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},

9540
    {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},

9541
    {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},

9542
    {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},

9543
    {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},

9544
    {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},

9545
    {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},

9546
    {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},

9547
    {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},

9548
    {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},

9549
    {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},

9550
    {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},

9551
    {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},

9552
    {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},

9553
    {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},

9554
    {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},

9555
    {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},

9556
    {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},

9557
    {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},

9558
    {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},

9559
    {"bits": [30, 30], "name": "HQD_PQ_BUSY"},

9560
    {"bits": [31, 31], "name": "HQD_IB_BUSY"}

9561
   ]

9562
  },

9563
  "CP_CPF_STALLED_STAT1": {

9564
   "fields": [

9565
    {"bits": [0, 0], "name": "RING_FETCHING_DATA"},

9566
    {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},

9567
    {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},

9568
    {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},

9569
    {"bits": [4, 4], "name": "MIU_WAITING_ON_RDREQ_FREE"},

9570
    {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},

9571
    {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"}

9572
   ]

9573
  },

9574
  "CP_CPF_STATUS": {

9575
   "fields": [

9576
    {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},

9577
    {"bits": [1, 1], "name": "CSF_BUSY"},

9578
    {"bits": [2, 2], "name": "MIU_RDREQ_BUSY"},

9579
    {"bits": [3, 3], "name": "MIU_WRREQ_BUSY"},

9580
    {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},

9581
    {"bits": [5, 5], "name": "ROQ_RING_BUSY"},

9582
    {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},

9583
    {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},

9584
    {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},

9585
    {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},

9586
    {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},

9587
    {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},

9588
    {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},

9589
    {"bits": [13, 13], "name": "INTERRUPT_BUSY"},

9590
    {"bits": [14, 14], "name": "TCIU_BUSY"},

9591
    {"bits": [15, 15], "name": "HQD_BUSY"},

9592
    {"bits": [30, 30], "name": "CPC_CPF_BUSY"},

9593
    {"bits": [31, 31], "name": "CPF_BUSY"}

9594
   ]

9595
  },

9596
  "CP_DMA_CNTL": {

9597
   "fields": [

9598
    {"bits": [4, 5], "name": "MIN_AVAILSZ"},

9599
    {"bits": [16, 19], "name": "BUFFER_DEPTH"},

9600
    {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},

9601
    {"bits": [29, 29], "name": "PIO_FIFO_FULL"},

9602
    {"bits": [30, 31], "name": "PIO_COUNT"}

9603
   ]

9604
  },

9605
  "CP_DMA_ME_COMMAND": {

9606
   "fields": [

9607
    {"bits": [0, 20], "name": "BYTE_COUNT"},

9608
    {"bits": [21, 21], "name": "DIS_WC"},

9609
    {"bits": [22, 23], "name": "SRC_SWAP"},

9610
    {"bits": [24, 25], "name": "DST_SWAP"},

9611
    {"bits": [26, 26], "name": "SAS"},

9612
    {"bits": [27, 27], "name": "DAS"},

9613
    {"bits": [28, 28], "name": "SAIC"},

9614
    {"bits": [29, 29], "name": "DAIC"},

9615
    {"bits": [30, 30], "name": "RAW_WAIT"}

9616
   ]

9617
  },

9618
  "CP_DMA_ME_CONTROL": {

9619
   "fields": [

9620
    {"bits": [12, 12], "name": "SRC_ATC"},

9621
    {"bits": [13, 14], "name": "SRC_CACHE_POLICY"},

9622
    {"bits": [15, 15], "name": "SRC_VOLATILE"},

9623
    {"bits": [20, 21], "name": "DST_SELECT"},

9624
    {"bits": [24, 24], "name": "DST_ATC"},

9625
    {"bits": [25, 26], "name": "DST_CACHE_POLICY"},

9626
    {"bits": [27, 27], "name": "DST_VOLATILE"},

9627
    {"bits": [29, 30], "name": "SRC_SELECT"}

9628
   ]

9629
  },

9630
  "CP_DMA_ME_DST_ADDR_HI": {

9631
   "fields": [

9632
    {"bits": [0, 15], "name": "DST_ADDR_HI"}

9633
   ]

9634
  },

9635
  "CP_DMA_ME_SRC_ADDR_HI": {

9636
   "fields": [

9637
    {"bits": [0, 15], "name": "SRC_ADDR_HI"}

9638
   ]

9639
  },

9640
  "CP_DMA_READ_TAGS": {

9641
   "fields": [

9642
    {"bits": [0, 25], "name": "DMA_READ_TAG"},

9643
    {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}

9644
   ]

9645
  },

9646
  "CP_DRAW_OBJECT_COUNTER": {

9647
   "fields": [

9648
    {"bits": [0, 15], "name": "COUNT"}

9649
   ]

9650
  },

9651
  "CP_DRAW_WINDOW_CNTL": {

9652
   "fields": [

9653
    {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},

9654
    {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},

9655
    {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},

9656
    {"bits": [8, 8], "name": "MODE"}

9657
   ]

9658
  },

9659
  "CP_DRAW_WINDOW_LO": {

9660
   "fields": [

9661
    {"bits": [0, 15], "name": "MIN"},

9662
    {"bits": [16, 31], "name": "MAX"}

9663
   ]

9664
  },

9665
  "CP_EOP_DONE_ADDR_HI": {

9666
   "fields": [

9667
    {"bits": [0, 15], "name": "ADDR_HI"}

9668
   ]

9669
  },

9670
  "CP_EOP_DONE_ADDR_LO": {

9671
   "fields": [

9672
    {"bits": [0, 1], "name": "ADDR_SWAP"},

9673
    {"bits": [2, 31], "name": "ADDR_LO"}

9674
   ]

9675
  },

9676
  "CP_EOP_DONE_DATA_CNTL": {

9677
   "fields": [

9678
    {"bits": [0, 15], "name": "CNTX_ID"},

9679
    {"bits": [16, 17], "name": "DST_SEL"},

9680
    {"bits": [24, 26], "name": "INT_SEL"},

9681
    {"bits": [29, 31], "name": "DATA_SEL"}

9682
   ]

9683
  },

9684
  "CP_EOP_DONE_EVENT_CNTL": {

9685
   "fields": [

9686
    {"bits": [0, 6], "name": "WBINV_TC_OP"},

9687
    {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},

9688
    {"bits": [25, 26], "name": "CACHE_CONTROL"},

9689
    {"bits": [27, 27], "name": "EOP_VOLATILE"}

9690
   ]

9691
  },

9692
  "CP_IB1_OFFSET": {

9693
   "fields": [

9694
    {"bits": [0, 19], "name": "IB1_OFFSET"}

9695
   ]

9696
  },

9697
  "CP_IB1_PREAMBLE_BEGIN": {

9698
   "fields": [

9699
    {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}

9700
   ]

9701
  },

9702
  "CP_IB1_PREAMBLE_END": {

9703
   "fields": [

9704
    {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}

9705
   ]

9706
  },

9707
  "CP_IB2_OFFSET": {

9708
   "fields": [

9709
    {"bits": [0, 19], "name": "IB2_OFFSET"}

9710
   ]

9711
  },

9712
  "CP_IB2_PREAMBLE_BEGIN": {

9713
   "fields": [

9714
    {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}

9715
   ]

9716
  },

9717
  "CP_IB2_PREAMBLE_END": {

9718
   "fields": [

9719
    {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}

9720
   ]

9721
  },

9722
  "CP_ME_MC_RADDR_HI": {

9723
   "fields": [

9724
    {"bits": [0, 15], "name": "ME_MC_RADDR_HI"}

9725
   ]

9726
  },

9727
  "CP_ME_MC_RADDR_LO": {

9728
   "fields": [

9729
    {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},

9730
    {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}

9731
   ]

9732
  },

9733
  "CP_ME_MC_WADDR_HI": {

9734
   "fields": [

9735
    {"bits": [0, 15], "name": "ME_MC_WADDR_HI"}

9736
   ]

9737
  },

9738
  "CP_ME_MC_WADDR_LO": {

9739
   "fields": [

9740
    {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},

9741
    {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}

9742
   ]

9743
  },

9744
  "CP_PERFMON_CNTL": {

9745
   "fields": [

9746
    {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},

9747
    {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},

9748
    {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},

9749
    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}

9750
   ]

9751
  },

9752
  "CP_PERFMON_CNTX_CNTL": {

9753
   "fields": [

9754
    {"bits": [31, 31], "name": "PERFMON_ENABLE"}

9755
   ]

9756
  },

9757
  "CP_PFP_IB_CONTROL": {

9758
   "fields": [

9759
    {"bits": [0, 7], "name": "IB_EN"}

9760
   ]

9761
  },

9762
  "CP_PFP_LOAD_CONTROL": {

9763
   "fields": [

9764
    {"bits": [0, 0], "name": "CONFIG_REG_EN"},

9765
    {"bits": [1, 1], "name": "CNTX_REG_EN"},

9766
    {"bits": [15, 15], "name": "UCONFIG_REG_EN"},

9767
    {"bits": [16, 16], "name": "SH_GFX_REG_EN"},

9768
    {"bits": [24, 24], "name": "SH_CS_REG_EN"}

9769
   ]

9770
  },

9771
  "CP_PIPE_STATS_ADDR_HI": {

9772
   "fields": [

9773
    {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}

9774
   ]

9775
  },

9776
  "CP_PIPE_STATS_ADDR_LO": {

9777
   "fields": [

9778
    {"bits": [0, 1], "name": "PIPE_STATS_ADDR_SWAP"},

9779
    {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}

9780
   ]

9781
  },

9782
  "CP_RB_OFFSET": {

9783
   "fields": [

9784
    {"bits": [0, 19], "name": "RB_OFFSET"}

9785
   ]

9786
  },

9787
  "CP_RINGID": {

9788
   "fields": [

9789
    {"bits": [0, 1], "name": "RINGID"}

9790
   ]

9791
  },

9792
  "CP_SIG_SEM_ADDR_HI": {

9793
   "fields": [

9794
    {"bits": [0, 15], "name": "SEM_ADDR_HI"},

9795
    {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},

9796
    {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},

9797
    {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},

9798
    {"bits": [29, 31], "name": "SEM_SELECT"}

9799
   ]

9800
  },

9801
  "CP_SIG_SEM_ADDR_LO": {

9802
   "fields": [

9803
    {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},

9804
    {"bits": [3, 31], "name": "SEM_ADDR_LO"}

9805
   ]

9806
  },

9807
  "CP_STREAM_OUT_ADDR_HI": {

9808
   "fields": [

9809
    {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}

9810
   ]

9811
  },

9812
  "CP_STREAM_OUT_ADDR_LO": {

9813
   "fields": [

9814
    {"bits": [0, 1], "name": "STREAM_OUT_ADDR_SWAP"},

9815
    {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}

9816
   ]

9817
  },

9818
  "CP_STRMOUT_CNTL": {

9819
   "fields": [

9820
    {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}

9821
   ]

9822
  },

9823
  "CP_ST_BASE_HI": {

9824
   "fields": [

9825
    {"bits": [0, 15], "name": "ST_BASE_HI"}

9826
   ]

9827
  },

9828
  "CP_ST_BASE_LO": {

9829
   "fields": [

9830
    {"bits": [2, 31], "name": "ST_BASE_LO"}

9831
   ]

9832
  },

9833
  "CP_ST_BUFSZ": {

9834
   "fields": [

9835
    {"bits": [0, 19], "name": "ST_BUFSZ"}

9836
   ]

9837
  },

9838
  "CP_VMID": {

9839
   "fields": [

9840
    {"bits": [0, 3], "name": "VMID"}

9841
   ]

9842
  },

9843
  "CS_COPY_STATE": {

9844
   "fields": [

9845
    {"bits": [0, 2], "name": "SRC_STATE_ID"}

9846
   ]

9847
  },

9848
  "DB_ALPHA_TO_MASK": {

9849
   "fields": [

9850
    {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},

9851
    {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},

9852
    {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},

9853
    {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},

9854
    {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},

9855
    {"bits": [16, 16], "name": "OFFSET_ROUND"}

9856
   ]

9857
  },

9858
  "DB_COUNT_CONTROL": {

9859
   "fields": [

9860
    {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},

9861
    {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},

9862
    {"bits": [4, 6], "name": "SAMPLE_RATE"},

9863
    {"bits": [8, 11], "name": "ZPASS_ENABLE"},

9864
    {"bits": [12, 15], "name": "ZFAIL_ENABLE"},

9865
    {"bits": [16, 19], "name": "SFAIL_ENABLE"},

9866
    {"bits": [20, 23], "name": "DBFAIL_ENABLE"},

9867
    {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},

9868
    {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}

9869
   ]

9870
  },

9871
  "DB_DEPTH_CONTROL": {

9872
   "fields": [

9873
    {"bits": [0, 0], "name": "STENCIL_ENABLE"},

9874
    {"bits": [1, 1], "name": "Z_ENABLE"},

9875
    {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},

9876
    {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},

9877
    {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},

9878
    {"bits": [7, 7], "name": "BACKFACE_ENABLE"},

9879
    {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},

9880
    {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},

9881
    {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},

9882
    {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}

9883
   ]

9884
  },

9885
  "DB_DEPTH_INFO": {

9886
   "fields": [

9887
    {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},

9888
    {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},

9889
    {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},

9890
    {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},

9891
    {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},

9892
    {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},

9893
    {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}

9894
   ]

9895
  },

9896
  "DB_DEPTH_SIZE": {

9897
   "fields": [

9898
    {"bits": [0, 10], "name": "PITCH_TILE_MAX"},

9899
    {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}

9900
   ]

9901
  },

9902
  "DB_DEPTH_SLICE": {

9903
   "fields": [

9904
    {"bits": [0, 21], "name": "SLICE_TILE_MAX"}

9905
   ]

9906
  },

9907
  "DB_DEPTH_VIEW": {

9908
   "fields": [

9909
    {"bits": [0, 10], "name": "SLICE_START"},

9910
    {"bits": [13, 23], "name": "SLICE_MAX"},

9911
    {"bits": [24, 24], "name": "Z_READ_ONLY"},

9912
    {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}

9913
   ]

9914
  },

9915
  "DB_EQAA": {

9916
   "fields": [

9917
    {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},

9918
    {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},

9919
    {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},

9920
    {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},

9921
    {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},

9922
    {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},

9923
    {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},

9924
    {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},

9925
    {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},

9926
    {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},

9927
    {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},

9928
    {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}

9929
   ]

9930
  },

9931
  "DB_HTILE_SURFACE": {

9932
   "fields": [

9933
    {"bits": [0, 0], "name": "LINEAR"},

9934
    {"bits": [1, 1], "name": "FULL_CACHE"},

9935
    {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},

9936
    {"bits": [3, 3], "name": "PRELOAD"},

9937
    {"bits": [4, 9], "name": "PREFETCH_WIDTH"},

9938
    {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},

9939
    {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}

9940
   ]

9941
  },

9942
  "DB_PERFCOUNTER0_SELECT": {

9943
   "fields": [

9944
    {"bits": [0, 9], "name": "PERF_SEL"},

9945
    {"bits": [10, 19], "name": "PERF_SEL1"},

9946
    {"bits": [20, 23], "name": "CNTR_MODE"},

9947
    {"bits": [24, 27], "name": "PERF_MODE1"},

9948
    {"bits": [28, 31], "name": "PERF_MODE"}

9949
   ]

9950
  },

9951
  "DB_PERFCOUNTER0_SELECT1": {

9952
   "fields": [

9953
    {"bits": [0, 9], "name": "PERF_SEL2"},

9954
    {"bits": [10, 19], "name": "PERF_SEL3"},

9955
    {"bits": [24, 27], "name": "PERF_MODE3"},

9956
    {"bits": [28, 31], "name": "PERF_MODE2"}

9957
   ]

9958
  },

9959
  "DB_PRELOAD_CONTROL": {

9960
   "fields": [

9961
    {"bits": [0, 7], "name": "START_X"},

9962
    {"bits": [8, 15], "name": "START_Y"},

9963
    {"bits": [16, 23], "name": "MAX_X"},

9964
    {"bits": [24, 31], "name": "MAX_Y"}

9965
   ]

9966
  },

9967
  "DB_RENDER_CONTROL": {

9968
   "fields": [

9969
    {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},

9970
    {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},

9971
    {"bits": [2, 2], "name": "DEPTH_COPY"},

9972
    {"bits": [3, 3], "name": "STENCIL_COPY"},

9973
    {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},

9974
    {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},

9975
    {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},

9976
    {"bits": [7, 7], "name": "COPY_CENTROID"},

9977
    {"bits": [8, 11], "name": "COPY_SAMPLE"}

9978
   ]

9979
  },

9980
  "DB_RENDER_OVERRIDE": {

9981
   "fields": [

9982
    {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},

9983
    {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},

9984
    {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},

9985
    {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},

9986
    {"bits": [7, 7], "name": "FAST_Z_DISABLE"},

9987
    {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},

9988
    {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},

9989
    {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},

9990
    {"bits": [11, 11], "name": "FORCE_Z_READ"},

9991
    {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},

9992
    {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},

9993
    {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},

9994
    {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},

9995
    {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},

9996
    {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},

9997
    {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},

9998
    {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},

9999
    {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},

10000
    {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},

10001
    {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},

10002
    {"bits": [29, 29], "name": "FORCE_Z_VALID"},

10003
    {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},

10004
    {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}

10005
   ]

10006
  },

10007
  "DB_RENDER_OVERRIDE2": {

10008
   "fields": [

10009
    {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},

10010
    {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},

10011
    {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},

10012
    {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},

10013
    {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},

10014
    {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},

10015
    {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},

10016
    {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},

10017
    {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},

10018
    {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},

10019
    {"bits": [15, 17], "name": "HIS_SFUNC_FF"},

10020
    {"bits": [18, 20], "name": "HIS_SFUNC_BF"},

10021
    {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},

10022
    {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},

10023
    {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}

10024
   ]

10025
  },

10026
  "DB_SHADER_CONTROL": {

10027
   "fields": [

10028
    {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},

10029
    {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},

10030
    {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},

10031
    {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},

10032
    {"bits": [6, 6], "name": "KILL_ENABLE"},

10033
    {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},

10034
    {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},

10035
    {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},

10036
    {"bits": [10, 10], "name": "EXEC_ON_NOOP"},

10037
    {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},

10038
    {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},

10039
    {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}

10040
   ]

10041
  },

10042
  "DB_SRESULTS_COMPARE_STATE0": {

10043
   "fields": [

10044
    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},

10045
    {"bits": [4, 11], "name": "COMPAREVALUE0"},

10046
    {"bits": [12, 19], "name": "COMPAREMASK0"},

10047
    {"bits": [24, 24], "name": "ENABLE0"}

10048
   ]

10049
  },

10050
  "DB_SRESULTS_COMPARE_STATE1": {

10051
   "fields": [

10052
    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},

10053
    {"bits": [4, 11], "name": "COMPAREVALUE1"},

10054
    {"bits": [12, 19], "name": "COMPAREMASK1"},

10055
    {"bits": [24, 24], "name": "ENABLE1"}

10056
   ]

10057
  },

10058
  "DB_STENCILREFMASK": {

10059
   "fields": [

10060
    {"bits": [0, 7], "name": "STENCILTESTVAL"},

10061
    {"bits": [8, 15], "name": "STENCILMASK"},

10062
    {"bits": [16, 23], "name": "STENCILWRITEMASK"},

10063
    {"bits": [24, 31], "name": "STENCILOPVAL"}

10064
   ]

10065
  },

10066
  "DB_STENCILREFMASK_BF": {

10067
   "fields": [

10068
    {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},

10069
    {"bits": [8, 15], "name": "STENCILMASK_BF"},

10070
    {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},

10071
    {"bits": [24, 31], "name": "STENCILOPVAL_BF"}

10072
   ]

10073
  },

10074
  "DB_STENCIL_CLEAR": {

10075
   "fields": [

10076
    {"bits": [0, 7], "name": "CLEAR"}

10077
   ]

10078
  },

10079
  "DB_STENCIL_CONTROL": {

10080
   "fields": [

10081
    {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},

10082
    {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},

10083
    {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},

10084
    {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},

10085
    {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},

10086
    {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}

10087
   ]

10088
  },

10089
  "DB_STENCIL_INFO": {

10090
   "fields": [

10091
    {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},

10092
    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},

10093
    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},

10094
    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},

10095
    {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"}

10096
   ]

10097
  },

10098
  "DB_ZPASS_COUNT_HI": {

10099
   "fields": [

10100
    {"bits": [0, 30], "name": "COUNT_HI"}

10101
   ]

10102
  },

10103
  "DB_Z_INFO": {

10104
   "fields": [

10105
    {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},

10106
    {"bits": [2, 3], "name": "NUM_SAMPLES"},

10107
    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},

10108
    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},

10109
    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},

10110
    {"bits": [28, 28], "name": "READ_SIZE"},

10111
    {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},

10112
    {"bits": [31, 31], "name": "ZRANGE_PRECISION"}

10113
   ]

10114
  },

10115
  "GB_ADDR_CONFIG": {

10116
   "fields": [

10117
    {"bits": [0, 2], "name": "NUM_PIPES"},

10118
    {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},

10119
    {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},

10120
    {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},

10121
    {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},

10122
    {"bits": [20, 22], "name": "NUM_GPUS"},

10123
    {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},

10124
    {"bits": [28, 29], "name": "ROW_SIZE"},

10125
    {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}

10126
   ]

10127
  },

10128
  "GB_MACROTILE_MODE0": {

10129
   "fields": [

10130
    {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},

10131
    {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},

10132
    {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},

10133
    {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}

10134
   ]

10135
  },

10136
  "GB_TILE_MODE0": {

10137
   "fields": [

10138
    {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},

10139
    {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},

10140
    {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},

10141
    {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},

10142
    {"bits": [25, 26], "name": "SAMPLE_SPLIT"}

10143
   ]

10144
  },

10145
  "GDS_ATOM_BASE": {

10146
   "fields": [

10147
    {"bits": [0, 15], "name": "BASE"},

10148
    {"bits": [16, 31], "name": "UNUSED"}

10149
   ]

10150
  },

10151
  "GDS_ATOM_CNTL": {

10152
   "fields": [

10153
    {"bits": [0, 5], "name": "AINC"},

10154
    {"bits": [6, 7], "name": "UNUSED1"},

10155
    {"bits": [8, 8], "name": "DMODE"},

10156
    {"bits": [9, 31], "name": "UNUSED2"}

10157
   ]

10158
  },

10159
  "GDS_ATOM_COMPLETE": {

10160
   "fields": [

10161
    {"bits": [0, 0], "name": "COMPLETE"},

10162
    {"bits": [1, 31], "name": "UNUSED"}

10163
   ]

10164
  },

10165
  "GDS_ATOM_OFFSET0": {

10166
   "fields": [

10167
    {"bits": [0, 7], "name": "OFFSET0"},

10168
    {"bits": [8, 31], "name": "UNUSED"}

10169
   ]

10170
  },

10171
  "GDS_ATOM_OFFSET1": {

10172
   "fields": [

10173
    {"bits": [0, 7], "name": "OFFSET1"},

10174
    {"bits": [8, 31], "name": "UNUSED"}

10175
   ]

10176
  },

10177
  "GDS_ATOM_OP": {

10178
   "fields": [

10179
    {"bits": [0, 7], "name": "OP"},

10180
    {"bits": [8, 31], "name": "UNUSED"}

10181
   ]

10182
  },

10183
  "GDS_ATOM_SIZE": {

10184
   "fields": [

10185
    {"bits": [0, 15], "name": "SIZE"},

10186
    {"bits": [16, 31], "name": "UNUSED"}

10187
   ]

10188
  },

10189
  "GDS_GWS_RESOURCE": {

10190
   "fields": [

10191
    {"bits": [0, 0], "name": "FLAG"},

10192
    {"bits": [1, 12], "name": "COUNTER"},

10193
    {"bits": [13, 13], "name": "TYPE"},

10194
    {"bits": [14, 14], "name": "DED"},

10195
    {"bits": [15, 15], "name": "RELEASE_ALL"},

10196
    {"bits": [16, 26], "name": "HEAD_QUEUE"},

10197
    {"bits": [27, 27], "name": "HEAD_VALID"},

10198
    {"bits": [28, 28], "name": "HEAD_FLAG"},

10199
    {"bits": [29, 31], "name": "UNUSED1"}

10200
   ]

10201
  },

10202
  "GDS_GWS_RESOURCE_CNT": {

10203
   "fields": [

10204
    {"bits": [0, 15], "name": "RESOURCE_CNT"},

10205
    {"bits": [16, 31], "name": "UNUSED"}

10206
   ]

10207
  },

10208
  "GDS_GWS_RESOURCE_CNTL": {

10209
   "fields": [

10210
    {"bits": [0, 5], "name": "INDEX"},

10211
    {"bits": [6, 31], "name": "UNUSED"}

10212
   ]

10213
  },

10214
  "GDS_OA_ADDRESS": {

10215
   "fields": [

10216
    {"bits": [0, 15], "name": "DS_ADDRESS"},

10217
    {"bits": [16, 19], "name": "CRAWLER_TYPE"},

10218
    {"bits": [20, 23], "name": "CRAWLER"},

10219
    {"bits": [24, 29], "name": "UNUSED"},

10220
    {"bits": [30, 30], "name": "NO_ALLOC"},

10221
    {"bits": [31, 31], "name": "ENABLE"}

10222
   ]

10223
  },

10224
  "GDS_OA_CNTL": {

10225
   "fields": [

10226
    {"bits": [0, 3], "name": "INDEX"},

10227
    {"bits": [4, 31], "name": "UNUSED"}

10228
   ]

10229
  },

10230
  "GDS_OA_INCDEC": {

10231
   "fields": [

10232
    {"bits": [0, 30], "name": "VALUE"},

10233
    {"bits": [31, 31], "name": "INCDEC"}

10234
   ]

10235
  },

10236
  "GRBM_GFX_INDEX": {

10237
   "fields": [

10238
    {"bits": [0, 7], "name": "INSTANCE_INDEX"},

10239
    {"bits": [8, 15], "name": "SH_INDEX"},

10240
    {"bits": [16, 23], "name": "SE_INDEX"},

10241
    {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},

10242
    {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},

10243
    {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}

10244
   ]

10245
  },

10246
  "GRBM_PERFCOUNTER0_SELECT": {

10247
   "fields": [

10248
    {"bits": [0, 5], "name": "PERF_SEL"},

10249
    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},

10250
    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},

10251
    {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},

10252
    {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},

10253
    {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},

10254
    {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},

10255
    {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},

10256
    {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},

10257
    {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},

10258
    {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},

10259
    {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},

10260
    {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},

10261
    {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},

10262
    {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},

10263
    {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},

10264
    {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},

10265
    {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},

10266
    {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}

10267
   ]

10268
  },

10269
  "GRBM_SE0_PERFCOUNTER_SELECT": {

10270
   "fields": [

10271
    {"bits": [0, 5], "name": "PERF_SEL"},

10272
    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},

10273
    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},

10274
    {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},

10275
    {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},

10276
    {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},

10277
    {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},

10278
    {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},

10279
    {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},

10280
    {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},

10281
    {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},

10282
    {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}

10283
   ]

10284
  },

10285
  "GRBM_STATUS": {

10286
   "fields": [

10287
    {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},

10288
    {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},

10289
    {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},

10290
    {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},

10291
    {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},

10292
    {"bits": [12, 12], "name": "DB_CLEAN"},

10293
    {"bits": [13, 13], "name": "CB_CLEAN"},

10294
    {"bits": [14, 14], "name": "TA_BUSY"},

10295
    {"bits": [15, 15], "name": "GDS_BUSY"},

10296
    {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},

10297
    {"bits": [17, 17], "name": "VGT_BUSY"},

10298
    {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},

10299
    {"bits": [19, 19], "name": "IA_BUSY"},

10300
    {"bits": [20, 20], "name": "SX_BUSY"},

10301
    {"bits": [21, 21], "name": "WD_BUSY"},

10302
    {"bits": [22, 22], "name": "SPI_BUSY"},

10303
    {"bits": [23, 23], "name": "BCI_BUSY"},

10304
    {"bits": [24, 24], "name": "SC_BUSY"},

10305
    {"bits": [25, 25], "name": "PA_BUSY"},

10306
    {"bits": [26, 26], "name": "DB_BUSY"},

10307
    {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},

10308
    {"bits": [29, 29], "name": "CP_BUSY"},

10309
    {"bits": [30, 30], "name": "CB_BUSY"},

10310
    {"bits": [31, 31], "name": "GUI_ACTIVE"}

10311
   ]

10312
  },

10313
  "GRBM_STATUS2": {

10314
   "fields": [

10315
    {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},

10316
    {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},

10317
    {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},

10318
    {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},

10319
    {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},

10320
    {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},

10321
    {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},

10322
    {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},

10323
    {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},

10324
    {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},

10325
    {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},

10326
    {"bits": [14, 14], "name": "RLC_RQ_PENDING"},

10327
    {"bits": [24, 24], "name": "RLC_BUSY"},

10328
    {"bits": [25, 25], "name": "TC_BUSY"},

10329
    {"bits": [28, 28], "name": "CPF_BUSY"},

10330
    {"bits": [29, 29], "name": "CPC_BUSY"},

10331
    {"bits": [30, 30], "name": "CPG_BUSY"}

10332
   ]

10333
  },

10334
  "GRBM_STATUS_SE0": {

10335
   "fields": [

10336
    {"bits": [1, 1], "name": "DB_CLEAN"},

10337
    {"bits": [2, 2], "name": "CB_CLEAN"},

10338
    {"bits": [22, 22], "name": "BCI_BUSY"},

10339
    {"bits": [23, 23], "name": "VGT_BUSY"},

10340
    {"bits": [24, 24], "name": "PA_BUSY"},

10341
    {"bits": [25, 25], "name": "TA_BUSY"},

10342
    {"bits": [26, 26], "name": "SX_BUSY"},

10343
    {"bits": [27, 27], "name": "SPI_BUSY"},

10344
    {"bits": [29, 29], "name": "SC_BUSY"},

10345
    {"bits": [30, 30], "name": "DB_BUSY"},

10346
    {"bits": [31, 31], "name": "CB_BUSY"}

10347
   ]

10348
  },

10349
  "IA_MULTI_VGT_PARAM": {

10350
   "fields": [

10351
    {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},

10352
    {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},

10353
    {"bits": [17, 17], "name": "SWITCH_ON_EOP"},

10354
    {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},

10355
    {"bits": [19, 19], "name": "SWITCH_ON_EOI"},

10356
    {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}

10357
   ]

10358
  },

10359
  "PA_CL_CLIP_CNTL": {

10360
   "fields": [

10361
    {"bits": [0, 0], "name": "UCP_ENA_0"},

10362
    {"bits": [1, 1], "name": "UCP_ENA_1"},

10363
    {"bits": [2, 2], "name": "UCP_ENA_2"},

10364
    {"bits": [3, 3], "name": "UCP_ENA_3"},

10365
    {"bits": [4, 4], "name": "UCP_ENA_4"},

10366
    {"bits": [5, 5], "name": "UCP_ENA_5"},

10367
    {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},

10368
    {"bits": [14, 15], "name": "PS_UCP_MODE"},

10369
    {"bits": [16, 16], "name": "CLIP_DISABLE"},

10370
    {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},

10371
    {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},

10372
    {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},

10373
    {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},

10374
    {"bits": [21, 21], "name": "VTX_KILL_OR"},

10375
    {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},

10376
    {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},

10377
    {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},

10378
    {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},

10379
    {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}

10380
   ]

10381
  },

10382
  "PA_CL_NANINF_CNTL": {

10383
   "fields": [

10384
    {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},

10385
    {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},

10386
    {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},

10387
    {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},

10388
    {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},

10389
    {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},

10390
    {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},

10391
    {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},

10392
    {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},

10393
    {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},

10394
    {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},

10395
    {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},

10396
    {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},

10397
    {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},

10398
    {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},

10399
    {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}

10400
   ]

10401
  },

10402
  "PA_CL_VS_OUT_CNTL": {

10403
   "fields": [

10404
    {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},

10405
    {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},

10406
    {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},

10407
    {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},

10408
    {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},

10409
    {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},

10410
    {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},

10411
    {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},

10412
    {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},

10413
    {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},

10414
    {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},

10415
    {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},

10416
    {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},

10417
    {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},

10418
    {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},

10419
    {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},

10420
    {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},

10421
    {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},

10422
    {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},

10423
    {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},

10424
    {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},

10425
    {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},

10426
    {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},

10427
    {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},

10428
    {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},

10429
    {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}

10430
   ]

10431
  },

10432
  "PA_CL_VTE_CNTL": {

10433
   "fields": [

10434
    {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},

10435
    {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},

10436
    {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},

10437
    {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},

10438
    {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},

10439
    {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},

10440
    {"bits": [8, 8], "name": "VTX_XY_FMT"},

10441
    {"bits": [9, 9], "name": "VTX_Z_FMT"},

10442
    {"bits": [10, 10], "name": "VTX_W0_FMT"},

10443
    {"bits": [11, 11], "name": "PERFCOUNTER_REF"}

10444
   ]

10445
  },

10446
  "PA_SC_AA_CONFIG": {

10447
   "fields": [

10448
    {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},

10449
    {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},

10450
    {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},

10451
    {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},

10452
    {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}

10453
   ]

10454
  },

10455
  "PA_SC_AA_MASK_X0Y0_X1Y0": {

10456
   "fields": [

10457
    {"bits": [0, 15], "name": "AA_MASK_X0Y0"},

10458
    {"bits": [16, 31], "name": "AA_MASK_X1Y0"}

10459
   ]

10460
  },

10461
  "PA_SC_AA_MASK_X0Y1_X1Y1": {

10462
   "fields": [

10463
    {"bits": [0, 15], "name": "AA_MASK_X0Y1"},

10464
    {"bits": [16, 31], "name": "AA_MASK_X1Y1"}

10465
   ]

10466
  },

10467
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {

10468
   "fields": [

10469
    {"bits": [0, 3], "name": "S0_X"},

10470
    {"bits": [4, 7], "name": "S0_Y"},

10471
    {"bits": [8, 11], "name": "S1_X"},

10472
    {"bits": [12, 15], "name": "S1_Y"},

10473
    {"bits": [16, 19], "name": "S2_X"},

10474
    {"bits": [20, 23], "name": "S2_Y"},

10475
    {"bits": [24, 27], "name": "S3_X"},

10476
    {"bits": [28, 31], "name": "S3_Y"}

10477
   ]

10478
  },

10479
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {

10480
   "fields": [

10481
    {"bits": [0, 3], "name": "S4_X"},

10482
    {"bits": [4, 7], "name": "S4_Y"},

10483
    {"bits": [8, 11], "name": "S5_X"},

10484
    {"bits": [12, 15], "name": "S5_Y"},

10485
    {"bits": [16, 19], "name": "S6_X"},

10486
    {"bits": [20, 23], "name": "S6_Y"},

10487
    {"bits": [24, 27], "name": "S7_X"},

10488
    {"bits": [28, 31], "name": "S7_Y"}

10489
   ]

10490
  },

10491
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {

10492
   "fields": [

10493
    {"bits": [0, 3], "name": "S8_X"},

10494
    {"bits": [4, 7], "name": "S8_Y"},

10495
    {"bits": [8, 11], "name": "S9_X"},

10496
    {"bits": [12, 15], "name": "S9_Y"},

10497
    {"bits": [16, 19], "name": "S10_X"},

10498
    {"bits": [20, 23], "name": "S10_Y"},

10499
    {"bits": [24, 27], "name": "S11_X"},

10500
    {"bits": [28, 31], "name": "S11_Y"}

10501
   ]

10502
  },

10503
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {

10504
   "fields": [

10505
    {"bits": [0, 3], "name": "S12_X"},

10506
    {"bits": [4, 7], "name": "S12_Y"},

10507
    {"bits": [8, 11], "name": "S13_X"},

10508
    {"bits": [12, 15], "name": "S13_Y"},

10509
    {"bits": [16, 19], "name": "S14_X"},

10510
    {"bits": [20, 23], "name": "S14_Y"},

10511
    {"bits": [24, 27], "name": "S15_X"},

10512
    {"bits": [28, 31], "name": "S15_Y"}

10513
   ]

10514
  },

10515
  "PA_SC_CENTROID_PRIORITY_0": {

10516
   "fields": [

10517
    {"bits": [0, 3], "name": "DISTANCE_0"},

10518
    {"bits": [4, 7], "name": "DISTANCE_1"},

10519
    {"bits": [8, 11], "name": "DISTANCE_2"},

10520
    {"bits": [12, 15], "name": "DISTANCE_3"},

10521
    {"bits": [16, 19], "name": "DISTANCE_4"},

10522
    {"bits": [20, 23], "name": "DISTANCE_5"},

10523
    {"bits": [24, 27], "name": "DISTANCE_6"},

10524
    {"bits": [28, 31], "name": "DISTANCE_7"}

10525
   ]

10526
  },

10527
  "PA_SC_CENTROID_PRIORITY_1": {

10528
   "fields": [

10529
    {"bits": [0, 3], "name": "DISTANCE_8"},

10530
    {"bits": [4, 7], "name": "DISTANCE_9"},

10531
    {"bits": [8, 11], "name": "DISTANCE_10"},

10532
    {"bits": [12, 15], "name": "DISTANCE_11"},

10533
    {"bits": [16, 19], "name": "DISTANCE_12"},

10534
    {"bits": [20, 23], "name": "DISTANCE_13"},

10535
    {"bits": [24, 27], "name": "DISTANCE_14"},

10536
    {"bits": [28, 31], "name": "DISTANCE_15"}

10537
   ]

10538
  },

10539
  "PA_SC_CLIPRECT_0_BR": {

10540
   "fields": [

10541
    {"bits": [0, 14], "name": "BR_X"},

10542
    {"bits": [16, 30], "name": "BR_Y"}

10543
   ]

10544
  },

10545
  "PA_SC_CLIPRECT_0_TL": {

10546
   "fields": [

10547
    {"bits": [0, 14], "name": "TL_X"},

10548
    {"bits": [16, 30], "name": "TL_Y"}

10549
   ]

10550
  },

10551
  "PA_SC_CLIPRECT_RULE": {

10552
   "fields": [

10553
    {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}

10554
   ]

10555
  },

10556
  "PA_SC_EDGERULE": {

10557
   "fields": [

10558
    {"bits": [0, 3], "name": "ER_TRI"},

10559
    {"bits": [4, 7], "name": "ER_POINT"},

10560
    {"bits": [8, 11], "name": "ER_RECT"},

10561
    {"bits": [12, 17], "name": "ER_LINE_LR"},

10562
    {"bits": [18, 23], "name": "ER_LINE_RL"},

10563
    {"bits": [24, 27], "name": "ER_LINE_TB"},

10564
    {"bits": [28, 31], "name": "ER_LINE_BT"}

10565
   ]

10566
  },

10567
  "PA_SC_GENERIC_SCISSOR_TL": {

10568
   "fields": [

10569
    {"bits": [0, 14], "name": "TL_X"},

10570
    {"bits": [16, 30], "name": "TL_Y"},

10571
    {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}

10572
   ]

10573
  },

10574
  "PA_SC_LINE_CNTL": {

10575
   "fields": [

10576
    {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},

10577
    {"bits": [10, 10], "name": "LAST_PIXEL"},

10578
    {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},

10579
    {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}

10580
   ]

10581
  },

10582
  "PA_SC_LINE_STIPPLE": {

10583
   "fields": [

10584
    {"bits": [0, 15], "name": "LINE_PATTERN"},

10585
    {"bits": [16, 23], "name": "REPEAT_COUNT"},

10586
    {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},

10587
    {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}

10588
   ]

10589
  },

10590
  "PA_SC_LINE_STIPPLE_STATE": {

10591
   "fields": [

10592
    {"bits": [0, 3], "name": "CURRENT_PTR"},

10593
    {"bits": [8, 15], "name": "CURRENT_COUNT"}

10594
   ]

10595
  },

10596
  "PA_SC_MODE_CNTL_0": {

10597
   "fields": [

10598
    {"bits": [0, 0], "name": "MSAA_ENABLE"},

10599
    {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},

10600
    {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},

10601
    {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}

10602
   ]

10603
  },

10604
  "PA_SC_MODE_CNTL_1": {

10605
   "fields": [

10606
    {"bits": [0, 0], "name": "WALK_SIZE"},

10607
    {"bits": [1, 1], "name": "WALK_ALIGNMENT"},

10608
    {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},

10609
    {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},

10610
    {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},

10611
    {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},

10612
    {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},

10613
    {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},

10614
    {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},

10615
    {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},

10616
    {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},

10617
    {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},

10618
    {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},

10619
    {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},

10620
    {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},

10621
    {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},

10622
    {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},

10623
    {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},

10624
    {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},

10625
    {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},

10626
    {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},

10627
    {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},

10628
    {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},

10629
    {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}

10630
   ]

10631
  },

10632
  "PA_SC_P3D_TRAP_SCREEN_H": {

10633
   "fields": [

10634
    {"bits": [0, 13], "name": "X_COORD"}

10635
   ]

10636
  },

10637
  "PA_SC_P3D_TRAP_SCREEN_HV_EN": {

10638
   "fields": [

10639
    {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},

10640
    {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}

10641
   ]

10642
  },

10643
  "PA_SC_P3D_TRAP_SCREEN_V": {

10644
   "fields": [

10645
    {"bits": [0, 13], "name": "Y_COORD"}

10646
   ]

10647
  },

10648
  "PA_SC_PERFCOUNTER1_SELECT": {

10649
   "fields": [

10650
    {"bits": [0, 9], "name": "PERF_SEL"}

10651
   ]

10652
  },

10653
  "PA_SC_RASTER_CONFIG": {

10654
   "fields": [

10655
    {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},

10656
    {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},

10657
    {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},

10658
    {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},

10659
    {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},

10660
    {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},

10661
    {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},

10662
    {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},

10663
    {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},

10664
    {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},

10665
    {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},

10666
    {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},

10667
    {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},

10668
    {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},

10669
    {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}

10670
   ]

10671
  },

10672
  "PA_SC_RASTER_CONFIG_1": {

10673
   "fields": [

10674
    {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},

10675
    {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},

10676
    {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}

10677
   ]

10678
  },

10679
  "PA_SC_SCREEN_EXTENT_CONTROL": {

10680
   "fields": [

10681
    {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},

10682
    {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}

10683
   ]

10684
  },

10685
  "PA_SC_SCREEN_EXTENT_MIN_0": {

10686
   "fields": [

10687
    {"bits": [0, 15], "name": "X"},

10688
    {"bits": [16, 31], "name": "Y"}

10689
   ]

10690
  },

10691
  "PA_SC_SCREEN_SCISSOR_BR": {

10692
   "fields": [

10693
    {"bits": [0, 15], "name": "BR_X"},

10694
    {"bits": [16, 31], "name": "BR_Y"}

10695
   ]

10696
  },

10697
  "PA_SC_SCREEN_SCISSOR_TL": {

10698
   "fields": [

10699
    {"bits": [0, 15], "name": "TL_X"},

10700
    {"bits": [16, 31], "name": "TL_Y"}

10701
   ]

10702
  },

10703
  "PA_SC_WINDOW_OFFSET": {

10704
   "fields": [

10705
    {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},

10706
    {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}

10707
   ]

10708
  },

10709
  "PA_SU_HARDWARE_SCREEN_OFFSET": {

10710
   "fields": [

10711
    {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},

10712
    {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}

10713
   ]

10714
  },

10715
  "PA_SU_LINE_CNTL": {

10716
   "fields": [

10717
    {"bits": [0, 15], "name": "WIDTH"}

10718
   ]

10719
  },

10720
  "PA_SU_LINE_STIPPLE_CNTL": {

10721
   "fields": [

10722
    {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},

10723
    {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},

10724
    {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},

10725
    {"bits": [4, 4], "name": "DIAMOND_ADJUST"}

10726
   ]

10727
  },

10728
  "PA_SU_LINE_STIPPLE_VALUE": {

10729
   "fields": [

10730
    {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}

10731
   ]

10732
  },

10733
  "PA_SU_PERFCOUNTER0_HI": {

10734
   "fields": [

10735
    {"bits": [0, 15], "name": "PERFCOUNTER_HI"}

10736
   ]

10737
  },

10738
  "PA_SU_PERFCOUNTER0_SELECT": {

10739
   "fields": [

10740
    {"bits": [0, 9], "name": "PERF_SEL"},

10741
    {"bits": [10, 19], "name": "PERF_SEL1"},

10742
    {"bits": [20, 23], "name": "CNTR_MODE"}

10743
   ]

10744
  },

10745
  "PA_SU_PERFCOUNTER0_SELECT1": {

10746
   "fields": [

10747
    {"bits": [0, 9], "name": "PERF_SEL2"},

10748
    {"bits": [10, 19], "name": "PERF_SEL3"}

10749
   ]

10750
  },

10751
  "PA_SU_PERFCOUNTER2_SELECT": {

10752
   "fields": [

10753
    {"bits": [0, 9], "name": "PERF_SEL"},

10754
    {"bits": [20, 23], "name": "CNTR_MODE"}

10755
   ]

10756
  },

10757
  "PA_SU_POINT_MINMAX": {

10758
   "fields": [

10759
    {"bits": [0, 15], "name": "MIN_SIZE"},

10760
    {"bits": [16, 31], "name": "MAX_SIZE"}

10761
   ]

10762
  },

10763
  "PA_SU_POINT_SIZE": {

10764
   "fields": [

10765
    {"bits": [0, 15], "name": "HEIGHT"},

10766
    {"bits": [16, 31], "name": "WIDTH"}

10767
   ]

10768
  },

10769
  "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {

10770
   "fields": [

10771
    {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},

10772
    {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}

10773
   ]

10774
  },

10775
  "PA_SU_PRIM_FILTER_CNTL": {

10776
   "fields": [

10777
    {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},

10778
    {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},

10779
    {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},

10780
    {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},

10781
    {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},

10782
    {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},

10783
    {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},

10784
    {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},

10785
    {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},

10786
    {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},

10787
    {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}

10788
   ]

10789
  },

10790
  "PA_SU_SC_MODE_CNTL": {

10791
   "fields": [

10792
    {"bits": [0, 0], "name": "CULL_FRONT"},

10793
    {"bits": [1, 1], "name": "CULL_BACK"},

10794
    {"bits": [2, 2], "name": "FACE"},

10795
    {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},

10796
    {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},

10797
    {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},

10798
    {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},

10799
    {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},

10800
    {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},

10801
    {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},

10802
    {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},

10803
    {"bits": [20, 20], "name": "PERSP_CORR_DIS"},

10804
    {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}

10805
   ]

10806
  },

10807
  "PA_SU_VTX_CNTL": {

10808
   "fields": [

10809
    {"bits": [0, 0], "name": "PIX_CENTER"},

10810
    {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},

10811
    {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}

10812
   ]

10813
  },

10814
  "RLC_PERFCOUNTER0_SELECT": {

10815
   "fields": [

10816
    {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}

10817
   ]

10818
  },

10819
  "RLC_PERFMON_CNTL": {

10820
   "fields": [

10821
    {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},

10822
    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}

10823
   ]

10824
  },

10825
  "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {

10826
   "fields": [

10827
    {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},

10828
    {"bits": [8, 31], "name": "RESERVED"}

10829
   ]

10830
  },

10831
  "RLC_SPM_PERFMON_CNTL": {

10832
   "fields": [

10833
    {"bits": [0, 11], "name": "RESERVED1"},

10834
    {"bits": [12, 13], "name": "PERFMON_RING_MODE"},

10835
    {"bits": [14, 15], "name": "RESERVED"},

10836
    {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}

10837
   ]

10838
  },

10839
  "RLC_SPM_PERFMON_RING_BASE_HI": {

10840
   "fields": [

10841
    {"bits": [0, 15], "name": "RING_BASE_HI"},

10842
    {"bits": [16, 31], "name": "RESERVED"}

10843
   ]

10844
  },

10845
  "RLC_SPM_PERFMON_SEGMENT_SIZE": {

10846
   "fields": [

10847
    {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},

10848
    {"bits": [8, 10], "name": "RESERVED1"},

10849
    {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},

10850
    {"bits": [16, 20], "name": "SE0_NUM_LINE"},

10851
    {"bits": [21, 25], "name": "SE1_NUM_LINE"},

10852
    {"bits": [26, 30], "name": "SE2_NUM_LINE"},

10853
    {"bits": [31, 31], "name": "RESERVED"}

10854
   ]

10855
  },

10856
  "SCRATCH_UMSK": {

10857
   "fields": [

10858
    {"bits": [0, 7], "name": "OBSOLETE_UMSK"},

10859
    {"bits": [16, 17], "name": "OBSOLETE_SWAP"}

10860
   ]

10861
  },

10862
  "SPI_BARYC_CNTL": {

10863
   "fields": [

10864
    {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},

10865
    {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},

10866
    {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},

10867
    {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},

10868
    {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},

10869
    {"bits": [20, 20], "name": "POS_FLOAT_ULC"},

10870
    {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}

10871
   ]

10872
  },

10873
  "SPI_CONFIG_CNTL": {

10874
   "fields": [

10875
    {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},

10876
    {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},

10877
    {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},

10878
    {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},

10879
    {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},

10880
    {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}

10881
   ]

10882
  },

10883
  "SPI_INTERP_CONTROL_0": {

10884
   "fields": [

10885
    {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},

10886
    {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},

10887
    {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},

10888
    {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},

10889
    {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},

10890
    {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},

10891
    {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}

10892
   ]

10893
  },

10894
  "SPI_PERFCOUNTER4_SELECT": {

10895
   "fields": [

10896
    {"bits": [0, 7], "name": "PERF_SEL"}

10897
   ]

10898
  },

10899
  "SPI_PERFCOUNTER_BINS": {

10900
   "fields": [

10901
    {"bits": [0, 3], "name": "BIN0_MIN"},

10902
    {"bits": [4, 7], "name": "BIN0_MAX"},

10903
    {"bits": [8, 11], "name": "BIN1_MIN"},

10904
    {"bits": [12, 15], "name": "BIN1_MAX"},

10905
    {"bits": [16, 19], "name": "BIN2_MIN"},

10906
    {"bits": [20, 23], "name": "BIN2_MAX"},

10907
    {"bits": [24, 27], "name": "BIN3_MIN"},

10908
    {"bits": [28, 31], "name": "BIN3_MAX"}

10909
   ]

10910
  },

10911
  "SPI_PS_INPUT_CNTL_0": {

10912
   "fields": [

10913
    {"bits": [0, 5], "name": "OFFSET"},

10914
    {"bits": [8, 9], "name": "DEFAULT_VAL"},

10915
    {"bits": [10, 10], "name": "FLAT_SHADE"},

10916
    {"bits": [13, 16], "name": "CYL_WRAP"},

10917
    {"bits": [17, 17], "name": "PT_SPRITE_TEX"},

10918
    {"bits": [18, 18], "name": "DUP"}

10919
   ]

10920
  },

10921
  "SPI_PS_INPUT_CNTL_20": {

10922
   "fields": [

10923
    {"bits": [0, 5], "name": "OFFSET"},

10924
    {"bits": [8, 9], "name": "DEFAULT_VAL"},

10925
    {"bits": [10, 10], "name": "FLAT_SHADE"},

10926
    {"bits": [18, 18], "name": "DUP"}

10927
   ]

10928
  },

10929
  "SPI_PS_INPUT_ENA": {

10930
   "fields": [

10931
    {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},

10932
    {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},

10933
    {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},

10934
    {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},

10935
    {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},

10936
    {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},

10937
    {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},

10938
    {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},

10939
    {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},

10940
    {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},

10941
    {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},

10942
    {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},

10943
    {"bits": [12, 12], "name": "FRONT_FACE_ENA"},

10944
    {"bits": [13, 13], "name": "ANCILLARY_ENA"},

10945
    {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},

10946
    {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}

10947
   ]

10948
  },

10949
  "SPI_PS_IN_CONTROL": {

10950
   "fields": [

10951
    {"bits": [0, 5], "name": "NUM_INTERP"},

10952
    {"bits": [6, 6], "name": "PARAM_GEN"},

10953
    {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}

10954
   ]

10955
  },

10956
  "SPI_SHADER_COL_FORMAT": {

10957
   "fields": [

10958
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},

10959
    {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},

10960
    {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},

10961
    {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},

10962
    {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},

10963
    {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},

10964
    {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},

10965
    {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}

10966
   ]

10967
  },

10968
  "SPI_SHADER_LATE_ALLOC_VS": {

10969
   "fields": [

10970
    {"bits": [0, 5], "name": "LIMIT"}

10971
   ]

10972
  },

10973
  "SPI_SHADER_PGM_RSRC1_GS": {

10974
   "fields": [

10975
    {"bits": [0, 5], "name": "VGPRS"},

10976
    {"bits": [6, 9], "name": "SGPRS"},

10977
    {"bits": [10, 11], "name": "PRIORITY"},

10978
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

10979
    {"bits": [20, 20], "name": "PRIV"},

10980
    {"bits": [21, 21], "name": "DX10_CLAMP"},

10981
    {"bits": [22, 22], "name": "DEBUG_MODE"},

10982
    {"bits": [23, 23], "name": "IEEE_MODE"},

10983
    {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},

10984
    {"bits": [25, 27], "name": "CACHE_CTL"},

10985
    {"bits": [28, 28], "name": "CDBG_USER"}

10986
   ]

10987
  },

10988
  "SPI_SHADER_PGM_RSRC1_HS": {

10989
   "fields": [

10990
    {"bits": [0, 5], "name": "VGPRS"},

10991
    {"bits": [6, 9], "name": "SGPRS"},

10992
    {"bits": [10, 11], "name": "PRIORITY"},

10993
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

10994
    {"bits": [20, 20], "name": "PRIV"},

10995
    {"bits": [21, 21], "name": "DX10_CLAMP"},

10996
    {"bits": [22, 22], "name": "DEBUG_MODE"},

10997
    {"bits": [23, 23], "name": "IEEE_MODE"},

10998
    {"bits": [24, 26], "name": "CACHE_CTL"},

10999
    {"bits": [27, 27], "name": "CDBG_USER"}

11000
   ]

11001
  },

11002
  "SPI_SHADER_PGM_RSRC1_LS": {

11003
   "fields": [

11004
    {"bits": [0, 5], "name": "VGPRS"},

11005
    {"bits": [6, 9], "name": "SGPRS"},

11006
    {"bits": [10, 11], "name": "PRIORITY"},

11007
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

11008
    {"bits": [20, 20], "name": "PRIV"},

11009
    {"bits": [21, 21], "name": "DX10_CLAMP"},

11010
    {"bits": [22, 22], "name": "DEBUG_MODE"},

11011
    {"bits": [23, 23], "name": "IEEE_MODE"},

11012
    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},

11013
    {"bits": [26, 28], "name": "CACHE_CTL"},

11014
    {"bits": [29, 29], "name": "CDBG_USER"}

11015
   ]

11016
  },

11017
  "SPI_SHADER_PGM_RSRC1_PS": {

11018
   "fields": [

11019
    {"bits": [0, 5], "name": "VGPRS"},

11020
    {"bits": [6, 9], "name": "SGPRS"},

11021
    {"bits": [10, 11], "name": "PRIORITY"},

11022
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

11023
    {"bits": [20, 20], "name": "PRIV"},

11024
    {"bits": [21, 21], "name": "DX10_CLAMP"},

11025
    {"bits": [22, 22], "name": "DEBUG_MODE"},

11026
    {"bits": [23, 23], "name": "IEEE_MODE"},

11027
    {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},

11028
    {"bits": [25, 27], "name": "CACHE_CTL"},

11029
    {"bits": [28, 28], "name": "CDBG_USER"}

11030
   ]

11031
  },

11032
  "SPI_SHADER_PGM_RSRC1_VS": {

11033
   "fields": [

11034
    {"bits": [0, 5], "name": "VGPRS"},

11035
    {"bits": [6, 9], "name": "SGPRS"},

11036
    {"bits": [10, 11], "name": "PRIORITY"},

11037
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},

11038
    {"bits": [20, 20], "name": "PRIV"},

11039
    {"bits": [21, 21], "name": "DX10_CLAMP"},

11040
    {"bits": [22, 22], "name": "DEBUG_MODE"},

11041
    {"bits": [23, 23], "name": "IEEE_MODE"},

11042
    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},

11043
    {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},

11044
    {"bits": [27, 29], "name": "CACHE_CTL"},

11045
    {"bits": [30, 30], "name": "CDBG_USER"}

11046
   ]

11047
  },

11048
  "SPI_SHADER_PGM_RSRC2_ES_VS": {

11049
   "fields": [

11050
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11051
    {"bits": [1, 5], "name": "USER_SGPR"},

11052
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11053
    {"bits": [7, 7], "name": "OC_LDS_EN"},

11054
    {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},

11055
    {"bits": [20, 28], "name": "LDS_SIZE"}

11056
   ]

11057
  },

11058
  "SPI_SHADER_PGM_RSRC2_GS": {

11059
   "fields": [

11060
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11061
    {"bits": [1, 5], "name": "USER_SGPR"},

11062
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11063
    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

11064
   ]

11065
  },

11066
  "SPI_SHADER_PGM_RSRC2_HS": {

11067
   "fields": [

11068
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11069
    {"bits": [1, 5], "name": "USER_SGPR"},

11070
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11071
    {"bits": [7, 7], "name": "OC_LDS_EN"},

11072
    {"bits": [8, 8], "name": "TG_SIZE_EN"},

11073
    {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

11074
   ]

11075
  },

11076
  "SPI_SHADER_PGM_RSRC2_LS_VS": {

11077
   "fields": [

11078
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11079
    {"bits": [1, 5], "name": "USER_SGPR"},

11080
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11081
    {"bits": [7, 15], "name": "LDS_SIZE"},

11082
    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

11083
   ]

11084
  },

11085
  "SPI_SHADER_PGM_RSRC2_PS": {

11086
   "fields": [

11087
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11088
    {"bits": [1, 5], "name": "USER_SGPR"},

11089
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11090
    {"bits": [7, 7], "name": "WAVE_CNT_EN"},

11091
    {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},

11092
    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

11093
   ]

11094
  },

11095
  "SPI_SHADER_PGM_RSRC2_VS": {

11096
   "fields": [

11097
    {"bits": [0, 0], "name": "SCRATCH_EN"},

11098
    {"bits": [1, 5], "name": "USER_SGPR"},

11099
    {"bits": [6, 6], "name": "TRAP_PRESENT"},

11100
    {"bits": [7, 7], "name": "OC_LDS_EN"},

11101
    {"bits": [8, 8], "name": "SO_BASE0_EN"},

11102
    {"bits": [9, 9], "name": "SO_BASE1_EN"},

11103
    {"bits": [10, 10], "name": "SO_BASE2_EN"},

11104
    {"bits": [11, 11], "name": "SO_BASE3_EN"},

11105
    {"bits": [12, 12], "name": "SO_EN"},

11106
    {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}

11107
   ]

11108
  },

11109
  "SPI_SHADER_PGM_RSRC3_HS": {

11110
   "fields": [

11111
    {"bits": [0, 5], "name": "WAVE_LIMIT"},

11112
    {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"}

11113
   ]

11114
  },

11115
  "SPI_SHADER_PGM_RSRC3_PS": {

11116
   "fields": [

11117
    {"bits": [0, 15], "name": "CU_EN"},

11118
    {"bits": [16, 21], "name": "WAVE_LIMIT"},

11119
    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}

11120
   ]

11121
  },

11122
  "SPI_SHADER_POS_FORMAT": {

11123
   "fields": [

11124
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},

11125
    {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},

11126
    {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},

11127
    {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}

11128
   ]

11129
  },

11130
  "SPI_SHADER_TBA_HI_PS": {

11131
   "fields": [

11132
    {"bits": [0, 7], "name": "MEM_BASE"}

11133
   ]

11134
  },

11135
  "SPI_SHADER_Z_FORMAT": {

11136
   "fields": [

11137
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}

11138
   ]

11139
  },

11140
  "SPI_VS_OUT_CONFIG": {

11141
   "fields": [

11142
    {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},

11143
    {"bits": [6, 6], "name": "VS_HALF_PACK"}

11144
   ]

11145
  },

11146
  "SQC_CACHES": {

11147
   "fields": [

11148
    {"bits": [0, 0], "name": "INST_INVALIDATE"},

11149
    {"bits": [1, 1], "name": "DATA_INVALIDATE"},

11150
    {"bits": [2, 2], "name": "INVALIDATE_VOLATILE"}

11151
   ]

11152
  },

11153
  "SQ_BUF_RSRC_WORD1": {

11154
   "fields": [

11155
    {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},

11156
    {"bits": [16, 29], "name": "STRIDE"},

11157
    {"bits": [30, 30], "name": "CACHE_SWIZZLE"},

11158
    {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}

11159
   ]

11160
  },

11161
  "SQ_BUF_RSRC_WORD3": {

11162
   "fields": [

11163
    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},

11164
    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},

11165
    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},

11166
    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},

11167
    {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},

11168
    {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},

11169
    {"bits": [19, 20], "name": "ELEMENT_SIZE"},

11170
    {"bits": [21, 22], "name": "INDEX_STRIDE"},

11171
    {"bits": [23, 23], "name": "ADD_TID_ENABLE"},

11172
    {"bits": [24, 24], "name": "ATC"},

11173
    {"bits": [25, 25], "name": "HASH_ENABLE"},

11174
    {"bits": [26, 26], "name": "HEAP"},

11175
    {"bits": [27, 29], "name": "MTYPE"},

11176
    {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}

11177
   ]

11178
  },

11179
  "SQ_IMG_RSRC_WORD1": {

11180
   "fields": [

11181
    {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},

11182
    {"bits": [8, 19], "name": "MIN_LOD"},

11183
    {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},

11184
    {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},

11185
    {"bits": [30, 31], "name": "MTYPE"}

11186
   ]

11187
  },

11188
  "SQ_IMG_RSRC_WORD2": {

11189
   "fields": [

11190
    {"bits": [0, 13], "name": "WIDTH"},

11191
    {"bits": [14, 27], "name": "HEIGHT"},

11192
    {"bits": [28, 30], "name": "PERF_MOD"},

11193
    {"bits": [31, 31], "name": "INTERLACED"}

11194
   ]

11195
  },

11196
  "SQ_IMG_RSRC_WORD3": {

11197
   "fields": [

11198
    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},

11199
    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},

11200
    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},

11201
    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},

11202
    {"bits": [12, 15], "name": "BASE_LEVEL"},

11203
    {"bits": [16, 19], "name": "LAST_LEVEL"},

11204
    {"bits": [20, 24], "name": "TILING_INDEX"},

11205
    {"bits": [25, 25], "name": "POW2_PAD"},

11206
    {"bits": [26, 26], "name": "MTYPE"},

11207
    {"bits": [27, 27], "name": "ATC"},

11208
    {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}

11209
   ]

11210
  },

11211
  "SQ_IMG_RSRC_WORD4": {

11212
   "fields": [

11213
    {"bits": [0, 12], "name": "DEPTH"},

11214
    {"bits": [13, 26], "name": "PITCH"}

11215
   ]

11216
  },

11217
  "SQ_IMG_RSRC_WORD5": {

11218
   "fields": [

11219
    {"bits": [0, 12], "name": "BASE_ARRAY"},

11220
    {"bits": [13, 25], "name": "LAST_ARRAY"}

11221
   ]

11222
  },

11223
  "SQ_IMG_RSRC_WORD6": {

11224
   "fields": [

11225
    {"bits": [0, 11], "name": "MIN_LOD_WARN"},

11226
    {"bits": [12, 19], "name": "COUNTER_BANK_ID"},

11227
    {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},

11228
    {"bits": [21, 31], "name": "UNUNSED"}

11229
   ]

11230
  },

11231
  "SQ_IMG_SAMP_WORD0": {

11232
   "fields": [

11233
    {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},

11234
    {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},

11235
    {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},

11236
    {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},

11237
    {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},

11238
    {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},

11239
    {"bits": [16, 18], "name": "ANISO_THRESHOLD"},

11240
    {"bits": [19, 19], "name": "MC_COORD_TRUNC"},

11241
    {"bits": [20, 20], "name": "FORCE_DEGAMMA"},

11242
    {"bits": [21, 26], "name": "ANISO_BIAS"},

11243
    {"bits": [27, 27], "name": "TRUNC_COORD"},

11244
    {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},

11245
    {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"}

11246
   ]

11247
  },

11248
  "SQ_IMG_SAMP_WORD1": {

11249
   "fields": [

11250
    {"bits": [0, 11], "name": "MIN_LOD"},

11251
    {"bits": [12, 23], "name": "MAX_LOD"},

11252
    {"bits": [24, 27], "name": "PERF_MIP"},

11253
    {"bits": [28, 31], "name": "PERF_Z"}

11254
   ]

11255
  },

11256
  "SQ_IMG_SAMP_WORD2": {

11257
   "fields": [

11258
    {"bits": [0, 13], "name": "LOD_BIAS"},

11259
    {"bits": [14, 19], "name": "LOD_BIAS_SEC"},

11260
    {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},

11261
    {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},

11262
    {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},

11263
    {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},

11264
    {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},

11265
    {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},

11266
    {"bits": [30, 30], "name": "FILTER_PREC_FIX"}

11267
   ]

11268
  },

11269
  "SQ_IMG_SAMP_WORD3": {

11270
   "fields": [

11271
    {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},

11272
    {"bits": [29, 29], "name": "UPGRADED_DEPTH"},

11273
    {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}

11274
   ]

11275
  },

11276
  "SQ_PERFCOUNTER0_SELECT": {

11277
   "fields": [

11278
    {"bits": [0, 7], "name": "PERF_SEL"},

11279
    {"bits": [12, 15], "name": "SQC_BANK_MASK"},

11280
    {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},

11281
    {"bits": [20, 23], "name": "SPM_MODE"},

11282
    {"bits": [24, 27], "name": "SIMD_MASK"},

11283
    {"bits": [28, 31], "name": "PERF_MODE"}

11284
   ]

11285
  },

11286
  "SQ_PERFCOUNTER_CTRL": {

11287
   "fields": [

11288
    {"bits": [0, 0], "name": "PS_EN"},

11289
    {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},

11290
    {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},

11291
    {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},

11292
    {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},

11293
    {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},

11294
    {"bits": [6, 6], "name": "CS_EN"},

11295
    {"bits": [8, 12], "name": "CNTR_RATE"},

11296
    {"bits": [13, 13], "name": "DISABLE_FLUSH"}

11297
   ]

11298
  },

11299
  "SQ_PERFCOUNTER_CTRL2": {

11300
   "fields": [

11301
    {"bits": [0, 0], "name": "FORCE_EN"}

11302
   ]

11303
  },

11304
  "SQ_PERFCOUNTER_MASK": {

11305
   "fields": [

11306
    {"bits": [0, 15], "name": "SH0_MASK"},

11307
    {"bits": [16, 31], "name": "SH1_MASK"}

11308
   ]

11309
  },

11310
  "SQ_THREAD_TRACE_BASE2": {

11311
   "fields": [

11312
    {"bits": [0, 3], "name": "ADDR_HI"},

11313
    {"bits": [4, 4], "name": "ATC"}

11314
   ]

11315
  },

11316
  "SQ_THREAD_TRACE_CTRL": {

11317
   "fields": [

11318
    {"bits": [31, 31], "name": "RESET_BUFFER"}

11319
   ]

11320
  },

11321
  "SQ_THREAD_TRACE_HIWATER": {

11322
   "fields": [

11323
    {"bits": [0, 2], "name": "HIWATER"}

11324
   ]

11325
  },

11326
  "SQ_THREAD_TRACE_MASK": {

11327
   "fields": [

11328
    {"bits": [0, 4], "name": "CU_SEL"},

11329
    {"bits": [5, 5], "name": "SH_SEL"},

11330
    {"bits": [7, 7], "name": "REG_STALL_EN"},

11331
    {"bits": [8, 11], "name": "SIMD_EN"},

11332
    {"bits": [12, 13], "name": "VM_ID_MASK"},

11333
    {"bits": [14, 14], "name": "SPI_STALL_EN"},

11334
    {"bits": [15, 15], "name": "SQ_STALL_EN"},

11335
    {"bits": [16, 31], "name": "RANDOM_SEED"},

11336
    {"bits": [16, 31], "name": "RANDOM_SEED"}

11337
   ]

11338
  },

11339
  "SQ_THREAD_TRACE_MODE": {

11340
   "fields": [

11341
    {"bits": [0, 2], "name": "MASK_PS"},

11342
    {"bits": [3, 5], "name": "MASK_VS"},

11343
    {"bits": [6, 8], "name": "MASK_GS"},

11344
    {"bits": [9, 11], "name": "MASK_ES"},

11345
    {"bits": [12, 14], "name": "MASK_HS"},

11346
    {"bits": [15, 17], "name": "MASK_LS"},

11347
    {"bits": [18, 20], "name": "MASK_CS"},

11348
    {"bits": [21, 22], "name": "MODE"},

11349
    {"bits": [23, 24], "name": "CAPTURE_MODE"},

11350
    {"bits": [25, 25], "name": "AUTOFLUSH_EN"},

11351
    {"bits": [26, 26], "name": "PRIV"},

11352
    {"bits": [27, 28], "name": "ISSUE_MASK"},

11353
    {"bits": [29, 29], "name": "TEST_MODE"},

11354
    {"bits": [30, 30], "name": "INTERRUPT_EN"},

11355
    {"bits": [31, 31], "name": "WRAP"}

11356
   ]

11357
  },

11358
  "SQ_THREAD_TRACE_SIZE": {

11359
   "fields": [

11360
    {"bits": [0, 21], "name": "SIZE"}

11361
   ]

11362
  },

11363
  "SQ_THREAD_TRACE_STATUS": {

11364
   "fields": [

11365
    {"bits": [0, 9], "name": "FINISH_PENDING"},

11366
    {"bits": [16, 25], "name": "FINISH_DONE"},

11367
    {"bits": [29, 29], "name": "NEW_BUF"},

11368
    {"bits": [30, 30], "name": "BUSY"},

11369
    {"bits": [31, 31], "name": "FULL"}

11370
   ]

11371
  },

11372
  "SQ_THREAD_TRACE_TOKEN_MASK": {

11373
   "fields": [

11374
    {"bits": [0, 15], "name": "TOKEN_MASK"},

11375
    {"bits": [16, 23], "name": "REG_MASK"},

11376
    {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}

11377
   ]

11378
  },

11379
  "SQ_THREAD_TRACE_TOKEN_MASK2": {

11380
   "fields": [

11381
    {"bits": [0, 15], "name": "INST_MASK"}

11382
   ]

11383
  },

11384
  "SQ_THREAD_TRACE_WPTR": {

11385
   "fields": [

11386
    {"bits": [0, 29], "name": "WPTR"},

11387
    {"bits": [30, 31], "name": "READ_OFFSET"}

11388
   ]

11389
  },

11390
  "SQ_WAVE_GPR_ALLOC": {

11391
   "fields": [

11392
    {"bits": [0, 5], "name": "VGPR_BASE"},

11393
    {"bits": [8, 13], "name": "VGPR_SIZE"},

11394
    {"bits": [16, 21], "name": "SGPR_BASE"},

11395
    {"bits": [24, 27], "name": "SGPR_SIZE"}

11396
   ]

11397
  },

11398
  "SQ_WAVE_HW_ID": {

11399
   "fields": [

11400
    {"bits": [0, 3], "name": "WAVE_ID"},

11401
    {"bits": [4, 5], "name": "SIMD_ID"},

11402
    {"bits": [6, 7], "name": "PIPE_ID"},

11403
    {"bits": [8, 11], "name": "CU_ID"},

11404
    {"bits": [12, 12], "name": "SH_ID"},

11405
    {"bits": [13, 14], "name": "SE_ID"},

11406
    {"bits": [16, 19], "name": "TG_ID"},

11407
    {"bits": [20, 23], "name": "VM_ID"},

11408
    {"bits": [24, 26], "name": "QUEUE_ID"},

11409
    {"bits": [27, 29], "name": "STATE_ID"},

11410
    {"bits": [30, 31], "name": "ME_ID"}

11411
   ]

11412
  },

11413
  "SQ_WAVE_IB_DBG0": {

11414
   "fields": [

11415
    {"bits": [0, 2], "name": "IBUF_ST"},

11416
    {"bits": [3, 3], "name": "PC_INVALID"},

11417
    {"bits": [4, 4], "name": "NEED_NEXT_DW"},

11418
    {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},

11419
    {"bits": [8, 9], "name": "IBUF_RPTR"},

11420
    {"bits": [10, 11], "name": "IBUF_WPTR"},

11421
    {"bits": [16, 18], "name": "INST_STR_ST"},

11422
    {"bits": [19, 21], "name": "MISC_CNT"},

11423
    {"bits": [22, 23], "name": "ECC_ST"},

11424
    {"bits": [24, 24], "name": "IS_HYB"},

11425
    {"bits": [25, 26], "name": "HYB_CNT"},

11426
    {"bits": [27, 27], "name": "KILL"},

11427
    {"bits": [28, 28], "name": "NEED_KILL_IFETCH"}

11428
   ]

11429
  },

11430
  "SQ_WAVE_IB_STS": {

11431
   "fields": [

11432
    {"bits": [0, 3], "name": "VM_CNT"},

11433
    {"bits": [4, 6], "name": "EXP_CNT"},

11434
    {"bits": [8, 11], "name": "LGKM_CNT"},

11435
    {"bits": [12, 14], "name": "VALU_CNT"}

11436
   ]

11437
  },

11438
  "SQ_WAVE_LDS_ALLOC": {

11439
   "fields": [

11440
    {"bits": [0, 7], "name": "LDS_BASE"},

11441
    {"bits": [12, 20], "name": "LDS_SIZE"}

11442
   ]

11443
  },

11444
  "SQ_WAVE_MODE": {

11445
   "fields": [

11446
    {"bits": [0, 3], "name": "FP_ROUND"},

11447
    {"bits": [4, 7], "name": "FP_DENORM"},

11448
    {"bits": [8, 8], "name": "DX10_CLAMP"},

11449
    {"bits": [9, 9], "name": "IEEE"},

11450
    {"bits": [10, 10], "name": "LOD_CLAMPED"},

11451
    {"bits": [11, 11], "name": "DEBUG_EN"},

11452
    {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},

11453
    {"bits": [28, 28], "name": "VSKIP"},

11454
    {"bits": [29, 31], "name": "CSP"}

11455
   ]

11456
  },

11457
  "SQ_WAVE_PC_HI": {

11458
   "fields": [

11459
    {"bits": [0, 7], "name": "PC_HI"}

11460
   ]

11461
  },

11462
  "SQ_WAVE_STATUS": {

11463
   "fields": [

11464
    {"bits": [0, 0], "name": "SCC"},

11465
    {"bits": [1, 2], "name": "SPI_PRIO"},

11466
    {"bits": [3, 4], "name": "WAVE_PRIO"},

11467
    {"bits": [5, 5], "name": "PRIV"},

11468
    {"bits": [6, 6], "name": "TRAP_EN"},

11469
    {"bits": [7, 7], "name": "TTRACE_EN"},

11470
    {"bits": [8, 8], "name": "EXPORT_RDY"},

11471
    {"bits": [9, 9], "name": "EXECZ"},

11472
    {"bits": [10, 10], "name": "VCCZ"},

11473
    {"bits": [11, 11], "name": "IN_TG"},

11474
    {"bits": [12, 12], "name": "IN_BARRIER"},

11475
    {"bits": [13, 13], "name": "HALT"},

11476
    {"bits": [14, 14], "name": "TRAP"},

11477
    {"bits": [15, 15], "name": "TTRACE_CU_EN"},

11478
    {"bits": [16, 16], "name": "VALID"},

11479
    {"bits": [17, 17], "name": "ECC_ERR"},

11480
    {"bits": [18, 18], "name": "SKIP_EXPORT"},

11481
    {"bits": [19, 19], "name": "PERF_EN"},

11482
    {"bits": [20, 20], "name": "COND_DBG_USER"},

11483
    {"bits": [21, 21], "name": "COND_DBG_SYS"},

11484
    {"bits": [22, 22], "name": "DATA_ATC"},

11485
    {"bits": [23, 23], "name": "INST_ATC"},

11486
    {"bits": [24, 26], "name": "DISPATCH_CACHE_CTRL"},

11487
    {"bits": [27, 27], "name": "MUST_EXPORT"}

11488
   ]

11489
  },

11490
  "SQ_WAVE_TBA_HI": {

11491
   "fields": [

11492
    {"bits": [0, 7], "name": "ADDR_HI"}

11493
   ]

11494
  },

11495
  "SQ_WAVE_TRAPSTS": {

11496
   "fields": [

11497
    {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},

11498
    {"bits": [16, 21], "name": "EXCP_CYCLE"},

11499
    {"bits": [29, 31], "name": "DP_RATE"}

11500
   ]

11501
  },

11502
  "SX_PERFCOUNTER0_SELECT": {

11503
   "fields": [

11504
    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},

11505
    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},

11506
    {"bits": [20, 23], "name": "CNTR_MODE"}

11507
   ]

11508
  },

11509
  "SX_PERFCOUNTER0_SELECT1": {

11510
   "fields": [

11511
    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},

11512
    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}

11513
   ]

11514
  },

11515
  "TA_BC_BASE_ADDR_HI": {

11516
   "fields": [

11517
    {"bits": [0, 7], "name": "ADDRESS"}

11518
   ]

11519
  },

11520
  "TCC_PERFCOUNTER0_SELECT1": {

11521
   "fields": [

11522
    {"bits": [0, 9], "name": "PERF_SEL2"},

11523
    {"bits": [10, 19], "name": "PERF_SEL3"},

11524
    {"bits": [24, 27], "name": "PERF_MODE2"},

11525
    {"bits": [28, 31], "name": "PERF_MODE3"}

11526
   ]

11527
  },

11528
  "TCC_PERFCOUNTER2_SELECT": {

11529
   "fields": [

11530
    {"bits": [0, 9], "name": "PERF_SEL"},

11531
    {"bits": [20, 23], "name": "CNTR_MODE"},

11532
    {"bits": [28, 31], "name": "PERF_MODE"}

11533
   ]

11534
  },

11535
  "TD_PERFCOUNTER0_SELECT": {

11536
   "fields": [

11537
    {"bits": [0, 7], "name": "PERF_SEL"},

11538
    {"bits": [10, 17], "name": "PERF_SEL1"},

11539
    {"bits": [20, 23], "name": "CNTR_MODE"},

11540
    {"bits": [24, 27], "name": "PERF_MODE1"},

11541
    {"bits": [28, 31], "name": "PERF_MODE"}

11542
   ]

11543
  },

11544
  "TD_PERFCOUNTER0_SELECT1": {

11545
   "fields": [

11546
    {"bits": [0, 7], "name": "PERF_SEL2"},

11547
    {"bits": [10, 17], "name": "PERF_SEL3"},

11548
    {"bits": [24, 27], "name": "PERF_MODE3"},

11549
    {"bits": [28, 31], "name": "PERF_MODE2"}

11550
   ]

11551
  },

11552
  "VGT_DMA_BASE_HI": {

11553
   "fields": [

11554
    {"bits": [0, 7], "name": "BASE_ADDR"}

11555
   ]

11556
  },

11557
  "VGT_DMA_INDEX_TYPE": {

11558
   "fields": [

11559
    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},

11560
    {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},

11561
    {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},

11562
    {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},

11563
    {"bits": [8, 8], "name": "ATC"},

11564
    {"bits": [9, 9], "name": "NOT_EOP"},

11565
    {"bits": [10, 10], "name": "REQ_PATH"}

11566
   ]

11567
  },

11568
  "VGT_DRAW_INITIATOR": {

11569
   "fields": [

11570
    {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},

11571
    {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},

11572
    {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},

11573
    {"bits": [5, 5], "name": "NOT_EOP"},

11574
    {"bits": [6, 6], "name": "USE_OPAQUE"}

11575
   ]

11576
  },

11577
  "VGT_ESGS_RING_ITEMSIZE": {

11578
   "fields": [

11579
    {"bits": [0, 14], "name": "ITEMSIZE"}

11580
   ]

11581
  },

11582
  "VGT_ES_PER_GS": {

11583
   "fields": [

11584
    {"bits": [0, 10], "name": "ES_PER_GS"}

11585
   ]

11586
  },

11587
  "VGT_EVENT_ADDRESS_REG": {

11588
   "fields": [

11589
    {"bits": [0, 27], "name": "ADDRESS_LOW"}

11590
   ]

11591
  },

11592
  "VGT_EVENT_INITIATOR": {

11593
   "fields": [

11594
    {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},

11595
    {"bits": [18, 26], "name": "ADDRESS_HI"},

11596
    {"bits": [27, 27], "name": "EXTENDED_EVENT"}

11597
   ]

11598
  },

11599
  "VGT_GROUP_DECR": {

11600
   "fields": [

11601
    {"bits": [0, 3], "name": "DECR"}

11602
   ]

11603
  },

11604
  "VGT_GROUP_FIRST_DECR": {

11605
   "fields": [

11606
    {"bits": [0, 3], "name": "FIRST_DECR"}

11607
   ]

11608
  },

11609
  "VGT_GROUP_PRIM_TYPE": {

11610
   "fields": [

11611
    {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},

11612
    {"bits": [14, 14], "name": "RETAIN_ORDER"},

11613
    {"bits": [15, 15], "name": "RETAIN_QUADS"},

11614
    {"bits": [16, 18], "name": "PRIM_ORDER"}

11615
   ]

11616
  },

11617
  "VGT_GROUP_VECT_0_CNTL": {

11618
   "fields": [

11619
    {"bits": [0, 0], "name": "COMP_X_EN"},

11620
    {"bits": [1, 1], "name": "COMP_Y_EN"},

11621
    {"bits": [2, 2], "name": "COMP_Z_EN"},

11622
    {"bits": [3, 3], "name": "COMP_W_EN"},

11623
    {"bits": [8, 15], "name": "STRIDE"},

11624
    {"bits": [16, 23], "name": "SHIFT"}

11625
   ]

11626
  },

11627
  "VGT_GROUP_VECT_0_FMT_CNTL": {

11628
   "fields": [

11629
    {"bits": [0, 3], "name": "X_CONV"},

11630
    {"bits": [4, 7], "name": "X_OFFSET"},

11631
    {"bits": [8, 11], "name": "Y_CONV"},

11632
    {"bits": [12, 15], "name": "Y_OFFSET"},

11633
    {"bits": [16, 19], "name": "Z_CONV"},

11634
    {"bits": [20, 23], "name": "Z_OFFSET"},

11635
    {"bits": [24, 27], "name": "W_CONV"},

11636
    {"bits": [28, 31], "name": "W_OFFSET"}

11637
   ]

11638
  },

11639
  "VGT_GSVS_RING_OFFSET_1": {

11640
   "fields": [

11641
    {"bits": [0, 14], "name": "OFFSET"}

11642
   ]

11643
  },

11644
  "VGT_GS_INSTANCE_CNT": {

11645
   "fields": [

11646
    {"bits": [0, 0], "name": "ENABLE"},

11647
    {"bits": [2, 8], "name": "CNT"}

11648
   ]

11649
  },

11650
  "VGT_GS_MAX_VERT_OUT": {

11651
   "fields": [

11652
    {"bits": [0, 10], "name": "MAX_VERT_OUT"}

11653
   ]

11654
  },

11655
  "VGT_GS_MODE": {

11656
   "fields": [

11657
    {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},

11658
    {"bits": [3, 3], "name": "RESERVED_0"},

11659
    {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},

11660
    {"bits": [6, 10], "name": "RESERVED_1"},

11661
    {"bits": [11, 11], "name": "GS_C_PACK_EN"},

11662
    {"bits": [12, 12], "name": "RESERVED_2"},

11663
    {"bits": [13, 13], "name": "ES_PASSTHRU"},

11664
    {"bits": [14, 14], "name": "COMPUTE_MODE"},

11665
    {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"},

11666
    {"bits": [16, 16], "name": "ELEMENT_INFO_EN"},

11667
    {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},

11668
    {"bits": [18, 18], "name": "SUPPRESS_CUTS"},

11669
    {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},

11670
    {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},

11671
    {"bits": [21, 22], "name": "ONCHIP"}

11672
   ]

11673
  },

11674
  "VGT_GS_ONCHIP_CNTL": {

11675
   "fields": [

11676
    {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},

11677
    {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}

11678
   ]

11679
  },

11680
  "VGT_GS_OUT_PRIM_TYPE": {

11681
   "fields": [

11682
    {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},

11683
    {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},

11684
    {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},

11685
    {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},

11686
    {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}

11687
   ]

11688
  },

11689
  "VGT_GS_PER_ES": {

11690
   "fields": [

11691
    {"bits": [0, 10], "name": "GS_PER_ES"}

11692
   ]

11693
  },

11694
  "VGT_GS_PER_VS": {

11695
   "fields": [

11696
    {"bits": [0, 3], "name": "GS_PER_VS"}

11697
   ]

11698
  },

11699
  "VGT_HOS_CNTL": {

11700
   "fields": [

11701
    {"bits": [0, 1], "name": "TESS_MODE"}

11702
   ]

11703
  },

11704
  "VGT_HOS_REUSE_DEPTH": {

11705
   "fields": [

11706
    {"bits": [0, 7], "name": "REUSE_DEPTH"}

11707
   ]

11708
  },

11709
  "VGT_HS_OFFCHIP_PARAM": {

11710
   "fields": [

11711
    {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},

11712
    {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}

11713
   ]

11714
  },

11715
  "VGT_INDEX_TYPE": {

11716
   "fields": [

11717
    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}

11718
   ]

11719
  },

11720
  "VGT_LS_HS_CONFIG": {

11721
   "fields": [

11722
    {"bits": [0, 7], "name": "NUM_PATCHES"},

11723
    {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},

11724
    {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}

11725
   ]

11726
  },

11727
  "VGT_MULTI_PRIM_IB_RESET_EN": {

11728
   "fields": [

11729
    {"bits": [0, 0], "name": "RESET_EN"}

11730
   ]

11731
  },

11732
  "VGT_OUTPUT_PATH_CNTL": {

11733
   "fields": [

11734
    {"bits": [0, 2], "name": "PATH_SELECT"}

11735
   ]

11736
  },

11737
  "VGT_OUT_DEALLOC_CNTL": {

11738
   "fields": [

11739
    {"bits": [0, 6], "name": "DEALLOC_DIST"}

11740
   ]

11741
  },

11742
  "VGT_PERFCOUNTER2_SELECT": {

11743
   "fields": [

11744
    {"bits": [0, 7], "name": "PERF_SEL"},

11745
    {"bits": [28, 31], "name": "PERF_MODE"}

11746
   ]

11747
  },

11748
  "VGT_PERFCOUNTER_SEID_MASK": {

11749
   "fields": [

11750
    {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}

11751
   ]

11752
  },

11753
  "VGT_PRIMITIVEID_EN": {

11754
   "fields": [

11755
    {"bits": [0, 0], "name": "PRIMITIVEID_EN"},

11756
    {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}

11757
   ]

11758
  },

11759
  "VGT_PRIMITIVE_TYPE": {

11760
   "fields": [

11761
    {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}

11762
   ]

11763
  },

11764
  "VGT_REUSE_OFF": {

11765
   "fields": [

11766
    {"bits": [0, 0], "name": "REUSE_OFF"}

11767
   ]

11768
  },

11769
  "VGT_SHADER_STAGES_EN": {

11770
   "fields": [

11771
    {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},

11772
    {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},

11773
    {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},

11774
    {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},

11775
    {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},

11776
    {"bits": [8, 8], "name": "DYNAMIC_HS"}

11777
   ]

11778
  },

11779
  "VGT_STRMOUT_BUFFER_CONFIG": {

11780
   "fields": [

11781
    {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},

11782
    {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},

11783
    {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},

11784
    {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}

11785
   ]

11786
  },

11787
  "VGT_STRMOUT_CONFIG": {

11788
   "fields": [

11789
    {"bits": [0, 0], "name": "STREAMOUT_0_EN"},

11790
    {"bits": [1, 1], "name": "STREAMOUT_1_EN"},

11791
    {"bits": [2, 2], "name": "STREAMOUT_2_EN"},

11792
    {"bits": [3, 3], "name": "STREAMOUT_3_EN"},

11793
    {"bits": [4, 6], "name": "RAST_STREAM"},

11794
    {"bits": [8, 11], "name": "RAST_STREAM_MASK"},

11795
    {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}

11796
   ]

11797
  },

11798
  "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {

11799
   "fields": [

11800
    {"bits": [0, 8], "name": "VERTEX_STRIDE"}

11801
   ]

11802
  },

11803
  "VGT_STRMOUT_VTX_STRIDE_0": {

11804
   "fields": [

11805
    {"bits": [0, 9], "name": "STRIDE"}

11806
   ]

11807
  },

11808
  "VGT_TF_PARAM": {

11809
   "fields": [

11810
    {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},

11811
    {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},

11812
    {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},

11813
    {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},

11814
    {"bits": [9, 9], "name": "DEPRECATED"},

11815
    {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},

11816
    {"bits": [14, 14], "name": "DISABLE_DONUTS"},

11817
    {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}

11818
   ]

11819
  },

11820
  "VGT_TF_RING_SIZE": {

11821
   "fields": [

11822
    {"bits": [0, 15], "name": "SIZE"}

11823
   ]

11824
  },

11825
  "VGT_VERTEX_REUSE_BLOCK_CNTL": {

11826
   "fields": [

11827
    {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}

11828
   ]

11829
  },

11830
  "VGT_VTX_CNT_EN": {

11831
   "fields": [

11832
    {"bits": [0, 0], "name": "VTX_CNT_EN"}

11833
   ]

11834
  }

11835
 }

11836
}

11837


11838