CoCalc -- gfx8.json

GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/amd/registers/gfx8.json
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{
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 "enums": {
3
  "ArrayMode": {
4
   "entries": [
5
    {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
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    {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7
    {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8
    {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9
    {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10
    {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11
    {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12
    {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13
    {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14
    {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
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    {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
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    {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
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    {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18
    {"name": "ARRAY_3D_TILED_THICK", "value": 13},
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    {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
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    {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
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   ]
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  },
23
  "BUF_DATA_FORMAT": {
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   "entries": [
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    {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
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    {"name": "BUF_DATA_FORMAT_8", "value": 1},
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    {"name": "BUF_DATA_FORMAT_16", "value": 2},
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    {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
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    {"name": "BUF_DATA_FORMAT_32", "value": 4},
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    {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
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    {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
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    {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
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    {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
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    {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
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    {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
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    {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
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    {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
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    {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
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    {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
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    {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
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   ]
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  },
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  "BUF_NUM_FORMAT": {
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   "entries": [
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    {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
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    {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
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    {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
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    {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
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    {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
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    {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
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    {"name": "BUF_NUM_FORMAT_RESERVED_6", "value": 6},
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    {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
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   ]
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  },
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  "BankHeight": {
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   "entries": [
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    {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
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    {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
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    {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
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    {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
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   ]
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  },
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  "BankWidth": {
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   "entries": [
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    {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
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    {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
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    {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
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    {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
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   ]
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  },
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  "BlendOp": {
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   "entries": [
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    {"name": "BLEND_ZERO", "value": 0},
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    {"name": "BLEND_ONE", "value": 1},
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    {"name": "BLEND_SRC_COLOR", "value": 2},
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    {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
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    {"name": "BLEND_SRC_ALPHA", "value": 4},
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    {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
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    {"name": "BLEND_DST_ALPHA", "value": 6},
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    {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
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    {"name": "BLEND_DST_COLOR", "value": 8},
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    {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
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    {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
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    {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
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    {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
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    {"name": "BLEND_CONSTANT_COLOR", "value": 13},
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    {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
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    {"name": "BLEND_SRC1_COLOR", "value": 15},
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    {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
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    {"name": "BLEND_SRC1_ALPHA", "value": 17},
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    {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
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    {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
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    {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
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   ]
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  },
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  "BlendOpt": {
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   "entries": [
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    {"name": "FORCE_OPT_AUTO", "value": 0},
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    {"name": "FORCE_OPT_DISABLE", "value": 1},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
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    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
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   ]
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  },
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  "CBMode": {
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   "entries": [
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    {"name": "CB_DISABLE", "value": 0},
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    {"name": "CB_NORMAL", "value": 1},
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    {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
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    {"name": "CB_RESOLVE", "value": 3},
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    {"name": "CB_DECOMPRESS", "value": 4},
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    {"name": "CB_FMASK_DECOMPRESS", "value": 5},
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    {"name": "CB_DCC_DECOMPRESS", "value": 6}
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   ]
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  },
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  "CBPerfClearFilterSel": {
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   "entries": [
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    {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
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    {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
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   ]
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  },
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  "CBPerfOpFilterSel": {
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   "entries": [
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    {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
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    {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
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    {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
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    {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
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    {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
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    {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
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   ]
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  },
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  "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE": {
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   "entries": [
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    {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
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    {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
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    {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
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   ]
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  },
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  "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE": {
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   "entries": [
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    {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
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    {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
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   ]
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  },
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  "CLIP_RULE": {
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   "entries": [
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    {"name": "OUT", "value": 1},
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    {"name": "IN_0", "value": 2},
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    {"name": "IN_1", "value": 4},
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    {"name": "IN_10", "value": 8},
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    {"name": "IN_2", "value": 16},
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    {"name": "IN_20", "value": 32},
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    {"name": "IN_21", "value": 64},
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    {"name": "IN_210", "value": 128},
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    {"name": "IN_3", "value": 256},
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    {"name": "IN_30", "value": 512},
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    {"name": "IN_31", "value": 1024},
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    {"name": "IN_310", "value": 2048},
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    {"name": "IN_32", "value": 4096},
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    {"name": "IN_320", "value": 8192},
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    {"name": "IN_321", "value": 16384},
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    {"name": "IN_3210", "value": 32768}
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   ]
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  },
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  "CP_PERFMON_ENABLE_MODE": {
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   "entries": [
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    {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
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    {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
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    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
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    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
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   ]
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  },
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  "CP_PERFMON_STATE": {
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   "entries": [
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    {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
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    {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
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    {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
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    {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
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    {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
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    {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
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   ]
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  },
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  "CmaskAddr": {
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   "entries": [
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    {"name": "CMASK_ADDR_TILED", "value": 0},
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    {"name": "CMASK_ADDR_LINEAR", "value": 1},
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    {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
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   ]
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  },
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  "ColorFormat": {
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   "entries": [
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    {"name": "COLOR_INVALID", "value": 0},
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    {"name": "COLOR_8", "value": 1},
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    {"name": "COLOR_16", "value": 2},
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    {"name": "COLOR_8_8", "value": 3},
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    {"name": "COLOR_32", "value": 4},
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    {"name": "COLOR_16_16", "value": 5},
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    {"name": "COLOR_10_11_11", "value": 6},
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    {"name": "COLOR_11_11_10", "value": 7},
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    {"name": "COLOR_10_10_10_2", "value": 8},
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    {"name": "COLOR_2_10_10_10", "value": 9},
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    {"name": "COLOR_8_8_8_8", "value": 10},
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    {"name": "COLOR_32_32", "value": 11},
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    {"name": "COLOR_16_16_16_16", "value": 12},
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    {"name": "COLOR_RESERVED_13", "value": 13},
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    {"name": "COLOR_32_32_32_32", "value": 14},
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    {"name": "COLOR_RESERVED_15", "value": 15},
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    {"name": "COLOR_5_6_5", "value": 16},
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    {"name": "COLOR_1_5_5_5", "value": 17},
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    {"name": "COLOR_5_5_5_1", "value": 18},
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    {"name": "COLOR_4_4_4_4", "value": 19},
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    {"name": "COLOR_8_24", "value": 20},
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    {"name": "COLOR_24_8", "value": 21},
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    {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
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    {"name": "COLOR_RESERVED_23", "value": 23}
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   ]
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  },
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  "CombFunc": {
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   "entries": [
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    {"name": "COMB_DST_PLUS_SRC", "value": 0},
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    {"name": "COMB_SRC_MINUS_DST", "value": 1},
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    {"name": "COMB_MIN_DST_SRC", "value": 2},
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    {"name": "COMB_MAX_DST_SRC", "value": 3},
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    {"name": "COMB_DST_MINUS_SRC", "value": 4}
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   ]
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  },
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  "CompareFrag": {
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   "entries": [
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    {"name": "FRAG_NEVER", "value": 0},
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    {"name": "FRAG_LESS", "value": 1},
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    {"name": "FRAG_EQUAL", "value": 2},
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    {"name": "FRAG_LEQUAL", "value": 3},
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    {"name": "FRAG_GREATER", "value": 4},
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    {"name": "FRAG_NOTEQUAL", "value": 5},
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    {"name": "FRAG_GEQUAL", "value": 6},
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    {"name": "FRAG_ALWAYS", "value": 7}
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   ]
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  },
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  "ConservativeZExport": {
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   "entries": [
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    {"name": "EXPORT_ANY_Z", "value": 0},
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    {"name": "EXPORT_LESS_THAN_Z", "value": 1},
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    {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
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    {"name": "EXPORT_RESERVED", "value": 3}
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   ]
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  },
250
  "DbPSLControl": {
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   "entries": [
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    {"name": "PSLC_AUTO", "value": 0},
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    {"name": "PSLC_ON_HANG_ONLY", "value": 1},
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    {"name": "PSLC_ASAP", "value": 2},
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    {"name": "PSLC_COUNTDOWN", "value": 3}
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   ]
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  },
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  "EXCP_EN": {
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   "entries": [
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    {"name": "INVALID", "value": 1},
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    {"name": "INPUT_DENORMAL", "value": 2},
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    {"name": "DIVIDE_BY_ZERO", "value": 4},
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    {"name": "OVERFLOW", "value": 8},
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    {"name": "UNDERFLOW", "value": 16},
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    {"name": "INEXACT", "value": 32},
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    {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
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    {"name": "ADDRESS_WATCH", "value": 128},
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    {"name": "MEMORY_VIOLATION", "value": 256}
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   ]
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  },
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  "FLOAT_MODE": {
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   "entries": [
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    {"name": "FP_32_DENORMS", "value": 48},
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    {"name": "FP_64_DENORMS", "value": 192},
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    {"name": "FP_ALL_DENORMS", "value": 240}
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   ]
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  },
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  "ForceControl": {
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   "entries": [
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    {"name": "FORCE_OFF", "value": 0},
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    {"name": "FORCE_ENABLE", "value": 1},
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    {"name": "FORCE_DISABLE", "value": 2},
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    {"name": "FORCE_RESERVED", "value": 3}
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   ]
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  },
286
  "IMG_DATA_FORMAT": {
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   "entries": [
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    {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
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    {"name": "IMG_DATA_FORMAT_8", "value": 1},
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    {"name": "IMG_DATA_FORMAT_16", "value": 2},
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    {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
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    {"name": "IMG_DATA_FORMAT_32", "value": 4},
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    {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
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    {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
295
    {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
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    {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
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    {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
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    {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
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    {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
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    {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
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    {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
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    {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
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    {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
304
    {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
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    {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
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    {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
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    {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
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    {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
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    {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
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    {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
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    {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23},
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    {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24},
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    {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25},
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    {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26},
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    {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27},
316
    {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28},
317
    {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
318
    {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
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    {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},
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    {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
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    {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
322
    {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
323
    {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
324
    {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
325
    {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
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    {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
327
    {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
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    {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
329
    {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
330
    {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42},
331
    {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},
332
    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
333
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
334
    {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
335
    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
336
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},
337
    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
338
    {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
339
    {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
340
    {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
341
    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
342
    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
343
    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
344
    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
345
    {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
346
    {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
347
    {"name": "IMG_DATA_FORMAT_1", "value": 59},
348
    {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
349
    {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},
350
    {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},
351
    {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
352
   ]
353
  },
354
  "IMG_NUM_FORMAT": {
355
   "entries": [
356
    {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
357
    {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
358
    {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
359
    {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
360
    {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
361
    {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
362
    {"name": "IMG_NUM_FORMAT_RESERVED_6", "value": 6},
363
    {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
364
    {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
365
    {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
366
    {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
367
    {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
368
    {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
369
    {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
370
    {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
371
    {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
372
   ]
373
  },
374
  "MacroTileAspect": {
375
   "entries": [
376
    {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
377
    {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
378
    {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
379
    {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
380
   ]
381
  },
382
  "MicroTileMode": {
383
   "entries": [
384
    {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
385
    {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
386
    {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
387
    {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
388
    {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
389
   ]
390
  },
391
  "NumBanks": {
392
   "entries": [
393
    {"name": "ADDR_SURF_2_BANK", "value": 0},
394
    {"name": "ADDR_SURF_4_BANK", "value": 1},
395
    {"name": "ADDR_SURF_8_BANK", "value": 2},
396
    {"name": "ADDR_SURF_16_BANK", "value": 3}
397
   ]
398
  },
399
  "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {
400
   "entries": [
401
    {"name": "X_DRAW_POINTS", "value": 0},
402
    {"name": "X_DRAW_LINES", "value": 1},
403
    {"name": "X_DRAW_TRIANGLES", "value": 2}
404
   ]
405
  },
406
  "PA_SU_SC_MODE_CNTL__POLY_MODE": {
407
   "entries": [
408
    {"name": "X_DISABLE_POLY_MODE", "value": 0},
409
    {"name": "X_DUAL_MODE", "value": 1}
410
   ]
411
  },
412
  "PA_SU_VTX_CNTL__ROUND_MODE": {
413
   "entries": [
414
    {"name": "X_TRUNCATE", "value": 0},
415
    {"name": "X_ROUND", "value": 1},
416
    {"name": "X_ROUND_TO_EVEN", "value": 2},
417
    {"name": "X_ROUND_TO_ODD", "value": 3}
418
   ]
419
  },
420
  "PipeConfig": {
421
   "entries": [
422
    {"name": "ADDR_SURF_P2", "value": 0},
423
    {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
424
    {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
425
    {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
426
    {"name": "ADDR_SURF_P4_8x16", "value": 4},
427
    {"name": "ADDR_SURF_P4_16x16", "value": 5},
428
    {"name": "ADDR_SURF_P4_16x32", "value": 6},
429
    {"name": "ADDR_SURF_P4_32x32", "value": 7},
430
    {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
431
    {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
432
    {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
433
    {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
434
    {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
435
    {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
436
    {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
437
    {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
438
    {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
439
    {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
440
   ]
441
  },
442
  "PkrMap": {
443
   "entries": [
444
    {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
445
    {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
446
    {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
447
    {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
448
   ]
449
  },
450
  "PkrXsel": {
451
   "entries": [
452
    {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
453
    {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
454
    {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
455
    {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
456
   ]
457
  },
458
  "PkrXsel2": {
459
   "entries": [
460
    {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
461
    {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
462
    {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
463
    {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
464
   ]
465
  },
466
  "PkrYsel": {
467
   "entries": [
468
    {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
469
    {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
470
    {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
471
    {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
472
   ]
473
  },
474
  "QUANT_MODE": {
475
   "entries": [
476
    {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
477
    {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
478
    {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
479
    {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
480
    {"name": "X_16_8_FIXED_POINT_1", "value": 4},
481
    {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
482
    {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
483
    {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
484
   ]
485
  },
486
  "ROP3": {
487
   "entries": [
488
    {"name": "ROP3_CLEAR", "value": 0},
489
    {"name": "X_0X05", "value": 5},
490
    {"name": "X_0X0A", "value": 10},
491
    {"name": "X_0X0F", "value": 15},
492
    {"name": "ROP3_NOR", "value": 17},
493
    {"name": "ROP3_AND_INVERTED", "value": 34},
494
    {"name": "ROP3_COPY_INVERTED", "value": 51},
495
    {"name": "ROP3_AND_REVERSE", "value": 68},
496
    {"name": "X_0X50", "value": 80},
497
    {"name": "ROP3_INVERT", "value": 85},
498
    {"name": "X_0X5A", "value": 90},
499
    {"name": "X_0X5F", "value": 95},
500
    {"name": "ROP3_XOR", "value": 102},
501
    {"name": "ROP3_NAND", "value": 119},
502
    {"name": "ROP3_AND", "value": 136},
503
    {"name": "ROP3_EQUIVALENT", "value": 153},
504
    {"name": "X_0XA0", "value": 160},
505
    {"name": "X_0XA5", "value": 165},
506
    {"name": "ROP3_NO_OP", "value": 170},
507
    {"name": "X_0XAF", "value": 175},
508
    {"name": "ROP3_OR_INVERTED", "value": 187},
509
    {"name": "ROP3_COPY", "value": 204},
510
    {"name": "ROP3_OR_REVERSE", "value": 221},
511
    {"name": "ROP3_OR", "value": 238},
512
    {"name": "X_0XF0", "value": 240},
513
    {"name": "X_0XF5", "value": 245},
514
    {"name": "X_0XFA", "value": 250},
515
    {"name": "ROP3_SET", "value": 255}
516
   ]
517
  },
518
  "RbMap": {
519
   "entries": [
520
    {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
521
    {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
522
    {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
523
    {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
524
   ]
525
  },
526
  "RbXsel": {
527
   "entries": [
528
    {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
529
    {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
530
   ]
531
  },
532
  "RbXsel2": {
533
   "entries": [
534
    {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
535
    {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
536
    {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
537
    {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
538
   ]
539
  },
540
  "RbYsel": {
541
   "entries": [
542
    {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
543
    {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
544
   ]
545
  },
546
  "SPI_PNT_SPRITE_OVERRIDE": {
547
   "entries": [
548
    {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
549
    {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
550
    {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
551
    {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
552
    {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
553
   ]
554
  },
555
  "SPI_SHADER_EX_FORMAT": {
556
   "entries": [
557
    {"name": "SPI_SHADER_ZERO", "value": 0},
558
    {"name": "SPI_SHADER_32_R", "value": 1},
559
    {"name": "SPI_SHADER_32_GR", "value": 2},
560
    {"name": "SPI_SHADER_32_AR", "value": 3},
561
    {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
562
    {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
563
    {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
564
    {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
565
    {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
566
    {"name": "SPI_SHADER_32_ABGR", "value": 9}
567
   ]
568
  },
569
  "SPI_SHADER_FORMAT": {
570
   "entries": [
571
    {"name": "SPI_SHADER_NONE", "value": 0},
572
    {"name": "SPI_SHADER_1COMP", "value": 1},
573
    {"name": "SPI_SHADER_2COMP", "value": 2},
574
    {"name": "SPI_SHADER_4COMPRESS", "value": 3},
575
    {"name": "SPI_SHADER_4COMP", "value": 4}
576
   ]
577
  },
578
  "SPM_PERFMON_STATE": {
579
   "entries": [
580
    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
581
    {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
582
    {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
583
    {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
584
    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
585
    {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
586
   ]
587
  },
588
  "SQ_IMG_FILTER_TYPE": {
589
   "entries": [
590
    {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
591
    {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
592
    {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
593
   ]
594
  },
595
  "SQ_RSRC_BUF_TYPE": {
596
   "entries": [
597
    {"name": "SQ_RSRC_BUF", "value": 0},
598
    {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
599
    {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
600
    {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
601
   ]
602
  },
603
  "SQ_RSRC_IMG_TYPE": {
604
   "entries": [
605
    {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
606
    {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
607
    {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
608
    {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
609
    {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
610
    {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
611
    {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
612
    {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
613
    {"name": "SQ_RSRC_IMG_1D", "value": 8},
614
    {"name": "SQ_RSRC_IMG_2D", "value": 9},
615
    {"name": "SQ_RSRC_IMG_3D", "value": 10},
616
    {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
617
    {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
618
    {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
619
    {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
620
    {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
621
   ]
622
  },
623
  "SQ_SEL_XYZW01": {
624
   "entries": [
625
    {"name": "SQ_SEL_0", "value": 0},
626
    {"name": "SQ_SEL_1", "value": 1},
627
    {"name": "SQ_SEL_RESERVED_0", "value": 2},
628
    {"name": "SQ_SEL_RESERVED_1", "value": 3},
629
    {"name": "SQ_SEL_X", "value": 4},
630
    {"name": "SQ_SEL_Y", "value": 5},
631
    {"name": "SQ_SEL_Z", "value": 6},
632
    {"name": "SQ_SEL_W", "value": 7}
633
   ]
634
  },
635
  "SQ_TEX_BORDER_COLOR": {
636
   "entries": [
637
    {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
638
    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
639
    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
640
    {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
641
   ]
642
  },
643
  "SQ_TEX_CLAMP": {
644
   "entries": [
645
    {"name": "SQ_TEX_WRAP", "value": 0},
646
    {"name": "SQ_TEX_MIRROR", "value": 1},
647
    {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
648
    {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
649
    {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
650
    {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
651
    {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
652
    {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
653
   ]
654
  },
655
  "SQ_TEX_DEPTH_COMPARE": {
656
   "entries": [
657
    {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
658
    {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
659
    {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
660
    {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
661
    {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
662
    {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
663
    {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
664
    {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
665
   ]
666
  },
667
  "SQ_TEX_MIP_FILTER": {
668
   "entries": [
669
    {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
670
    {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
671
    {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
672
    {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
673
   ]
674
  },
675
  "SQ_TEX_XY_FILTER": {
676
   "entries": [
677
    {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
678
    {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
679
    {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
680
    {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
681
   ]
682
  },
683
  "SQ_TEX_Z_FILTER": {
684
   "entries": [
685
    {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
686
    {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
687
    {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
688
   ]
689
  },
690
  "ScMap": {
691
   "entries": [
692
    {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
693
    {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
694
    {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
695
    {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
696
   ]
697
  },
698
  "ScXsel": {
699
   "entries": [
700
    {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
701
    {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
702
    {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
703
    {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
704
   ]
705
  },
706
  "ScYsel": {
707
   "entries": [
708
    {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
709
    {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
710
    {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
711
    {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
712
   ]
713
  },
714
  "SeMap": {
715
   "entries": [
716
    {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
717
    {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
718
    {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
719
    {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
720
   ]
721
  },
722
  "SePairMap": {
723
   "entries": [
724
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
725
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
726
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
727
    {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
728
   ]
729
  },
730
  "SePairXsel": {
731
   "entries": [
732
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
733
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
734
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
735
    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
736
   ]
737
  },
738
  "SePairYsel": {
739
   "entries": [
740
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
741
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
742
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
743
    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
744
   ]
745
  },
746
  "SeXsel": {
747
   "entries": [
748
    {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
749
    {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
750
    {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
751
    {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
752
   ]
753
  },
754
  "SeYsel": {
755
   "entries": [
756
    {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
757
    {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
758
    {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
759
    {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
760
   ]
761
  },
762
  "StencilFormat": {
763
   "entries": [
764
    {"name": "STENCIL_INVALID", "value": 0},
765
    {"name": "STENCIL_8", "value": 1}
766
   ]
767
  },
768
  "StencilOp": {
769
   "entries": [
770
    {"name": "STENCIL_KEEP", "value": 0},
771
    {"name": "STENCIL_ZERO", "value": 1},
772
    {"name": "STENCIL_ONES", "value": 2},
773
    {"name": "STENCIL_REPLACE_TEST", "value": 3},
774
    {"name": "STENCIL_REPLACE_OP", "value": 4},
775
    {"name": "STENCIL_ADD_CLAMP", "value": 5},
776
    {"name": "STENCIL_SUB_CLAMP", "value": 6},
777
    {"name": "STENCIL_INVERT", "value": 7},
778
    {"name": "STENCIL_ADD_WRAP", "value": 8},
779
    {"name": "STENCIL_SUB_WRAP", "value": 9},
780
    {"name": "STENCIL_AND", "value": 10},
781
    {"name": "STENCIL_OR", "value": 11},
782
    {"name": "STENCIL_XOR", "value": 12},
783
    {"name": "STENCIL_NAND", "value": 13},
784
    {"name": "STENCIL_NOR", "value": 14},
785
    {"name": "STENCIL_XNOR", "value": 15}
786
   ]
787
  },
788
  "SurfaceEndian": {
789
   "entries": [
790
    {"name": "ENDIAN_NONE", "value": 0},
791
    {"name": "ENDIAN_8IN16", "value": 1},
792
    {"name": "ENDIAN_8IN32", "value": 2},
793
    {"name": "ENDIAN_8IN64", "value": 3}
794
   ]
795
  },
796
  "SurfaceNumber": {
797
   "entries": [
798
    {"name": "NUMBER_UNORM", "value": 0},
799
    {"name": "NUMBER_SNORM", "value": 1},
800
    {"name": "NUMBER_USCALED", "value": 2},
801
    {"name": "NUMBER_SSCALED", "value": 3},
802
    {"name": "NUMBER_UINT", "value": 4},
803
    {"name": "NUMBER_SINT", "value": 5},
804
    {"name": "NUMBER_SRGB", "value": 6},
805
    {"name": "NUMBER_FLOAT", "value": 7}
806
   ]
807
  },
808
  "SurfaceSwap": {
809
   "entries": [
810
    {"name": "SWAP_STD", "value": 0},
811
    {"name": "SWAP_ALT", "value": 1},
812
    {"name": "SWAP_STD_REV", "value": 2},
813
    {"name": "SWAP_ALT_REV", "value": 3}
814
   ]
815
  },
816
  "TileSplit": {
817
   "entries": [
818
    {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
819
    {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
820
    {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
821
    {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
822
    {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
823
    {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
824
    {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
825
   ]
826
  },
827
  "VGT_DIST_MODE": {
828
   "entries": [
829
    {"name": "NO_DIST", "value": 0},
830
    {"name": "PATCHES", "value": 1},
831
    {"name": "DONUTS", "value": 2}
832
   ]
833
  },
834
  "VGT_DI_MAJOR_MODE_SELECT": {
835
   "entries": [
836
    {"name": "DI_MAJOR_MODE_0", "value": 0},
837
    {"name": "DI_MAJOR_MODE_1", "value": 1}
838
   ]
839
  },
840
  "VGT_DI_PRIM_TYPE": {
841
   "entries": [
842
    {"name": "DI_PT_NONE", "value": 0},
843
    {"name": "DI_PT_POINTLIST", "value": 1},
844
    {"name": "DI_PT_LINELIST", "value": 2},
845
    {"name": "DI_PT_LINESTRIP", "value": 3},
846
    {"name": "DI_PT_TRILIST", "value": 4},
847
    {"name": "DI_PT_TRIFAN", "value": 5},
848
    {"name": "DI_PT_TRISTRIP", "value": 6},
849
    {"name": "DI_PT_UNUSED_0", "value": 7},
850
    {"name": "DI_PT_UNUSED_1", "value": 8},
851
    {"name": "DI_PT_PATCH", "value": 9},
852
    {"name": "DI_PT_LINELIST_ADJ", "value": 10},
853
    {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
854
    {"name": "DI_PT_TRILIST_ADJ", "value": 12},
855
    {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
856
    {"name": "DI_PT_UNUSED_3", "value": 14},
857
    {"name": "DI_PT_UNUSED_4", "value": 15},
858
    {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
859
    {"name": "DI_PT_RECTLIST", "value": 17},
860
    {"name": "DI_PT_LINELOOP", "value": 18},
861
    {"name": "DI_PT_QUADLIST", "value": 19},
862
    {"name": "DI_PT_QUADSTRIP", "value": 20},
863
    {"name": "DI_PT_POLYGON", "value": 21},
864
    {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
865
    {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
866
    {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
867
    {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
868
    {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
869
    {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
870
    {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
871
   ]
872
  },
873
  "VGT_DI_SOURCE_SELECT": {
874
   "entries": [
875
    {"name": "DI_SRC_SEL_DMA", "value": 0},
876
    {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
877
    {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
878
    {"name": "DI_SRC_SEL_RESERVED", "value": 3}
879
   ]
880
  },
881
  "VGT_DMA_BUF_TYPE": {
882
   "entries": [
883
    {"name": "VGT_DMA_BUF_MEM", "value": 0},
884
    {"name": "VGT_DMA_BUF_RING", "value": 1},
885
    {"name": "VGT_DMA_BUF_SETUP", "value": 2},
886
    {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
887
   ]
888
  },
889
  "VGT_DMA_SWAP_MODE": {
890
   "entries": [
891
    {"name": "VGT_DMA_SWAP_NONE", "value": 0},
892
    {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
893
    {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
894
    {"name": "VGT_DMA_SWAP_WORD", "value": 3}
895
   ]
896
  },
897
  "VGT_EVENT_TYPE": {
898
   "entries": [
899
    {"name": "Reserved_0x00", "value": 0},
900
    {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
901
    {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
902
    {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
903
    {"name": "CACHE_FLUSH_TS", "value": 4},
904
    {"name": "CONTEXT_DONE", "value": 5},
905
    {"name": "CACHE_FLUSH", "value": 6},
906
    {"name": "CS_PARTIAL_FLUSH", "value": 7},
907
    {"name": "VGT_STREAMOUT_SYNC", "value": 8},
908
    {"name": "Reserved_0x09", "value": 9},
909
    {"name": "VGT_STREAMOUT_RESET", "value": 10},
910
    {"name": "END_OF_PIPE_INCR_DE", "value": 11},
911
    {"name": "END_OF_PIPE_IB_END", "value": 12},
912
    {"name": "RST_PIX_CNT", "value": 13},
913
    {"name": "Reserved_0x0E", "value": 14},
914
    {"name": "VS_PARTIAL_FLUSH", "value": 15},
915
    {"name": "PS_PARTIAL_FLUSH", "value": 16},
916
    {"name": "FLUSH_HS_OUTPUT", "value": 17},
917
    {"name": "FLUSH_LS_OUTPUT", "value": 18},
918
    {"name": "Reserved_0x13", "value": 19},
919
    {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
920
    {"name": "ZPASS_DONE", "value": 21},
921
    {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
922
    {"name": "PERFCOUNTER_START", "value": 23},
923
    {"name": "PERFCOUNTER_STOP", "value": 24},
924
    {"name": "PIPELINESTAT_START", "value": 25},
925
    {"name": "PIPELINESTAT_STOP", "value": 26},
926
    {"name": "PERFCOUNTER_SAMPLE", "value": 27},
927
    {"name": "FLUSH_ES_OUTPUT", "value": 28},
928
    {"name": "FLUSH_GS_OUTPUT", "value": 29},
929
    {"name": "SAMPLE_PIPELINESTAT", "value": 30},
930
    {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
931
    {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
932
    {"name": "RESET_VTX_CNT", "value": 33},
933
    {"name": "BLOCK_CONTEXT_DONE", "value": 34},
934
    {"name": "CS_CONTEXT_DONE", "value": 35},
935
    {"name": "VGT_FLUSH", "value": 36},
936
    {"name": "TGID_ROLLOVER", "value": 37},
937
    {"name": "SQ_NON_EVENT", "value": 38},
938
    {"name": "SC_SEND_DB_VPZ", "value": 39},
939
    {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
940
    {"name": "FLUSH_SX_TS", "value": 41},
941
    {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
942
    {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
943
    {"name": "FLUSH_AND_INV_DB_META", "value": 44},
944
    {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
945
    {"name": "FLUSH_AND_INV_CB_META", "value": 46},
946
    {"name": "CS_DONE", "value": 47},
947
    {"name": "PS_DONE", "value": 48},
948
    {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
949
    {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
950
    {"name": "THREAD_TRACE_START", "value": 51},
951
    {"name": "THREAD_TRACE_STOP", "value": 52},
952
    {"name": "THREAD_TRACE_MARKER", "value": 53},
953
    {"name": "THREAD_TRACE_FLUSH", "value": 54},
954
    {"name": "THREAD_TRACE_FINISH", "value": 55},
955
    {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
956
    {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
957
    {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
958
    {"name": "CONTEXT_SUSPEND", "value": 59},
959
    {"name": "OFFCHIP_HS_DEALLOC", "value": 60}
960
   ]
961
  },
962
  "VGT_GS_CUT_MODE": {
963
   "entries": [
964
    {"name": "GS_CUT_1024", "value": 0},
965
    {"name": "GS_CUT_512", "value": 1},
966
    {"name": "GS_CUT_256", "value": 2},
967
    {"name": "GS_CUT_128", "value": 3}
968
   ]
969
  },
970
  "VGT_GS_MODE_TYPE": {
971
   "entries": [
972
    {"name": "GS_OFF", "value": 0},
973
    {"name": "GS_SCENARIO_A", "value": 1},
974
    {"name": "GS_SCENARIO_B", "value": 2},
975
    {"name": "GS_SCENARIO_G", "value": 3},
976
    {"name": "GS_SCENARIO_C", "value": 4},
977
    {"name": "SPRITE_EN", "value": 5}
978
   ]
979
  },
980
  "VGT_GS_OUTPRIM_TYPE": {
981
   "entries": [
982
    {"name": "POINTLIST", "value": 0},
983
    {"name": "LINESTRIP", "value": 1},
984
    {"name": "TRISTRIP", "value": 2}
985
   ]
986
  },
987
  "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {
988
   "entries": [
989
    {"name": "X_8K_DWORDS", "value": 0},
990
    {"name": "X_4K_DWORDS", "value": 1},
991
    {"name": "X_2K_DWORDS", "value": 2},
992
    {"name": "X_1K_DWORDS", "value": 3}
993
   ]
994
  },
995
  "VGT_INDEX_TYPE_MODE": {
996
   "entries": [
997
    {"name": "VGT_INDEX_16", "value": 0},
998
    {"name": "VGT_INDEX_32", "value": 1},
999
    {"name": "VGT_INDEX_8", "value": 2}
1000
   ]
1001
  },
1002
  "VGT_RDREQ_POLICY": {
1003
   "entries": [
1004
    {"name": "VGT_POLICY_LRU", "value": 0},
1005
    {"name": "VGT_POLICY_STREAM", "value": 1}
1006
   ]
1007
  },
1008
  "VGT_STAGES_ES_EN": {
1009
   "entries": [
1010
    {"name": "ES_STAGE_OFF", "value": 0},
1011
    {"name": "ES_STAGE_DS", "value": 1},
1012
    {"name": "ES_STAGE_REAL", "value": 2},
1013
    {"name": "RESERVED_ES", "value": 3}
1014
   ]
1015
  },
1016
  "VGT_STAGES_GS_EN": {
1017
   "entries": [
1018
    {"name": "GS_STAGE_OFF", "value": 0},
1019
    {"name": "GS_STAGE_ON", "value": 1}
1020
   ]
1021
  },
1022
  "VGT_STAGES_HS_EN": {
1023
   "entries": [
1024
    {"name": "HS_STAGE_OFF", "value": 0},
1025
    {"name": "HS_STAGE_ON", "value": 1}
1026
   ]
1027
  },
1028
  "VGT_STAGES_LS_EN": {
1029
   "entries": [
1030
    {"name": "LS_STAGE_OFF", "value": 0},
1031
    {"name": "LS_STAGE_ON", "value": 1},
1032
    {"name": "CS_STAGE_ON", "value": 2},
1033
    {"name": "RESERVED_LS", "value": 3}
1034
   ]
1035
  },
1036
  "VGT_STAGES_VS_EN": {
1037
   "entries": [
1038
    {"name": "VS_STAGE_REAL", "value": 0},
1039
    {"name": "VS_STAGE_DS", "value": 1},
1040
    {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1041
    {"name": "RESERVED_VS", "value": 3}
1042
   ]
1043
  },
1044
  "VGT_TESS_PARTITION": {
1045
   "entries": [
1046
    {"name": "PART_INTEGER", "value": 0},
1047
    {"name": "PART_POW2", "value": 1},
1048
    {"name": "PART_FRAC_ODD", "value": 2},
1049
    {"name": "PART_FRAC_EVEN", "value": 3}
1050
   ]
1051
  },
1052
  "VGT_TESS_TOPOLOGY": {
1053
   "entries": [
1054
    {"name": "OUTPUT_POINT", "value": 0},
1055
    {"name": "OUTPUT_LINE", "value": 1},
1056
    {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1057
    {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1058
   ]
1059
  },
1060
  "VGT_TESS_TYPE": {
1061
   "entries": [
1062
    {"name": "TESS_ISOLINE", "value": 0},
1063
    {"name": "TESS_TRIANGLE", "value": 1},
1064
    {"name": "TESS_QUAD", "value": 2}
1065
   ]
1066
  },
1067
  "ZFormat": {
1068
   "entries": [
1069
    {"name": "Z_INVALID", "value": 0},
1070
    {"name": "Z_16", "value": 1},
1071
    {"name": "Z_24", "value": 2},
1072
    {"name": "Z_32_FLOAT", "value": 3}
1073
   ]
1074
  },
1075
  "ZLimitSumm": {
1076
   "entries": [
1077
    {"name": "FORCE_SUMM_OFF", "value": 0},
1078
    {"name": "FORCE_SUMM_MINZ", "value": 1},
1079
    {"name": "FORCE_SUMM_MAXZ", "value": 2},
1080
    {"name": "FORCE_SUMM_BOTH", "value": 3}
1081
   ]
1082
  },
1083
  "ZOrder": {
1084
   "entries": [
1085
    {"name": "LATE_Z", "value": 0},
1086
    {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1087
    {"name": "RE_Z", "value": 2},
1088
    {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1089
   ]
1090
  }
1091
 },
1092
 "register_mappings": [
1093
  {
1094
   "chips": ["gfx8"],
1095
   "map": {"at": 68, "to": "mm"},
1096
   "name": "SQ_WAVE_MODE",
1097
   "type_ref": "SQ_WAVE_MODE"
1098
  },
1099
  {
1100
   "chips": ["gfx8"],
1101
   "map": {"at": 72, "to": "mm"},
1102
   "name": "SQ_WAVE_STATUS",
1103
   "type_ref": "SQ_WAVE_STATUS"
1104
  },
1105
  {
1106
   "chips": ["gfx8"],
1107
   "map": {"at": 76, "to": "mm"},
1108
   "name": "SQ_WAVE_TRAPSTS",
1109
   "type_ref": "SQ_WAVE_TRAPSTS"
1110
  },
1111
  {
1112
   "chips": ["gfx8"],
1113
   "map": {"at": 80, "to": "mm"},
1114
   "name": "SQ_WAVE_HW_ID",
1115
   "type_ref": "SQ_WAVE_HW_ID"
1116
  },
1117
  {
1118
   "chips": ["gfx8"],
1119
   "map": {"at": 84, "to": "mm"},
1120
   "name": "SQ_WAVE_GPR_ALLOC",
1121
   "type_ref": "SQ_WAVE_GPR_ALLOC"
1122
  },
1123
  {
1124
   "chips": ["gfx8"],
1125
   "map": {"at": 88, "to": "mm"},
1126
   "name": "SQ_WAVE_LDS_ALLOC",
1127
   "type_ref": "SQ_WAVE_LDS_ALLOC"
1128
  },
1129
  {
1130
   "chips": ["gfx8"],
1131
   "map": {"at": 92, "to": "mm"},
1132
   "name": "SQ_WAVE_IB_STS",
1133
   "type_ref": "SQ_WAVE_IB_STS"
1134
  },
1135
  {
1136
   "chips": ["gfx8"],
1137
   "map": {"at": 96, "to": "mm"},
1138
   "name": "SQ_WAVE_PC_LO"
1139
  },
1140
  {
1141
   "chips": ["gfx8"],
1142
   "map": {"at": 100, "to": "mm"},
1143
   "name": "SQ_WAVE_PC_HI",
1144
   "type_ref": "SQ_WAVE_PC_HI"
1145
  },
1146
  {
1147
   "chips": ["gfx8"],
1148
   "map": {"at": 104, "to": "mm"},
1149
   "name": "SQ_WAVE_INST_DW0"
1150
  },
1151
  {
1152
   "chips": ["gfx8"],
1153
   "map": {"at": 108, "to": "mm"},
1154
   "name": "SQ_WAVE_INST_DW1"
1155
  },
1156
  {
1157
   "chips": ["gfx8"],
1158
   "map": {"at": 112, "to": "mm"},
1159
   "name": "SQ_WAVE_IB_DBG0",
1160
   "type_ref": "SQ_WAVE_IB_DBG0"
1161
  },
1162
  {
1163
   "chips": ["gfx8"],
1164
   "map": {"at": 116, "to": "mm"},
1165
   "name": "SQ_WAVE_IB_DBG1",
1166
   "type_ref": "SQ_WAVE_IB_DBG1"
1167
  },
1168
  {
1169
   "chips": ["gfx8"],
1170
   "map": {"at": 2480, "to": "mm"},
1171
   "name": "SQ_WAVE_TBA_LO"
1172
  },
1173
  {
1174
   "chips": ["gfx8"],
1175
   "map": {"at": 2484, "to": "mm"},
1176
   "name": "SQ_WAVE_TBA_HI",
1177
   "type_ref": "SQ_WAVE_TBA_HI"
1178
  },
1179
  {
1180
   "chips": ["gfx8"],
1181
   "map": {"at": 2488, "to": "mm"},
1182
   "name": "SQ_WAVE_TMA_LO"
1183
  },
1184
  {
1185
   "chips": ["gfx8"],
1186
   "map": {"at": 2492, "to": "mm"},
1187
   "name": "SQ_WAVE_TMA_HI",
1188
   "type_ref": "SQ_WAVE_TBA_HI"
1189
  },
1190
  {
1191
   "chips": ["gfx8"],
1192
   "map": {"at": 2496, "to": "mm"},
1193
   "name": "SQ_WAVE_TTMP0"
1194
  },
1195
  {
1196
   "chips": ["gfx8"],
1197
   "map": {"at": 2500, "to": "mm"},
1198
   "name": "SQ_WAVE_TTMP1"
1199
  },
1200
  {
1201
   "chips": ["gfx8"],
1202
   "map": {"at": 2504, "to": "mm"},
1203
   "name": "SQ_WAVE_TTMP2"
1204
  },
1205
  {
1206
   "chips": ["gfx8"],
1207
   "map": {"at": 2508, "to": "mm"},
1208
   "name": "SQ_WAVE_TTMP3"
1209
  },
1210
  {
1211
   "chips": ["gfx8"],
1212
   "map": {"at": 2512, "to": "mm"},
1213
   "name": "SQ_WAVE_TTMP4"
1214
  },
1215
  {
1216
   "chips": ["gfx8"],
1217
   "map": {"at": 2516, "to": "mm"},
1218
   "name": "SQ_WAVE_TTMP5"
1219
  },
1220
  {
1221
   "chips": ["gfx8"],
1222
   "map": {"at": 2520, "to": "mm"},
1223
   "name": "SQ_WAVE_TTMP6"
1224
  },
1225
  {
1226
   "chips": ["gfx8"],
1227
   "map": {"at": 2524, "to": "mm"},
1228
   "name": "SQ_WAVE_TTMP7"
1229
  },
1230
  {
1231
   "chips": ["gfx8"],
1232
   "map": {"at": 2528, "to": "mm"},
1233
   "name": "SQ_WAVE_TTMP8"
1234
  },
1235
  {
1236
   "chips": ["gfx8"],
1237
   "map": {"at": 2532, "to": "mm"},
1238
   "name": "SQ_WAVE_TTMP9"
1239
  },
1240
  {
1241
   "chips": ["gfx8"],
1242
   "map": {"at": 2536, "to": "mm"},
1243
   "name": "SQ_WAVE_TTMP10"
1244
  },
1245
  {
1246
   "chips": ["gfx8"],
1247
   "map": {"at": 2540, "to": "mm"},
1248
   "name": "SQ_WAVE_TTMP11"
1249
  },
1250
  {
1251
   "chips": ["gfx8"],
1252
   "map": {"at": 2544, "to": "mm"},
1253
   "name": "SQ_WAVE_M0"
1254
  },
1255
  {
1256
   "chips": ["gfx8"],
1257
   "map": {"at": 2552, "to": "mm"},
1258
   "name": "SQ_WAVE_EXEC_LO"
1259
  },
1260
  {
1261
   "chips": ["gfx8"],
1262
   "map": {"at": 2556, "to": "mm"},
1263
   "name": "SQ_WAVE_EXEC_HI"
1264
  },
1265
  {
1266
   "chips": ["gfx8"],
1267
   "map": {"at": 32776, "to": "mm"},
1268
   "name": "GRBM_STATUS2",
1269
   "type_ref": "GRBM_STATUS2"
1270
  },
1271
  {
1272
   "chips": ["gfx8"],
1273
   "map": {"at": 32784, "to": "mm"},
1274
   "name": "GRBM_STATUS",
1275
   "type_ref": "GRBM_STATUS"
1276
  },
1277
  {
1278
   "chips": ["gfx8"],
1279
   "map": {"at": 32788, "to": "mm"},
1280
   "name": "GRBM_STATUS_SE0",
1281
   "type_ref": "GRBM_STATUS_SE0"
1282
  },
1283
  {
1284
   "chips": ["gfx8"],
1285
   "map": {"at": 32792, "to": "mm"},
1286
   "name": "GRBM_STATUS_SE1",
1287
   "type_ref": "GRBM_STATUS_SE0"
1288
  },
1289
  {
1290
   "chips": ["gfx8"],
1291
   "map": {"at": 32824, "to": "mm"},
1292
   "name": "GRBM_STATUS_SE2",
1293
   "type_ref": "GRBM_STATUS_SE0"
1294
  },
1295
  {
1296
   "chips": ["gfx8"],
1297
   "map": {"at": 32828, "to": "mm"},
1298
   "name": "GRBM_STATUS_SE3",
1299
   "type_ref": "GRBM_STATUS_SE0"
1300
  },
1301
  {
1302
   "chips": ["gfx8"],
1303
   "map": {"at": 33296, "to": "mm"},
1304
   "name": "CP_CPC_STATUS",
1305
   "type_ref": "CP_CPC_STATUS"
1306
  },
1307
  {
1308
   "chips": ["gfx8"],
1309
   "map": {"at": 33300, "to": "mm"},
1310
   "name": "CP_CPC_BUSY_STAT",
1311
   "type_ref": "CP_CPC_BUSY_STAT"
1312
  },
1313
  {
1314
   "chips": ["gfx8"],
1315
   "map": {"at": 33304, "to": "mm"},
1316
   "name": "CP_CPC_STALLED_STAT1",
1317
   "type_ref": "CP_CPC_STALLED_STAT1"
1318
  },
1319
  {
1320
   "chips": ["gfx8"],
1321
   "map": {"at": 33308, "to": "mm"},
1322
   "name": "CP_CPF_STATUS",
1323
   "type_ref": "CP_CPF_STATUS"
1324
  },
1325
  {
1326
   "chips": ["gfx8"],
1327
   "map": {"at": 33312, "to": "mm"},
1328
   "name": "CP_CPF_BUSY_STAT",
1329
   "type_ref": "CP_CPF_BUSY_STAT"
1330
  },
1331
  {
1332
   "chips": ["gfx8"],
1333
   "map": {"at": 33316, "to": "mm"},
1334
   "name": "CP_CPF_STALLED_STAT1",
1335
   "type_ref": "CP_CPF_STALLED_STAT1"
1336
  },
1337
  {
1338
   "chips": ["gfx8"],
1339
   "map": {"at": 33324, "to": "mm"},
1340
   "name": "CP_CPC_GRBM_FREE_COUNT",
1341
   "type_ref": "CP_CPC_GRBM_FREE_COUNT"
1342
  },
1343
  {
1344
   "chips": ["gfx8"],
1345
   "map": {"at": 33344, "to": "mm"},
1346
   "name": "CP_CPC_SCRATCH_INDEX",
1347
   "type_ref": "CP_CPC_SCRATCH_INDEX"
1348
  },
1349
  {
1350
   "chips": ["gfx8"],
1351
   "map": {"at": 33348, "to": "mm"},
1352
   "name": "CP_CPC_SCRATCH_DATA"
1353
  },
1354
  {
1355
   "chips": ["gfx8"],
1356
   "map": {"at": 33436, "to": "mm"},
1357
   "name": "CP_CPC_HALT_HYST_COUNT",
1358
   "type_ref": "CP_CPC_HALT_HYST_COUNT"
1359
  },
1360
  {
1361
   "chips": ["gfx8"],
1362
   "map": {"at": 36416, "to": "mm"},
1363
   "name": "SQ_THREAD_TRACE_CNTR"
1364
  },
1365
  {
1366
   "chips": ["gfx8"],
1367
   "map": {"at": 36608, "to": "mm"},
1368
   "name": "SQ_BUF_RSRC_WORD0"
1369
  },
1370
  {
1371
   "chips": ["gfx8"],
1372
   "map": {"at": 36612, "to": "mm"},
1373
   "name": "SQ_BUF_RSRC_WORD1",
1374
   "type_ref": "SQ_BUF_RSRC_WORD1"
1375
  },
1376
  {
1377
   "chips": ["gfx8"],
1378
   "map": {"at": 36616, "to": "mm"},
1379
   "name": "SQ_BUF_RSRC_WORD2"
1380
  },
1381
  {
1382
   "chips": ["gfx8"],
1383
   "map": {"at": 36620, "to": "mm"},
1384
   "name": "SQ_BUF_RSRC_WORD3",
1385
   "type_ref": "SQ_BUF_RSRC_WORD3"
1386
  },
1387
  {
1388
   "chips": ["gfx8"],
1389
   "map": {"at": 36624, "to": "mm"},
1390
   "name": "SQ_IMG_RSRC_WORD0"
1391
  },
1392
  {
1393
   "chips": ["gfx8"],
1394
   "map": {"at": 36628, "to": "mm"},
1395
   "name": "SQ_IMG_RSRC_WORD1",
1396
   "type_ref": "SQ_IMG_RSRC_WORD1"
1397
  },
1398
  {
1399
   "chips": ["gfx8"],
1400
   "map": {"at": 36632, "to": "mm"},
1401
   "name": "SQ_IMG_RSRC_WORD2",
1402
   "type_ref": "SQ_IMG_RSRC_WORD2"
1403
  },
1404
  {
1405
   "chips": ["gfx8"],
1406
   "map": {"at": 36636, "to": "mm"},
1407
   "name": "SQ_IMG_RSRC_WORD3",
1408
   "type_ref": "SQ_IMG_RSRC_WORD3"
1409
  },
1410
  {
1411
   "chips": ["gfx8"],
1412
   "map": {"at": 36640, "to": "mm"},
1413
   "name": "SQ_IMG_RSRC_WORD4",
1414
   "type_ref": "SQ_IMG_RSRC_WORD4"
1415
  },
1416
  {
1417
   "chips": ["gfx8"],
1418
   "map": {"at": 36644, "to": "mm"},
1419
   "name": "SQ_IMG_RSRC_WORD5",
1420
   "type_ref": "SQ_IMG_RSRC_WORD5"
1421
  },
1422
  {
1423
   "chips": ["gfx8"],
1424
   "map": {"at": 36648, "to": "mm"},
1425
   "name": "SQ_IMG_RSRC_WORD6",
1426
   "type_ref": "SQ_IMG_RSRC_WORD6"
1427
  },
1428
  {
1429
   "chips": ["gfx8"],
1430
   "map": {"at": 36652, "to": "mm"},
1431
   "name": "SQ_IMG_RSRC_WORD7"
1432
  },
1433
  {
1434
   "chips": ["gfx8"],
1435
   "map": {"at": 36656, "to": "mm"},
1436
   "name": "SQ_IMG_SAMP_WORD0",
1437
   "type_ref": "SQ_IMG_SAMP_WORD0"
1438
  },
1439
  {
1440
   "chips": ["gfx8"],
1441
   "map": {"at": 36660, "to": "mm"},
1442
   "name": "SQ_IMG_SAMP_WORD1",
1443
   "type_ref": "SQ_IMG_SAMP_WORD1"
1444
  },
1445
  {
1446
   "chips": ["gfx8"],
1447
   "map": {"at": 36664, "to": "mm"},
1448
   "name": "SQ_IMG_SAMP_WORD2",
1449
   "type_ref": "SQ_IMG_SAMP_WORD2"
1450
  },
1451
  {
1452
   "chips": ["gfx8"],
1453
   "map": {"at": 36668, "to": "mm"},
1454
   "name": "SQ_IMG_SAMP_WORD3",
1455
   "type_ref": "SQ_IMG_SAMP_WORD3"
1456
  },
1457
  {
1458
   "chips": ["gfx8"],
1459
   "map": {"at": 37120, "to": "mm"},
1460
   "name": "SPI_CONFIG_CNTL",
1461
   "type_ref": "SPI_CONFIG_CNTL"
1462
  },
1463
  {
1464
   "chips": ["gfx8"],
1465
   "map": {"at": 39160, "to": "mm"},
1466
   "name": "GB_ADDR_CONFIG",
1467
   "type_ref": "GB_ADDR_CONFIG"
1468
  },
1469
  {
1470
   "chips": ["gfx8"],
1471
   "map": {"at": 39184, "to": "mm"},
1472
   "name": "GB_TILE_MODE0",
1473
   "type_ref": "GB_TILE_MODE0"
1474
  },
1475
  {
1476
   "chips": ["gfx8"],
1477
   "map": {"at": 39188, "to": "mm"},
1478
   "name": "GB_TILE_MODE1",
1479
   "type_ref": "GB_TILE_MODE0"
1480
  },
1481
  {
1482
   "chips": ["gfx8"],
1483
   "map": {"at": 39192, "to": "mm"},
1484
   "name": "GB_TILE_MODE2",
1485
   "type_ref": "GB_TILE_MODE0"
1486
  },
1487
  {
1488
   "chips": ["gfx8"],
1489
   "map": {"at": 39196, "to": "mm"},
1490
   "name": "GB_TILE_MODE3",
1491
   "type_ref": "GB_TILE_MODE0"
1492
  },
1493
  {
1494
   "chips": ["gfx8"],
1495
   "map": {"at": 39200, "to": "mm"},
1496
   "name": "GB_TILE_MODE4",
1497
   "type_ref": "GB_TILE_MODE0"
1498
  },
1499
  {
1500
   "chips": ["gfx8"],
1501
   "map": {"at": 39204, "to": "mm"},
1502
   "name": "GB_TILE_MODE5",
1503
   "type_ref": "GB_TILE_MODE0"
1504
  },
1505
  {
1506
   "chips": ["gfx8"],
1507
   "map": {"at": 39208, "to": "mm"},
1508
   "name": "GB_TILE_MODE6",
1509
   "type_ref": "GB_TILE_MODE0"
1510
  },
1511
  {
1512
   "chips": ["gfx8"],
1513
   "map": {"at": 39212, "to": "mm"},
1514
   "name": "GB_TILE_MODE7",
1515
   "type_ref": "GB_TILE_MODE0"
1516
  },
1517
  {
1518
   "chips": ["gfx8"],
1519
   "map": {"at": 39216, "to": "mm"},
1520
   "name": "GB_TILE_MODE8",
1521
   "type_ref": "GB_TILE_MODE0"
1522
  },
1523
  {
1524
   "chips": ["gfx8"],
1525
   "map": {"at": 39220, "to": "mm"},
1526
   "name": "GB_TILE_MODE9",
1527
   "type_ref": "GB_TILE_MODE0"
1528
  },
1529
  {
1530
   "chips": ["gfx8"],
1531
   "map": {"at": 39224, "to": "mm"},
1532
   "name": "GB_TILE_MODE10",
1533
   "type_ref": "GB_TILE_MODE0"
1534
  },
1535
  {
1536
   "chips": ["gfx8"],
1537
   "map": {"at": 39228, "to": "mm"},
1538
   "name": "GB_TILE_MODE11",
1539
   "type_ref": "GB_TILE_MODE0"
1540
  },
1541
  {
1542
   "chips": ["gfx8"],
1543
   "map": {"at": 39232, "to": "mm"},
1544
   "name": "GB_TILE_MODE12",
1545
   "type_ref": "GB_TILE_MODE0"
1546
  },
1547
  {
1548
   "chips": ["gfx8"],
1549
   "map": {"at": 39236, "to": "mm"},
1550
   "name": "GB_TILE_MODE13",
1551
   "type_ref": "GB_TILE_MODE0"
1552
  },
1553
  {
1554
   "chips": ["gfx8"],
1555
   "map": {"at": 39240, "to": "mm"},
1556
   "name": "GB_TILE_MODE14",
1557
   "type_ref": "GB_TILE_MODE0"
1558
  },
1559
  {
1560
   "chips": ["gfx8"],
1561
   "map": {"at": 39244, "to": "mm"},
1562
   "name": "GB_TILE_MODE15",
1563
   "type_ref": "GB_TILE_MODE0"
1564
  },
1565
  {
1566
   "chips": ["gfx8"],
1567
   "map": {"at": 39248, "to": "mm"},
1568
   "name": "GB_TILE_MODE16",
1569
   "type_ref": "GB_TILE_MODE0"
1570
  },
1571
  {
1572
   "chips": ["gfx8"],
1573
   "map": {"at": 39252, "to": "mm"},
1574
   "name": "GB_TILE_MODE17",
1575
   "type_ref": "GB_TILE_MODE0"
1576
  },
1577
  {
1578
   "chips": ["gfx8"],
1579
   "map": {"at": 39256, "to": "mm"},
1580
   "name": "GB_TILE_MODE18",
1581
   "type_ref": "GB_TILE_MODE0"
1582
  },
1583
  {
1584
   "chips": ["gfx8"],
1585
   "map": {"at": 39260, "to": "mm"},
1586
   "name": "GB_TILE_MODE19",
1587
   "type_ref": "GB_TILE_MODE0"
1588
  },
1589
  {
1590
   "chips": ["gfx8"],
1591
   "map": {"at": 39264, "to": "mm"},
1592
   "name": "GB_TILE_MODE20",
1593
   "type_ref": "GB_TILE_MODE0"
1594
  },
1595
  {
1596
   "chips": ["gfx8"],
1597
   "map": {"at": 39268, "to": "mm"},
1598
   "name": "GB_TILE_MODE21",
1599
   "type_ref": "GB_TILE_MODE0"
1600
  },
1601
  {
1602
   "chips": ["gfx8"],
1603
   "map": {"at": 39272, "to": "mm"},
1604
   "name": "GB_TILE_MODE22",
1605
   "type_ref": "GB_TILE_MODE0"
1606
  },
1607
  {
1608
   "chips": ["gfx8"],
1609
   "map": {"at": 39276, "to": "mm"},
1610
   "name": "GB_TILE_MODE23",
1611
   "type_ref": "GB_TILE_MODE0"
1612
  },
1613
  {
1614
   "chips": ["gfx8"],
1615
   "map": {"at": 39280, "to": "mm"},
1616
   "name": "GB_TILE_MODE24",
1617
   "type_ref": "GB_TILE_MODE0"
1618
  },
1619
  {
1620
   "chips": ["gfx8"],
1621
   "map": {"at": 39284, "to": "mm"},
1622
   "name": "GB_TILE_MODE25",
1623
   "type_ref": "GB_TILE_MODE0"
1624
  },
1625
  {
1626
   "chips": ["gfx8"],
1627
   "map": {"at": 39288, "to": "mm"},
1628
   "name": "GB_TILE_MODE26",
1629
   "type_ref": "GB_TILE_MODE0"
1630
  },
1631
  {
1632
   "chips": ["gfx8"],
1633
   "map": {"at": 39292, "to": "mm"},
1634
   "name": "GB_TILE_MODE27",
1635
   "type_ref": "GB_TILE_MODE0"
1636
  },
1637
  {
1638
   "chips": ["gfx8"],
1639
   "map": {"at": 39296, "to": "mm"},
1640
   "name": "GB_TILE_MODE28",
1641
   "type_ref": "GB_TILE_MODE0"
1642
  },
1643
  {
1644
   "chips": ["gfx8"],
1645
   "map": {"at": 39300, "to": "mm"},
1646
   "name": "GB_TILE_MODE29",
1647
   "type_ref": "GB_TILE_MODE0"
1648
  },
1649
  {
1650
   "chips": ["gfx8"],
1651
   "map": {"at": 39304, "to": "mm"},
1652
   "name": "GB_TILE_MODE30",
1653
   "type_ref": "GB_TILE_MODE0"
1654
  },
1655
  {
1656
   "chips": ["gfx8"],
1657
   "map": {"at": 39308, "to": "mm"},
1658
   "name": "GB_TILE_MODE31",
1659
   "type_ref": "GB_TILE_MODE0"
1660
  },
1661
  {
1662
   "chips": ["gfx8"],
1663
   "map": {"at": 39312, "to": "mm"},
1664
   "name": "GB_MACROTILE_MODE0",
1665
   "type_ref": "GB_MACROTILE_MODE0"
1666
  },
1667
  {
1668
   "chips": ["gfx8"],
1669
   "map": {"at": 39316, "to": "mm"},
1670
   "name": "GB_MACROTILE_MODE1",
1671
   "type_ref": "GB_MACROTILE_MODE0"
1672
  },
1673
  {
1674
   "chips": ["gfx8"],
1675
   "map": {"at": 39320, "to": "mm"},
1676
   "name": "GB_MACROTILE_MODE2",
1677
   "type_ref": "GB_MACROTILE_MODE0"
1678
  },
1679
  {
1680
   "chips": ["gfx8"],
1681
   "map": {"at": 39324, "to": "mm"},
1682
   "name": "GB_MACROTILE_MODE3",
1683
   "type_ref": "GB_MACROTILE_MODE0"
1684
  },
1685
  {
1686
   "chips": ["gfx8"],
1687
   "map": {"at": 39328, "to": "mm"},
1688
   "name": "GB_MACROTILE_MODE4",
1689
   "type_ref": "GB_MACROTILE_MODE0"
1690
  },
1691
  {
1692
   "chips": ["gfx8"],
1693
   "map": {"at": 39332, "to": "mm"},
1694
   "name": "GB_MACROTILE_MODE5",
1695
   "type_ref": "GB_MACROTILE_MODE0"
1696
  },
1697
  {
1698
   "chips": ["gfx8"],
1699
   "map": {"at": 39336, "to": "mm"},
1700
   "name": "GB_MACROTILE_MODE6",
1701
   "type_ref": "GB_MACROTILE_MODE0"
1702
  },
1703
  {
1704
   "chips": ["gfx8"],
1705
   "map": {"at": 39340, "to": "mm"},
1706
   "name": "GB_MACROTILE_MODE7",
1707
   "type_ref": "GB_MACROTILE_MODE0"
1708
  },
1709
  {
1710
   "chips": ["gfx8"],
1711
   "map": {"at": 39344, "to": "mm"},
1712
   "name": "GB_MACROTILE_MODE8",
1713
   "type_ref": "GB_MACROTILE_MODE0"
1714
  },
1715
  {
1716
   "chips": ["gfx8"],
1717
   "map": {"at": 39348, "to": "mm"},
1718
   "name": "GB_MACROTILE_MODE9",
1719
   "type_ref": "GB_MACROTILE_MODE0"
1720
  },
1721
  {
1722
   "chips": ["gfx8"],
1723
   "map": {"at": 39352, "to": "mm"},
1724
   "name": "GB_MACROTILE_MODE10",
1725
   "type_ref": "GB_MACROTILE_MODE0"
1726
  },
1727
  {
1728
   "chips": ["gfx8"],
1729
   "map": {"at": 39356, "to": "mm"},
1730
   "name": "GB_MACROTILE_MODE11",
1731
   "type_ref": "GB_MACROTILE_MODE0"
1732
  },
1733
  {
1734
   "chips": ["gfx8"],
1735
   "map": {"at": 39360, "to": "mm"},
1736
   "name": "GB_MACROTILE_MODE12",
1737
   "type_ref": "GB_MACROTILE_MODE0"
1738
  },
1739
  {
1740
   "chips": ["gfx8"],
1741
   "map": {"at": 39364, "to": "mm"},
1742
   "name": "GB_MACROTILE_MODE13",
1743
   "type_ref": "GB_MACROTILE_MODE0"
1744
  },
1745
  {
1746
   "chips": ["gfx8"],
1747
   "map": {"at": 39368, "to": "mm"},
1748
   "name": "GB_MACROTILE_MODE14",
1749
   "type_ref": "GB_MACROTILE_MODE0"
1750
  },
1751
  {
1752
   "chips": ["gfx8"],
1753
   "map": {"at": 39372, "to": "mm"},
1754
   "name": "GB_MACROTILE_MODE15",
1755
   "type_ref": "GB_MACROTILE_MODE0"
1756
  },
1757
  {
1758
   "chips": ["gfx8"],
1759
   "map": {"at": 45056, "to": "mm"},
1760
   "name": "SPI_SHADER_TBA_LO_PS"
1761
  },
1762
  {
1763
   "chips": ["gfx8"],
1764
   "map": {"at": 45060, "to": "mm"},
1765
   "name": "SPI_SHADER_TBA_HI_PS",
1766
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1767
  },
1768
  {
1769
   "chips": ["gfx8"],
1770
   "map": {"at": 45064, "to": "mm"},
1771
   "name": "SPI_SHADER_TMA_LO_PS"
1772
  },
1773
  {
1774
   "chips": ["gfx8"],
1775
   "map": {"at": 45068, "to": "mm"},
1776
   "name": "SPI_SHADER_TMA_HI_PS",
1777
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1778
  },
1779
  {
1780
   "chips": ["gfx8"],
1781
   "map": {"at": 45084, "to": "mm"},
1782
   "name": "SPI_SHADER_PGM_RSRC3_PS",
1783
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1784
  },
1785
  {
1786
   "chips": ["gfx8"],
1787
   "map": {"at": 45088, "to": "mm"},
1788
   "name": "SPI_SHADER_PGM_LO_PS"
1789
  },
1790
  {
1791
   "chips": ["gfx8"],
1792
   "map": {"at": 45092, "to": "mm"},
1793
   "name": "SPI_SHADER_PGM_HI_PS",
1794
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1795
  },
1796
  {
1797
   "chips": ["gfx8"],
1798
   "map": {"at": 45096, "to": "mm"},
1799
   "name": "SPI_SHADER_PGM_RSRC1_PS",
1800
   "type_ref": "SPI_SHADER_PGM_RSRC1_PS"
1801
  },
1802
  {
1803
   "chips": ["gfx8"],
1804
   "map": {"at": 45100, "to": "mm"},
1805
   "name": "SPI_SHADER_PGM_RSRC2_PS",
1806
   "type_ref": "SPI_SHADER_PGM_RSRC2_PS"
1807
  },
1808
  {
1809
   "chips": ["gfx8"],
1810
   "map": {"at": 45104, "to": "mm"},
1811
   "name": "SPI_SHADER_USER_DATA_PS_0"
1812
  },
1813
  {
1814
   "chips": ["gfx8"],
1815
   "map": {"at": 45108, "to": "mm"},
1816
   "name": "SPI_SHADER_USER_DATA_PS_1"
1817
  },
1818
  {
1819
   "chips": ["gfx8"],
1820
   "map": {"at": 45112, "to": "mm"},
1821
   "name": "SPI_SHADER_USER_DATA_PS_2"
1822
  },
1823
  {
1824
   "chips": ["gfx8"],
1825
   "map": {"at": 45116, "to": "mm"},
1826
   "name": "SPI_SHADER_USER_DATA_PS_3"
1827
  },
1828
  {
1829
   "chips": ["gfx8"],
1830
   "map": {"at": 45120, "to": "mm"},
1831
   "name": "SPI_SHADER_USER_DATA_PS_4"
1832
  },
1833
  {
1834
   "chips": ["gfx8"],
1835
   "map": {"at": 45124, "to": "mm"},
1836
   "name": "SPI_SHADER_USER_DATA_PS_5"
1837
  },
1838
  {
1839
   "chips": ["gfx8"],
1840
   "map": {"at": 45128, "to": "mm"},
1841
   "name": "SPI_SHADER_USER_DATA_PS_6"
1842
  },
1843
  {
1844
   "chips": ["gfx8"],
1845
   "map": {"at": 45132, "to": "mm"},
1846
   "name": "SPI_SHADER_USER_DATA_PS_7"
1847
  },
1848
  {
1849
   "chips": ["gfx8"],
1850
   "map": {"at": 45136, "to": "mm"},
1851
   "name": "SPI_SHADER_USER_DATA_PS_8"
1852
  },
1853
  {
1854
   "chips": ["gfx8"],
1855
   "map": {"at": 45140, "to": "mm"},
1856
   "name": "SPI_SHADER_USER_DATA_PS_9"
1857
  },
1858
  {
1859
   "chips": ["gfx8"],
1860
   "map": {"at": 45144, "to": "mm"},
1861
   "name": "SPI_SHADER_USER_DATA_PS_10"
1862
  },
1863
  {
1864
   "chips": ["gfx8"],
1865
   "map": {"at": 45148, "to": "mm"},
1866
   "name": "SPI_SHADER_USER_DATA_PS_11"
1867
  },
1868
  {
1869
   "chips": ["gfx8"],
1870
   "map": {"at": 45152, "to": "mm"},
1871
   "name": "SPI_SHADER_USER_DATA_PS_12"
1872
  },
1873
  {
1874
   "chips": ["gfx8"],
1875
   "map": {"at": 45156, "to": "mm"},
1876
   "name": "SPI_SHADER_USER_DATA_PS_13"
1877
  },
1878
  {
1879
   "chips": ["gfx8"],
1880
   "map": {"at": 45160, "to": "mm"},
1881
   "name": "SPI_SHADER_USER_DATA_PS_14"
1882
  },
1883
  {
1884
   "chips": ["gfx8"],
1885
   "map": {"at": 45164, "to": "mm"},
1886
   "name": "SPI_SHADER_USER_DATA_PS_15"
1887
  },
1888
  {
1889
   "chips": ["gfx8"],
1890
   "map": {"at": 45312, "to": "mm"},
1891
   "name": "SPI_SHADER_TBA_LO_VS"
1892
  },
1893
  {
1894
   "chips": ["gfx8"],
1895
   "map": {"at": 45316, "to": "mm"},
1896
   "name": "SPI_SHADER_TBA_HI_VS",
1897
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1898
  },
1899
  {
1900
   "chips": ["gfx8"],
1901
   "map": {"at": 45320, "to": "mm"},
1902
   "name": "SPI_SHADER_TMA_LO_VS"
1903
  },
1904
  {
1905
   "chips": ["gfx8"],
1906
   "map": {"at": 45324, "to": "mm"},
1907
   "name": "SPI_SHADER_TMA_HI_VS",
1908
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1909
  },
1910
  {
1911
   "chips": ["gfx8"],
1912
   "map": {"at": 45336, "to": "mm"},
1913
   "name": "SPI_SHADER_PGM_RSRC3_VS",
1914
   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1915
  },
1916
  {
1917
   "chips": ["gfx8"],
1918
   "map": {"at": 45340, "to": "mm"},
1919
   "name": "SPI_SHADER_LATE_ALLOC_VS",
1920
   "type_ref": "SPI_SHADER_LATE_ALLOC_VS"
1921
  },
1922
  {
1923
   "chips": ["gfx8"],
1924
   "map": {"at": 45344, "to": "mm"},
1925
   "name": "SPI_SHADER_PGM_LO_VS"
1926
  },
1927
  {
1928
   "chips": ["gfx8"],
1929
   "map": {"at": 45348, "to": "mm"},
1930
   "name": "SPI_SHADER_PGM_HI_VS",
1931
   "type_ref": "SPI_SHADER_TBA_HI_PS"
1932
  },
1933
  {
1934
   "chips": ["gfx8"],
1935
   "map": {"at": 45352, "to": "mm"},
1936
   "name": "SPI_SHADER_PGM_RSRC1_VS",
1937
   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
1938
  },
1939
  {
1940
   "chips": ["gfx8"],
1941
   "map": {"at": 45356, "to": "mm"},
1942
   "name": "SPI_SHADER_PGM_RSRC2_VS",
1943
   "type_ref": "SPI_SHADER_PGM_RSRC2_VS"
1944
  },
1945
  {
1946
   "chips": ["gfx8"],
1947
   "map": {"at": 45360, "to": "mm"},
1948
   "name": "SPI_SHADER_USER_DATA_VS_0"
1949
  },
1950
  {
1951
   "chips": ["gfx8"],
1952
   "map": {"at": 45364, "to": "mm"},
1953
   "name": "SPI_SHADER_USER_DATA_VS_1"
1954
  },
1955
  {
1956
   "chips": ["gfx8"],
1957
   "map": {"at": 45368, "to": "mm"},
1958
   "name": "SPI_SHADER_USER_DATA_VS_2"
1959
  },
1960
  {
1961
   "chips": ["gfx8"],
1962
   "map": {"at": 45372, "to": "mm"},
1963
   "name": "SPI_SHADER_USER_DATA_VS_3"
1964
  },
1965
  {
1966
   "chips": ["gfx8"],
1967
   "map": {"at": 45376, "to": "mm"},
1968
   "name": "SPI_SHADER_USER_DATA_VS_4"
1969
  },
1970
  {
1971
   "chips": ["gfx8"],
1972
   "map": {"at": 45380, "to": "mm"},
1973
   "name": "SPI_SHADER_USER_DATA_VS_5"
1974
  },
1975
  {
1976
   "chips": ["gfx8"],
1977
   "map": {"at": 45384, "to": "mm"},
1978
   "name": "SPI_SHADER_USER_DATA_VS_6"
1979
  },
1980
  {
1981
   "chips": ["gfx8"],
1982
   "map": {"at": 45388, "to": "mm"},
1983
   "name": "SPI_SHADER_USER_DATA_VS_7"
1984
  },
1985
  {
1986
   "chips": ["gfx8"],
1987
   "map": {"at": 45392, "to": "mm"},
1988
   "name": "SPI_SHADER_USER_DATA_VS_8"
1989
  },
1990
  {
1991
   "chips": ["gfx8"],
1992
   "map": {"at": 45396, "to": "mm"},
1993
   "name": "SPI_SHADER_USER_DATA_VS_9"
1994
  },
1995
  {
1996
   "chips": ["gfx8"],
1997
   "map": {"at": 45400, "to": "mm"},
1998
   "name": "SPI_SHADER_USER_DATA_VS_10"
1999
  },
2000
  {
2001
   "chips": ["gfx8"],
2002
   "map": {"at": 45404, "to": "mm"},
2003
   "name": "SPI_SHADER_USER_DATA_VS_11"
2004
  },
2005
  {
2006
   "chips": ["gfx8"],
2007
   "map": {"at": 45408, "to": "mm"},
2008
   "name": "SPI_SHADER_USER_DATA_VS_12"
2009
  },
2010
  {
2011
   "chips": ["gfx8"],
2012
   "map": {"at": 45412, "to": "mm"},
2013
   "name": "SPI_SHADER_USER_DATA_VS_13"
2014
  },
2015
  {
2016
   "chips": ["gfx8"],
2017
   "map": {"at": 45416, "to": "mm"},
2018
   "name": "SPI_SHADER_USER_DATA_VS_14"
2019
  },
2020
  {
2021
   "chips": ["gfx8"],
2022
   "map": {"at": 45420, "to": "mm"},
2023
   "name": "SPI_SHADER_USER_DATA_VS_15"
2024
  },
2025
  {
2026
   "chips": ["gfx8"],
2027
   "map": {"at": 45552, "to": "mm"},
2028
   "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2029
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2030
  },
2031
  {
2032
   "chips": ["gfx8"],
2033
   "map": {"at": 45556, "to": "mm"},
2034
   "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2035
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2036
  },
2037
  {
2038
   "chips": ["gfx8"],
2039
   "map": {"at": 45568, "to": "mm"},
2040
   "name": "SPI_SHADER_TBA_LO_GS"
2041
  },
2042
  {
2043
   "chips": ["gfx8"],
2044
   "map": {"at": 45572, "to": "mm"},
2045
   "name": "SPI_SHADER_TBA_HI_GS",
2046
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2047
  },
2048
  {
2049
   "chips": ["gfx8"],
2050
   "map": {"at": 45576, "to": "mm"},
2051
   "name": "SPI_SHADER_TMA_LO_GS"
2052
  },
2053
  {
2054
   "chips": ["gfx8"],
2055
   "map": {"at": 45580, "to": "mm"},
2056
   "name": "SPI_SHADER_TMA_HI_GS",
2057
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2058
  },
2059
  {
2060
   "chips": ["gfx8"],
2061
   "map": {"at": 45596, "to": "mm"},
2062
   "name": "SPI_SHADER_PGM_RSRC3_GS",
2063
   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2064
  },
2065
  {
2066
   "chips": ["gfx8"],
2067
   "map": {"at": 45600, "to": "mm"},
2068
   "name": "SPI_SHADER_PGM_LO_GS"
2069
  },
2070
  {
2071
   "chips": ["gfx8"],
2072
   "map": {"at": 45604, "to": "mm"},
2073
   "name": "SPI_SHADER_PGM_HI_GS",
2074
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2075
  },
2076
  {
2077
   "chips": ["gfx8"],
2078
   "map": {"at": 45608, "to": "mm"},
2079
   "name": "SPI_SHADER_PGM_RSRC1_GS",
2080
   "type_ref": "SPI_SHADER_PGM_RSRC1_GS"
2081
  },
2082
  {
2083
   "chips": ["gfx8"],
2084
   "map": {"at": 45612, "to": "mm"},
2085
   "name": "SPI_SHADER_PGM_RSRC2_GS",
2086
   "type_ref": "SPI_SHADER_PGM_RSRC2_GS"
2087
  },
2088
  {
2089
   "chips": ["gfx8"],
2090
   "map": {"at": 45616, "to": "mm"},
2091
   "name": "SPI_SHADER_USER_DATA_GS_0"
2092
  },
2093
  {
2094
   "chips": ["gfx8"],
2095
   "map": {"at": 45620, "to": "mm"},
2096
   "name": "SPI_SHADER_USER_DATA_GS_1"
2097
  },
2098
  {
2099
   "chips": ["gfx8"],
2100
   "map": {"at": 45624, "to": "mm"},
2101
   "name": "SPI_SHADER_USER_DATA_GS_2"
2102
  },
2103
  {
2104
   "chips": ["gfx8"],
2105
   "map": {"at": 45628, "to": "mm"},
2106
   "name": "SPI_SHADER_USER_DATA_GS_3"
2107
  },
2108
  {
2109
   "chips": ["gfx8"],
2110
   "map": {"at": 45632, "to": "mm"},
2111
   "name": "SPI_SHADER_USER_DATA_GS_4"
2112
  },
2113
  {
2114
   "chips": ["gfx8"],
2115
   "map": {"at": 45636, "to": "mm"},
2116
   "name": "SPI_SHADER_USER_DATA_GS_5"
2117
  },
2118
  {
2119
   "chips": ["gfx8"],
2120
   "map": {"at": 45640, "to": "mm"},
2121
   "name": "SPI_SHADER_USER_DATA_GS_6"
2122
  },
2123
  {
2124
   "chips": ["gfx8"],
2125
   "map": {"at": 45644, "to": "mm"},
2126
   "name": "SPI_SHADER_USER_DATA_GS_7"
2127
  },
2128
  {
2129
   "chips": ["gfx8"],
2130
   "map": {"at": 45648, "to": "mm"},
2131
   "name": "SPI_SHADER_USER_DATA_GS_8"
2132
  },
2133
  {
2134
   "chips": ["gfx8"],
2135
   "map": {"at": 45652, "to": "mm"},
2136
   "name": "SPI_SHADER_USER_DATA_GS_9"
2137
  },
2138
  {
2139
   "chips": ["gfx8"],
2140
   "map": {"at": 45656, "to": "mm"},
2141
   "name": "SPI_SHADER_USER_DATA_GS_10"
2142
  },
2143
  {
2144
   "chips": ["gfx8"],
2145
   "map": {"at": 45660, "to": "mm"},
2146
   "name": "SPI_SHADER_USER_DATA_GS_11"
2147
  },
2148
  {
2149
   "chips": ["gfx8"],
2150
   "map": {"at": 45664, "to": "mm"},
2151
   "name": "SPI_SHADER_USER_DATA_GS_12"
2152
  },
2153
  {
2154
   "chips": ["gfx8"],
2155
   "map": {"at": 45668, "to": "mm"},
2156
   "name": "SPI_SHADER_USER_DATA_GS_13"
2157
  },
2158
  {
2159
   "chips": ["gfx8"],
2160
   "map": {"at": 45672, "to": "mm"},
2161
   "name": "SPI_SHADER_USER_DATA_GS_14"
2162
  },
2163
  {
2164
   "chips": ["gfx8"],
2165
   "map": {"at": 45676, "to": "mm"},
2166
   "name": "SPI_SHADER_USER_DATA_GS_15"
2167
  },
2168
  {
2169
   "chips": ["gfx8"],
2170
   "map": {"at": 45808, "to": "mm"},
2171
   "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2172
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2173
  },
2174
  {
2175
   "chips": ["gfx8"],
2176
   "map": {"at": 45824, "to": "mm"},
2177
   "name": "SPI_SHADER_TBA_LO_ES"
2178
  },
2179
  {
2180
   "chips": ["gfx8"],
2181
   "map": {"at": 45828, "to": "mm"},
2182
   "name": "SPI_SHADER_TBA_HI_ES",
2183
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2184
  },
2185
  {
2186
   "chips": ["gfx8"],
2187
   "map": {"at": 45832, "to": "mm"},
2188
   "name": "SPI_SHADER_TMA_LO_ES"
2189
  },
2190
  {
2191
   "chips": ["gfx8"],
2192
   "map": {"at": 45836, "to": "mm"},
2193
   "name": "SPI_SHADER_TMA_HI_ES",
2194
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2195
  },
2196
  {
2197
   "chips": ["gfx8"],
2198
   "map": {"at": 45852, "to": "mm"},
2199
   "name": "SPI_SHADER_PGM_RSRC3_ES",
2200
   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2201
  },
2202
  {
2203
   "chips": ["gfx8"],
2204
   "map": {"at": 45856, "to": "mm"},
2205
   "name": "SPI_SHADER_PGM_LO_ES"
2206
  },
2207
  {
2208
   "chips": ["gfx8"],
2209
   "map": {"at": 45860, "to": "mm"},
2210
   "name": "SPI_SHADER_PGM_HI_ES",
2211
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2212
  },
2213
  {
2214
   "chips": ["gfx8"],
2215
   "map": {"at": 45864, "to": "mm"},
2216
   "name": "SPI_SHADER_PGM_RSRC1_ES",
2217
   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
2218
  },
2219
  {
2220
   "chips": ["gfx8"],
2221
   "map": {"at": 45868, "to": "mm"},
2222
   "name": "SPI_SHADER_PGM_RSRC2_ES",
2223
   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2224
  },
2225
  {
2226
   "chips": ["gfx8"],
2227
   "map": {"at": 45872, "to": "mm"},
2228
   "name": "SPI_SHADER_USER_DATA_ES_0"
2229
  },
2230
  {
2231
   "chips": ["gfx8"],
2232
   "map": {"at": 45876, "to": "mm"},
2233
   "name": "SPI_SHADER_USER_DATA_ES_1"
2234
  },
2235
  {
2236
   "chips": ["gfx8"],
2237
   "map": {"at": 45880, "to": "mm"},
2238
   "name": "SPI_SHADER_USER_DATA_ES_2"
2239
  },
2240
  {
2241
   "chips": ["gfx8"],
2242
   "map": {"at": 45884, "to": "mm"},
2243
   "name": "SPI_SHADER_USER_DATA_ES_3"
2244
  },
2245
  {
2246
   "chips": ["gfx8"],
2247
   "map": {"at": 45888, "to": "mm"},
2248
   "name": "SPI_SHADER_USER_DATA_ES_4"
2249
  },
2250
  {
2251
   "chips": ["gfx8"],
2252
   "map": {"at": 45892, "to": "mm"},
2253
   "name": "SPI_SHADER_USER_DATA_ES_5"
2254
  },
2255
  {
2256
   "chips": ["gfx8"],
2257
   "map": {"at": 45896, "to": "mm"},
2258
   "name": "SPI_SHADER_USER_DATA_ES_6"
2259
  },
2260
  {
2261
   "chips": ["gfx8"],
2262
   "map": {"at": 45900, "to": "mm"},
2263
   "name": "SPI_SHADER_USER_DATA_ES_7"
2264
  },
2265
  {
2266
   "chips": ["gfx8"],
2267
   "map": {"at": 45904, "to": "mm"},
2268
   "name": "SPI_SHADER_USER_DATA_ES_8"
2269
  },
2270
  {
2271
   "chips": ["gfx8"],
2272
   "map": {"at": 45908, "to": "mm"},
2273
   "name": "SPI_SHADER_USER_DATA_ES_9"
2274
  },
2275
  {
2276
   "chips": ["gfx8"],
2277
   "map": {"at": 45912, "to": "mm"},
2278
   "name": "SPI_SHADER_USER_DATA_ES_10"
2279
  },
2280
  {
2281
   "chips": ["gfx8"],
2282
   "map": {"at": 45916, "to": "mm"},
2283
   "name": "SPI_SHADER_USER_DATA_ES_11"
2284
  },
2285
  {
2286
   "chips": ["gfx8"],
2287
   "map": {"at": 45920, "to": "mm"},
2288
   "name": "SPI_SHADER_USER_DATA_ES_12"
2289
  },
2290
  {
2291
   "chips": ["gfx8"],
2292
   "map": {"at": 45924, "to": "mm"},
2293
   "name": "SPI_SHADER_USER_DATA_ES_13"
2294
  },
2295
  {
2296
   "chips": ["gfx8"],
2297
   "map": {"at": 45928, "to": "mm"},
2298
   "name": "SPI_SHADER_USER_DATA_ES_14"
2299
  },
2300
  {
2301
   "chips": ["gfx8"],
2302
   "map": {"at": 45932, "to": "mm"},
2303
   "name": "SPI_SHADER_USER_DATA_ES_15"
2304
  },
2305
  {
2306
   "chips": ["gfx8"],
2307
   "map": {"at": 46068, "to": "mm"},
2308
   "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2309
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2310
  },
2311
  {
2312
   "chips": ["gfx8"],
2313
   "map": {"at": 46080, "to": "mm"},
2314
   "name": "SPI_SHADER_TBA_LO_HS"
2315
  },
2316
  {
2317
   "chips": ["gfx8"],
2318
   "map": {"at": 46084, "to": "mm"},
2319
   "name": "SPI_SHADER_TBA_HI_HS",
2320
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2321
  },
2322
  {
2323
   "chips": ["gfx8"],
2324
   "map": {"at": 46088, "to": "mm"},
2325
   "name": "SPI_SHADER_TMA_LO_HS"
2326
  },
2327
  {
2328
   "chips": ["gfx8"],
2329
   "map": {"at": 46092, "to": "mm"},
2330
   "name": "SPI_SHADER_TMA_HI_HS",
2331
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2332
  },
2333
  {
2334
   "chips": ["gfx8"],
2335
   "map": {"at": 46108, "to": "mm"},
2336
   "name": "SPI_SHADER_PGM_RSRC3_HS",
2337
   "type_ref": "SPI_SHADER_PGM_RSRC3_HS"
2338
  },
2339
  {
2340
   "chips": ["gfx8"],
2341
   "map": {"at": 46112, "to": "mm"},
2342
   "name": "SPI_SHADER_PGM_LO_HS"
2343
  },
2344
  {
2345
   "chips": ["gfx8"],
2346
   "map": {"at": 46116, "to": "mm"},
2347
   "name": "SPI_SHADER_PGM_HI_HS",
2348
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2349
  },
2350
  {
2351
   "chips": ["gfx8"],
2352
   "map": {"at": 46120, "to": "mm"},
2353
   "name": "SPI_SHADER_PGM_RSRC1_HS",
2354
   "type_ref": "SPI_SHADER_PGM_RSRC1_HS"
2355
  },
2356
  {
2357
   "chips": ["gfx8"],
2358
   "map": {"at": 46124, "to": "mm"},
2359
   "name": "SPI_SHADER_PGM_RSRC2_HS",
2360
   "type_ref": "SPI_SHADER_PGM_RSRC2_HS"
2361
  },
2362
  {
2363
   "chips": ["gfx8"],
2364
   "map": {"at": 46128, "to": "mm"},
2365
   "name": "SPI_SHADER_USER_DATA_HS_0"
2366
  },
2367
  {
2368
   "chips": ["gfx8"],
2369
   "map": {"at": 46132, "to": "mm"},
2370
   "name": "SPI_SHADER_USER_DATA_HS_1"
2371
  },
2372
  {
2373
   "chips": ["gfx8"],
2374
   "map": {"at": 46136, "to": "mm"},
2375
   "name": "SPI_SHADER_USER_DATA_HS_2"
2376
  },
2377
  {
2378
   "chips": ["gfx8"],
2379
   "map": {"at": 46140, "to": "mm"},
2380
   "name": "SPI_SHADER_USER_DATA_HS_3"
2381
  },
2382
  {
2383
   "chips": ["gfx8"],
2384
   "map": {"at": 46144, "to": "mm"},
2385
   "name": "SPI_SHADER_USER_DATA_HS_4"
2386
  },
2387
  {
2388
   "chips": ["gfx8"],
2389
   "map": {"at": 46148, "to": "mm"},
2390
   "name": "SPI_SHADER_USER_DATA_HS_5"
2391
  },
2392
  {
2393
   "chips": ["gfx8"],
2394
   "map": {"at": 46152, "to": "mm"},
2395
   "name": "SPI_SHADER_USER_DATA_HS_6"
2396
  },
2397
  {
2398
   "chips": ["gfx8"],
2399
   "map": {"at": 46156, "to": "mm"},
2400
   "name": "SPI_SHADER_USER_DATA_HS_7"
2401
  },
2402
  {
2403
   "chips": ["gfx8"],
2404
   "map": {"at": 46160, "to": "mm"},
2405
   "name": "SPI_SHADER_USER_DATA_HS_8"
2406
  },
2407
  {
2408
   "chips": ["gfx8"],
2409
   "map": {"at": 46164, "to": "mm"},
2410
   "name": "SPI_SHADER_USER_DATA_HS_9"
2411
  },
2412
  {
2413
   "chips": ["gfx8"],
2414
   "map": {"at": 46168, "to": "mm"},
2415
   "name": "SPI_SHADER_USER_DATA_HS_10"
2416
  },
2417
  {
2418
   "chips": ["gfx8"],
2419
   "map": {"at": 46172, "to": "mm"},
2420
   "name": "SPI_SHADER_USER_DATA_HS_11"
2421
  },
2422
  {
2423
   "chips": ["gfx8"],
2424
   "map": {"at": 46176, "to": "mm"},
2425
   "name": "SPI_SHADER_USER_DATA_HS_12"
2426
  },
2427
  {
2428
   "chips": ["gfx8"],
2429
   "map": {"at": 46180, "to": "mm"},
2430
   "name": "SPI_SHADER_USER_DATA_HS_13"
2431
  },
2432
  {
2433
   "chips": ["gfx8"],
2434
   "map": {"at": 46184, "to": "mm"},
2435
   "name": "SPI_SHADER_USER_DATA_HS_14"
2436
  },
2437
  {
2438
   "chips": ["gfx8"],
2439
   "map": {"at": 46188, "to": "mm"},
2440
   "name": "SPI_SHADER_USER_DATA_HS_15"
2441
  },
2442
  {
2443
   "chips": ["gfx8"],
2444
   "map": {"at": 46324, "to": "mm"},
2445
   "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2446
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2447
  },
2448
  {
2449
   "chips": ["gfx8"],
2450
   "map": {"at": 46336, "to": "mm"},
2451
   "name": "SPI_SHADER_TBA_LO_LS"
2452
  },
2453
  {
2454
   "chips": ["gfx8"],
2455
   "map": {"at": 46340, "to": "mm"},
2456
   "name": "SPI_SHADER_TBA_HI_LS",
2457
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2458
  },
2459
  {
2460
   "chips": ["gfx8"],
2461
   "map": {"at": 46344, "to": "mm"},
2462
   "name": "SPI_SHADER_TMA_LO_LS"
2463
  },
2464
  {
2465
   "chips": ["gfx8"],
2466
   "map": {"at": 46348, "to": "mm"},
2467
   "name": "SPI_SHADER_TMA_HI_LS",
2468
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2469
  },
2470
  {
2471
   "chips": ["gfx8"],
2472
   "map": {"at": 46364, "to": "mm"},
2473
   "name": "SPI_SHADER_PGM_RSRC3_LS",
2474
   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2475
  },
2476
  {
2477
   "chips": ["gfx8"],
2478
   "map": {"at": 46368, "to": "mm"},
2479
   "name": "SPI_SHADER_PGM_LO_LS"
2480
  },
2481
  {
2482
   "chips": ["gfx8"],
2483
   "map": {"at": 46372, "to": "mm"},
2484
   "name": "SPI_SHADER_PGM_HI_LS",
2485
   "type_ref": "SPI_SHADER_TBA_HI_PS"
2486
  },
2487
  {
2488
   "chips": ["gfx8"],
2489
   "map": {"at": 46376, "to": "mm"},
2490
   "name": "SPI_SHADER_PGM_RSRC1_LS",
2491
   "type_ref": "SPI_SHADER_PGM_RSRC1_LS"
2492
  },
2493
  {
2494
   "chips": ["gfx8"],
2495
   "map": {"at": 46380, "to": "mm"},
2496
   "name": "SPI_SHADER_PGM_RSRC2_LS",
2497
   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2498
  },
2499
  {
2500
   "chips": ["gfx8"],
2501
   "map": {"at": 46384, "to": "mm"},
2502
   "name": "SPI_SHADER_USER_DATA_LS_0"
2503
  },
2504
  {
2505
   "chips": ["gfx8"],
2506
   "map": {"at": 46388, "to": "mm"},
2507
   "name": "SPI_SHADER_USER_DATA_LS_1"
2508
  },
2509
  {
2510
   "chips": ["gfx8"],
2511
   "map": {"at": 46392, "to": "mm"},
2512
   "name": "SPI_SHADER_USER_DATA_LS_2"
2513
  },
2514
  {
2515
   "chips": ["gfx8"],
2516
   "map": {"at": 46396, "to": "mm"},
2517
   "name": "SPI_SHADER_USER_DATA_LS_3"
2518
  },
2519
  {
2520
   "chips": ["gfx8"],
2521
   "map": {"at": 46400, "to": "mm"},
2522
   "name": "SPI_SHADER_USER_DATA_LS_4"
2523
  },
2524
  {
2525
   "chips": ["gfx8"],
2526
   "map": {"at": 46404, "to": "mm"},
2527
   "name": "SPI_SHADER_USER_DATA_LS_5"
2528
  },
2529
  {
2530
   "chips": ["gfx8"],
2531
   "map": {"at": 46408, "to": "mm"},
2532
   "name": "SPI_SHADER_USER_DATA_LS_6"
2533
  },
2534
  {
2535
   "chips": ["gfx8"],
2536
   "map": {"at": 46412, "to": "mm"},
2537
   "name": "SPI_SHADER_USER_DATA_LS_7"
2538
  },
2539
  {
2540
   "chips": ["gfx8"],
2541
   "map": {"at": 46416, "to": "mm"},
2542
   "name": "SPI_SHADER_USER_DATA_LS_8"
2543
  },
2544
  {
2545
   "chips": ["gfx8"],
2546
   "map": {"at": 46420, "to": "mm"},
2547
   "name": "SPI_SHADER_USER_DATA_LS_9"
2548
  },
2549
  {
2550
   "chips": ["gfx8"],
2551
   "map": {"at": 46424, "to": "mm"},
2552
   "name": "SPI_SHADER_USER_DATA_LS_10"
2553
  },
2554
  {
2555
   "chips": ["gfx8"],
2556
   "map": {"at": 46428, "to": "mm"},
2557
   "name": "SPI_SHADER_USER_DATA_LS_11"
2558
  },
2559
  {
2560
   "chips": ["gfx8"],
2561
   "map": {"at": 46432, "to": "mm"},
2562
   "name": "SPI_SHADER_USER_DATA_LS_12"
2563
  },
2564
  {
2565
   "chips": ["gfx8"],
2566
   "map": {"at": 46436, "to": "mm"},
2567
   "name": "SPI_SHADER_USER_DATA_LS_13"
2568
  },
2569
  {
2570
   "chips": ["gfx8"],
2571
   "map": {"at": 46440, "to": "mm"},
2572
   "name": "SPI_SHADER_USER_DATA_LS_14"
2573
  },
2574
  {
2575
   "chips": ["gfx8"],
2576
   "map": {"at": 46444, "to": "mm"},
2577
   "name": "SPI_SHADER_USER_DATA_LS_15"
2578
  },
2579
  {
2580
   "chips": ["gfx8"],
2581
   "map": {"at": 47104, "to": "mm"},
2582
   "name": "COMPUTE_DISPATCH_INITIATOR",
2583
   "type_ref": "COMPUTE_DISPATCH_INITIATOR"
2584
  },
2585
  {
2586
   "chips": ["gfx8"],
2587
   "map": {"at": 47108, "to": "mm"},
2588
   "name": "COMPUTE_DIM_X"
2589
  },
2590
  {
2591
   "chips": ["gfx8"],
2592
   "map": {"at": 47112, "to": "mm"},
2593
   "name": "COMPUTE_DIM_Y"
2594
  },
2595
  {
2596
   "chips": ["gfx8"],
2597
   "map": {"at": 47116, "to": "mm"},
2598
   "name": "COMPUTE_DIM_Z"
2599
  },
2600
  {
2601
   "chips": ["gfx8"],
2602
   "map": {"at": 47120, "to": "mm"},
2603
   "name": "COMPUTE_START_X"
2604
  },
2605
  {
2606
   "chips": ["gfx8"],
2607
   "map": {"at": 47124, "to": "mm"},
2608
   "name": "COMPUTE_START_Y"
2609
  },
2610
  {
2611
   "chips": ["gfx8"],
2612
   "map": {"at": 47128, "to": "mm"},
2613
   "name": "COMPUTE_START_Z"
2614
  },
2615
  {
2616
   "chips": ["gfx8"],
2617
   "map": {"at": 47132, "to": "mm"},
2618
   "name": "COMPUTE_NUM_THREAD_X",
2619
   "type_ref": "COMPUTE_NUM_THREAD_X"
2620
  },
2621
  {
2622
   "chips": ["gfx8"],
2623
   "map": {"at": 47136, "to": "mm"},
2624
   "name": "COMPUTE_NUM_THREAD_Y",
2625
   "type_ref": "COMPUTE_NUM_THREAD_X"
2626
  },
2627
  {
2628
   "chips": ["gfx8"],
2629
   "map": {"at": 47140, "to": "mm"},
2630
   "name": "COMPUTE_NUM_THREAD_Z",
2631
   "type_ref": "COMPUTE_NUM_THREAD_X"
2632
  },
2633
  {
2634
   "chips": ["gfx8"],
2635
   "map": {"at": 47144, "to": "mm"},
2636
   "name": "COMPUTE_PIPELINESTAT_ENABLE",
2637
   "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"
2638
  },
2639
  {
2640
   "chips": ["gfx8"],
2641
   "map": {"at": 47148, "to": "mm"},
2642
   "name": "COMPUTE_PERFCOUNT_ENABLE",
2643
   "type_ref": "COMPUTE_PERFCOUNT_ENABLE"
2644
  },
2645
  {
2646
   "chips": ["gfx8"],
2647
   "map": {"at": 47152, "to": "mm"},
2648
   "name": "COMPUTE_PGM_LO"
2649
  },
2650
  {
2651
   "chips": ["gfx8"],
2652
   "map": {"at": 47156, "to": "mm"},
2653
   "name": "COMPUTE_PGM_HI",
2654
   "type_ref": "COMPUTE_PGM_HI"
2655
  },
2656
  {
2657
   "chips": ["gfx8"],
2658
   "map": {"at": 47160, "to": "mm"},
2659
   "name": "COMPUTE_TBA_LO"
2660
  },
2661
  {
2662
   "chips": ["gfx8"],
2663
   "map": {"at": 47164, "to": "mm"},
2664
   "name": "COMPUTE_TBA_HI",
2665
   "type_ref": "COMPUTE_TBA_HI"
2666
  },
2667
  {
2668
   "chips": ["gfx8"],
2669
   "map": {"at": 47168, "to": "mm"},
2670
   "name": "COMPUTE_TMA_LO"
2671
  },
2672
  {
2673
   "chips": ["gfx8"],
2674
   "map": {"at": 47172, "to": "mm"},
2675
   "name": "COMPUTE_TMA_HI",
2676
   "type_ref": "COMPUTE_TBA_HI"
2677
  },
2678
  {
2679
   "chips": ["gfx8"],
2680
   "map": {"at": 47176, "to": "mm"},
2681
   "name": "COMPUTE_PGM_RSRC1",
2682
   "type_ref": "COMPUTE_PGM_RSRC1"
2683
  },
2684
  {
2685
   "chips": ["gfx8"],
2686
   "map": {"at": 47180, "to": "mm"},
2687
   "name": "COMPUTE_PGM_RSRC2",
2688
   "type_ref": "COMPUTE_PGM_RSRC2"
2689
  },
2690
  {
2691
   "chips": ["gfx8"],
2692
   "map": {"at": 47184, "to": "mm"},
2693
   "name": "COMPUTE_VMID",
2694
   "type_ref": "COMPUTE_VMID"
2695
  },
2696
  {
2697
   "chips": ["gfx8"],
2698
   "map": {"at": 47188, "to": "mm"},
2699
   "name": "COMPUTE_RESOURCE_LIMITS",
2700
   "type_ref": "COMPUTE_RESOURCE_LIMITS"
2701
  },
2702
  {
2703
   "chips": ["gfx8"],
2704
   "map": {"at": 47192, "to": "mm"},
2705
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2706
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2707
  },
2708
  {
2709
   "chips": ["gfx8"],
2710
   "map": {"at": 47196, "to": "mm"},
2711
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2712
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2713
  },
2714
  {
2715
   "chips": ["gfx8"],
2716
   "map": {"at": 47200, "to": "mm"},
2717
   "name": "COMPUTE_TMPRING_SIZE",
2718
   "type_ref": "COMPUTE_TMPRING_SIZE"
2719
  },
2720
  {
2721
   "chips": ["gfx8"],
2722
   "map": {"at": 47204, "to": "mm"},
2723
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2724
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2725
  },
2726
  {
2727
   "chips": ["gfx8"],
2728
   "map": {"at": 47208, "to": "mm"},
2729
   "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2730
   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2731
  },
2732
  {
2733
   "chips": ["gfx8"],
2734
   "map": {"at": 47212, "to": "mm"},
2735
   "name": "COMPUTE_RESTART_X"
2736
  },
2737
  {
2738
   "chips": ["gfx8"],
2739
   "map": {"at": 47216, "to": "mm"},
2740
   "name": "COMPUTE_RESTART_Y"
2741
  },
2742
  {
2743
   "chips": ["gfx8"],
2744
   "map": {"at": 47220, "to": "mm"},
2745
   "name": "COMPUTE_RESTART_Z"
2746
  },
2747
  {
2748
   "chips": ["gfx8"],
2749
   "map": {"at": 47224, "to": "mm"},
2750
   "name": "COMPUTE_THREAD_TRACE_ENABLE",
2751
   "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"
2752
  },
2753
  {
2754
   "chips": ["gfx8"],
2755
   "map": {"at": 47228, "to": "mm"},
2756
   "name": "COMPUTE_MISC_RESERVED",
2757
   "type_ref": "COMPUTE_MISC_RESERVED"
2758
  },
2759
  {
2760
   "chips": ["gfx8"],
2761
   "map": {"at": 47232, "to": "mm"},
2762
   "name": "COMPUTE_DISPATCH_ID"
2763
  },
2764
  {
2765
   "chips": ["gfx8"],
2766
   "map": {"at": 47236, "to": "mm"},
2767
   "name": "COMPUTE_THREADGROUP_ID"
2768
  },
2769
  {
2770
   "chips": ["gfx8"],
2771
   "map": {"at": 47240, "to": "mm"},
2772
   "name": "COMPUTE_RELAUNCH",
2773
   "type_ref": "COMPUTE_RELAUNCH"
2774
  },
2775
  {
2776
   "chips": ["gfx8"],
2777
   "map": {"at": 47244, "to": "mm"},
2778
   "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
2779
  },
2780
  {
2781
   "chips": ["gfx8"],
2782
   "map": {"at": 47248, "to": "mm"},
2783
   "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
2784
   "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI"
2785
  },
2786
  {
2787
   "chips": ["gfx8"],
2788
   "map": {"at": 47252, "to": "mm"},
2789
   "name": "COMPUTE_WAVE_RESTORE_CONTROL",
2790
   "type_ref": "COMPUTE_WAVE_RESTORE_CONTROL"
2791
  },
2792
  {
2793
   "chips": ["gfx8"],
2794
   "map": {"at": 47360, "to": "mm"},
2795
   "name": "COMPUTE_USER_DATA_0"
2796
  },
2797
  {
2798
   "chips": ["gfx8"],
2799
   "map": {"at": 47364, "to": "mm"},
2800
   "name": "COMPUTE_USER_DATA_1"
2801
  },
2802
  {
2803
   "chips": ["gfx8"],
2804
   "map": {"at": 47368, "to": "mm"},
2805
   "name": "COMPUTE_USER_DATA_2"
2806
  },
2807
  {
2808
   "chips": ["gfx8"],
2809
   "map": {"at": 47372, "to": "mm"},
2810
   "name": "COMPUTE_USER_DATA_3"
2811
  },
2812
  {
2813
   "chips": ["gfx8"],
2814
   "map": {"at": 47376, "to": "mm"},
2815
   "name": "COMPUTE_USER_DATA_4"
2816
  },
2817
  {
2818
   "chips": ["gfx8"],
2819
   "map": {"at": 47380, "to": "mm"},
2820
   "name": "COMPUTE_USER_DATA_5"
2821
  },
2822
  {
2823
   "chips": ["gfx8"],
2824
   "map": {"at": 47384, "to": "mm"},
2825
   "name": "COMPUTE_USER_DATA_6"
2826
  },
2827
  {
2828
   "chips": ["gfx8"],
2829
   "map": {"at": 47388, "to": "mm"},
2830
   "name": "COMPUTE_USER_DATA_7"
2831
  },
2832
  {
2833
   "chips": ["gfx8"],
2834
   "map": {"at": 47392, "to": "mm"},
2835
   "name": "COMPUTE_USER_DATA_8"
2836
  },
2837
  {
2838
   "chips": ["gfx8"],
2839
   "map": {"at": 47396, "to": "mm"},
2840
   "name": "COMPUTE_USER_DATA_9"
2841
  },
2842
  {
2843
   "chips": ["gfx8"],
2844
   "map": {"at": 47400, "to": "mm"},
2845
   "name": "COMPUTE_USER_DATA_10"
2846
  },
2847
  {
2848
   "chips": ["gfx8"],
2849
   "map": {"at": 47404, "to": "mm"},
2850
   "name": "COMPUTE_USER_DATA_11"
2851
  },
2852
  {
2853
   "chips": ["gfx8"],
2854
   "map": {"at": 47408, "to": "mm"},
2855
   "name": "COMPUTE_USER_DATA_12"
2856
  },
2857
  {
2858
   "chips": ["gfx8"],
2859
   "map": {"at": 47412, "to": "mm"},
2860
   "name": "COMPUTE_USER_DATA_13"
2861
  },
2862
  {
2863
   "chips": ["gfx8"],
2864
   "map": {"at": 47416, "to": "mm"},
2865
   "name": "COMPUTE_USER_DATA_14"
2866
  },
2867
  {
2868
   "chips": ["gfx8"],
2869
   "map": {"at": 47420, "to": "mm"},
2870
   "name": "COMPUTE_USER_DATA_15"
2871
  },
2872
  {
2873
   "chips": ["gfx8"],
2874
   "map": {"at": 47612, "to": "mm"},
2875
   "name": "COMPUTE_NOWHERE"
2876
  },
2877
  {
2878
   "chips": ["gfx8"],
2879
   "map": {"at": 163840, "to": "mm"},
2880
   "name": "DB_RENDER_CONTROL",
2881
   "type_ref": "DB_RENDER_CONTROL"
2882
  },
2883
  {
2884
   "chips": ["gfx8"],
2885
   "map": {"at": 163844, "to": "mm"},
2886
   "name": "DB_COUNT_CONTROL",
2887
   "type_ref": "DB_COUNT_CONTROL"
2888
  },
2889
  {
2890
   "chips": ["gfx8"],
2891
   "map": {"at": 163848, "to": "mm"},
2892
   "name": "DB_DEPTH_VIEW",
2893
   "type_ref": "DB_DEPTH_VIEW"
2894
  },
2895
  {
2896
   "chips": ["gfx8"],
2897
   "map": {"at": 163852, "to": "mm"},
2898
   "name": "DB_RENDER_OVERRIDE",
2899
   "type_ref": "DB_RENDER_OVERRIDE"
2900
  },
2901
  {
2902
   "chips": ["gfx8"],
2903
   "map": {"at": 163856, "to": "mm"},
2904
   "name": "DB_RENDER_OVERRIDE2",
2905
   "type_ref": "DB_RENDER_OVERRIDE2"
2906
  },
2907
  {
2908
   "chips": ["gfx8"],
2909
   "map": {"at": 163860, "to": "mm"},
2910
   "name": "DB_HTILE_DATA_BASE"
2911
  },
2912
  {
2913
   "chips": ["gfx8"],
2914
   "map": {"at": 163872, "to": "mm"},
2915
   "name": "DB_DEPTH_BOUNDS_MIN"
2916
  },
2917
  {
2918
   "chips": ["gfx8"],
2919
   "map": {"at": 163876, "to": "mm"},
2920
   "name": "DB_DEPTH_BOUNDS_MAX"
2921
  },
2922
  {
2923
   "chips": ["gfx8"],
2924
   "map": {"at": 163880, "to": "mm"},
2925
   "name": "DB_STENCIL_CLEAR",
2926
   "type_ref": "DB_STENCIL_CLEAR"
2927
  },
2928
  {
2929
   "chips": ["gfx8"],
2930
   "map": {"at": 163884, "to": "mm"},
2931
   "name": "DB_DEPTH_CLEAR"
2932
  },
2933
  {
2934
   "chips": ["gfx8"],
2935
   "map": {"at": 163888, "to": "mm"},
2936
   "name": "PA_SC_SCREEN_SCISSOR_TL",
2937
   "type_ref": "PA_SC_SCREEN_SCISSOR_TL"
2938
  },
2939
  {
2940
   "chips": ["gfx8"],
2941
   "map": {"at": 163892, "to": "mm"},
2942
   "name": "PA_SC_SCREEN_SCISSOR_BR",
2943
   "type_ref": "PA_SC_SCREEN_SCISSOR_BR"
2944
  },
2945
  {
2946
   "chips": ["gfx8"],
2947
   "map": {"at": 163900, "to": "mm"},
2948
   "name": "DB_DEPTH_INFO",
2949
   "type_ref": "DB_DEPTH_INFO"
2950
  },
2951
  {
2952
   "chips": ["gfx8"],
2953
   "map": {"at": 163904, "to": "mm"},
2954
   "name": "DB_Z_INFO",
2955
   "type_ref": "DB_Z_INFO"
2956
  },
2957
  {
2958
   "chips": ["gfx8"],
2959
   "map": {"at": 163908, "to": "mm"},
2960
   "name": "DB_STENCIL_INFO",
2961
   "type_ref": "DB_STENCIL_INFO"
2962
  },
2963
  {
2964
   "chips": ["gfx8"],
2965
   "map": {"at": 163912, "to": "mm"},
2966
   "name": "DB_Z_READ_BASE"
2967
  },
2968
  {
2969
   "chips": ["gfx8"],
2970
   "map": {"at": 163916, "to": "mm"},
2971
   "name": "DB_STENCIL_READ_BASE"
2972
  },
2973
  {
2974
   "chips": ["gfx8"],
2975
   "map": {"at": 163920, "to": "mm"},
2976
   "name": "DB_Z_WRITE_BASE"
2977
  },
2978
  {
2979
   "chips": ["gfx8"],
2980
   "map": {"at": 163924, "to": "mm"},
2981
   "name": "DB_STENCIL_WRITE_BASE"
2982
  },
2983
  {
2984
   "chips": ["gfx8"],
2985
   "map": {"at": 163928, "to": "mm"},
2986
   "name": "DB_DEPTH_SIZE",
2987
   "type_ref": "DB_DEPTH_SIZE"
2988
  },
2989
  {
2990
   "chips": ["gfx8"],
2991
   "map": {"at": 163932, "to": "mm"},
2992
   "name": "DB_DEPTH_SLICE",
2993
   "type_ref": "DB_DEPTH_SLICE"
2994
  },
2995
  {
2996
   "chips": ["gfx8"],
2997
   "map": {"at": 163968, "to": "mm"},
2998
   "name": "TA_BC_BASE_ADDR"
2999
  },
3000
  {
3001
   "chips": ["gfx8"],
3002
   "map": {"at": 163972, "to": "mm"},
3003
   "name": "TA_BC_BASE_ADDR_HI",
3004
   "type_ref": "TA_BC_BASE_ADDR_HI"
3005
  },
3006
  {
3007
   "chips": ["gfx8"],
3008
   "map": {"at": 164328, "to": "mm"},
3009
   "name": "COHER_DEST_BASE_HI_0"
3010
  },
3011
  {
3012
   "chips": ["gfx8"],
3013
   "map": {"at": 164332, "to": "mm"},
3014
   "name": "COHER_DEST_BASE_HI_1"
3015
  },
3016
  {
3017
   "chips": ["gfx8"],
3018
   "map": {"at": 164336, "to": "mm"},
3019
   "name": "COHER_DEST_BASE_HI_2"
3020
  },
3021
  {
3022
   "chips": ["gfx8"],
3023
   "map": {"at": 164340, "to": "mm"},
3024
   "name": "COHER_DEST_BASE_HI_3"
3025
  },
3026
  {
3027
   "chips": ["gfx8"],
3028
   "map": {"at": 164344, "to": "mm"},
3029
   "name": "COHER_DEST_BASE_2"
3030
  },
3031
  {
3032
   "chips": ["gfx8"],
3033
   "map": {"at": 164348, "to": "mm"},
3034
   "name": "COHER_DEST_BASE_3"
3035
  },
3036
  {
3037
   "chips": ["gfx8"],
3038
   "map": {"at": 164352, "to": "mm"},
3039
   "name": "PA_SC_WINDOW_OFFSET",
3040
   "type_ref": "PA_SC_WINDOW_OFFSET"
3041
  },
3042
  {
3043
   "chips": ["gfx8"],
3044
   "map": {"at": 164356, "to": "mm"},
3045
   "name": "PA_SC_WINDOW_SCISSOR_TL",
3046
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3047
  },
3048
  {
3049
   "chips": ["gfx8"],
3050
   "map": {"at": 164360, "to": "mm"},
3051
   "name": "PA_SC_WINDOW_SCISSOR_BR",
3052
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3053
  },
3054
  {
3055
   "chips": ["gfx8"],
3056
   "map": {"at": 164364, "to": "mm"},
3057
   "name": "PA_SC_CLIPRECT_RULE",
3058
   "type_ref": "PA_SC_CLIPRECT_RULE"
3059
  },
3060
  {
3061
   "chips": ["gfx8"],
3062
   "map": {"at": 164368, "to": "mm"},
3063
   "name": "PA_SC_CLIPRECT_0_TL",
3064
   "type_ref": "PA_SC_CLIPRECT_0_TL"
3065
  },
3066
  {
3067
   "chips": ["gfx8"],
3068
   "map": {"at": 164372, "to": "mm"},
3069
   "name": "PA_SC_CLIPRECT_0_BR",
3070
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3071
  },
3072
  {
3073
   "chips": ["gfx8"],
3074
   "map": {"at": 164376, "to": "mm"},
3075
   "name": "PA_SC_CLIPRECT_1_TL",
3076
   "type_ref": "PA_SC_CLIPRECT_0_TL"
3077
  },
3078
  {
3079
   "chips": ["gfx8"],
3080
   "map": {"at": 164380, "to": "mm"},
3081
   "name": "PA_SC_CLIPRECT_1_BR",
3082
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3083
  },
3084
  {
3085
   "chips": ["gfx8"],
3086
   "map": {"at": 164384, "to": "mm"},
3087
   "name": "PA_SC_CLIPRECT_2_TL",
3088
   "type_ref": "PA_SC_CLIPRECT_0_TL"
3089
  },
3090
  {
3091
   "chips": ["gfx8"],
3092
   "map": {"at": 164388, "to": "mm"},
3093
   "name": "PA_SC_CLIPRECT_2_BR",
3094
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3095
  },
3096
  {
3097
   "chips": ["gfx8"],
3098
   "map": {"at": 164392, "to": "mm"},
3099
   "name": "PA_SC_CLIPRECT_3_TL",
3100
   "type_ref": "PA_SC_CLIPRECT_0_TL"
3101
  },
3102
  {
3103
   "chips": ["gfx8"],
3104
   "map": {"at": 164396, "to": "mm"},
3105
   "name": "PA_SC_CLIPRECT_3_BR",
3106
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3107
  },
3108
  {
3109
   "chips": ["gfx8"],
3110
   "map": {"at": 164400, "to": "mm"},
3111
   "name": "PA_SC_EDGERULE",
3112
   "type_ref": "PA_SC_EDGERULE"
3113
  },
3114
  {
3115
   "chips": ["gfx8"],
3116
   "map": {"at": 164404, "to": "mm"},
3117
   "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3118
   "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"
3119
  },
3120
  {
3121
   "chips": ["gfx8"],
3122
   "map": {"at": 164408, "to": "mm"},
3123
   "name": "CB_TARGET_MASK",
3124
   "type_ref": "CB_TARGET_MASK"
3125
  },
3126
  {
3127
   "chips": ["gfx8"],
3128
   "map": {"at": 164412, "to": "mm"},
3129
   "name": "CB_SHADER_MASK",
3130
   "type_ref": "CB_SHADER_MASK"
3131
  },
3132
  {
3133
   "chips": ["gfx8"],
3134
   "map": {"at": 164416, "to": "mm"},
3135
   "name": "PA_SC_GENERIC_SCISSOR_TL",
3136
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3137
  },
3138
  {
3139
   "chips": ["gfx8"],
3140
   "map": {"at": 164420, "to": "mm"},
3141
   "name": "PA_SC_GENERIC_SCISSOR_BR",
3142
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3143
  },
3144
  {
3145
   "chips": ["gfx8"],
3146
   "map": {"at": 164424, "to": "mm"},
3147
   "name": "COHER_DEST_BASE_0"
3148
  },
3149
  {
3150
   "chips": ["gfx8"],
3151
   "map": {"at": 164428, "to": "mm"},
3152
   "name": "COHER_DEST_BASE_1"
3153
  },
3154
  {
3155
   "chips": ["gfx8"],
3156
   "map": {"at": 164432, "to": "mm"},
3157
   "name": "PA_SC_VPORT_SCISSOR_0_TL",
3158
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3159
  },
3160
  {
3161
   "chips": ["gfx8"],
3162
   "map": {"at": 164436, "to": "mm"},
3163
   "name": "PA_SC_VPORT_SCISSOR_0_BR",
3164
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3165
  },
3166
  {
3167
   "chips": ["gfx8"],
3168
   "map": {"at": 164440, "to": "mm"},
3169
   "name": "PA_SC_VPORT_SCISSOR_1_TL",
3170
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3171
  },
3172
  {
3173
   "chips": ["gfx8"],
3174
   "map": {"at": 164444, "to": "mm"},
3175
   "name": "PA_SC_VPORT_SCISSOR_1_BR",
3176
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3177
  },
3178
  {
3179
   "chips": ["gfx8"],
3180
   "map": {"at": 164448, "to": "mm"},
3181
   "name": "PA_SC_VPORT_SCISSOR_2_TL",
3182
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3183
  },
3184
  {
3185
   "chips": ["gfx8"],
3186
   "map": {"at": 164452, "to": "mm"},
3187
   "name": "PA_SC_VPORT_SCISSOR_2_BR",
3188
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3189
  },
3190
  {
3191
   "chips": ["gfx8"],
3192
   "map": {"at": 164456, "to": "mm"},
3193
   "name": "PA_SC_VPORT_SCISSOR_3_TL",
3194
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3195
  },
3196
  {
3197
   "chips": ["gfx8"],
3198
   "map": {"at": 164460, "to": "mm"},
3199
   "name": "PA_SC_VPORT_SCISSOR_3_BR",
3200
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3201
  },
3202
  {
3203
   "chips": ["gfx8"],
3204
   "map": {"at": 164464, "to": "mm"},
3205
   "name": "PA_SC_VPORT_SCISSOR_4_TL",
3206
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3207
  },
3208
  {
3209
   "chips": ["gfx8"],
3210
   "map": {"at": 164468, "to": "mm"},
3211
   "name": "PA_SC_VPORT_SCISSOR_4_BR",
3212
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3213
  },
3214
  {
3215
   "chips": ["gfx8"],
3216
   "map": {"at": 164472, "to": "mm"},
3217
   "name": "PA_SC_VPORT_SCISSOR_5_TL",
3218
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3219
  },
3220
  {
3221
   "chips": ["gfx8"],
3222
   "map": {"at": 164476, "to": "mm"},
3223
   "name": "PA_SC_VPORT_SCISSOR_5_BR",
3224
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3225
  },
3226
  {
3227
   "chips": ["gfx8"],
3228
   "map": {"at": 164480, "to": "mm"},
3229
   "name": "PA_SC_VPORT_SCISSOR_6_TL",
3230
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3231
  },
3232
  {
3233
   "chips": ["gfx8"],
3234
   "map": {"at": 164484, "to": "mm"},
3235
   "name": "PA_SC_VPORT_SCISSOR_6_BR",
3236
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3237
  },
3238
  {
3239
   "chips": ["gfx8"],
3240
   "map": {"at": 164488, "to": "mm"},
3241
   "name": "PA_SC_VPORT_SCISSOR_7_TL",
3242
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3243
  },
3244
  {
3245
   "chips": ["gfx8"],
3246
   "map": {"at": 164492, "to": "mm"},
3247
   "name": "PA_SC_VPORT_SCISSOR_7_BR",
3248
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3249
  },
3250
  {
3251
   "chips": ["gfx8"],
3252
   "map": {"at": 164496, "to": "mm"},
3253
   "name": "PA_SC_VPORT_SCISSOR_8_TL",
3254
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3255
  },
3256
  {
3257
   "chips": ["gfx8"],
3258
   "map": {"at": 164500, "to": "mm"},
3259
   "name": "PA_SC_VPORT_SCISSOR_8_BR",
3260
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3261
  },
3262
  {
3263
   "chips": ["gfx8"],
3264
   "map": {"at": 164504, "to": "mm"},
3265
   "name": "PA_SC_VPORT_SCISSOR_9_TL",
3266
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3267
  },
3268
  {
3269
   "chips": ["gfx8"],
3270
   "map": {"at": 164508, "to": "mm"},
3271
   "name": "PA_SC_VPORT_SCISSOR_9_BR",
3272
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3273
  },
3274
  {
3275
   "chips": ["gfx8"],
3276
   "map": {"at": 164512, "to": "mm"},
3277
   "name": "PA_SC_VPORT_SCISSOR_10_TL",
3278
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3279
  },
3280
  {
3281
   "chips": ["gfx8"],
3282
   "map": {"at": 164516, "to": "mm"},
3283
   "name": "PA_SC_VPORT_SCISSOR_10_BR",
3284
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3285
  },
3286
  {
3287
   "chips": ["gfx8"],
3288
   "map": {"at": 164520, "to": "mm"},
3289
   "name": "PA_SC_VPORT_SCISSOR_11_TL",
3290
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3291
  },
3292
  {
3293
   "chips": ["gfx8"],
3294
   "map": {"at": 164524, "to": "mm"},
3295
   "name": "PA_SC_VPORT_SCISSOR_11_BR",
3296
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3297
  },
3298
  {
3299
   "chips": ["gfx8"],
3300
   "map": {"at": 164528, "to": "mm"},
3301
   "name": "PA_SC_VPORT_SCISSOR_12_TL",
3302
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3303
  },
3304
  {
3305
   "chips": ["gfx8"],
3306
   "map": {"at": 164532, "to": "mm"},
3307
   "name": "PA_SC_VPORT_SCISSOR_12_BR",
3308
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3309
  },
3310
  {
3311
   "chips": ["gfx8"],
3312
   "map": {"at": 164536, "to": "mm"},
3313
   "name": "PA_SC_VPORT_SCISSOR_13_TL",
3314
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3315
  },
3316
  {
3317
   "chips": ["gfx8"],
3318
   "map": {"at": 164540, "to": "mm"},
3319
   "name": "PA_SC_VPORT_SCISSOR_13_BR",
3320
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3321
  },
3322
  {
3323
   "chips": ["gfx8"],
3324
   "map": {"at": 164544, "to": "mm"},
3325
   "name": "PA_SC_VPORT_SCISSOR_14_TL",
3326
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3327
  },
3328
  {
3329
   "chips": ["gfx8"],
3330
   "map": {"at": 164548, "to": "mm"},
3331
   "name": "PA_SC_VPORT_SCISSOR_14_BR",
3332
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3333
  },
3334
  {
3335
   "chips": ["gfx8"],
3336
   "map": {"at": 164552, "to": "mm"},
3337
   "name": "PA_SC_VPORT_SCISSOR_15_TL",
3338
   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3339
  },
3340
  {
3341
   "chips": ["gfx8"],
3342
   "map": {"at": 164556, "to": "mm"},
3343
   "name": "PA_SC_VPORT_SCISSOR_15_BR",
3344
   "type_ref": "PA_SC_CLIPRECT_0_BR"
3345
  },
3346
  {
3347
   "chips": ["gfx8"],
3348
   "map": {"at": 164560, "to": "mm"},
3349
   "name": "PA_SC_VPORT_ZMIN_0"
3350
  },
3351
  {
3352
   "chips": ["gfx8"],
3353
   "map": {"at": 164564, "to": "mm"},
3354
   "name": "PA_SC_VPORT_ZMAX_0"
3355
  },
3356
  {
3357
   "chips": ["gfx8"],
3358
   "map": {"at": 164568, "to": "mm"},
3359
   "name": "PA_SC_VPORT_ZMIN_1"
3360
  },
3361
  {
3362
   "chips": ["gfx8"],
3363
   "map": {"at": 164572, "to": "mm"},
3364
   "name": "PA_SC_VPORT_ZMAX_1"
3365
  },
3366
  {
3367
   "chips": ["gfx8"],
3368
   "map": {"at": 164576, "to": "mm"},
3369
   "name": "PA_SC_VPORT_ZMIN_2"
3370
  },
3371
  {
3372
   "chips": ["gfx8"],
3373
   "map": {"at": 164580, "to": "mm"},
3374
   "name": "PA_SC_VPORT_ZMAX_2"
3375
  },
3376
  {
3377
   "chips": ["gfx8"],
3378
   "map": {"at": 164584, "to": "mm"},
3379
   "name": "PA_SC_VPORT_ZMIN_3"
3380
  },
3381
  {
3382
   "chips": ["gfx8"],
3383
   "map": {"at": 164588, "to": "mm"},
3384
   "name": "PA_SC_VPORT_ZMAX_3"
3385
  },
3386
  {
3387
   "chips": ["gfx8"],
3388
   "map": {"at": 164592, "to": "mm"},
3389
   "name": "PA_SC_VPORT_ZMIN_4"
3390
  },
3391
  {
3392
   "chips": ["gfx8"],
3393
   "map": {"at": 164596, "to": "mm"},
3394
   "name": "PA_SC_VPORT_ZMAX_4"
3395
  },
3396
  {
3397
   "chips": ["gfx8"],
3398
   "map": {"at": 164600, "to": "mm"},
3399
   "name": "PA_SC_VPORT_ZMIN_5"
3400
  },
3401
  {
3402
   "chips": ["gfx8"],
3403
   "map": {"at": 164604, "to": "mm"},
3404
   "name": "PA_SC_VPORT_ZMAX_5"
3405
  },
3406
  {
3407
   "chips": ["gfx8"],
3408
   "map": {"at": 164608, "to": "mm"},
3409
   "name": "PA_SC_VPORT_ZMIN_6"
3410
  },
3411
  {
3412
   "chips": ["gfx8"],
3413
   "map": {"at": 164612, "to": "mm"},
3414
   "name": "PA_SC_VPORT_ZMAX_6"
3415
  },
3416
  {
3417
   "chips": ["gfx8"],
3418
   "map": {"at": 164616, "to": "mm"},
3419
   "name": "PA_SC_VPORT_ZMIN_7"
3420
  },
3421
  {
3422
   "chips": ["gfx8"],
3423
   "map": {"at": 164620, "to": "mm"},
3424
   "name": "PA_SC_VPORT_ZMAX_7"
3425
  },
3426
  {
3427
   "chips": ["gfx8"],
3428
   "map": {"at": 164624, "to": "mm"},
3429
   "name": "PA_SC_VPORT_ZMIN_8"
3430
  },
3431
  {
3432
   "chips": ["gfx8"],
3433
   "map": {"at": 164628, "to": "mm"},
3434
   "name": "PA_SC_VPORT_ZMAX_8"
3435
  },
3436
  {
3437
   "chips": ["gfx8"],
3438
   "map": {"at": 164632, "to": "mm"},
3439
   "name": "PA_SC_VPORT_ZMIN_9"
3440
  },
3441
  {
3442
   "chips": ["gfx8"],
3443
   "map": {"at": 164636, "to": "mm"},
3444
   "name": "PA_SC_VPORT_ZMAX_9"
3445
  },
3446
  {
3447
   "chips": ["gfx8"],
3448
   "map": {"at": 164640, "to": "mm"},
3449
   "name": "PA_SC_VPORT_ZMIN_10"
3450
  },
3451
  {
3452
   "chips": ["gfx8"],
3453
   "map": {"at": 164644, "to": "mm"},
3454
   "name": "PA_SC_VPORT_ZMAX_10"
3455
  },
3456
  {
3457
   "chips": ["gfx8"],
3458
   "map": {"at": 164648, "to": "mm"},
3459
   "name": "PA_SC_VPORT_ZMIN_11"
3460
  },
3461
  {
3462
   "chips": ["gfx8"],
3463
   "map": {"at": 164652, "to": "mm"},
3464
   "name": "PA_SC_VPORT_ZMAX_11"
3465
  },
3466
  {
3467
   "chips": ["gfx8"],
3468
   "map": {"at": 164656, "to": "mm"},
3469
   "name": "PA_SC_VPORT_ZMIN_12"
3470
  },
3471
  {
3472
   "chips": ["gfx8"],
3473
   "map": {"at": 164660, "to": "mm"},
3474
   "name": "PA_SC_VPORT_ZMAX_12"
3475
  },
3476
  {
3477
   "chips": ["gfx8"],
3478
   "map": {"at": 164664, "to": "mm"},
3479
   "name": "PA_SC_VPORT_ZMIN_13"
3480
  },
3481
  {
3482
   "chips": ["gfx8"],
3483
   "map": {"at": 164668, "to": "mm"},
3484
   "name": "PA_SC_VPORT_ZMAX_13"
3485
  },
3486
  {
3487
   "chips": ["gfx8"],
3488
   "map": {"at": 164672, "to": "mm"},
3489
   "name": "PA_SC_VPORT_ZMIN_14"
3490
  },
3491
  {
3492
   "chips": ["gfx8"],
3493
   "map": {"at": 164676, "to": "mm"},
3494
   "name": "PA_SC_VPORT_ZMAX_14"
3495
  },
3496
  {
3497
   "chips": ["gfx8"],
3498
   "map": {"at": 164680, "to": "mm"},
3499
   "name": "PA_SC_VPORT_ZMIN_15"
3500
  },
3501
  {
3502
   "chips": ["gfx8"],
3503
   "map": {"at": 164684, "to": "mm"},
3504
   "name": "PA_SC_VPORT_ZMAX_15"
3505
  },
3506
  {
3507
   "chips": ["gfx8"],
3508
   "map": {"at": 164688, "to": "mm"},
3509
   "name": "PA_SC_RASTER_CONFIG",
3510
   "type_ref": "PA_SC_RASTER_CONFIG"
3511
  },
3512
  {
3513
   "chips": ["gfx8"],
3514
   "map": {"at": 164692, "to": "mm"},
3515
   "name": "PA_SC_RASTER_CONFIG_1",
3516
   "type_ref": "PA_SC_RASTER_CONFIG_1"
3517
  },
3518
  {
3519
   "chips": ["gfx8"],
3520
   "map": {"at": 164696, "to": "mm"},
3521
   "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3522
   "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"
3523
  },
3524
  {
3525
   "chips": ["gfx8"],
3526
   "map": {"at": 164704, "to": "mm"},
3527
   "name": "CP_PERFMON_CNTX_CNTL",
3528
   "type_ref": "CP_PERFMON_CNTX_CNTL"
3529
  },
3530
  {
3531
   "chips": ["gfx8"],
3532
   "map": {"at": 164708, "to": "mm"},
3533
   "name": "CP_RINGID",
3534
   "type_ref": "CP_RINGID"
3535
  },
3536
  {
3537
   "chips": ["gfx8"],
3538
   "map": {"at": 164712, "to": "mm"},
3539
   "name": "CP_VMID",
3540
   "type_ref": "CP_VMID"
3541
  },
3542
  {
3543
   "chips": ["gfx8"],
3544
   "map": {"at": 164864, "to": "mm"},
3545
   "name": "VGT_MAX_VTX_INDX"
3546
  },
3547
  {
3548
   "chips": ["gfx8"],
3549
   "map": {"at": 164868, "to": "mm"},
3550
   "name": "VGT_MIN_VTX_INDX"
3551
  },
3552
  {
3553
   "chips": ["gfx8"],
3554
   "map": {"at": 164872, "to": "mm"},
3555
   "name": "VGT_INDX_OFFSET"
3556
  },
3557
  {
3558
   "chips": ["gfx8"],
3559
   "map": {"at": 164876, "to": "mm"},
3560
   "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3561
  },
3562
  {
3563
   "chips": ["gfx8"],
3564
   "map": {"at": 164884, "to": "mm"},
3565
   "name": "CB_BLEND_RED"
3566
  },
3567
  {
3568
   "chips": ["gfx8"],
3569
   "map": {"at": 164888, "to": "mm"},
3570
   "name": "CB_BLEND_GREEN"
3571
  },
3572
  {
3573
   "chips": ["gfx8"],
3574
   "map": {"at": 164892, "to": "mm"},
3575
   "name": "CB_BLEND_BLUE"
3576
  },
3577
  {
3578
   "chips": ["gfx8"],
3579
   "map": {"at": 164896, "to": "mm"},
3580
   "name": "CB_BLEND_ALPHA"
3581
  },
3582
  {
3583
   "chips": ["gfx8"],
3584
   "map": {"at": 164900, "to": "mm"},
3585
   "name": "CB_DCC_CONTROL",
3586
   "type_ref": "CB_DCC_CONTROL"
3587
  },
3588
  {
3589
   "chips": ["gfx8"],
3590
   "map": {"at": 164908, "to": "mm"},
3591
   "name": "DB_STENCIL_CONTROL",
3592
   "type_ref": "DB_STENCIL_CONTROL"
3593
  },
3594
  {
3595
   "chips": ["gfx8"],
3596
   "map": {"at": 164912, "to": "mm"},
3597
   "name": "DB_STENCILREFMASK",
3598
   "type_ref": "DB_STENCILREFMASK"
3599
  },
3600
  {
3601
   "chips": ["gfx8"],
3602
   "map": {"at": 164916, "to": "mm"},
3603
   "name": "DB_STENCILREFMASK_BF",
3604
   "type_ref": "DB_STENCILREFMASK_BF"
3605
  },
3606
  {
3607
   "chips": ["gfx8"],
3608
   "map": {"at": 164924, "to": "mm"},
3609
   "name": "PA_CL_VPORT_XSCALE"
3610
  },
3611
  {
3612
   "chips": ["gfx8"],
3613
   "map": {"at": 164928, "to": "mm"},
3614
   "name": "PA_CL_VPORT_XOFFSET"
3615
  },
3616
  {
3617
   "chips": ["gfx8"],
3618
   "map": {"at": 164932, "to": "mm"},
3619
   "name": "PA_CL_VPORT_YSCALE"
3620
  },
3621
  {
3622
   "chips": ["gfx8"],
3623
   "map": {"at": 164936, "to": "mm"},
3624
   "name": "PA_CL_VPORT_YOFFSET"
3625
  },
3626
  {
3627
   "chips": ["gfx8"],
3628
   "map": {"at": 164940, "to": "mm"},
3629
   "name": "PA_CL_VPORT_ZSCALE"
3630
  },
3631
  {
3632
   "chips": ["gfx8"],
3633
   "map": {"at": 164944, "to": "mm"},
3634
   "name": "PA_CL_VPORT_ZOFFSET"
3635
  },
3636
  {
3637
   "chips": ["gfx8"],
3638
   "map": {"at": 164948, "to": "mm"},
3639
   "name": "PA_CL_VPORT_XSCALE_1"
3640
  },
3641
  {
3642
   "chips": ["gfx8"],
3643
   "map": {"at": 164952, "to": "mm"},
3644
   "name": "PA_CL_VPORT_XOFFSET_1"
3645
  },
3646
  {
3647
   "chips": ["gfx8"],
3648
   "map": {"at": 164956, "to": "mm"},
3649
   "name": "PA_CL_VPORT_YSCALE_1"
3650
  },
3651
  {
3652
   "chips": ["gfx8"],
3653
   "map": {"at": 164960, "to": "mm"},
3654
   "name": "PA_CL_VPORT_YOFFSET_1"
3655
  },
3656
  {
3657
   "chips": ["gfx8"],
3658
   "map": {"at": 164964, "to": "mm"},
3659
   "name": "PA_CL_VPORT_ZSCALE_1"
3660
  },
3661
  {
3662
   "chips": ["gfx8"],
3663
   "map": {"at": 164968, "to": "mm"},
3664
   "name": "PA_CL_VPORT_ZOFFSET_1"
3665
  },
3666
  {
3667
   "chips": ["gfx8"],
3668
   "map": {"at": 164972, "to": "mm"},
3669
   "name": "PA_CL_VPORT_XSCALE_2"
3670
  },
3671
  {
3672
   "chips": ["gfx8"],
3673
   "map": {"at": 164976, "to": "mm"},
3674
   "name": "PA_CL_VPORT_XOFFSET_2"
3675
  },
3676
  {
3677
   "chips": ["gfx8"],
3678
   "map": {"at": 164980, "to": "mm"},
3679
   "name": "PA_CL_VPORT_YSCALE_2"
3680
  },
3681
  {
3682
   "chips": ["gfx8"],
3683
   "map": {"at": 164984, "to": "mm"},
3684
   "name": "PA_CL_VPORT_YOFFSET_2"
3685
  },
3686
  {
3687
   "chips": ["gfx8"],
3688
   "map": {"at": 164988, "to": "mm"},
3689
   "name": "PA_CL_VPORT_ZSCALE_2"
3690
  },
3691
  {
3692
   "chips": ["gfx8"],
3693
   "map": {"at": 164992, "to": "mm"},
3694
   "name": "PA_CL_VPORT_ZOFFSET_2"
3695
  },
3696
  {
3697
   "chips": ["gfx8"],
3698
   "map": {"at": 164996, "to": "mm"},
3699
   "name": "PA_CL_VPORT_XSCALE_3"
3700
  },
3701
  {
3702
   "chips": ["gfx8"],
3703
   "map": {"at": 165000, "to": "mm"},
3704
   "name": "PA_CL_VPORT_XOFFSET_3"
3705
  },
3706
  {
3707
   "chips": ["gfx8"],
3708
   "map": {"at": 165004, "to": "mm"},
3709
   "name": "PA_CL_VPORT_YSCALE_3"
3710
  },
3711
  {
3712
   "chips": ["gfx8"],
3713
   "map": {"at": 165008, "to": "mm"},
3714
   "name": "PA_CL_VPORT_YOFFSET_3"
3715
  },
3716
  {
3717
   "chips": ["gfx8"],
3718
   "map": {"at": 165012, "to": "mm"},
3719
   "name": "PA_CL_VPORT_ZSCALE_3"
3720
  },
3721
  {
3722
   "chips": ["gfx8"],
3723
   "map": {"at": 165016, "to": "mm"},
3724
   "name": "PA_CL_VPORT_ZOFFSET_3"
3725
  },
3726
  {
3727
   "chips": ["gfx8"],
3728
   "map": {"at": 165020, "to": "mm"},
3729
   "name": "PA_CL_VPORT_XSCALE_4"
3730
  },
3731
  {
3732
   "chips": ["gfx8"],
3733
   "map": {"at": 165024, "to": "mm"},
3734
   "name": "PA_CL_VPORT_XOFFSET_4"
3735
  },
3736
  {
3737
   "chips": ["gfx8"],
3738
   "map": {"at": 165028, "to": "mm"},
3739
   "name": "PA_CL_VPORT_YSCALE_4"
3740
  },
3741
  {
3742
   "chips": ["gfx8"],
3743
   "map": {"at": 165032, "to": "mm"},
3744
   "name": "PA_CL_VPORT_YOFFSET_4"
3745
  },
3746
  {
3747
   "chips": ["gfx8"],
3748
   "map": {"at": 165036, "to": "mm"},
3749
   "name": "PA_CL_VPORT_ZSCALE_4"
3750
  },
3751
  {
3752
   "chips": ["gfx8"],
3753
   "map": {"at": 165040, "to": "mm"},
3754
   "name": "PA_CL_VPORT_ZOFFSET_4"
3755
  },
3756
  {
3757
   "chips": ["gfx8"],
3758
   "map": {"at": 165044, "to": "mm"},
3759
   "name": "PA_CL_VPORT_XSCALE_5"
3760
  },
3761
  {
3762
   "chips": ["gfx8"],
3763
   "map": {"at": 165048, "to": "mm"},
3764
   "name": "PA_CL_VPORT_XOFFSET_5"
3765
  },
3766
  {
3767
   "chips": ["gfx8"],
3768
   "map": {"at": 165052, "to": "mm"},
3769
   "name": "PA_CL_VPORT_YSCALE_5"
3770
  },
3771
  {
3772
   "chips": ["gfx8"],
3773
   "map": {"at": 165056, "to": "mm"},
3774
   "name": "PA_CL_VPORT_YOFFSET_5"
3775
  },
3776
  {
3777
   "chips": ["gfx8"],
3778
   "map": {"at": 165060, "to": "mm"},
3779
   "name": "PA_CL_VPORT_ZSCALE_5"
3780
  },
3781
  {
3782
   "chips": ["gfx8"],
3783
   "map": {"at": 165064, "to": "mm"},
3784
   "name": "PA_CL_VPORT_ZOFFSET_5"
3785
  },
3786
  {
3787
   "chips": ["gfx8"],
3788
   "map": {"at": 165068, "to": "mm"},
3789
   "name": "PA_CL_VPORT_XSCALE_6"
3790
  },
3791
  {
3792
   "chips": ["gfx8"],
3793
   "map": {"at": 165072, "to": "mm"},
3794
   "name": "PA_CL_VPORT_XOFFSET_6"
3795
  },
3796
  {
3797
   "chips": ["gfx8"],
3798
   "map": {"at": 165076, "to": "mm"},
3799
   "name": "PA_CL_VPORT_YSCALE_6"
3800
  },
3801
  {
3802
   "chips": ["gfx8"],
3803
   "map": {"at": 165080, "to": "mm"},
3804
   "name": "PA_CL_VPORT_YOFFSET_6"
3805
  },
3806
  {
3807
   "chips": ["gfx8"],
3808
   "map": {"at": 165084, "to": "mm"},
3809
   "name": "PA_CL_VPORT_ZSCALE_6"
3810
  },
3811
  {
3812
   "chips": ["gfx8"],
3813
   "map": {"at": 165088, "to": "mm"},
3814
   "name": "PA_CL_VPORT_ZOFFSET_6"
3815
  },
3816
  {
3817
   "chips": ["gfx8"],
3818
   "map": {"at": 165092, "to": "mm"},
3819
   "name": "PA_CL_VPORT_XSCALE_7"
3820
  },
3821
  {
3822
   "chips": ["gfx8"],
3823
   "map": {"at": 165096, "to": "mm"},
3824
   "name": "PA_CL_VPORT_XOFFSET_7"
3825
  },
3826
  {
3827
   "chips": ["gfx8"],
3828
   "map": {"at": 165100, "to": "mm"},
3829
   "name": "PA_CL_VPORT_YSCALE_7"
3830
  },
3831
  {
3832
   "chips": ["gfx8"],
3833
   "map": {"at": 165104, "to": "mm"},
3834
   "name": "PA_CL_VPORT_YOFFSET_7"
3835
  },
3836
  {
3837
   "chips": ["gfx8"],
3838
   "map": {"at": 165108, "to": "mm"},
3839
   "name": "PA_CL_VPORT_ZSCALE_7"
3840
  },
3841
  {
3842
   "chips": ["gfx8"],
3843
   "map": {"at": 165112, "to": "mm"},
3844
   "name": "PA_CL_VPORT_ZOFFSET_7"
3845
  },
3846
  {
3847
   "chips": ["gfx8"],
3848
   "map": {"at": 165116, "to": "mm"},
3849
   "name": "PA_CL_VPORT_XSCALE_8"
3850
  },
3851
  {
3852
   "chips": ["gfx8"],
3853
   "map": {"at": 165120, "to": "mm"},
3854
   "name": "PA_CL_VPORT_XOFFSET_8"
3855
  },
3856
  {
3857
   "chips": ["gfx8"],
3858
   "map": {"at": 165124, "to": "mm"},
3859
   "name": "PA_CL_VPORT_YSCALE_8"
3860
  },
3861
  {
3862
   "chips": ["gfx8"],
3863
   "map": {"at": 165128, "to": "mm"},
3864
   "name": "PA_CL_VPORT_YOFFSET_8"
3865
  },
3866
  {
3867
   "chips": ["gfx8"],
3868
   "map": {"at": 165132, "to": "mm"},
3869
   "name": "PA_CL_VPORT_ZSCALE_8"
3870
  },
3871
  {
3872
   "chips": ["gfx8"],
3873
   "map": {"at": 165136, "to": "mm"},
3874
   "name": "PA_CL_VPORT_ZOFFSET_8"
3875
  },
3876
  {
3877
   "chips": ["gfx8"],
3878
   "map": {"at": 165140, "to": "mm"},
3879
   "name": "PA_CL_VPORT_XSCALE_9"
3880
  },
3881
  {
3882
   "chips": ["gfx8"],
3883
   "map": {"at": 165144, "to": "mm"},
3884
   "name": "PA_CL_VPORT_XOFFSET_9"
3885
  },
3886
  {
3887
   "chips": ["gfx8"],
3888
   "map": {"at": 165148, "to": "mm"},
3889
   "name": "PA_CL_VPORT_YSCALE_9"
3890
  },
3891
  {
3892
   "chips": ["gfx8"],
3893
   "map": {"at": 165152, "to": "mm"},
3894
   "name": "PA_CL_VPORT_YOFFSET_9"
3895
  },
3896
  {
3897
   "chips": ["gfx8"],
3898
   "map": {"at": 165156, "to": "mm"},
3899
   "name": "PA_CL_VPORT_ZSCALE_9"
3900
  },
3901
  {
3902
   "chips": ["gfx8"],
3903
   "map": {"at": 165160, "to": "mm"},
3904
   "name": "PA_CL_VPORT_ZOFFSET_9"
3905
  },
3906
  {
3907
   "chips": ["gfx8"],
3908
   "map": {"at": 165164, "to": "mm"},
3909
   "name": "PA_CL_VPORT_XSCALE_10"
3910
  },
3911
  {
3912
   "chips": ["gfx8"],
3913
   "map": {"at": 165168, "to": "mm"},
3914
   "name": "PA_CL_VPORT_XOFFSET_10"
3915
  },
3916
  {
3917
   "chips": ["gfx8"],
3918
   "map": {"at": 165172, "to": "mm"},
3919
   "name": "PA_CL_VPORT_YSCALE_10"
3920
  },
3921
  {
3922
   "chips": ["gfx8"],
3923
   "map": {"at": 165176, "to": "mm"},
3924
   "name": "PA_CL_VPORT_YOFFSET_10"
3925
  },
3926
  {
3927
   "chips": ["gfx8"],
3928
   "map": {"at": 165180, "to": "mm"},
3929
   "name": "PA_CL_VPORT_ZSCALE_10"
3930
  },
3931
  {
3932
   "chips": ["gfx8"],
3933
   "map": {"at": 165184, "to": "mm"},
3934
   "name": "PA_CL_VPORT_ZOFFSET_10"
3935
  },
3936
  {
3937
   "chips": ["gfx8"],
3938
   "map": {"at": 165188, "to": "mm"},
3939
   "name": "PA_CL_VPORT_XSCALE_11"
3940
  },
3941
  {
3942
   "chips": ["gfx8"],
3943
   "map": {"at": 165192, "to": "mm"},
3944
   "name": "PA_CL_VPORT_XOFFSET_11"
3945
  },
3946
  {
3947
   "chips": ["gfx8"],
3948
   "map": {"at": 165196, "to": "mm"},
3949
   "name": "PA_CL_VPORT_YSCALE_11"
3950
  },
3951
  {
3952
   "chips": ["gfx8"],
3953
   "map": {"at": 165200, "to": "mm"},
3954
   "name": "PA_CL_VPORT_YOFFSET_11"
3955
  },
3956
  {
3957
   "chips": ["gfx8"],
3958
   "map": {"at": 165204, "to": "mm"},
3959
   "name": "PA_CL_VPORT_ZSCALE_11"
3960
  },
3961
  {
3962
   "chips": ["gfx8"],
3963
   "map": {"at": 165208, "to": "mm"},
3964
   "name": "PA_CL_VPORT_ZOFFSET_11"
3965
  },
3966
  {
3967
   "chips": ["gfx8"],
3968
   "map": {"at": 165212, "to": "mm"},
3969
   "name": "PA_CL_VPORT_XSCALE_12"
3970
  },
3971
  {
3972
   "chips": ["gfx8"],
3973
   "map": {"at": 165216, "to": "mm"},
3974
   "name": "PA_CL_VPORT_XOFFSET_12"
3975
  },
3976
  {
3977
   "chips": ["gfx8"],
3978
   "map": {"at": 165220, "to": "mm"},
3979
   "name": "PA_CL_VPORT_YSCALE_12"
3980
  },
3981
  {
3982
   "chips": ["gfx8"],
3983
   "map": {"at": 165224, "to": "mm"},
3984
   "name": "PA_CL_VPORT_YOFFSET_12"
3985
  },
3986
  {
3987
   "chips": ["gfx8"],
3988
   "map": {"at": 165228, "to": "mm"},
3989
   "name": "PA_CL_VPORT_ZSCALE_12"
3990
  },
3991
  {
3992
   "chips": ["gfx8"],
3993
   "map": {"at": 165232, "to": "mm"},
3994
   "name": "PA_CL_VPORT_ZOFFSET_12"
3995
  },
3996
  {
3997
   "chips": ["gfx8"],
3998
   "map": {"at": 165236, "to": "mm"},
3999
   "name": "PA_CL_VPORT_XSCALE_13"
4000
  },
4001
  {
4002
   "chips": ["gfx8"],
4003
   "map": {"at": 165240, "to": "mm"},
4004
   "name": "PA_CL_VPORT_XOFFSET_13"
4005
  },
4006
  {
4007
   "chips": ["gfx8"],
4008
   "map": {"at": 165244, "to": "mm"},
4009
   "name": "PA_CL_VPORT_YSCALE_13"
4010
  },
4011
  {
4012
   "chips": ["gfx8"],
4013
   "map": {"at": 165248, "to": "mm"},
4014
   "name": "PA_CL_VPORT_YOFFSET_13"
4015
  },
4016
  {
4017
   "chips": ["gfx8"],
4018
   "map": {"at": 165252, "to": "mm"},
4019
   "name": "PA_CL_VPORT_ZSCALE_13"
4020
  },
4021
  {
4022
   "chips": ["gfx8"],
4023
   "map": {"at": 165256, "to": "mm"},
4024
   "name": "PA_CL_VPORT_ZOFFSET_13"
4025
  },
4026
  {
4027
   "chips": ["gfx8"],
4028
   "map": {"at": 165260, "to": "mm"},
4029
   "name": "PA_CL_VPORT_XSCALE_14"
4030
  },
4031
  {
4032
   "chips": ["gfx8"],
4033
   "map": {"at": 165264, "to": "mm"},
4034
   "name": "PA_CL_VPORT_XOFFSET_14"
4035
  },
4036
  {
4037
   "chips": ["gfx8"],
4038
   "map": {"at": 165268, "to": "mm"},
4039
   "name": "PA_CL_VPORT_YSCALE_14"
4040
  },
4041
  {
4042
   "chips": ["gfx8"],
4043
   "map": {"at": 165272, "to": "mm"},
4044
   "name": "PA_CL_VPORT_YOFFSET_14"
4045
  },
4046
  {
4047
   "chips": ["gfx8"],
4048
   "map": {"at": 165276, "to": "mm"},
4049
   "name": "PA_CL_VPORT_ZSCALE_14"
4050
  },
4051
  {
4052
   "chips": ["gfx8"],
4053
   "map": {"at": 165280, "to": "mm"},
4054
   "name": "PA_CL_VPORT_ZOFFSET_14"
4055
  },
4056
  {
4057
   "chips": ["gfx8"],
4058
   "map": {"at": 165284, "to": "mm"},
4059
   "name": "PA_CL_VPORT_XSCALE_15"
4060
  },
4061
  {
4062
   "chips": ["gfx8"],
4063
   "map": {"at": 165288, "to": "mm"},
4064
   "name": "PA_CL_VPORT_XOFFSET_15"
4065
  },
4066
  {
4067
   "chips": ["gfx8"],
4068
   "map": {"at": 165292, "to": "mm"},
4069
   "name": "PA_CL_VPORT_YSCALE_15"
4070
  },
4071
  {
4072
   "chips": ["gfx8"],
4073
   "map": {"at": 165296, "to": "mm"},
4074
   "name": "PA_CL_VPORT_YOFFSET_15"
4075
  },
4076
  {
4077
   "chips": ["gfx8"],
4078
   "map": {"at": 165300, "to": "mm"},
4079
   "name": "PA_CL_VPORT_ZSCALE_15"
4080
  },
4081
  {
4082
   "chips": ["gfx8"],
4083
   "map": {"at": 165304, "to": "mm"},
4084
   "name": "PA_CL_VPORT_ZOFFSET_15"
4085
  },
4086
  {
4087
   "chips": ["gfx8"],
4088
   "map": {"at": 165308, "to": "mm"},
4089
   "name": "PA_CL_UCP_0_X"
4090
  },
4091
  {
4092
   "chips": ["gfx8"],
4093
   "map": {"at": 165312, "to": "mm"},
4094
   "name": "PA_CL_UCP_0_Y"
4095
  },
4096
  {
4097
   "chips": ["gfx8"],
4098
   "map": {"at": 165316, "to": "mm"},
4099
   "name": "PA_CL_UCP_0_Z"
4100
  },
4101
  {
4102
   "chips": ["gfx8"],
4103
   "map": {"at": 165320, "to": "mm"},
4104
   "name": "PA_CL_UCP_0_W"
4105
  },
4106
  {
4107
   "chips": ["gfx8"],
4108
   "map": {"at": 165324, "to": "mm"},
4109
   "name": "PA_CL_UCP_1_X"
4110
  },
4111
  {
4112
   "chips": ["gfx8"],
4113
   "map": {"at": 165328, "to": "mm"},
4114
   "name": "PA_CL_UCP_1_Y"
4115
  },
4116
  {
4117
   "chips": ["gfx8"],
4118
   "map": {"at": 165332, "to": "mm"},
4119
   "name": "PA_CL_UCP_1_Z"
4120
  },
4121
  {
4122
   "chips": ["gfx8"],
4123
   "map": {"at": 165336, "to": "mm"},
4124
   "name": "PA_CL_UCP_1_W"
4125
  },
4126
  {
4127
   "chips": ["gfx8"],
4128
   "map": {"at": 165340, "to": "mm"},
4129
   "name": "PA_CL_UCP_2_X"
4130
  },
4131
  {
4132
   "chips": ["gfx8"],
4133
   "map": {"at": 165344, "to": "mm"},
4134
   "name": "PA_CL_UCP_2_Y"
4135
  },
4136
  {
4137
   "chips": ["gfx8"],
4138
   "map": {"at": 165348, "to": "mm"},
4139
   "name": "PA_CL_UCP_2_Z"
4140
  },
4141
  {
4142
   "chips": ["gfx8"],
4143
   "map": {"at": 165352, "to": "mm"},
4144
   "name": "PA_CL_UCP_2_W"
4145
  },
4146
  {
4147
   "chips": ["gfx8"],
4148
   "map": {"at": 165356, "to": "mm"},
4149
   "name": "PA_CL_UCP_3_X"
4150
  },
4151
  {
4152
   "chips": ["gfx8"],
4153
   "map": {"at": 165360, "to": "mm"},
4154
   "name": "PA_CL_UCP_3_Y"
4155
  },
4156
  {
4157
   "chips": ["gfx8"],
4158
   "map": {"at": 165364, "to": "mm"},
4159
   "name": "PA_CL_UCP_3_Z"
4160
  },
4161
  {
4162
   "chips": ["gfx8"],
4163
   "map": {"at": 165368, "to": "mm"},
4164
   "name": "PA_CL_UCP_3_W"
4165
  },
4166
  {
4167
   "chips": ["gfx8"],
4168
   "map": {"at": 165372, "to": "mm"},
4169
   "name": "PA_CL_UCP_4_X"
4170
  },
4171
  {
4172
   "chips": ["gfx8"],
4173
   "map": {"at": 165376, "to": "mm"},
4174
   "name": "PA_CL_UCP_4_Y"
4175
  },
4176
  {
4177
   "chips": ["gfx8"],
4178
   "map": {"at": 165380, "to": "mm"},
4179
   "name": "PA_CL_UCP_4_Z"
4180
  },
4181
  {
4182
   "chips": ["gfx8"],
4183
   "map": {"at": 165384, "to": "mm"},
4184
   "name": "PA_CL_UCP_4_W"
4185
  },
4186
  {
4187
   "chips": ["gfx8"],
4188
   "map": {"at": 165388, "to": "mm"},
4189
   "name": "PA_CL_UCP_5_X"
4190
  },
4191
  {
4192
   "chips": ["gfx8"],
4193
   "map": {"at": 165392, "to": "mm"},
4194
   "name": "PA_CL_UCP_5_Y"
4195
  },
4196
  {
4197
   "chips": ["gfx8"],
4198
   "map": {"at": 165396, "to": "mm"},
4199
   "name": "PA_CL_UCP_5_Z"
4200
  },
4201
  {
4202
   "chips": ["gfx8"],
4203
   "map": {"at": 165400, "to": "mm"},
4204
   "name": "PA_CL_UCP_5_W"
4205
  },
4206
  {
4207
   "chips": ["gfx8"],
4208
   "map": {"at": 165444, "to": "mm"},
4209
   "name": "SPI_PS_INPUT_CNTL_0",
4210
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4211
  },
4212
  {
4213
   "chips": ["gfx8"],
4214
   "map": {"at": 165448, "to": "mm"},
4215
   "name": "SPI_PS_INPUT_CNTL_1",
4216
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4217
  },
4218
  {
4219
   "chips": ["gfx8"],
4220
   "map": {"at": 165452, "to": "mm"},
4221
   "name": "SPI_PS_INPUT_CNTL_2",
4222
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4223
  },
4224
  {
4225
   "chips": ["gfx8"],
4226
   "map": {"at": 165456, "to": "mm"},
4227
   "name": "SPI_PS_INPUT_CNTL_3",
4228
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4229
  },
4230
  {
4231
   "chips": ["gfx8"],
4232
   "map": {"at": 165460, "to": "mm"},
4233
   "name": "SPI_PS_INPUT_CNTL_4",
4234
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4235
  },
4236
  {
4237
   "chips": ["gfx8"],
4238
   "map": {"at": 165464, "to": "mm"},
4239
   "name": "SPI_PS_INPUT_CNTL_5",
4240
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4241
  },
4242
  {
4243
   "chips": ["gfx8"],
4244
   "map": {"at": 165468, "to": "mm"},
4245
   "name": "SPI_PS_INPUT_CNTL_6",
4246
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4247
  },
4248
  {
4249
   "chips": ["gfx8"],
4250
   "map": {"at": 165472, "to": "mm"},
4251
   "name": "SPI_PS_INPUT_CNTL_7",
4252
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4253
  },
4254
  {
4255
   "chips": ["gfx8"],
4256
   "map": {"at": 165476, "to": "mm"},
4257
   "name": "SPI_PS_INPUT_CNTL_8",
4258
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4259
  },
4260
  {
4261
   "chips": ["gfx8"],
4262
   "map": {"at": 165480, "to": "mm"},
4263
   "name": "SPI_PS_INPUT_CNTL_9",
4264
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4265
  },
4266
  {
4267
   "chips": ["gfx8"],
4268
   "map": {"at": 165484, "to": "mm"},
4269
   "name": "SPI_PS_INPUT_CNTL_10",
4270
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4271
  },
4272
  {
4273
   "chips": ["gfx8"],
4274
   "map": {"at": 165488, "to": "mm"},
4275
   "name": "SPI_PS_INPUT_CNTL_11",
4276
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4277
  },
4278
  {
4279
   "chips": ["gfx8"],
4280
   "map": {"at": 165492, "to": "mm"},
4281
   "name": "SPI_PS_INPUT_CNTL_12",
4282
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4283
  },
4284
  {
4285
   "chips": ["gfx8"],
4286
   "map": {"at": 165496, "to": "mm"},
4287
   "name": "SPI_PS_INPUT_CNTL_13",
4288
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4289
  },
4290
  {
4291
   "chips": ["gfx8"],
4292
   "map": {"at": 165500, "to": "mm"},
4293
   "name": "SPI_PS_INPUT_CNTL_14",
4294
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4295
  },
4296
  {
4297
   "chips": ["gfx8"],
4298
   "map": {"at": 165504, "to": "mm"},
4299
   "name": "SPI_PS_INPUT_CNTL_15",
4300
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4301
  },
4302
  {
4303
   "chips": ["gfx8"],
4304
   "map": {"at": 165508, "to": "mm"},
4305
   "name": "SPI_PS_INPUT_CNTL_16",
4306
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4307
  },
4308
  {
4309
   "chips": ["gfx8"],
4310
   "map": {"at": 165512, "to": "mm"},
4311
   "name": "SPI_PS_INPUT_CNTL_17",
4312
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4313
  },
4314
  {
4315
   "chips": ["gfx8"],
4316
   "map": {"at": 165516, "to": "mm"},
4317
   "name": "SPI_PS_INPUT_CNTL_18",
4318
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4319
  },
4320
  {
4321
   "chips": ["gfx8"],
4322
   "map": {"at": 165520, "to": "mm"},
4323
   "name": "SPI_PS_INPUT_CNTL_19",
4324
   "type_ref": "SPI_PS_INPUT_CNTL_0"
4325
  },
4326
  {
4327
   "chips": ["gfx8"],
4328
   "map": {"at": 165524, "to": "mm"},
4329
   "name": "SPI_PS_INPUT_CNTL_20",
4330
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4331
  },
4332
  {
4333
   "chips": ["gfx8"],
4334
   "map": {"at": 165528, "to": "mm"},
4335
   "name": "SPI_PS_INPUT_CNTL_21",
4336
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4337
  },
4338
  {
4339
   "chips": ["gfx8"],
4340
   "map": {"at": 165532, "to": "mm"},
4341
   "name": "SPI_PS_INPUT_CNTL_22",
4342
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4343
  },
4344
  {
4345
   "chips": ["gfx8"],
4346
   "map": {"at": 165536, "to": "mm"},
4347
   "name": "SPI_PS_INPUT_CNTL_23",
4348
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4349
  },
4350
  {
4351
   "chips": ["gfx8"],
4352
   "map": {"at": 165540, "to": "mm"},
4353
   "name": "SPI_PS_INPUT_CNTL_24",
4354
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4355
  },
4356
  {
4357
   "chips": ["gfx8"],
4358
   "map": {"at": 165544, "to": "mm"},
4359
   "name": "SPI_PS_INPUT_CNTL_25",
4360
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4361
  },
4362
  {
4363
   "chips": ["gfx8"],
4364
   "map": {"at": 165548, "to": "mm"},
4365
   "name": "SPI_PS_INPUT_CNTL_26",
4366
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4367
  },
4368
  {
4369
   "chips": ["gfx8"],
4370
   "map": {"at": 165552, "to": "mm"},
4371
   "name": "SPI_PS_INPUT_CNTL_27",
4372
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4373
  },
4374
  {
4375
   "chips": ["gfx8"],
4376
   "map": {"at": 165556, "to": "mm"},
4377
   "name": "SPI_PS_INPUT_CNTL_28",
4378
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4379
  },
4380
  {
4381
   "chips": ["gfx8"],
4382
   "map": {"at": 165560, "to": "mm"},
4383
   "name": "SPI_PS_INPUT_CNTL_29",
4384
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4385
  },
4386
  {
4387
   "chips": ["gfx8"],
4388
   "map": {"at": 165564, "to": "mm"},
4389
   "name": "SPI_PS_INPUT_CNTL_30",
4390
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4391
  },
4392
  {
4393
   "chips": ["gfx8"],
4394
   "map": {"at": 165568, "to": "mm"},
4395
   "name": "SPI_PS_INPUT_CNTL_31",
4396
   "type_ref": "SPI_PS_INPUT_CNTL_20"
4397
  },
4398
  {
4399
   "chips": ["gfx8"],
4400
   "map": {"at": 165572, "to": "mm"},
4401
   "name": "SPI_VS_OUT_CONFIG",
4402
   "type_ref": "SPI_VS_OUT_CONFIG"
4403
  },
4404
  {
4405
   "chips": ["gfx8"],
4406
   "map": {"at": 165580, "to": "mm"},
4407
   "name": "SPI_PS_INPUT_ENA",
4408
   "type_ref": "SPI_PS_INPUT_ENA"
4409
  },
4410
  {
4411
   "chips": ["gfx8"],
4412
   "map": {"at": 165584, "to": "mm"},
4413
   "name": "SPI_PS_INPUT_ADDR",
4414
   "type_ref": "SPI_PS_INPUT_ENA"
4415
  },
4416
  {
4417
   "chips": ["gfx8"],
4418
   "map": {"at": 165588, "to": "mm"},
4419
   "name": "SPI_INTERP_CONTROL_0",
4420
   "type_ref": "SPI_INTERP_CONTROL_0"
4421
  },
4422
  {
4423
   "chips": ["gfx8"],
4424
   "map": {"at": 165592, "to": "mm"},
4425
   "name": "SPI_PS_IN_CONTROL",
4426
   "type_ref": "SPI_PS_IN_CONTROL"
4427
  },
4428
  {
4429
   "chips": ["gfx8"],
4430
   "map": {"at": 165600, "to": "mm"},
4431
   "name": "SPI_BARYC_CNTL",
4432
   "type_ref": "SPI_BARYC_CNTL"
4433
  },
4434
  {
4435
   "chips": ["gfx8"],
4436
   "map": {"at": 165608, "to": "mm"},
4437
   "name": "SPI_TMPRING_SIZE",
4438
   "type_ref": "COMPUTE_TMPRING_SIZE"
4439
  },
4440
  {
4441
   "chips": ["gfx8"],
4442
   "map": {"at": 165644, "to": "mm"},
4443
   "name": "SPI_SHADER_POS_FORMAT",
4444
   "type_ref": "SPI_SHADER_POS_FORMAT"
4445
  },
4446
  {
4447
   "chips": ["gfx8"],
4448
   "map": {"at": 165648, "to": "mm"},
4449
   "name": "SPI_SHADER_Z_FORMAT",
4450
   "type_ref": "SPI_SHADER_Z_FORMAT"
4451
  },
4452
  {
4453
   "chips": ["gfx8"],
4454
   "map": {"at": 165652, "to": "mm"},
4455
   "name": "SPI_SHADER_COL_FORMAT",
4456
   "type_ref": "SPI_SHADER_COL_FORMAT"
4457
  },
4458
  {
4459
   "chips": ["gfx8"],
4460
   "map": {"at": 165760, "to": "mm"},
4461
   "name": "CB_BLEND0_CONTROL",
4462
   "type_ref": "CB_BLEND0_CONTROL"
4463
  },
4464
  {
4465
   "chips": ["gfx8"],
4466
   "map": {"at": 165764, "to": "mm"},
4467
   "name": "CB_BLEND1_CONTROL",
4468
   "type_ref": "CB_BLEND0_CONTROL"
4469
  },
4470
  {
4471
   "chips": ["gfx8"],
4472
   "map": {"at": 165768, "to": "mm"},
4473
   "name": "CB_BLEND2_CONTROL",
4474
   "type_ref": "CB_BLEND0_CONTROL"
4475
  },
4476
  {
4477
   "chips": ["gfx8"],
4478
   "map": {"at": 165772, "to": "mm"},
4479
   "name": "CB_BLEND3_CONTROL",
4480
   "type_ref": "CB_BLEND0_CONTROL"
4481
  },
4482
  {
4483
   "chips": ["gfx8"],
4484
   "map": {"at": 165776, "to": "mm"},
4485
   "name": "CB_BLEND4_CONTROL",
4486
   "type_ref": "CB_BLEND0_CONTROL"
4487
  },
4488
  {
4489
   "chips": ["gfx8"],
4490
   "map": {"at": 165780, "to": "mm"},
4491
   "name": "CB_BLEND5_CONTROL",
4492
   "type_ref": "CB_BLEND0_CONTROL"
4493
  },
4494
  {
4495
   "chips": ["gfx8"],
4496
   "map": {"at": 165784, "to": "mm"},
4497
   "name": "CB_BLEND6_CONTROL",
4498
   "type_ref": "CB_BLEND0_CONTROL"
4499
  },
4500
  {
4501
   "chips": ["gfx8"],
4502
   "map": {"at": 165788, "to": "mm"},
4503
   "name": "CB_BLEND7_CONTROL",
4504
   "type_ref": "CB_BLEND0_CONTROL"
4505
  },
4506
  {
4507
   "chips": ["gfx8"],
4508
   "map": {"at": 165836, "to": "mm"},
4509
   "name": "CS_COPY_STATE",
4510
   "type_ref": "CS_COPY_STATE"
4511
  },
4512
  {
4513
   "chips": ["gfx8"],
4514
   "map": {"at": 165840, "to": "mm"},
4515
   "name": "GFX_COPY_STATE",
4516
   "type_ref": "CS_COPY_STATE"
4517
  },
4518
  {
4519
   "chips": ["gfx8"],
4520
   "map": {"at": 165844, "to": "mm"},
4521
   "name": "PA_CL_POINT_X_RAD"
4522
  },
4523
  {
4524
   "chips": ["gfx8"],
4525
   "map": {"at": 165848, "to": "mm"},
4526
   "name": "PA_CL_POINT_Y_RAD"
4527
  },
4528
  {
4529
   "chips": ["gfx8"],
4530
   "map": {"at": 165852, "to": "mm"},
4531
   "name": "PA_CL_POINT_SIZE"
4532
  },
4533
  {
4534
   "chips": ["gfx8"],
4535
   "map": {"at": 165856, "to": "mm"},
4536
   "name": "PA_CL_POINT_CULL_RAD"
4537
  },
4538
  {
4539
   "chips": ["gfx8"],
4540
   "map": {"at": 165860, "to": "mm"},
4541
   "name": "VGT_DMA_BASE_HI",
4542
   "type_ref": "VGT_DMA_BASE_HI"
4543
  },
4544
  {
4545
   "chips": ["gfx8"],
4546
   "map": {"at": 165864, "to": "mm"},
4547
   "name": "VGT_DMA_BASE"
4548
  },
4549
  {
4550
   "chips": ["gfx8"],
4551
   "map": {"at": 165872, "to": "mm"},
4552
   "name": "VGT_DRAW_INITIATOR",
4553
   "type_ref": "VGT_DRAW_INITIATOR"
4554
  },
4555
  {
4556
   "chips": ["gfx8"],
4557
   "map": {"at": 165876, "to": "mm"},
4558
   "name": "VGT_IMMED_DATA"
4559
  },
4560
  {
4561
   "chips": ["gfx8"],
4562
   "map": {"at": 165880, "to": "mm"},
4563
   "name": "VGT_EVENT_ADDRESS_REG",
4564
   "type_ref": "VGT_EVENT_ADDRESS_REG"
4565
  },
4566
  {
4567
   "chips": ["gfx8"],
4568
   "map": {"at": 165888, "to": "mm"},
4569
   "name": "DB_DEPTH_CONTROL",
4570
   "type_ref": "DB_DEPTH_CONTROL"
4571
  },
4572
  {
4573
   "chips": ["gfx8"],
4574
   "map": {"at": 165892, "to": "mm"},
4575
   "name": "DB_EQAA",
4576
   "type_ref": "DB_EQAA"
4577
  },
4578
  {
4579
   "chips": ["gfx8"],
4580
   "map": {"at": 165896, "to": "mm"},
4581
   "name": "CB_COLOR_CONTROL",
4582
   "type_ref": "CB_COLOR_CONTROL"
4583
  },
4584
  {
4585
   "chips": ["gfx8"],
4586
   "map": {"at": 165900, "to": "mm"},
4587
   "name": "DB_SHADER_CONTROL",
4588
   "type_ref": "DB_SHADER_CONTROL"
4589
  },
4590
  {
4591
   "chips": ["gfx8"],
4592
   "map": {"at": 165904, "to": "mm"},
4593
   "name": "PA_CL_CLIP_CNTL",
4594
   "type_ref": "PA_CL_CLIP_CNTL"
4595
  },
4596
  {
4597
   "chips": ["gfx8"],
4598
   "map": {"at": 165908, "to": "mm"},
4599
   "name": "PA_SU_SC_MODE_CNTL",
4600
   "type_ref": "PA_SU_SC_MODE_CNTL"
4601
  },
4602
  {
4603
   "chips": ["gfx8"],
4604
   "map": {"at": 165912, "to": "mm"},
4605
   "name": "PA_CL_VTE_CNTL",
4606
   "type_ref": "PA_CL_VTE_CNTL"
4607
  },
4608
  {
4609
   "chips": ["gfx8"],
4610
   "map": {"at": 165916, "to": "mm"},
4611
   "name": "PA_CL_VS_OUT_CNTL",
4612
   "type_ref": "PA_CL_VS_OUT_CNTL"
4613
  },
4614
  {
4615
   "chips": ["gfx8"],
4616
   "map": {"at": 165920, "to": "mm"},
4617
   "name": "PA_CL_NANINF_CNTL",
4618
   "type_ref": "PA_CL_NANINF_CNTL"
4619
  },
4620
  {
4621
   "chips": ["gfx8"],
4622
   "map": {"at": 165924, "to": "mm"},
4623
   "name": "PA_SU_LINE_STIPPLE_CNTL",
4624
   "type_ref": "PA_SU_LINE_STIPPLE_CNTL"
4625
  },
4626
  {
4627
   "chips": ["gfx8"],
4628
   "map": {"at": 165928, "to": "mm"},
4629
   "name": "PA_SU_LINE_STIPPLE_SCALE"
4630
  },
4631
  {
4632
   "chips": ["gfx8"],
4633
   "map": {"at": 165932, "to": "mm"},
4634
   "name": "PA_SU_PRIM_FILTER_CNTL",
4635
   "type_ref": "PA_SU_PRIM_FILTER_CNTL"
4636
  },
4637
  {
4638
   "chips": ["gfx8"],
4639
   "map": {"at": 166400, "to": "mm"},
4640
   "name": "PA_SU_POINT_SIZE",
4641
   "type_ref": "PA_SU_POINT_SIZE"
4642
  },
4643
  {
4644
   "chips": ["gfx8"],
4645
   "map": {"at": 166404, "to": "mm"},
4646
   "name": "PA_SU_POINT_MINMAX",
4647
   "type_ref": "PA_SU_POINT_MINMAX"
4648
  },
4649
  {
4650
   "chips": ["gfx8"],
4651
   "map": {"at": 166408, "to": "mm"},
4652
   "name": "PA_SU_LINE_CNTL",
4653
   "type_ref": "PA_SU_LINE_CNTL"
4654
  },
4655
  {
4656
   "chips": ["gfx8"],
4657
   "map": {"at": 166412, "to": "mm"},
4658
   "name": "PA_SC_LINE_STIPPLE",
4659
   "type_ref": "PA_SC_LINE_STIPPLE"
4660
  },
4661
  {
4662
   "chips": ["gfx8"],
4663
   "map": {"at": 166416, "to": "mm"},
4664
   "name": "VGT_OUTPUT_PATH_CNTL",
4665
   "type_ref": "VGT_OUTPUT_PATH_CNTL"
4666
  },
4667
  {
4668
   "chips": ["gfx8"],
4669
   "map": {"at": 166420, "to": "mm"},
4670
   "name": "VGT_HOS_CNTL",
4671
   "type_ref": "VGT_HOS_CNTL"
4672
  },
4673
  {
4674
   "chips": ["gfx8"],
4675
   "map": {"at": 166424, "to": "mm"},
4676
   "name": "VGT_HOS_MAX_TESS_LEVEL"
4677
  },
4678
  {
4679
   "chips": ["gfx8"],
4680
   "map": {"at": 166428, "to": "mm"},
4681
   "name": "VGT_HOS_MIN_TESS_LEVEL"
4682
  },
4683
  {
4684
   "chips": ["gfx8"],
4685
   "map": {"at": 166432, "to": "mm"},
4686
   "name": "VGT_HOS_REUSE_DEPTH",
4687
   "type_ref": "VGT_HOS_REUSE_DEPTH"
4688
  },
4689
  {
4690
   "chips": ["gfx8"],
4691
   "map": {"at": 166436, "to": "mm"},
4692
   "name": "VGT_GROUP_PRIM_TYPE",
4693
   "type_ref": "VGT_GROUP_PRIM_TYPE"
4694
  },
4695
  {
4696
   "chips": ["gfx8"],
4697
   "map": {"at": 166440, "to": "mm"},
4698
   "name": "VGT_GROUP_FIRST_DECR",
4699
   "type_ref": "VGT_GROUP_FIRST_DECR"
4700
  },
4701
  {
4702
   "chips": ["gfx8"],
4703
   "map": {"at": 166444, "to": "mm"},
4704
   "name": "VGT_GROUP_DECR",
4705
   "type_ref": "VGT_GROUP_DECR"
4706
  },
4707
  {
4708
   "chips": ["gfx8"],
4709
   "map": {"at": 166448, "to": "mm"},
4710
   "name": "VGT_GROUP_VECT_0_CNTL",
4711
   "type_ref": "VGT_GROUP_VECT_0_CNTL"
4712
  },
4713
  {
4714
   "chips": ["gfx8"],
4715
   "map": {"at": 166452, "to": "mm"},
4716
   "name": "VGT_GROUP_VECT_1_CNTL",
4717
   "type_ref": "VGT_GROUP_VECT_0_CNTL"
4718
  },
4719
  {
4720
   "chips": ["gfx8"],
4721
   "map": {"at": 166456, "to": "mm"},
4722
   "name": "VGT_GROUP_VECT_0_FMT_CNTL",
4723
   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
4724
  },
4725
  {
4726
   "chips": ["gfx8"],
4727
   "map": {"at": 166460, "to": "mm"},
4728
   "name": "VGT_GROUP_VECT_1_FMT_CNTL",
4729
   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
4730
  },
4731
  {
4732
   "chips": ["gfx8"],
4733
   "map": {"at": 166464, "to": "mm"},
4734
   "name": "VGT_GS_MODE",
4735
   "type_ref": "VGT_GS_MODE"
4736
  },
4737
  {
4738
   "chips": ["gfx8"],
4739
   "map": {"at": 166468, "to": "mm"},
4740
   "name": "VGT_GS_ONCHIP_CNTL",
4741
   "type_ref": "VGT_GS_ONCHIP_CNTL"
4742
  },
4743
  {
4744
   "chips": ["gfx8"],
4745
   "map": {"at": 166472, "to": "mm"},
4746
   "name": "PA_SC_MODE_CNTL_0",
4747
   "type_ref": "PA_SC_MODE_CNTL_0"
4748
  },
4749
  {
4750
   "chips": ["gfx8"],
4751
   "map": {"at": 166476, "to": "mm"},
4752
   "name": "PA_SC_MODE_CNTL_1",
4753
   "type_ref": "PA_SC_MODE_CNTL_1"
4754
  },
4755
  {
4756
   "chips": ["gfx8"],
4757
   "map": {"at": 166480, "to": "mm"},
4758
   "name": "VGT_ENHANCE"
4759
  },
4760
  {
4761
   "chips": ["gfx8"],
4762
   "map": {"at": 166484, "to": "mm"},
4763
   "name": "VGT_GS_PER_ES",
4764
   "type_ref": "VGT_GS_PER_ES"
4765
  },
4766
  {
4767
   "chips": ["gfx8"],
4768
   "map": {"at": 166488, "to": "mm"},
4769
   "name": "VGT_ES_PER_GS",
4770
   "type_ref": "VGT_ES_PER_GS"
4771
  },
4772
  {
4773
   "chips": ["gfx8"],
4774
   "map": {"at": 166492, "to": "mm"},
4775
   "name": "VGT_GS_PER_VS",
4776
   "type_ref": "VGT_GS_PER_VS"
4777
  },
4778
  {
4779
   "chips": ["gfx8"],
4780
   "map": {"at": 166496, "to": "mm"},
4781
   "name": "VGT_GSVS_RING_OFFSET_1",
4782
   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4783
  },
4784
  {
4785
   "chips": ["gfx8"],
4786
   "map": {"at": 166500, "to": "mm"},
4787
   "name": "VGT_GSVS_RING_OFFSET_2",
4788
   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4789
  },
4790
  {
4791
   "chips": ["gfx8"],
4792
   "map": {"at": 166504, "to": "mm"},
4793
   "name": "VGT_GSVS_RING_OFFSET_3",
4794
   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4795
  },
4796
  {
4797
   "chips": ["gfx8"],
4798
   "map": {"at": 166508, "to": "mm"},
4799
   "name": "VGT_GS_OUT_PRIM_TYPE",
4800
   "type_ref": "VGT_GS_OUT_PRIM_TYPE"
4801
  },
4802
  {
4803
   "chips": ["gfx8"],
4804
   "map": {"at": 166512, "to": "mm"},
4805
   "name": "IA_ENHANCE"
4806
  },
4807
  {
4808
   "chips": ["gfx8"],
4809
   "map": {"at": 166516, "to": "mm"},
4810
   "name": "VGT_DMA_SIZE"
4811
  },
4812
  {
4813
   "chips": ["gfx8"],
4814
   "map": {"at": 166520, "to": "mm"},
4815
   "name": "VGT_DMA_MAX_SIZE"
4816
  },
4817
  {
4818
   "chips": ["gfx8"],
4819
   "map": {"at": 166524, "to": "mm"},
4820
   "name": "VGT_DMA_INDEX_TYPE",
4821
   "type_ref": "VGT_DMA_INDEX_TYPE"
4822
  },
4823
  {
4824
   "chips": ["gfx8"],
4825
   "map": {"at": 166528, "to": "mm"},
4826
   "name": "WD_ENHANCE"
4827
  },
4828
  {
4829
   "chips": ["gfx8"],
4830
   "map": {"at": 166532, "to": "mm"},
4831
   "name": "VGT_PRIMITIVEID_EN",
4832
   "type_ref": "VGT_PRIMITIVEID_EN"
4833
  },
4834
  {
4835
   "chips": ["gfx8"],
4836
   "map": {"at": 166536, "to": "mm"},
4837
   "name": "VGT_DMA_NUM_INSTANCES"
4838
  },
4839
  {
4840
   "chips": ["gfx8"],
4841
   "map": {"at": 166540, "to": "mm"},
4842
   "name": "VGT_PRIMITIVEID_RESET"
4843
  },
4844
  {
4845
   "chips": ["gfx8"],
4846
   "map": {"at": 166544, "to": "mm"},
4847
   "name": "VGT_EVENT_INITIATOR",
4848
   "type_ref": "VGT_EVENT_INITIATOR"
4849
  },
4850
  {
4851
   "chips": ["gfx8"],
4852
   "map": {"at": 166548, "to": "mm"},
4853
   "name": "VGT_MULTI_PRIM_IB_RESET_EN",
4854
   "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"
4855
  },
4856
  {
4857
   "chips": ["gfx8"],
4858
   "map": {"at": 166560, "to": "mm"},
4859
   "name": "VGT_INSTANCE_STEP_RATE_0"
4860
  },
4861
  {
4862
   "chips": ["gfx8"],
4863
   "map": {"at": 166564, "to": "mm"},
4864
   "name": "VGT_INSTANCE_STEP_RATE_1"
4865
  },
4866
  {
4867
   "chips": ["gfx8"],
4868
   "map": {"at": 166568, "to": "mm"},
4869
   "name": "IA_MULTI_VGT_PARAM",
4870
   "type_ref": "IA_MULTI_VGT_PARAM"
4871
  },
4872
  {
4873
   "chips": ["gfx8"],
4874
   "map": {"at": 166572, "to": "mm"},
4875
   "name": "VGT_ESGS_RING_ITEMSIZE",
4876
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
4877
  },
4878
  {
4879
   "chips": ["gfx8"],
4880
   "map": {"at": 166576, "to": "mm"},
4881
   "name": "VGT_GSVS_RING_ITEMSIZE",
4882
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
4883
  },
4884
  {
4885
   "chips": ["gfx8"],
4886
   "map": {"at": 166580, "to": "mm"},
4887
   "name": "VGT_REUSE_OFF",
4888
   "type_ref": "VGT_REUSE_OFF"
4889
  },
4890
  {
4891
   "chips": ["gfx8"],
4892
   "map": {"at": 166584, "to": "mm"},
4893
   "name": "VGT_VTX_CNT_EN",
4894
   "type_ref": "VGT_VTX_CNT_EN"
4895
  },
4896
  {
4897
   "chips": ["gfx8"],
4898
   "map": {"at": 166588, "to": "mm"},
4899
   "name": "DB_HTILE_SURFACE",
4900
   "type_ref": "DB_HTILE_SURFACE"
4901
  },
4902
  {
4903
   "chips": ["gfx8"],
4904
   "map": {"at": 166592, "to": "mm"},
4905
   "name": "DB_SRESULTS_COMPARE_STATE0",
4906
   "type_ref": "DB_SRESULTS_COMPARE_STATE0"
4907
  },
4908
  {
4909
   "chips": ["gfx8"],
4910
   "map": {"at": 166596, "to": "mm"},
4911
   "name": "DB_SRESULTS_COMPARE_STATE1",
4912
   "type_ref": "DB_SRESULTS_COMPARE_STATE1"
4913
  },
4914
  {
4915
   "chips": ["gfx8"],
4916
   "map": {"at": 166600, "to": "mm"},
4917
   "name": "DB_PRELOAD_CONTROL",
4918
   "type_ref": "DB_PRELOAD_CONTROL"
4919
  },
4920
  {
4921
   "chips": ["gfx8"],
4922
   "map": {"at": 166608, "to": "mm"},
4923
   "name": "VGT_STRMOUT_BUFFER_SIZE_0"
4924
  },
4925
  {
4926
   "chips": ["gfx8"],
4927
   "map": {"at": 166612, "to": "mm"},
4928
   "name": "VGT_STRMOUT_VTX_STRIDE_0",
4929
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4930
  },
4931
  {
4932
   "chips": ["gfx8"],
4933
   "map": {"at": 166620, "to": "mm"},
4934
   "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
4935
  },
4936
  {
4937
   "chips": ["gfx8"],
4938
   "map": {"at": 166624, "to": "mm"},
4939
   "name": "VGT_STRMOUT_BUFFER_SIZE_1"
4940
  },
4941
  {
4942
   "chips": ["gfx8"],
4943
   "map": {"at": 166628, "to": "mm"},
4944
   "name": "VGT_STRMOUT_VTX_STRIDE_1",
4945
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4946
  },
4947
  {
4948
   "chips": ["gfx8"],
4949
   "map": {"at": 166636, "to": "mm"},
4950
   "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
4951
  },
4952
  {
4953
   "chips": ["gfx8"],
4954
   "map": {"at": 166640, "to": "mm"},
4955
   "name": "VGT_STRMOUT_BUFFER_SIZE_2"
4956
  },
4957
  {
4958
   "chips": ["gfx8"],
4959
   "map": {"at": 166644, "to": "mm"},
4960
   "name": "VGT_STRMOUT_VTX_STRIDE_2",
4961
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4962
  },
4963
  {
4964
   "chips": ["gfx8"],
4965
   "map": {"at": 166652, "to": "mm"},
4966
   "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
4967
  },
4968
  {
4969
   "chips": ["gfx8"],
4970
   "map": {"at": 166656, "to": "mm"},
4971
   "name": "VGT_STRMOUT_BUFFER_SIZE_3"
4972
  },
4973
  {
4974
   "chips": ["gfx8"],
4975
   "map": {"at": 166660, "to": "mm"},
4976
   "name": "VGT_STRMOUT_VTX_STRIDE_3",
4977
   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4978
  },
4979
  {
4980
   "chips": ["gfx8"],
4981
   "map": {"at": 166668, "to": "mm"},
4982
   "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
4983
  },
4984
  {
4985
   "chips": ["gfx8"],
4986
   "map": {"at": 166696, "to": "mm"},
4987
   "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
4988
  },
4989
  {
4990
   "chips": ["gfx8"],
4991
   "map": {"at": 166700, "to": "mm"},
4992
   "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
4993
  },
4994
  {
4995
   "chips": ["gfx8"],
4996
   "map": {"at": 166704, "to": "mm"},
4997
   "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
4998
   "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"
4999
  },
5000
  {
5001
   "chips": ["gfx8"],
5002
   "map": {"at": 166712, "to": "mm"},
5003
   "name": "VGT_GS_MAX_VERT_OUT",
5004
   "type_ref": "VGT_GS_MAX_VERT_OUT"
5005
  },
5006
  {
5007
   "chips": ["gfx8"],
5008
   "map": {"at": 166736, "to": "mm"},
5009
   "name": "VGT_TESS_DISTRIBUTION",
5010
   "type_ref": "VGT_TESS_DISTRIBUTION"
5011
  },
5012
  {
5013
   "chips": ["gfx8"],
5014
   "map": {"at": 166740, "to": "mm"},
5015
   "name": "VGT_SHADER_STAGES_EN",
5016
   "type_ref": "VGT_SHADER_STAGES_EN"
5017
  },
5018
  {
5019
   "chips": ["gfx8"],
5020
   "map": {"at": 166744, "to": "mm"},
5021
   "name": "VGT_LS_HS_CONFIG",
5022
   "type_ref": "VGT_LS_HS_CONFIG"
5023
  },
5024
  {
5025
   "chips": ["gfx8"],
5026
   "map": {"at": 166748, "to": "mm"},
5027
   "name": "VGT_GS_VERT_ITEMSIZE",
5028
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5029
  },
5030
  {
5031
   "chips": ["gfx8"],
5032
   "map": {"at": 166752, "to": "mm"},
5033
   "name": "VGT_GS_VERT_ITEMSIZE_1",
5034
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5035
  },
5036
  {
5037
   "chips": ["gfx8"],
5038
   "map": {"at": 166756, "to": "mm"},
5039
   "name": "VGT_GS_VERT_ITEMSIZE_2",
5040
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5041
  },
5042
  {
5043
   "chips": ["gfx8"],
5044
   "map": {"at": 166760, "to": "mm"},
5045
   "name": "VGT_GS_VERT_ITEMSIZE_3",
5046
   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5047
  },
5048
  {
5049
   "chips": ["gfx8"],
5050
   "map": {"at": 166764, "to": "mm"},
5051
   "name": "VGT_TF_PARAM",
5052
   "type_ref": "VGT_TF_PARAM"
5053
  },
5054
  {
5055
   "chips": ["gfx8"],
5056
   "map": {"at": 166768, "to": "mm"},
5057
   "name": "DB_ALPHA_TO_MASK",
5058
   "type_ref": "DB_ALPHA_TO_MASK"
5059
  },
5060
  {
5061
   "chips": ["gfx8"],
5062
   "map": {"at": 166772, "to": "mm"},
5063
   "name": "VGT_DISPATCH_DRAW_INDEX"
5064
  },
5065
  {
5066
   "chips": ["gfx8"],
5067
   "map": {"at": 166776, "to": "mm"},
5068
   "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5069
   "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"
5070
  },
5071
  {
5072
   "chips": ["gfx8"],
5073
   "map": {"at": 166780, "to": "mm"},
5074
   "name": "PA_SU_POLY_OFFSET_CLAMP"
5075
  },
5076
  {
5077
   "chips": ["gfx8"],
5078
   "map": {"at": 166784, "to": "mm"},
5079
   "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5080
  },
5081
  {
5082
   "chips": ["gfx8"],
5083
   "map": {"at": 166788, "to": "mm"},
5084
   "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5085
  },
5086
  {
5087
   "chips": ["gfx8"],
5088
   "map": {"at": 166792, "to": "mm"},
5089
   "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5090
  },
5091
  {
5092
   "chips": ["gfx8"],
5093
   "map": {"at": 166796, "to": "mm"},
5094
   "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5095
  },
5096
  {
5097
   "chips": ["gfx8"],
5098
   "map": {"at": 166800, "to": "mm"},
5099
   "name": "VGT_GS_INSTANCE_CNT",
5100
   "type_ref": "VGT_GS_INSTANCE_CNT"
5101
  },
5102
  {
5103
   "chips": ["gfx8"],
5104
   "map": {"at": 166804, "to": "mm"},
5105
   "name": "VGT_STRMOUT_CONFIG",
5106
   "type_ref": "VGT_STRMOUT_CONFIG"
5107
  },
5108
  {
5109
   "chips": ["gfx8"],
5110
   "map": {"at": 166808, "to": "mm"},
5111
   "name": "VGT_STRMOUT_BUFFER_CONFIG",
5112
   "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"
5113
  },
5114
  {
5115
   "chips": ["gfx8"],
5116
   "map": {"at": 166868, "to": "mm"},
5117
   "name": "PA_SC_CENTROID_PRIORITY_0",
5118
   "type_ref": "PA_SC_CENTROID_PRIORITY_0"
5119
  },
5120
  {
5121
   "chips": ["gfx8"],
5122
   "map": {"at": 166872, "to": "mm"},
5123
   "name": "PA_SC_CENTROID_PRIORITY_1",
5124
   "type_ref": "PA_SC_CENTROID_PRIORITY_1"
5125
  },
5126
  {
5127
   "chips": ["gfx8"],
5128
   "map": {"at": 166876, "to": "mm"},
5129
   "name": "PA_SC_LINE_CNTL",
5130
   "type_ref": "PA_SC_LINE_CNTL"
5131
  },
5132
  {
5133
   "chips": ["gfx8"],
5134
   "map": {"at": 166880, "to": "mm"},
5135
   "name": "PA_SC_AA_CONFIG",
5136
   "type_ref": "PA_SC_AA_CONFIG"
5137
  },
5138
  {
5139
   "chips": ["gfx8"],
5140
   "map": {"at": 166884, "to": "mm"},
5141
   "name": "PA_SU_VTX_CNTL",
5142
   "type_ref": "PA_SU_VTX_CNTL"
5143
  },
5144
  {
5145
   "chips": ["gfx8"],
5146
   "map": {"at": 166888, "to": "mm"},
5147
   "name": "PA_CL_GB_VERT_CLIP_ADJ"
5148
  },
5149
  {
5150
   "chips": ["gfx8"],
5151
   "map": {"at": 166892, "to": "mm"},
5152
   "name": "PA_CL_GB_VERT_DISC_ADJ"
5153
  },
5154
  {
5155
   "chips": ["gfx8"],
5156
   "map": {"at": 166896, "to": "mm"},
5157
   "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5158
  },
5159
  {
5160
   "chips": ["gfx8"],
5161
   "map": {"at": 166900, "to": "mm"},
5162
   "name": "PA_CL_GB_HORZ_DISC_ADJ"
5163
  },
5164
  {
5165
   "chips": ["gfx8"],
5166
   "map": {"at": 166904, "to": "mm"},
5167
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5168
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5169
  },
5170
  {
5171
   "chips": ["gfx8"],
5172
   "map": {"at": 166908, "to": "mm"},
5173
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5174
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5175
  },
5176
  {
5177
   "chips": ["gfx8"],
5178
   "map": {"at": 166912, "to": "mm"},
5179
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5180
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5181
  },
5182
  {
5183
   "chips": ["gfx8"],
5184
   "map": {"at": 166916, "to": "mm"},
5185
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5186
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5187
  },
5188
  {
5189
   "chips": ["gfx8"],
5190
   "map": {"at": 166920, "to": "mm"},
5191
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5192
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5193
  },
5194
  {
5195
   "chips": ["gfx8"],
5196
   "map": {"at": 166924, "to": "mm"},
5197
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5198
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5199
  },
5200
  {
5201
   "chips": ["gfx8"],
5202
   "map": {"at": 166928, "to": "mm"},
5203
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5204
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5205
  },
5206
  {
5207
   "chips": ["gfx8"],
5208
   "map": {"at": 166932, "to": "mm"},
5209
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5210
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5211
  },
5212
  {
5213
   "chips": ["gfx8"],
5214
   "map": {"at": 166936, "to": "mm"},
5215
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5216
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5217
  },
5218
  {
5219
   "chips": ["gfx8"],
5220
   "map": {"at": 166940, "to": "mm"},
5221
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5222
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5223
  },
5224
  {
5225
   "chips": ["gfx8"],
5226
   "map": {"at": 166944, "to": "mm"},
5227
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5228
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5229
  },
5230
  {
5231
   "chips": ["gfx8"],
5232
   "map": {"at": 166948, "to": "mm"},
5233
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5234
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5235
  },
5236
  {
5237
   "chips": ["gfx8"],
5238
   "map": {"at": 166952, "to": "mm"},
5239
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5240
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5241
  },
5242
  {
5243
   "chips": ["gfx8"],
5244
   "map": {"at": 166956, "to": "mm"},
5245
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5246
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5247
  },
5248
  {
5249
   "chips": ["gfx8"],
5250
   "map": {"at": 166960, "to": "mm"},
5251
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5252
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5253
  },
5254
  {
5255
   "chips": ["gfx8"],
5256
   "map": {"at": 166964, "to": "mm"},
5257
   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5258
   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5259
  },
5260
  {
5261
   "chips": ["gfx8"],
5262
   "map": {"at": 166968, "to": "mm"},
5263
   "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5264
   "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"
5265
  },
5266
  {
5267
   "chips": ["gfx8"],
5268
   "map": {"at": 166972, "to": "mm"},
5269
   "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5270
   "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"
5271
  },
5272
  {
5273
   "chips": ["gfx8"],
5274
   "map": {"at": 167000, "to": "mm"},
5275
   "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5276
   "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"
5277
  },
5278
  {
5279
   "chips": ["gfx8"],
5280
   "map": {"at": 167004, "to": "mm"},
5281
   "name": "VGT_OUT_DEALLOC_CNTL",
5282
   "type_ref": "VGT_OUT_DEALLOC_CNTL"
5283
  },
5284
  {
5285
   "chips": ["gfx8"],
5286
   "map": {"at": 167008, "to": "mm"},
5287
   "name": "CB_COLOR0_BASE"
5288
  },
5289
  {
5290
   "chips": ["gfx8"],
5291
   "map": {"at": 167012, "to": "mm"},
5292
   "name": "CB_COLOR0_PITCH",
5293
   "type_ref": "CB_COLOR0_PITCH"
5294
  },
5295
  {
5296
   "chips": ["gfx8"],
5297
   "map": {"at": 167016, "to": "mm"},
5298
   "name": "CB_COLOR0_SLICE",
5299
   "type_ref": "CB_COLOR0_SLICE"
5300
  },
5301
  {
5302
   "chips": ["gfx8"],
5303
   "map": {"at": 167020, "to": "mm"},
5304
   "name": "CB_COLOR0_VIEW",
5305
   "type_ref": "CB_COLOR0_VIEW"
5306
  },
5307
  {
5308
   "chips": ["gfx8"],
5309
   "map": {"at": 167024, "to": "mm"},
5310
   "name": "CB_COLOR0_INFO",
5311
   "type_ref": "CB_COLOR0_INFO"
5312
  },
5313
  {
5314
   "chips": ["gfx8"],
5315
   "map": {"at": 167028, "to": "mm"},
5316
   "name": "CB_COLOR0_ATTRIB",
5317
   "type_ref": "CB_COLOR0_ATTRIB"
5318
  },
5319
  {
5320
   "chips": ["gfx8"],
5321
   "map": {"at": 167032, "to": "mm"},
5322
   "name": "CB_COLOR0_DCC_CONTROL",
5323
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5324
  },
5325
  {
5326
   "chips": ["gfx8"],
5327
   "map": {"at": 167036, "to": "mm"},
5328
   "name": "CB_COLOR0_CMASK"
5329
  },
5330
  {
5331
   "chips": ["gfx8"],
5332
   "map": {"at": 167040, "to": "mm"},
5333
   "name": "CB_COLOR0_CMASK_SLICE",
5334
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5335
  },
5336
  {
5337
   "chips": ["gfx8"],
5338
   "map": {"at": 167044, "to": "mm"},
5339
   "name": "CB_COLOR0_FMASK"
5340
  },
5341
  {
5342
   "chips": ["gfx8"],
5343
   "map": {"at": 167048, "to": "mm"},
5344
   "name": "CB_COLOR0_FMASK_SLICE",
5345
   "type_ref": "CB_COLOR0_SLICE"
5346
  },
5347
  {
5348
   "chips": ["gfx8"],
5349
   "map": {"at": 167052, "to": "mm"},
5350
   "name": "CB_COLOR0_CLEAR_WORD0"
5351
  },
5352
  {
5353
   "chips": ["gfx8"],
5354
   "map": {"at": 167056, "to": "mm"},
5355
   "name": "CB_COLOR0_CLEAR_WORD1"
5356
  },
5357
  {
5358
   "chips": ["gfx8"],
5359
   "map": {"at": 167060, "to": "mm"},
5360
   "name": "CB_COLOR0_DCC_BASE"
5361
  },
5362
  {
5363
   "chips": ["gfx8"],
5364
   "map": {"at": 167068, "to": "mm"},
5365
   "name": "CB_COLOR1_BASE"
5366
  },
5367
  {
5368
   "chips": ["gfx8"],
5369
   "map": {"at": 167072, "to": "mm"},
5370
   "name": "CB_COLOR1_PITCH",
5371
   "type_ref": "CB_COLOR0_PITCH"
5372
  },
5373
  {
5374
   "chips": ["gfx8"],
5375
   "map": {"at": 167076, "to": "mm"},
5376
   "name": "CB_COLOR1_SLICE",
5377
   "type_ref": "CB_COLOR0_SLICE"
5378
  },
5379
  {
5380
   "chips": ["gfx8"],
5381
   "map": {"at": 167080, "to": "mm"},
5382
   "name": "CB_COLOR1_VIEW",
5383
   "type_ref": "CB_COLOR0_VIEW"
5384
  },
5385
  {
5386
   "chips": ["gfx8"],
5387
   "map": {"at": 167084, "to": "mm"},
5388
   "name": "CB_COLOR1_INFO",
5389
   "type_ref": "CB_COLOR0_INFO"
5390
  },
5391
  {
5392
   "chips": ["gfx8"],
5393
   "map": {"at": 167088, "to": "mm"},
5394
   "name": "CB_COLOR1_ATTRIB",
5395
   "type_ref": "CB_COLOR0_ATTRIB"
5396
  },
5397
  {
5398
   "chips": ["gfx8"],
5399
   "map": {"at": 167092, "to": "mm"},
5400
   "name": "CB_COLOR1_DCC_CONTROL",
5401
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5402
  },
5403
  {
5404
   "chips": ["gfx8"],
5405
   "map": {"at": 167096, "to": "mm"},
5406
   "name": "CB_COLOR1_CMASK"
5407
  },
5408
  {
5409
   "chips": ["gfx8"],
5410
   "map": {"at": 167100, "to": "mm"},
5411
   "name": "CB_COLOR1_CMASK_SLICE",
5412
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5413
  },
5414
  {
5415
   "chips": ["gfx8"],
5416
   "map": {"at": 167104, "to": "mm"},
5417
   "name": "CB_COLOR1_FMASK"
5418
  },
5419
  {
5420
   "chips": ["gfx8"],
5421
   "map": {"at": 167108, "to": "mm"},
5422
   "name": "CB_COLOR1_FMASK_SLICE",
5423
   "type_ref": "CB_COLOR0_SLICE"
5424
  },
5425
  {
5426
   "chips": ["gfx8"],
5427
   "map": {"at": 167112, "to": "mm"},
5428
   "name": "CB_COLOR1_CLEAR_WORD0"
5429
  },
5430
  {
5431
   "chips": ["gfx8"],
5432
   "map": {"at": 167116, "to": "mm"},
5433
   "name": "CB_COLOR1_CLEAR_WORD1"
5434
  },
5435
  {
5436
   "chips": ["gfx8"],
5437
   "map": {"at": 167120, "to": "mm"},
5438
   "name": "CB_COLOR1_DCC_BASE"
5439
  },
5440
  {
5441
   "chips": ["gfx8"],
5442
   "map": {"at": 167128, "to": "mm"},
5443
   "name": "CB_COLOR2_BASE"
5444
  },
5445
  {
5446
   "chips": ["gfx8"],
5447
   "map": {"at": 167132, "to": "mm"},
5448
   "name": "CB_COLOR2_PITCH",
5449
   "type_ref": "CB_COLOR0_PITCH"
5450
  },
5451
  {
5452
   "chips": ["gfx8"],
5453
   "map": {"at": 167136, "to": "mm"},
5454
   "name": "CB_COLOR2_SLICE",
5455
   "type_ref": "CB_COLOR0_SLICE"
5456
  },
5457
  {
5458
   "chips": ["gfx8"],
5459
   "map": {"at": 167140, "to": "mm"},
5460
   "name": "CB_COLOR2_VIEW",
5461
   "type_ref": "CB_COLOR0_VIEW"
5462
  },
5463
  {
5464
   "chips": ["gfx8"],
5465
   "map": {"at": 167144, "to": "mm"},
5466
   "name": "CB_COLOR2_INFO",
5467
   "type_ref": "CB_COLOR0_INFO"
5468
  },
5469
  {
5470
   "chips": ["gfx8"],
5471
   "map": {"at": 167148, "to": "mm"},
5472
   "name": "CB_COLOR2_ATTRIB",
5473
   "type_ref": "CB_COLOR0_ATTRIB"
5474
  },
5475
  {
5476
   "chips": ["gfx8"],
5477
   "map": {"at": 167152, "to": "mm"},
5478
   "name": "CB_COLOR2_DCC_CONTROL",
5479
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5480
  },
5481
  {
5482
   "chips": ["gfx8"],
5483
   "map": {"at": 167156, "to": "mm"},
5484
   "name": "CB_COLOR2_CMASK"
5485
  },
5486
  {
5487
   "chips": ["gfx8"],
5488
   "map": {"at": 167160, "to": "mm"},
5489
   "name": "CB_COLOR2_CMASK_SLICE",
5490
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5491
  },
5492
  {
5493
   "chips": ["gfx8"],
5494
   "map": {"at": 167164, "to": "mm"},
5495
   "name": "CB_COLOR2_FMASK"
5496
  },
5497
  {
5498
   "chips": ["gfx8"],
5499
   "map": {"at": 167168, "to": "mm"},
5500
   "name": "CB_COLOR2_FMASK_SLICE",
5501
   "type_ref": "CB_COLOR0_SLICE"
5502
  },
5503
  {
5504
   "chips": ["gfx8"],
5505
   "map": {"at": 167172, "to": "mm"},
5506
   "name": "CB_COLOR2_CLEAR_WORD0"
5507
  },
5508
  {
5509
   "chips": ["gfx8"],
5510
   "map": {"at": 167176, "to": "mm"},
5511
   "name": "CB_COLOR2_CLEAR_WORD1"
5512
  },
5513
  {
5514
   "chips": ["gfx8"],
5515
   "map": {"at": 167180, "to": "mm"},
5516
   "name": "CB_COLOR2_DCC_BASE"
5517
  },
5518
  {
5519
   "chips": ["gfx8"],
5520
   "map": {"at": 167188, "to": "mm"},
5521
   "name": "CB_COLOR3_BASE"
5522
  },
5523
  {
5524
   "chips": ["gfx8"],
5525
   "map": {"at": 167192, "to": "mm"},
5526
   "name": "CB_COLOR3_PITCH",
5527
   "type_ref": "CB_COLOR0_PITCH"
5528
  },
5529
  {
5530
   "chips": ["gfx8"],
5531
   "map": {"at": 167196, "to": "mm"},
5532
   "name": "CB_COLOR3_SLICE",
5533
   "type_ref": "CB_COLOR0_SLICE"
5534
  },
5535
  {
5536
   "chips": ["gfx8"],
5537
   "map": {"at": 167200, "to": "mm"},
5538
   "name": "CB_COLOR3_VIEW",
5539
   "type_ref": "CB_COLOR0_VIEW"
5540
  },
5541
  {
5542
   "chips": ["gfx8"],
5543
   "map": {"at": 167204, "to": "mm"},
5544
   "name": "CB_COLOR3_INFO",
5545
   "type_ref": "CB_COLOR0_INFO"
5546
  },
5547
  {
5548
   "chips": ["gfx8"],
5549
   "map": {"at": 167208, "to": "mm"},
5550
   "name": "CB_COLOR3_ATTRIB",
5551
   "type_ref": "CB_COLOR0_ATTRIB"
5552
  },
5553
  {
5554
   "chips": ["gfx8"],
5555
   "map": {"at": 167212, "to": "mm"},
5556
   "name": "CB_COLOR3_DCC_CONTROL",
5557
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5558
  },
5559
  {
5560
   "chips": ["gfx8"],
5561
   "map": {"at": 167216, "to": "mm"},
5562
   "name": "CB_COLOR3_CMASK"
5563
  },
5564
  {
5565
   "chips": ["gfx8"],
5566
   "map": {"at": 167220, "to": "mm"},
5567
   "name": "CB_COLOR3_CMASK_SLICE",
5568
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5569
  },
5570
  {
5571
   "chips": ["gfx8"],
5572
   "map": {"at": 167224, "to": "mm"},
5573
   "name": "CB_COLOR3_FMASK"
5574
  },
5575
  {
5576
   "chips": ["gfx8"],
5577
   "map": {"at": 167228, "to": "mm"},
5578
   "name": "CB_COLOR3_FMASK_SLICE",
5579
   "type_ref": "CB_COLOR0_SLICE"
5580
  },
5581
  {
5582
   "chips": ["gfx8"],
5583
   "map": {"at": 167232, "to": "mm"},
5584
   "name": "CB_COLOR3_CLEAR_WORD0"
5585
  },
5586
  {
5587
   "chips": ["gfx8"],
5588
   "map": {"at": 167236, "to": "mm"},
5589
   "name": "CB_COLOR3_CLEAR_WORD1"
5590
  },
5591
  {
5592
   "chips": ["gfx8"],
5593
   "map": {"at": 167240, "to": "mm"},
5594
   "name": "CB_COLOR3_DCC_BASE"
5595
  },
5596
  {
5597
   "chips": ["gfx8"],
5598
   "map": {"at": 167248, "to": "mm"},
5599
   "name": "CB_COLOR4_BASE"
5600
  },
5601
  {
5602
   "chips": ["gfx8"],
5603
   "map": {"at": 167252, "to": "mm"},
5604
   "name": "CB_COLOR4_PITCH",
5605
   "type_ref": "CB_COLOR0_PITCH"
5606
  },
5607
  {
5608
   "chips": ["gfx8"],
5609
   "map": {"at": 167256, "to": "mm"},
5610
   "name": "CB_COLOR4_SLICE",
5611
   "type_ref": "CB_COLOR0_SLICE"
5612
  },
5613
  {
5614
   "chips": ["gfx8"],
5615
   "map": {"at": 167260, "to": "mm"},
5616
   "name": "CB_COLOR4_VIEW",
5617
   "type_ref": "CB_COLOR0_VIEW"
5618
  },
5619
  {
5620
   "chips": ["gfx8"],
5621
   "map": {"at": 167264, "to": "mm"},
5622
   "name": "CB_COLOR4_INFO",
5623
   "type_ref": "CB_COLOR0_INFO"
5624
  },
5625
  {
5626
   "chips": ["gfx8"],
5627
   "map": {"at": 167268, "to": "mm"},
5628
   "name": "CB_COLOR4_ATTRIB",
5629
   "type_ref": "CB_COLOR0_ATTRIB"
5630
  },
5631
  {
5632
   "chips": ["gfx8"],
5633
   "map": {"at": 167272, "to": "mm"},
5634
   "name": "CB_COLOR4_DCC_CONTROL",
5635
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5636
  },
5637
  {
5638
   "chips": ["gfx8"],
5639
   "map": {"at": 167276, "to": "mm"},
5640
   "name": "CB_COLOR4_CMASK"
5641
  },
5642
  {
5643
   "chips": ["gfx8"],
5644
   "map": {"at": 167280, "to": "mm"},
5645
   "name": "CB_COLOR4_CMASK_SLICE",
5646
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5647
  },
5648
  {
5649
   "chips": ["gfx8"],
5650
   "map": {"at": 167284, "to": "mm"},
5651
   "name": "CB_COLOR4_FMASK"
5652
  },
5653
  {
5654
   "chips": ["gfx8"],
5655
   "map": {"at": 167288, "to": "mm"},
5656
   "name": "CB_COLOR4_FMASK_SLICE",
5657
   "type_ref": "CB_COLOR0_SLICE"
5658
  },
5659
  {
5660
   "chips": ["gfx8"],
5661
   "map": {"at": 167292, "to": "mm"},
5662
   "name": "CB_COLOR4_CLEAR_WORD0"
5663
  },
5664
  {
5665
   "chips": ["gfx8"],
5666
   "map": {"at": 167296, "to": "mm"},
5667
   "name": "CB_COLOR4_CLEAR_WORD1"
5668
  },
5669
  {
5670
   "chips": ["gfx8"],
5671
   "map": {"at": 167300, "to": "mm"},
5672
   "name": "CB_COLOR4_DCC_BASE"
5673
  },
5674
  {
5675
   "chips": ["gfx8"],
5676
   "map": {"at": 167308, "to": "mm"},
5677
   "name": "CB_COLOR5_BASE"
5678
  },
5679
  {
5680
   "chips": ["gfx8"],
5681
   "map": {"at": 167312, "to": "mm"},
5682
   "name": "CB_COLOR5_PITCH",
5683
   "type_ref": "CB_COLOR0_PITCH"
5684
  },
5685
  {
5686
   "chips": ["gfx8"],
5687
   "map": {"at": 167316, "to": "mm"},
5688
   "name": "CB_COLOR5_SLICE",
5689
   "type_ref": "CB_COLOR0_SLICE"
5690
  },
5691
  {
5692
   "chips": ["gfx8"],
5693
   "map": {"at": 167320, "to": "mm"},
5694
   "name": "CB_COLOR5_VIEW",
5695
   "type_ref": "CB_COLOR0_VIEW"
5696
  },
5697
  {
5698
   "chips": ["gfx8"],
5699
   "map": {"at": 167324, "to": "mm"},
5700
   "name": "CB_COLOR5_INFO",
5701
   "type_ref": "CB_COLOR0_INFO"
5702
  },
5703
  {
5704
   "chips": ["gfx8"],
5705
   "map": {"at": 167328, "to": "mm"},
5706
   "name": "CB_COLOR5_ATTRIB",
5707
   "type_ref": "CB_COLOR0_ATTRIB"
5708
  },
5709
  {
5710
   "chips": ["gfx8"],
5711
   "map": {"at": 167332, "to": "mm"},
5712
   "name": "CB_COLOR5_DCC_CONTROL",
5713
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5714
  },
5715
  {
5716
   "chips": ["gfx8"],
5717
   "map": {"at": 167336, "to": "mm"},
5718
   "name": "CB_COLOR5_CMASK"
5719
  },
5720
  {
5721
   "chips": ["gfx8"],
5722
   "map": {"at": 167340, "to": "mm"},
5723
   "name": "CB_COLOR5_CMASK_SLICE",
5724
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5725
  },
5726
  {
5727
   "chips": ["gfx8"],
5728
   "map": {"at": 167344, "to": "mm"},
5729
   "name": "CB_COLOR5_FMASK"
5730
  },
5731
  {
5732
   "chips": ["gfx8"],
5733
   "map": {"at": 167348, "to": "mm"},
5734
   "name": "CB_COLOR5_FMASK_SLICE",
5735
   "type_ref": "CB_COLOR0_SLICE"
5736
  },
5737
  {
5738
   "chips": ["gfx8"],
5739
   "map": {"at": 167352, "to": "mm"},
5740
   "name": "CB_COLOR5_CLEAR_WORD0"
5741
  },
5742
  {
5743
   "chips": ["gfx8"],
5744
   "map": {"at": 167356, "to": "mm"},
5745
   "name": "CB_COLOR5_CLEAR_WORD1"
5746
  },
5747
  {
5748
   "chips": ["gfx8"],
5749
   "map": {"at": 167360, "to": "mm"},
5750
   "name": "CB_COLOR5_DCC_BASE"
5751
  },
5752
  {
5753
   "chips": ["gfx8"],
5754
   "map": {"at": 167368, "to": "mm"},
5755
   "name": "CB_COLOR6_BASE"
5756
  },
5757
  {
5758
   "chips": ["gfx8"],
5759
   "map": {"at": 167372, "to": "mm"},
5760
   "name": "CB_COLOR6_PITCH",
5761
   "type_ref": "CB_COLOR0_PITCH"
5762
  },
5763
  {
5764
   "chips": ["gfx8"],
5765
   "map": {"at": 167376, "to": "mm"},
5766
   "name": "CB_COLOR6_SLICE",
5767
   "type_ref": "CB_COLOR0_SLICE"
5768
  },
5769
  {
5770
   "chips": ["gfx8"],
5771
   "map": {"at": 167380, "to": "mm"},
5772
   "name": "CB_COLOR6_VIEW",
5773
   "type_ref": "CB_COLOR0_VIEW"
5774
  },
5775
  {
5776
   "chips": ["gfx8"],
5777
   "map": {"at": 167384, "to": "mm"},
5778
   "name": "CB_COLOR6_INFO",
5779
   "type_ref": "CB_COLOR0_INFO"
5780
  },
5781
  {
5782
   "chips": ["gfx8"],
5783
   "map": {"at": 167388, "to": "mm"},
5784
   "name": "CB_COLOR6_ATTRIB",
5785
   "type_ref": "CB_COLOR0_ATTRIB"
5786
  },
5787
  {
5788
   "chips": ["gfx8"],
5789
   "map": {"at": 167392, "to": "mm"},
5790
   "name": "CB_COLOR6_DCC_CONTROL",
5791
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5792
  },
5793
  {
5794
   "chips": ["gfx8"],
5795
   "map": {"at": 167396, "to": "mm"},
5796
   "name": "CB_COLOR6_CMASK"
5797
  },
5798
  {
5799
   "chips": ["gfx8"],
5800
   "map": {"at": 167400, "to": "mm"},
5801
   "name": "CB_COLOR6_CMASK_SLICE",
5802
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5803
  },
5804
  {
5805
   "chips": ["gfx8"],
5806
   "map": {"at": 167404, "to": "mm"},
5807
   "name": "CB_COLOR6_FMASK"
5808
  },
5809
  {
5810
   "chips": ["gfx8"],
5811
   "map": {"at": 167408, "to": "mm"},
5812
   "name": "CB_COLOR6_FMASK_SLICE",
5813
   "type_ref": "CB_COLOR0_SLICE"
5814
  },
5815
  {
5816
   "chips": ["gfx8"],
5817
   "map": {"at": 167412, "to": "mm"},
5818
   "name": "CB_COLOR6_CLEAR_WORD0"
5819
  },
5820
  {
5821
   "chips": ["gfx8"],
5822
   "map": {"at": 167416, "to": "mm"},
5823
   "name": "CB_COLOR6_CLEAR_WORD1"
5824
  },
5825
  {
5826
   "chips": ["gfx8"],
5827
   "map": {"at": 167420, "to": "mm"},
5828
   "name": "CB_COLOR6_DCC_BASE"
5829
  },
5830
  {
5831
   "chips": ["gfx8"],
5832
   "map": {"at": 167428, "to": "mm"},
5833
   "name": "CB_COLOR7_BASE"
5834
  },
5835
  {
5836
   "chips": ["gfx8"],
5837
   "map": {"at": 167432, "to": "mm"},
5838
   "name": "CB_COLOR7_PITCH",
5839
   "type_ref": "CB_COLOR0_PITCH"
5840
  },
5841
  {
5842
   "chips": ["gfx8"],
5843
   "map": {"at": 167436, "to": "mm"},
5844
   "name": "CB_COLOR7_SLICE",
5845
   "type_ref": "CB_COLOR0_SLICE"
5846
  },
5847
  {
5848
   "chips": ["gfx8"],
5849
   "map": {"at": 167440, "to": "mm"},
5850
   "name": "CB_COLOR7_VIEW",
5851
   "type_ref": "CB_COLOR0_VIEW"
5852
  },
5853
  {
5854
   "chips": ["gfx8"],
5855
   "map": {"at": 167444, "to": "mm"},
5856
   "name": "CB_COLOR7_INFO",
5857
   "type_ref": "CB_COLOR0_INFO"
5858
  },
5859
  {
5860
   "chips": ["gfx8"],
5861
   "map": {"at": 167448, "to": "mm"},
5862
   "name": "CB_COLOR7_ATTRIB",
5863
   "type_ref": "CB_COLOR0_ATTRIB"
5864
  },
5865
  {
5866
   "chips": ["gfx8"],
5867
   "map": {"at": 167452, "to": "mm"},
5868
   "name": "CB_COLOR7_DCC_CONTROL",
5869
   "type_ref": "CB_COLOR0_DCC_CONTROL"
5870
  },
5871
  {
5872
   "chips": ["gfx8"],
5873
   "map": {"at": 167456, "to": "mm"},
5874
   "name": "CB_COLOR7_CMASK"
5875
  },
5876
  {
5877
   "chips": ["gfx8"],
5878
   "map": {"at": 167460, "to": "mm"},
5879
   "name": "CB_COLOR7_CMASK_SLICE",
5880
   "type_ref": "CB_COLOR0_CMASK_SLICE"
5881
  },
5882
  {
5883
   "chips": ["gfx8"],
5884
   "map": {"at": 167464, "to": "mm"},
5885
   "name": "CB_COLOR7_FMASK"
5886
  },
5887
  {
5888
   "chips": ["gfx8"],
5889
   "map": {"at": 167468, "to": "mm"},
5890
   "name": "CB_COLOR7_FMASK_SLICE",
5891
   "type_ref": "CB_COLOR0_SLICE"
5892
  },
5893
  {
5894
   "chips": ["gfx8"],
5895
   "map": {"at": 167472, "to": "mm"},
5896
   "name": "CB_COLOR7_CLEAR_WORD0"
5897
  },
5898
  {
5899
   "chips": ["gfx8"],
5900
   "map": {"at": 167476, "to": "mm"},
5901
   "name": "CB_COLOR7_CLEAR_WORD1"
5902
  },
5903
  {
5904
   "chips": ["gfx8"],
5905
   "map": {"at": 167480, "to": "mm"},
5906
   "name": "CB_COLOR7_DCC_BASE"
5907
  },
5908
  {
5909
   "chips": ["gfx8"],
5910
   "map": {"at": 196608, "to": "mm"},
5911
   "name": "CP_EOP_DONE_ADDR_LO",
5912
   "type_ref": "CP_EOP_DONE_ADDR_LO"
5913
  },
5914
  {
5915
   "chips": ["gfx8"],
5916
   "map": {"at": 196612, "to": "mm"},
5917
   "name": "CP_EOP_DONE_ADDR_HI",
5918
   "type_ref": "CP_EOP_DONE_ADDR_HI"
5919
  },
5920
  {
5921
   "chips": ["gfx8"],
5922
   "map": {"at": 196616, "to": "mm"},
5923
   "name": "CP_EOP_DONE_DATA_LO"
5924
  },
5925
  {
5926
   "chips": ["gfx8"],
5927
   "map": {"at": 196620, "to": "mm"},
5928
   "name": "CP_EOP_DONE_DATA_HI"
5929
  },
5930
  {
5931
   "chips": ["gfx8"],
5932
   "map": {"at": 196624, "to": "mm"},
5933
   "name": "CP_EOP_LAST_FENCE_LO"
5934
  },
5935
  {
5936
   "chips": ["gfx8"],
5937
   "map": {"at": 196628, "to": "mm"},
5938
   "name": "CP_EOP_LAST_FENCE_HI"
5939
  },
5940
  {
5941
   "chips": ["gfx8"],
5942
   "map": {"at": 196632, "to": "mm"},
5943
   "name": "CP_STREAM_OUT_ADDR_LO",
5944
   "type_ref": "CP_STREAM_OUT_ADDR_LO"
5945
  },
5946
  {
5947
   "chips": ["gfx8"],
5948
   "map": {"at": 196636, "to": "mm"},
5949
   "name": "CP_STREAM_OUT_ADDR_HI",
5950
   "type_ref": "CP_STREAM_OUT_ADDR_HI"
5951
  },
5952
  {
5953
   "chips": ["gfx8"],
5954
   "map": {"at": 196640, "to": "mm"},
5955
   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
5956
  },
5957
  {
5958
   "chips": ["gfx8"],
5959
   "map": {"at": 196644, "to": "mm"},
5960
   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
5961
  },
5962
  {
5963
   "chips": ["gfx8"],
5964
   "map": {"at": 196648, "to": "mm"},
5965
   "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
5966
  },
5967
  {
5968
   "chips": ["gfx8"],
5969
   "map": {"at": 196652, "to": "mm"},
5970
   "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
5971
  },
5972
  {
5973
   "chips": ["gfx8"],
5974
   "map": {"at": 196656, "to": "mm"},
5975
   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
5976
  },
5977
  {
5978
   "chips": ["gfx8"],
5979
   "map": {"at": 196660, "to": "mm"},
5980
   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
5981
  },
5982
  {
5983
   "chips": ["gfx8"],
5984
   "map": {"at": 196664, "to": "mm"},
5985
   "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
5986
  },
5987
  {
5988
   "chips": ["gfx8"],
5989
   "map": {"at": 196668, "to": "mm"},
5990
   "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
5991
  },
5992
  {
5993
   "chips": ["gfx8"],
5994
   "map": {"at": 196672, "to": "mm"},
5995
   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
5996
  },
5997
  {
5998
   "chips": ["gfx8"],
5999
   "map": {"at": 196676, "to": "mm"},
6000
   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6001
  },
6002
  {
6003
   "chips": ["gfx8"],
6004
   "map": {"at": 196680, "to": "mm"},
6005
   "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6006
  },
6007
  {
6008
   "chips": ["gfx8"],
6009
   "map": {"at": 196684, "to": "mm"},
6010
   "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6011
  },
6012
  {
6013
   "chips": ["gfx8"],
6014
   "map": {"at": 196688, "to": "mm"},
6015
   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6016
  },
6017
  {
6018
   "chips": ["gfx8"],
6019
   "map": {"at": 196692, "to": "mm"},
6020
   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6021
  },
6022
  {
6023
   "chips": ["gfx8"],
6024
   "map": {"at": 196696, "to": "mm"},
6025
   "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6026
  },
6027
  {
6028
   "chips": ["gfx8"],
6029
   "map": {"at": 196700, "to": "mm"},
6030
   "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6031
  },
6032
  {
6033
   "chips": ["gfx8"],
6034
   "map": {"at": 196704, "to": "mm"},
6035
   "name": "CP_PIPE_STATS_ADDR_LO",
6036
   "type_ref": "CP_PIPE_STATS_ADDR_LO"
6037
  },
6038
  {
6039
   "chips": ["gfx8"],
6040
   "map": {"at": 196708, "to": "mm"},
6041
   "name": "CP_PIPE_STATS_ADDR_HI",
6042
   "type_ref": "CP_PIPE_STATS_ADDR_HI"
6043
  },
6044
  {
6045
   "chips": ["gfx8"],
6046
   "map": {"at": 196712, "to": "mm"},
6047
   "name": "CP_VGT_IAVERT_COUNT_LO"
6048
  },
6049
  {
6050
   "chips": ["gfx8"],
6051
   "map": {"at": 196716, "to": "mm"},
6052
   "name": "CP_VGT_IAVERT_COUNT_HI"
6053
  },
6054
  {
6055
   "chips": ["gfx8"],
6056
   "map": {"at": 196720, "to": "mm"},
6057
   "name": "CP_VGT_IAPRIM_COUNT_LO"
6058
  },
6059
  {
6060
   "chips": ["gfx8"],
6061
   "map": {"at": 196724, "to": "mm"},
6062
   "name": "CP_VGT_IAPRIM_COUNT_HI"
6063
  },
6064
  {
6065
   "chips": ["gfx8"],
6066
   "map": {"at": 196728, "to": "mm"},
6067
   "name": "CP_VGT_GSPRIM_COUNT_LO"
6068
  },
6069
  {
6070
   "chips": ["gfx8"],
6071
   "map": {"at": 196732, "to": "mm"},
6072
   "name": "CP_VGT_GSPRIM_COUNT_HI"
6073
  },
6074
  {
6075
   "chips": ["gfx8"],
6076
   "map": {"at": 196736, "to": "mm"},
6077
   "name": "CP_VGT_VSINVOC_COUNT_LO"
6078
  },
6079
  {
6080
   "chips": ["gfx8"],
6081
   "map": {"at": 196740, "to": "mm"},
6082
   "name": "CP_VGT_VSINVOC_COUNT_HI"
6083
  },
6084
  {
6085
   "chips": ["gfx8"],
6086
   "map": {"at": 196744, "to": "mm"},
6087
   "name": "CP_VGT_GSINVOC_COUNT_LO"
6088
  },
6089
  {
6090
   "chips": ["gfx8"],
6091
   "map": {"at": 196748, "to": "mm"},
6092
   "name": "CP_VGT_GSINVOC_COUNT_HI"
6093
  },
6094
  {
6095
   "chips": ["gfx8"],
6096
   "map": {"at": 196752, "to": "mm"},
6097
   "name": "CP_VGT_HSINVOC_COUNT_LO"
6098
  },
6099
  {
6100
   "chips": ["gfx8"],
6101
   "map": {"at": 196756, "to": "mm"},
6102
   "name": "CP_VGT_HSINVOC_COUNT_HI"
6103
  },
6104
  {
6105
   "chips": ["gfx8"],
6106
   "map": {"at": 196760, "to": "mm"},
6107
   "name": "CP_VGT_DSINVOC_COUNT_LO"
6108
  },
6109
  {
6110
   "chips": ["gfx8"],
6111
   "map": {"at": 196764, "to": "mm"},
6112
   "name": "CP_VGT_DSINVOC_COUNT_HI"
6113
  },
6114
  {
6115
   "chips": ["gfx8"],
6116
   "map": {"at": 196768, "to": "mm"},
6117
   "name": "CP_PA_CINVOC_COUNT_LO"
6118
  },
6119
  {
6120
   "chips": ["gfx8"],
6121
   "map": {"at": 196772, "to": "mm"},
6122
   "name": "CP_PA_CINVOC_COUNT_HI"
6123
  },
6124
  {
6125
   "chips": ["gfx8"],
6126
   "map": {"at": 196776, "to": "mm"},
6127
   "name": "CP_PA_CPRIM_COUNT_LO"
6128
  },
6129
  {
6130
   "chips": ["gfx8"],
6131
   "map": {"at": 196780, "to": "mm"},
6132
   "name": "CP_PA_CPRIM_COUNT_HI"
6133
  },
6134
  {
6135
   "chips": ["gfx8"],
6136
   "map": {"at": 196784, "to": "mm"},
6137
   "name": "CP_SC_PSINVOC_COUNT0_LO"
6138
  },
6139
  {
6140
   "chips": ["gfx8"],
6141
   "map": {"at": 196788, "to": "mm"},
6142
   "name": "CP_SC_PSINVOC_COUNT0_HI"
6143
  },
6144
  {
6145
   "chips": ["gfx8"],
6146
   "map": {"at": 196792, "to": "mm"},
6147
   "name": "CP_SC_PSINVOC_COUNT1_LO"
6148
  },
6149
  {
6150
   "chips": ["gfx8"],
6151
   "map": {"at": 196796, "to": "mm"},
6152
   "name": "CP_SC_PSINVOC_COUNT1_HI"
6153
  },
6154
  {
6155
   "chips": ["gfx8"],
6156
   "map": {"at": 196800, "to": "mm"},
6157
   "name": "CP_VGT_CSINVOC_COUNT_LO"
6158
  },
6159
  {
6160
   "chips": ["gfx8"],
6161
   "map": {"at": 196804, "to": "mm"},
6162
   "name": "CP_VGT_CSINVOC_COUNT_HI"
6163
  },
6164
  {
6165
   "chips": ["gfx8"],
6166
   "map": {"at": 196852, "to": "mm"},
6167
   "name": "CP_PIPE_STATS_CONTROL",
6168
   "type_ref": "CP_PIPE_STATS_CONTROL"
6169
  },
6170
  {
6171
   "chips": ["gfx8"],
6172
   "map": {"at": 196856, "to": "mm"},
6173
   "name": "CP_STREAM_OUT_CONTROL",
6174
   "type_ref": "CP_PIPE_STATS_CONTROL"
6175
  },
6176
  {
6177
   "chips": ["gfx8"],
6178
   "map": {"at": 196860, "to": "mm"},
6179
   "name": "CP_STRMOUT_CNTL",
6180
   "type_ref": "CP_STRMOUT_CNTL"
6181
  },
6182
  {
6183
   "chips": ["gfx8"],
6184
   "map": {"at": 196864, "to": "mm"},
6185
   "name": "SCRATCH_REG0"
6186
  },
6187
  {
6188
   "chips": ["gfx8"],
6189
   "map": {"at": 196868, "to": "mm"},
6190
   "name": "SCRATCH_REG1"
6191
  },
6192
  {
6193
   "chips": ["gfx8"],
6194
   "map": {"at": 196872, "to": "mm"},
6195
   "name": "SCRATCH_REG2"
6196
  },
6197
  {
6198
   "chips": ["gfx8"],
6199
   "map": {"at": 196876, "to": "mm"},
6200
   "name": "SCRATCH_REG3"
6201
  },
6202
  {
6203
   "chips": ["gfx8"],
6204
   "map": {"at": 196880, "to": "mm"},
6205
   "name": "SCRATCH_REG4"
6206
  },
6207
  {
6208
   "chips": ["gfx8"],
6209
   "map": {"at": 196884, "to": "mm"},
6210
   "name": "SCRATCH_REG5"
6211
  },
6212
  {
6213
   "chips": ["gfx8"],
6214
   "map": {"at": 196888, "to": "mm"},
6215
   "name": "SCRATCH_REG6"
6216
  },
6217
  {
6218
   "chips": ["gfx8"],
6219
   "map": {"at": 196892, "to": "mm"},
6220
   "name": "SCRATCH_REG7"
6221
  },
6222
  {
6223
   "chips": ["gfx8"],
6224
   "map": {"at": 196928, "to": "mm"},
6225
   "name": "SCRATCH_UMSK",
6226
   "type_ref": "SCRATCH_UMSK"
6227
  },
6228
  {
6229
   "chips": ["gfx8"],
6230
   "map": {"at": 196932, "to": "mm"},
6231
   "name": "SCRATCH_ADDR"
6232
  },
6233
  {
6234
   "chips": ["gfx8"],
6235
   "map": {"at": 196936, "to": "mm"},
6236
   "name": "CP_PFP_ATOMIC_PREOP_LO"
6237
  },
6238
  {
6239
   "chips": ["gfx8"],
6240
   "map": {"at": 196940, "to": "mm"},
6241
   "name": "CP_PFP_ATOMIC_PREOP_HI"
6242
  },
6243
  {
6244
   "chips": ["gfx8"],
6245
   "map": {"at": 196944, "to": "mm"},
6246
   "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6247
  },
6248
  {
6249
   "chips": ["gfx8"],
6250
   "map": {"at": 196948, "to": "mm"},
6251
   "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6252
  },
6253
  {
6254
   "chips": ["gfx8"],
6255
   "map": {"at": 196952, "to": "mm"},
6256
   "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6257
  },
6258
  {
6259
   "chips": ["gfx8"],
6260
   "map": {"at": 196956, "to": "mm"},
6261
   "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6262
  },
6263
  {
6264
   "chips": ["gfx8"],
6265
   "map": {"at": 196960, "to": "mm"},
6266
   "name": "CP_APPEND_ADDR_LO",
6267
   "type_ref": "CP_APPEND_ADDR_LO"
6268
  },
6269
  {
6270
   "chips": ["gfx8"],
6271
   "map": {"at": 196964, "to": "mm"},
6272
   "name": "CP_APPEND_ADDR_HI",
6273
   "type_ref": "CP_APPEND_ADDR_HI"
6274
  },
6275
  {
6276
   "chips": ["gfx8"],
6277
   "map": {"at": 196968, "to": "mm"},
6278
   "name": "CP_APPEND_DATA"
6279
  },
6280
  {
6281
   "chips": ["gfx8"],
6282
   "map": {"at": 196972, "to": "mm"},
6283
   "name": "CP_APPEND_LAST_CS_FENCE"
6284
  },
6285
  {
6286
   "chips": ["gfx8"],
6287
   "map": {"at": 196976, "to": "mm"},
6288
   "name": "CP_APPEND_LAST_PS_FENCE"
6289
  },
6290
  {
6291
   "chips": ["gfx8"],
6292
   "map": {"at": 196980, "to": "mm"},
6293
   "name": "CP_ATOMIC_PREOP_LO"
6294
  },
6295
  {
6296
   "chips": ["gfx8"],
6297
   "map": {"at": 196984, "to": "mm"},
6298
   "name": "CP_ATOMIC_PREOP_HI"
6299
  },
6300
  {
6301
   "chips": ["gfx8"],
6302
   "map": {"at": 196988, "to": "mm"},
6303
   "name": "CP_GDS_ATOMIC0_PREOP_LO"
6304
  },
6305
  {
6306
   "chips": ["gfx8"],
6307
   "map": {"at": 196992, "to": "mm"},
6308
   "name": "CP_GDS_ATOMIC0_PREOP_HI"
6309
  },
6310
  {
6311
   "chips": ["gfx8"],
6312
   "map": {"at": 196996, "to": "mm"},
6313
   "name": "CP_GDS_ATOMIC1_PREOP_LO"
6314
  },
6315
  {
6316
   "chips": ["gfx8"],
6317
   "map": {"at": 197000, "to": "mm"},
6318
   "name": "CP_GDS_ATOMIC1_PREOP_HI"
6319
  },
6320
  {
6321
   "chips": ["gfx8"],
6322
   "map": {"at": 197028, "to": "mm"},
6323
   "name": "CP_ME_MC_WADDR_LO",
6324
   "type_ref": "CP_ME_MC_WADDR_LO"
6325
  },
6326
  {
6327
   "chips": ["gfx8"],
6328
   "map": {"at": 197032, "to": "mm"},
6329
   "name": "CP_ME_MC_WADDR_HI",
6330
   "type_ref": "CP_ME_MC_WADDR_HI"
6331
  },
6332
  {
6333
   "chips": ["gfx8"],
6334
   "map": {"at": 197036, "to": "mm"},
6335
   "name": "CP_ME_MC_WDATA_LO"
6336
  },
6337
  {
6338
   "chips": ["gfx8"],
6339
   "map": {"at": 197040, "to": "mm"},
6340
   "name": "CP_ME_MC_WDATA_HI"
6341
  },
6342
  {
6343
   "chips": ["gfx8"],
6344
   "map": {"at": 197044, "to": "mm"},
6345
   "name": "CP_ME_MC_RADDR_LO",
6346
   "type_ref": "CP_ME_MC_RADDR_LO"
6347
  },
6348
  {
6349
   "chips": ["gfx8"],
6350
   "map": {"at": 197048, "to": "mm"},
6351
   "name": "CP_ME_MC_RADDR_HI",
6352
   "type_ref": "CP_ME_MC_RADDR_HI"
6353
  },
6354
  {
6355
   "chips": ["gfx8"],
6356
   "map": {"at": 197052, "to": "mm"},
6357
   "name": "CP_SEM_WAIT_TIMER"
6358
  },
6359
  {
6360
   "chips": ["gfx8"],
6361
   "map": {"at": 197056, "to": "mm"},
6362
   "name": "CP_SIG_SEM_ADDR_LO",
6363
   "type_ref": "CP_SIG_SEM_ADDR_LO"
6364
  },
6365
  {
6366
   "chips": ["gfx8"],
6367
   "map": {"at": 197060, "to": "mm"},
6368
   "name": "CP_SIG_SEM_ADDR_HI",
6369
   "type_ref": "CP_SIG_SEM_ADDR_HI"
6370
  },
6371
  {
6372
   "chips": ["gfx8"],
6373
   "map": {"at": 197072, "to": "mm"},
6374
   "name": "CP_WAIT_REG_MEM_TIMEOUT"
6375
  },
6376
  {
6377
   "chips": ["gfx8"],
6378
   "map": {"at": 197076, "to": "mm"},
6379
   "name": "CP_WAIT_SEM_ADDR_LO",
6380
   "type_ref": "CP_SIG_SEM_ADDR_LO"
6381
  },
6382
  {
6383
   "chips": ["gfx8"],
6384
   "map": {"at": 197080, "to": "mm"},
6385
   "name": "CP_WAIT_SEM_ADDR_HI",
6386
   "type_ref": "CP_SIG_SEM_ADDR_HI"
6387
  },
6388
  {
6389
   "chips": ["gfx8"],
6390
   "map": {"at": 197084, "to": "mm"},
6391
   "name": "CP_DMA_PFP_CONTROL",
6392
   "type_ref": "CP_DMA_ME_CONTROL"
6393
  },
6394
  {
6395
   "chips": ["gfx8"],
6396
   "map": {"at": 197088, "to": "mm"},
6397
   "name": "CP_DMA_ME_CONTROL",
6398
   "type_ref": "CP_DMA_ME_CONTROL"
6399
  },
6400
  {
6401
   "chips": ["gfx8"],
6402
   "map": {"at": 197092, "to": "mm"},
6403
   "name": "CP_COHER_BASE_HI",
6404
   "type_ref": "CP_COHER_BASE_HI"
6405
  },
6406
  {
6407
   "chips": ["gfx8"],
6408
   "map": {"at": 197100, "to": "mm"},
6409
   "name": "CP_COHER_START_DELAY",
6410
   "type_ref": "CP_COHER_START_DELAY"
6411
  },
6412
  {
6413
   "chips": ["gfx8"],
6414
   "map": {"at": 197104, "to": "mm"},
6415
   "name": "CP_COHER_CNTL",
6416
   "type_ref": "CP_COHER_CNTL"
6417
  },
6418
  {
6419
   "chips": ["gfx8"],
6420
   "map": {"at": 197108, "to": "mm"},
6421
   "name": "CP_COHER_SIZE"
6422
  },
6423
  {
6424
   "chips": ["gfx8"],
6425
   "map": {"at": 197112, "to": "mm"},
6426
   "name": "CP_COHER_BASE"
6427
  },
6428
  {
6429
   "chips": ["gfx8"],
6430
   "map": {"at": 197116, "to": "mm"},
6431
   "name": "CP_COHER_STATUS",
6432
   "type_ref": "CP_COHER_STATUS"
6433
  },
6434
  {
6435
   "chips": ["gfx8"],
6436
   "map": {"at": 197120, "to": "mm"},
6437
   "name": "CP_DMA_ME_SRC_ADDR"
6438
  },
6439
  {
6440
   "chips": ["gfx8"],
6441
   "map": {"at": 197124, "to": "mm"},
6442
   "name": "CP_DMA_ME_SRC_ADDR_HI",
6443
   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6444
  },
6445
  {
6446
   "chips": ["gfx8"],
6447
   "map": {"at": 197128, "to": "mm"},
6448
   "name": "CP_DMA_ME_DST_ADDR"
6449
  },
6450
  {
6451
   "chips": ["gfx8"],
6452
   "map": {"at": 197132, "to": "mm"},
6453
   "name": "CP_DMA_ME_DST_ADDR_HI",
6454
   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6455
  },
6456
  {
6457
   "chips": ["gfx8"],
6458
   "map": {"at": 197136, "to": "mm"},
6459
   "name": "CP_DMA_ME_COMMAND",
6460
   "type_ref": "CP_DMA_ME_COMMAND"
6461
  },
6462
  {
6463
   "chips": ["gfx8"],
6464
   "map": {"at": 197140, "to": "mm"},
6465
   "name": "CP_DMA_PFP_SRC_ADDR"
6466
  },
6467
  {
6468
   "chips": ["gfx8"],
6469
   "map": {"at": 197144, "to": "mm"},
6470
   "name": "CP_DMA_PFP_SRC_ADDR_HI",
6471
   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6472
  },
6473
  {
6474
   "chips": ["gfx8"],
6475
   "map": {"at": 197148, "to": "mm"},
6476
   "name": "CP_DMA_PFP_DST_ADDR"
6477
  },
6478
  {
6479
   "chips": ["gfx8"],
6480
   "map": {"at": 197152, "to": "mm"},
6481
   "name": "CP_DMA_PFP_DST_ADDR_HI",
6482
   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6483
  },
6484
  {
6485
   "chips": ["gfx8"],
6486
   "map": {"at": 197156, "to": "mm"},
6487
   "name": "CP_DMA_PFP_COMMAND",
6488
   "type_ref": "CP_DMA_ME_COMMAND"
6489
  },
6490
  {
6491
   "chips": ["gfx8"],
6492
   "map": {"at": 197160, "to": "mm"},
6493
   "name": "CP_DMA_CNTL",
6494
   "type_ref": "CP_DMA_CNTL"
6495
  },
6496
  {
6497
   "chips": ["gfx8"],
6498
   "map": {"at": 197164, "to": "mm"},
6499
   "name": "CP_DMA_READ_TAGS",
6500
   "type_ref": "CP_DMA_READ_TAGS"
6501
  },
6502
  {
6503
   "chips": ["gfx8"],
6504
   "map": {"at": 197168, "to": "mm"},
6505
   "name": "CP_COHER_SIZE_HI",
6506
   "type_ref": "CP_COHER_SIZE_HI"
6507
  },
6508
  {
6509
   "chips": ["gfx8"],
6510
   "map": {"at": 197172, "to": "mm"},
6511
   "name": "CP_PFP_IB_CONTROL",
6512
   "type_ref": "CP_PFP_IB_CONTROL"
6513
  },
6514
  {
6515
   "chips": ["gfx8"],
6516
   "map": {"at": 197176, "to": "mm"},
6517
   "name": "CP_PFP_LOAD_CONTROL",
6518
   "type_ref": "CP_PFP_LOAD_CONTROL"
6519
  },
6520
  {
6521
   "chips": ["gfx8"],
6522
   "map": {"at": 197180, "to": "mm"},
6523
   "name": "CP_SCRATCH_INDEX",
6524
   "type_ref": "CP_SCRATCH_INDEX"
6525
  },
6526
  {
6527
   "chips": ["gfx8"],
6528
   "map": {"at": 197184, "to": "mm"},
6529
   "name": "CP_SCRATCH_DATA"
6530
  },
6531
  {
6532
   "chips": ["gfx8"],
6533
   "map": {"at": 197188, "to": "mm"},
6534
   "name": "CP_RB_OFFSET",
6535
   "type_ref": "CP_RB_OFFSET"
6536
  },
6537
  {
6538
   "chips": ["gfx8"],
6539
   "map": {"at": 197192, "to": "mm"},
6540
   "name": "CP_IB1_OFFSET",
6541
   "type_ref": "CP_IB1_OFFSET"
6542
  },
6543
  {
6544
   "chips": ["gfx8"],
6545
   "map": {"at": 197196, "to": "mm"},
6546
   "name": "CP_IB2_OFFSET",
6547
   "type_ref": "CP_IB2_OFFSET"
6548
  },
6549
  {
6550
   "chips": ["gfx8"],
6551
   "map": {"at": 197200, "to": "mm"},
6552
   "name": "CP_IB1_PREAMBLE_BEGIN",
6553
   "type_ref": "CP_IB1_PREAMBLE_BEGIN"
6554
  },
6555
  {
6556
   "chips": ["gfx8"],
6557
   "map": {"at": 197204, "to": "mm"},
6558
   "name": "CP_IB1_PREAMBLE_END",
6559
   "type_ref": "CP_IB1_PREAMBLE_END"
6560
  },
6561
  {
6562
   "chips": ["gfx8"],
6563
   "map": {"at": 197208, "to": "mm"},
6564
   "name": "CP_IB2_PREAMBLE_BEGIN",
6565
   "type_ref": "CP_IB2_PREAMBLE_BEGIN"
6566
  },
6567
  {
6568
   "chips": ["gfx8"],
6569
   "map": {"at": 197212, "to": "mm"},
6570
   "name": "CP_IB2_PREAMBLE_END",
6571
   "type_ref": "CP_IB2_PREAMBLE_END"
6572
  },
6573
  {
6574
   "chips": ["gfx8"],
6575
   "map": {"at": 197216, "to": "mm"},
6576
   "name": "CP_CE_IB1_OFFSET",
6577
   "type_ref": "CP_IB1_OFFSET"
6578
  },
6579
  {
6580
   "chips": ["gfx8"],
6581
   "map": {"at": 197220, "to": "mm"},
6582
   "name": "CP_CE_IB2_OFFSET",
6583
   "type_ref": "CP_IB2_OFFSET"
6584
  },
6585
  {
6586
   "chips": ["gfx8"],
6587
   "map": {"at": 197224, "to": "mm"},
6588
   "name": "CP_CE_COUNTER"
6589
  },
6590
  {
6591
   "chips": ["gfx8"],
6592
   "map": {"at": 197228, "to": "mm"},
6593
   "name": "CP_CE_RB_OFFSET",
6594
   "type_ref": "CP_RB_OFFSET"
6595
  },
6596
  {
6597
   "chips": ["gfx8"],
6598
   "map": {"at": 197388, "to": "mm"},
6599
   "name": "CP_CE_INIT_BASE_LO",
6600
   "type_ref": "CP_CE_INIT_BASE_LO"
6601
  },
6602
  {
6603
   "chips": ["gfx8"],
6604
   "map": {"at": 197392, "to": "mm"},
6605
   "name": "CP_CE_INIT_BASE_HI",
6606
   "type_ref": "CP_CE_INIT_BASE_HI"
6607
  },
6608
  {
6609
   "chips": ["gfx8"],
6610
   "map": {"at": 197396, "to": "mm"},
6611
   "name": "CP_CE_INIT_BUFSZ",
6612
   "type_ref": "CP_CE_INIT_BUFSZ"
6613
  },
6614
  {
6615
   "chips": ["gfx8"],
6616
   "map": {"at": 197400, "to": "mm"},
6617
   "name": "CP_CE_IB1_BASE_LO",
6618
   "type_ref": "CP_CE_IB1_BASE_LO"
6619
  },
6620
  {
6621
   "chips": ["gfx8"],
6622
   "map": {"at": 197404, "to": "mm"},
6623
   "name": "CP_CE_IB1_BASE_HI",
6624
   "type_ref": "CP_CE_IB1_BASE_HI"
6625
  },
6626
  {
6627
   "chips": ["gfx8"],
6628
   "map": {"at": 197408, "to": "mm"},
6629
   "name": "CP_CE_IB1_BUFSZ",
6630
   "type_ref": "CP_CE_IB1_BUFSZ"
6631
  },
6632
  {
6633
   "chips": ["gfx8"],
6634
   "map": {"at": 197412, "to": "mm"},
6635
   "name": "CP_CE_IB2_BASE_LO",
6636
   "type_ref": "CP_CE_IB2_BASE_LO"
6637
  },
6638
  {
6639
   "chips": ["gfx8"],
6640
   "map": {"at": 197416, "to": "mm"},
6641
   "name": "CP_CE_IB2_BASE_HI",
6642
   "type_ref": "CP_CE_IB2_BASE_HI"
6643
  },
6644
  {
6645
   "chips": ["gfx8"],
6646
   "map": {"at": 197420, "to": "mm"},
6647
   "name": "CP_CE_IB2_BUFSZ",
6648
   "type_ref": "CP_CE_IB2_BUFSZ"
6649
  },
6650
  {
6651
   "chips": ["gfx8"],
6652
   "map": {"at": 197424, "to": "mm"},
6653
   "name": "CP_IB1_BASE_LO",
6654
   "type_ref": "CP_CE_IB1_BASE_LO"
6655
  },
6656
  {
6657
   "chips": ["gfx8"],
6658
   "map": {"at": 197428, "to": "mm"},
6659
   "name": "CP_IB1_BASE_HI",
6660
   "type_ref": "CP_CE_IB1_BASE_HI"
6661
  },
6662
  {
6663
   "chips": ["gfx8"],
6664
   "map": {"at": 197432, "to": "mm"},
6665
   "name": "CP_IB1_BUFSZ",
6666
   "type_ref": "CP_CE_IB1_BUFSZ"
6667
  },
6668
  {
6669
   "chips": ["gfx8"],
6670
   "map": {"at": 197436, "to": "mm"},
6671
   "name": "CP_IB2_BASE_LO",
6672
   "type_ref": "CP_CE_IB2_BASE_LO"
6673
  },
6674
  {
6675
   "chips": ["gfx8"],
6676
   "map": {"at": 197440, "to": "mm"},
6677
   "name": "CP_IB2_BASE_HI",
6678
   "type_ref": "CP_CE_IB2_BASE_HI"
6679
  },
6680
  {
6681
   "chips": ["gfx8"],
6682
   "map": {"at": 197444, "to": "mm"},
6683
   "name": "CP_IB2_BUFSZ",
6684
   "type_ref": "CP_CE_IB2_BUFSZ"
6685
  },
6686
  {
6687
   "chips": ["gfx8"],
6688
   "map": {"at": 197448, "to": "mm"},
6689
   "name": "CP_ST_BASE_LO",
6690
   "type_ref": "CP_ST_BASE_LO"
6691
  },
6692
  {
6693
   "chips": ["gfx8"],
6694
   "map": {"at": 197452, "to": "mm"},
6695
   "name": "CP_ST_BASE_HI",
6696
   "type_ref": "CP_ST_BASE_HI"
6697
  },
6698
  {
6699
   "chips": ["gfx8"],
6700
   "map": {"at": 197456, "to": "mm"},
6701
   "name": "CP_ST_BUFSZ",
6702
   "type_ref": "CP_ST_BUFSZ"
6703
  },
6704
  {
6705
   "chips": ["gfx8"],
6706
   "map": {"at": 197460, "to": "mm"},
6707
   "name": "CP_EOP_DONE_EVENT_CNTL",
6708
   "type_ref": "CP_EOP_DONE_EVENT_CNTL"
6709
  },
6710
  {
6711
   "chips": ["gfx8"],
6712
   "map": {"at": 197464, "to": "mm"},
6713
   "name": "CP_EOP_DONE_DATA_CNTL",
6714
   "type_ref": "CP_EOP_DONE_DATA_CNTL"
6715
  },
6716
  {
6717
   "chips": ["gfx8"],
6718
   "map": {"at": 197468, "to": "mm"},
6719
   "name": "CP_EOP_DONE_CNTX_ID",
6720
   "type_ref": "CP_EOP_DONE_CNTX_ID"
6721
  },
6722
  {
6723
   "chips": ["gfx8"],
6724
   "map": {"at": 197552, "to": "mm"},
6725
   "name": "CP_PFP_COMPLETION_STATUS",
6726
   "type_ref": "CP_PFP_COMPLETION_STATUS"
6727
  },
6728
  {
6729
   "chips": ["gfx8"],
6730
   "map": {"at": 197556, "to": "mm"},
6731
   "name": "CP_CE_COMPLETION_STATUS",
6732
   "type_ref": "CP_PFP_COMPLETION_STATUS"
6733
  },
6734
  {
6735
   "chips": ["gfx8"],
6736
   "map": {"at": 197560, "to": "mm"},
6737
   "name": "CP_PRED_NOT_VISIBLE",
6738
   "type_ref": "CP_PRED_NOT_VISIBLE"
6739
  },
6740
  {
6741
   "chips": ["gfx8"],
6742
   "map": {"at": 197568, "to": "mm"},
6743
   "name": "CP_PFP_METADATA_BASE_ADDR"
6744
  },
6745
  {
6746
   "chips": ["gfx8"],
6747
   "map": {"at": 197572, "to": "mm"},
6748
   "name": "CP_PFP_METADATA_BASE_ADDR_HI",
6749
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6750
  },
6751
  {
6752
   "chips": ["gfx8"],
6753
   "map": {"at": 197576, "to": "mm"},
6754
   "name": "CP_CE_METADATA_BASE_ADDR"
6755
  },
6756
  {
6757
   "chips": ["gfx8"],
6758
   "map": {"at": 197580, "to": "mm"},
6759
   "name": "CP_CE_METADATA_BASE_ADDR_HI",
6760
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6761
  },
6762
  {
6763
   "chips": ["gfx8"],
6764
   "map": {"at": 197584, "to": "mm"},
6765
   "name": "CP_DRAW_INDX_INDR_ADDR"
6766
  },
6767
  {
6768
   "chips": ["gfx8"],
6769
   "map": {"at": 197588, "to": "mm"},
6770
   "name": "CP_DRAW_INDX_INDR_ADDR_HI",
6771
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6772
  },
6773
  {
6774
   "chips": ["gfx8"],
6775
   "map": {"at": 197592, "to": "mm"},
6776
   "name": "CP_DISPATCH_INDR_ADDR"
6777
  },
6778
  {
6779
   "chips": ["gfx8"],
6780
   "map": {"at": 197596, "to": "mm"},
6781
   "name": "CP_DISPATCH_INDR_ADDR_HI",
6782
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6783
  },
6784
  {
6785
   "chips": ["gfx8"],
6786
   "map": {"at": 197600, "to": "mm"},
6787
   "name": "CP_INDEX_BASE_ADDR"
6788
  },
6789
  {
6790
   "chips": ["gfx8"],
6791
   "map": {"at": 197604, "to": "mm"},
6792
   "name": "CP_INDEX_BASE_ADDR_HI",
6793
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6794
  },
6795
  {
6796
   "chips": ["gfx8"],
6797
   "map": {"at": 197608, "to": "mm"},
6798
   "name": "CP_INDEX_TYPE",
6799
   "type_ref": "CP_INDEX_TYPE"
6800
  },
6801
  {
6802
   "chips": ["gfx8"],
6803
   "map": {"at": 197612, "to": "mm"},
6804
   "name": "CP_GDS_BKUP_ADDR"
6805
  },
6806
  {
6807
   "chips": ["gfx8"],
6808
   "map": {"at": 197616, "to": "mm"},
6809
   "name": "CP_GDS_BKUP_ADDR_HI",
6810
   "type_ref": "CP_EOP_DONE_ADDR_HI"
6811
  },
6812
  {
6813
   "chips": ["gfx8"],
6814
   "map": {"at": 197620, "to": "mm"},
6815
   "name": "CP_SAMPLE_STATUS",
6816
   "type_ref": "CP_SAMPLE_STATUS"
6817
  },
6818
  {
6819
   "chips": ["gfx8"],
6820
   "map": {"at": 198656, "to": "mm"},
6821
   "name": "GRBM_GFX_INDEX",
6822
   "type_ref": "GRBM_GFX_INDEX"
6823
  },
6824
  {
6825
   "chips": ["gfx8"],
6826
   "map": {"at": 198912, "to": "mm"},
6827
   "name": "VGT_ESGS_RING_SIZE"
6828
  },
6829
  {
6830
   "chips": ["gfx8"],
6831
   "map": {"at": 198916, "to": "mm"},
6832
   "name": "VGT_GSVS_RING_SIZE"
6833
  },
6834
  {
6835
   "chips": ["gfx8"],
6836
   "map": {"at": 198920, "to": "mm"},
6837
   "name": "VGT_PRIMITIVE_TYPE",
6838
   "type_ref": "VGT_PRIMITIVE_TYPE"
6839
  },
6840
  {
6841
   "chips": ["gfx8"],
6842
   "map": {"at": 198924, "to": "mm"},
6843
   "name": "VGT_INDEX_TYPE",
6844
   "type_ref": "CP_INDEX_TYPE"
6845
  },
6846
  {
6847
   "chips": ["gfx8"],
6848
   "map": {"at": 198928, "to": "mm"},
6849
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
6850
  },
6851
  {
6852
   "chips": ["gfx8"],
6853
   "map": {"at": 198932, "to": "mm"},
6854
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
6855
  },
6856
  {
6857
   "chips": ["gfx8"],
6858
   "map": {"at": 198936, "to": "mm"},
6859
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
6860
  },
6861
  {
6862
   "chips": ["gfx8"],
6863
   "map": {"at": 198940, "to": "mm"},
6864
   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
6865
  },
6866
  {
6867
   "chips": ["gfx8"],
6868
   "map": {"at": 198960, "to": "mm"},
6869
   "name": "VGT_NUM_INDICES"
6870
  },
6871
  {
6872
   "chips": ["gfx8"],
6873
   "map": {"at": 198964, "to": "mm"},
6874
   "name": "VGT_NUM_INSTANCES"
6875
  },
6876
  {
6877
   "chips": ["gfx8"],
6878
   "map": {"at": 198968, "to": "mm"},
6879
   "name": "VGT_TF_RING_SIZE",
6880
   "type_ref": "VGT_TF_RING_SIZE"
6881
  },
6882
  {
6883
   "chips": ["gfx8"],
6884
   "map": {"at": 198972, "to": "mm"},
6885
   "name": "VGT_HS_OFFCHIP_PARAM",
6886
   "type_ref": "VGT_HS_OFFCHIP_PARAM"
6887
  },
6888
  {
6889
   "chips": ["gfx8"],
6890
   "map": {"at": 198976, "to": "mm"},
6891
   "name": "VGT_TF_MEMORY_BASE"
6892
  },
6893
  {
6894
   "chips": ["gfx8"],
6895
   "map": {"at": 199168, "to": "mm"},
6896
   "name": "PA_SU_LINE_STIPPLE_VALUE",
6897
   "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
6898
  },
6899
  {
6900
   "chips": ["gfx8"],
6901
   "map": {"at": 199172, "to": "mm"},
6902
   "name": "PA_SC_LINE_STIPPLE_STATE",
6903
   "type_ref": "PA_SC_LINE_STIPPLE_STATE"
6904
  },
6905
  {
6906
   "chips": ["gfx8"],
6907
   "map": {"at": 199184, "to": "mm"},
6908
   "name": "PA_SC_SCREEN_EXTENT_MIN_0",
6909
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6910
  },
6911
  {
6912
   "chips": ["gfx8"],
6913
   "map": {"at": 199188, "to": "mm"},
6914
   "name": "PA_SC_SCREEN_EXTENT_MAX_0",
6915
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6916
  },
6917
  {
6918
   "chips": ["gfx8"],
6919
   "map": {"at": 199192, "to": "mm"},
6920
   "name": "PA_SC_SCREEN_EXTENT_MIN_1",
6921
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6922
  },
6923
  {
6924
   "chips": ["gfx8"],
6925
   "map": {"at": 199212, "to": "mm"},
6926
   "name": "PA_SC_SCREEN_EXTENT_MAX_1",
6927
   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6928
  },
6929
  {
6930
   "chips": ["gfx8"],
6931
   "map": {"at": 199296, "to": "mm"},
6932
   "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
6933
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6934
  },
6935
  {
6936
   "chips": ["gfx8"],
6937
   "map": {"at": 199300, "to": "mm"},
6938
   "name": "PA_SC_P3D_TRAP_SCREEN_H",
6939
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
6940
  },
6941
  {
6942
   "chips": ["gfx8"],
6943
   "map": {"at": 199304, "to": "mm"},
6944
   "name": "PA_SC_P3D_TRAP_SCREEN_V",
6945
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
6946
  },
6947
  {
6948
   "chips": ["gfx8"],
6949
   "map": {"at": 199308, "to": "mm"},
6950
   "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
6951
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6952
  },
6953
  {
6954
   "chips": ["gfx8"],
6955
   "map": {"at": 199312, "to": "mm"},
6956
   "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
6957
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6958
  },
6959
  {
6960
   "chips": ["gfx8"],
6961
   "map": {"at": 199328, "to": "mm"},
6962
   "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
6963
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6964
  },
6965
  {
6966
   "chips": ["gfx8"],
6967
   "map": {"at": 199332, "to": "mm"},
6968
   "name": "PA_SC_HP3D_TRAP_SCREEN_H",
6969
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
6970
  },
6971
  {
6972
   "chips": ["gfx8"],
6973
   "map": {"at": 199336, "to": "mm"},
6974
   "name": "PA_SC_HP3D_TRAP_SCREEN_V",
6975
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
6976
  },
6977
  {
6978
   "chips": ["gfx8"],
6979
   "map": {"at": 199340, "to": "mm"},
6980
   "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
6981
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6982
  },
6983
  {
6984
   "chips": ["gfx8"],
6985
   "map": {"at": 199344, "to": "mm"},
6986
   "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
6987
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6988
  },
6989
  {
6990
   "chips": ["gfx8"],
6991
   "map": {"at": 199360, "to": "mm"},
6992
   "name": "PA_SC_TRAP_SCREEN_HV_EN",
6993
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6994
  },
6995
  {
6996
   "chips": ["gfx8"],
6997
   "map": {"at": 199364, "to": "mm"},
6998
   "name": "PA_SC_TRAP_SCREEN_H",
6999
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7000
  },
7001
  {
7002
   "chips": ["gfx8"],
7003
   "map": {"at": 199368, "to": "mm"},
7004
   "name": "PA_SC_TRAP_SCREEN_V",
7005
   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7006
  },
7007
  {
7008
   "chips": ["gfx8"],
7009
   "map": {"at": 199372, "to": "mm"},
7010
   "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7011
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
7012
  },
7013
  {
7014
   "chips": ["gfx8"],
7015
   "map": {"at": 199376, "to": "mm"},
7016
   "name": "PA_SC_TRAP_SCREEN_COUNT",
7017
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
7018
  },
7019
  {
7020
   "chips": ["gfx8"],
7021
   "map": {"at": 199872, "to": "mm"},
7022
   "name": "SQ_THREAD_TRACE_BASE"
7023
  },
7024
  {
7025
   "chips": ["gfx8"],
7026
   "map": {"at": 199876, "to": "mm"},
7027
   "name": "SQ_THREAD_TRACE_SIZE",
7028
   "type_ref": "SQ_THREAD_TRACE_SIZE"
7029
  },
7030
  {
7031
   "chips": ["gfx8"],
7032
   "map": {"at": 199880, "to": "mm"},
7033
   "name": "SQ_THREAD_TRACE_MASK",
7034
   "type_ref": "SQ_THREAD_TRACE_MASK"
7035
  },
7036
  {
7037
   "chips": ["gfx8"],
7038
   "map": {"at": 199884, "to": "mm"},
7039
   "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7040
   "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"
7041
  },
7042
  {
7043
   "chips": ["gfx8"],
7044
   "map": {"at": 199888, "to": "mm"},
7045
   "name": "SQ_THREAD_TRACE_PERF_MASK",
7046
   "type_ref": "SQ_PERFCOUNTER_MASK"
7047
  },
7048
  {
7049
   "chips": ["gfx8"],
7050
   "map": {"at": 199892, "to": "mm"},
7051
   "name": "SQ_THREAD_TRACE_CTRL",
7052
   "type_ref": "SQ_THREAD_TRACE_CTRL"
7053
  },
7054
  {
7055
   "chips": ["gfx8"],
7056
   "map": {"at": 199896, "to": "mm"},
7057
   "name": "SQ_THREAD_TRACE_MODE",
7058
   "type_ref": "SQ_THREAD_TRACE_MODE"
7059
  },
7060
  {
7061
   "chips": ["gfx8"],
7062
   "map": {"at": 199900, "to": "mm"},
7063
   "name": "SQ_THREAD_TRACE_BASE2",
7064
   "type_ref": "SQ_THREAD_TRACE_BASE2"
7065
  },
7066
  {
7067
   "chips": ["gfx8"],
7068
   "map": {"at": 199904, "to": "mm"},
7069
   "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7070
  },
7071
  {
7072
   "chips": ["gfx8"],
7073
   "map": {"at": 199908, "to": "mm"},
7074
   "name": "SQ_THREAD_TRACE_WPTR",
7075
   "type_ref": "SQ_THREAD_TRACE_WPTR"
7076
  },
7077
  {
7078
   "chips": ["gfx8"],
7079
   "map": {"at": 199912, "to": "mm"},
7080
   "name": "SQ_THREAD_TRACE_STATUS",
7081
   "type_ref": "SQ_THREAD_TRACE_STATUS"
7082
  },
7083
  {
7084
   "chips": ["gfx8"],
7085
   "map": {"at": 199916, "to": "mm"},
7086
   "name": "SQ_THREAD_TRACE_HIWATER",
7087
   "type_ref": "SQ_THREAD_TRACE_HIWATER"
7088
  },
7089
  {
7090
   "chips": ["gfx8"],
7091
   "map": {"at": 199936, "to": "mm"},
7092
   "name": "SQ_THREAD_TRACE_USERDATA_0"
7093
  },
7094
  {
7095
   "chips": ["gfx8"],
7096
   "map": {"at": 199940, "to": "mm"},
7097
   "name": "SQ_THREAD_TRACE_USERDATA_1"
7098
  },
7099
  {
7100
   "chips": ["gfx8"],
7101
   "map": {"at": 199944, "to": "mm"},
7102
   "name": "SQ_THREAD_TRACE_USERDATA_2"
7103
  },
7104
  {
7105
   "chips": ["gfx8"],
7106
   "map": {"at": 199948, "to": "mm"},
7107
   "name": "SQ_THREAD_TRACE_USERDATA_3"
7108
  },
7109
  {
7110
   "chips": ["gfx8"],
7111
   "map": {"at": 199968, "to": "mm"},
7112
   "name": "SQC_CACHES",
7113
   "type_ref": "SQC_CACHES"
7114
  },
7115
  {
7116
   "chips": ["gfx8"],
7117
   "map": {"at": 199972, "to": "mm"},
7118
   "name": "SQC_WRITEBACK",
7119
   "type_ref": "SQC_WRITEBACK"
7120
  },
7121
  {
7122
   "chips": ["gfx8"],
7123
   "map": {"at": 200192, "to": "mm"},
7124
   "name": "TA_CS_BC_BASE_ADDR"
7125
  },
7126
  {
7127
   "chips": ["gfx8"],
7128
   "map": {"at": 200196, "to": "mm"},
7129
   "name": "TA_CS_BC_BASE_ADDR_HI",
7130
   "type_ref": "TA_BC_BASE_ADDR_HI"
7131
  },
7132
  {
7133
   "chips": ["gfx8"],
7134
   "map": {"at": 200448, "to": "mm"},
7135
   "name": "DB_OCCLUSION_COUNT0_LOW"
7136
  },
7137
  {
7138
   "chips": ["gfx8"],
7139
   "map": {"at": 200452, "to": "mm"},
7140
   "name": "DB_OCCLUSION_COUNT0_HI",
7141
   "type_ref": "DB_ZPASS_COUNT_HI"
7142
  },
7143
  {
7144
   "chips": ["gfx8"],
7145
   "map": {"at": 200456, "to": "mm"},
7146
   "name": "DB_OCCLUSION_COUNT1_LOW"
7147
  },
7148
  {
7149
   "chips": ["gfx8"],
7150
   "map": {"at": 200460, "to": "mm"},
7151
   "name": "DB_OCCLUSION_COUNT1_HI",
7152
   "type_ref": "DB_ZPASS_COUNT_HI"
7153
  },
7154
  {
7155
   "chips": ["gfx8"],
7156
   "map": {"at": 200464, "to": "mm"},
7157
   "name": "DB_OCCLUSION_COUNT2_LOW"
7158
  },
7159
  {
7160
   "chips": ["gfx8"],
7161
   "map": {"at": 200468, "to": "mm"},
7162
   "name": "DB_OCCLUSION_COUNT2_HI",
7163
   "type_ref": "DB_ZPASS_COUNT_HI"
7164
  },
7165
  {
7166
   "chips": ["gfx8"],
7167
   "map": {"at": 200472, "to": "mm"},
7168
   "name": "DB_OCCLUSION_COUNT3_LOW"
7169
  },
7170
  {
7171
   "chips": ["gfx8"],
7172
   "map": {"at": 200476, "to": "mm"},
7173
   "name": "DB_OCCLUSION_COUNT3_HI",
7174
   "type_ref": "DB_ZPASS_COUNT_HI"
7175
  },
7176
  {
7177
   "chips": ["gfx8"],
7178
   "map": {"at": 200696, "to": "mm"},
7179
   "name": "DB_ZPASS_COUNT_LOW"
7180
  },
7181
  {
7182
   "chips": ["gfx8"],
7183
   "map": {"at": 200700, "to": "mm"},
7184
   "name": "DB_ZPASS_COUNT_HI",
7185
   "type_ref": "DB_ZPASS_COUNT_HI"
7186
  },
7187
  {
7188
   "chips": ["gfx8"],
7189
   "map": {"at": 200704, "to": "mm"},
7190
   "name": "GDS_RD_ADDR"
7191
  },
7192
  {
7193
   "chips": ["gfx8"],
7194
   "map": {"at": 200708, "to": "mm"},
7195
   "name": "GDS_RD_DATA"
7196
  },
7197
  {
7198
   "chips": ["gfx8"],
7199
   "map": {"at": 200712, "to": "mm"},
7200
   "name": "GDS_RD_BURST_ADDR"
7201
  },
7202
  {
7203
   "chips": ["gfx8"],
7204
   "map": {"at": 200716, "to": "mm"},
7205
   "name": "GDS_RD_BURST_COUNT"
7206
  },
7207
  {
7208
   "chips": ["gfx8"],
7209
   "map": {"at": 200720, "to": "mm"},
7210
   "name": "GDS_RD_BURST_DATA"
7211
  },
7212
  {
7213
   "chips": ["gfx8"],
7214
   "map": {"at": 200724, "to": "mm"},
7215
   "name": "GDS_WR_ADDR"
7216
  },
7217
  {
7218
   "chips": ["gfx8"],
7219
   "map": {"at": 200728, "to": "mm"},
7220
   "name": "GDS_WR_DATA"
7221
  },
7222
  {
7223
   "chips": ["gfx8"],
7224
   "map": {"at": 200732, "to": "mm"},
7225
   "name": "GDS_WR_BURST_ADDR"
7226
  },
7227
  {
7228
   "chips": ["gfx8"],
7229
   "map": {"at": 200736, "to": "mm"},
7230
   "name": "GDS_WR_BURST_DATA"
7231
  },
7232
  {
7233
   "chips": ["gfx8"],
7234
   "map": {"at": 200740, "to": "mm"},
7235
   "name": "GDS_WRITE_COMPLETE"
7236
  },
7237
  {
7238
   "chips": ["gfx8"],
7239
   "map": {"at": 200744, "to": "mm"},
7240
   "name": "GDS_ATOM_CNTL",
7241
   "type_ref": "GDS_ATOM_CNTL"
7242
  },
7243
  {
7244
   "chips": ["gfx8"],
7245
   "map": {"at": 200748, "to": "mm"},
7246
   "name": "GDS_ATOM_COMPLETE",
7247
   "type_ref": "GDS_ATOM_COMPLETE"
7248
  },
7249
  {
7250
   "chips": ["gfx8"],
7251
   "map": {"at": 200752, "to": "mm"},
7252
   "name": "GDS_ATOM_BASE",
7253
   "type_ref": "GDS_ATOM_BASE"
7254
  },
7255
  {
7256
   "chips": ["gfx8"],
7257
   "map": {"at": 200756, "to": "mm"},
7258
   "name": "GDS_ATOM_SIZE",
7259
   "type_ref": "GDS_ATOM_SIZE"
7260
  },
7261
  {
7262
   "chips": ["gfx8"],
7263
   "map": {"at": 200760, "to": "mm"},
7264
   "name": "GDS_ATOM_OFFSET0",
7265
   "type_ref": "GDS_ATOM_OFFSET0"
7266
  },
7267
  {
7268
   "chips": ["gfx8"],
7269
   "map": {"at": 200764, "to": "mm"},
7270
   "name": "GDS_ATOM_OFFSET1",
7271
   "type_ref": "GDS_ATOM_OFFSET1"
7272
  },
7273
  {
7274
   "chips": ["gfx8"],
7275
   "map": {"at": 200768, "to": "mm"},
7276
   "name": "GDS_ATOM_DST"
7277
  },
7278
  {
7279
   "chips": ["gfx8"],
7280
   "map": {"at": 200772, "to": "mm"},
7281
   "name": "GDS_ATOM_OP",
7282
   "type_ref": "GDS_ATOM_OP"
7283
  },
7284
  {
7285
   "chips": ["gfx8"],
7286
   "map": {"at": 200776, "to": "mm"},
7287
   "name": "GDS_ATOM_SRC0"
7288
  },
7289
  {
7290
   "chips": ["gfx8"],
7291
   "map": {"at": 200780, "to": "mm"},
7292
   "name": "GDS_ATOM_SRC0_U"
7293
  },
7294
  {
7295
   "chips": ["gfx8"],
7296
   "map": {"at": 200784, "to": "mm"},
7297
   "name": "GDS_ATOM_SRC1"
7298
  },
7299
  {
7300
   "chips": ["gfx8"],
7301
   "map": {"at": 200788, "to": "mm"},
7302
   "name": "GDS_ATOM_SRC1_U"
7303
  },
7304
  {
7305
   "chips": ["gfx8"],
7306
   "map": {"at": 200792, "to": "mm"},
7307
   "name": "GDS_ATOM_READ0"
7308
  },
7309
  {
7310
   "chips": ["gfx8"],
7311
   "map": {"at": 200796, "to": "mm"},
7312
   "name": "GDS_ATOM_READ0_U"
7313
  },
7314
  {
7315
   "chips": ["gfx8"],
7316
   "map": {"at": 200800, "to": "mm"},
7317
   "name": "GDS_ATOM_READ1"
7318
  },
7319
  {
7320
   "chips": ["gfx8"],
7321
   "map": {"at": 200804, "to": "mm"},
7322
   "name": "GDS_ATOM_READ1_U"
7323
  },
7324
  {
7325
   "chips": ["gfx8"],
7326
   "map": {"at": 200808, "to": "mm"},
7327
   "name": "GDS_GWS_RESOURCE_CNTL",
7328
   "type_ref": "GDS_GWS_RESOURCE_CNTL"
7329
  },
7330
  {
7331
   "chips": ["gfx8"],
7332
   "map": {"at": 200812, "to": "mm"},
7333
   "name": "GDS_GWS_RESOURCE",
7334
   "type_ref": "GDS_GWS_RESOURCE"
7335
  },
7336
  {
7337
   "chips": ["gfx8"],
7338
   "map": {"at": 200816, "to": "mm"},
7339
   "name": "GDS_GWS_RESOURCE_CNT",
7340
   "type_ref": "GDS_GWS_RESOURCE_CNT"
7341
  },
7342
  {
7343
   "chips": ["gfx8"],
7344
   "map": {"at": 200820, "to": "mm"},
7345
   "name": "GDS_OA_CNTL",
7346
   "type_ref": "GDS_OA_CNTL"
7347
  },
7348
  {
7349
   "chips": ["gfx8"],
7350
   "map": {"at": 200824, "to": "mm"},
7351
   "name": "GDS_OA_COUNTER"
7352
  },
7353
  {
7354
   "chips": ["gfx8"],
7355
   "map": {"at": 200828, "to": "mm"},
7356
   "name": "GDS_OA_ADDRESS",
7357
   "type_ref": "GDS_OA_ADDRESS"
7358
  },
7359
  {
7360
   "chips": ["gfx8"],
7361
   "map": {"at": 200832, "to": "mm"},
7362
   "name": "GDS_OA_INCDEC",
7363
   "type_ref": "GDS_OA_INCDEC"
7364
  },
7365
  {
7366
   "chips": ["gfx8"],
7367
   "map": {"at": 200836, "to": "mm"},
7368
   "name": "GDS_OA_RING_SIZE"
7369
  },
7370
  {
7371
   "chips": ["gfx8"],
7372
   "map": {"at": 212992, "to": "mm"},
7373
   "name": "CPG_PERFCOUNTER1_LO"
7374
  },
7375
  {
7376
   "chips": ["gfx8"],
7377
   "map": {"at": 212996, "to": "mm"},
7378
   "name": "CPG_PERFCOUNTER1_HI"
7379
  },
7380
  {
7381
   "chips": ["gfx8"],
7382
   "map": {"at": 213000, "to": "mm"},
7383
   "name": "CPG_PERFCOUNTER0_LO"
7384
  },
7385
  {
7386
   "chips": ["gfx8"],
7387
   "map": {"at": 213004, "to": "mm"},
7388
   "name": "CPG_PERFCOUNTER0_HI"
7389
  },
7390
  {
7391
   "chips": ["gfx8"],
7392
   "map": {"at": 213008, "to": "mm"},
7393
   "name": "CPC_PERFCOUNTER1_LO"
7394
  },
7395
  {
7396
   "chips": ["gfx8"],
7397
   "map": {"at": 213012, "to": "mm"},
7398
   "name": "CPC_PERFCOUNTER1_HI"
7399
  },
7400
  {
7401
   "chips": ["gfx8"],
7402
   "map": {"at": 213016, "to": "mm"},
7403
   "name": "CPC_PERFCOUNTER0_LO"
7404
  },
7405
  {
7406
   "chips": ["gfx8"],
7407
   "map": {"at": 213020, "to": "mm"},
7408
   "name": "CPC_PERFCOUNTER0_HI"
7409
  },
7410
  {
7411
   "chips": ["gfx8"],
7412
   "map": {"at": 213024, "to": "mm"},
7413
   "name": "CPF_PERFCOUNTER1_LO"
7414
  },
7415
  {
7416
   "chips": ["gfx8"],
7417
   "map": {"at": 213028, "to": "mm"},
7418
   "name": "CPF_PERFCOUNTER1_HI"
7419
  },
7420
  {
7421
   "chips": ["gfx8"],
7422
   "map": {"at": 213032, "to": "mm"},
7423
   "name": "CPF_PERFCOUNTER0_LO"
7424
  },
7425
  {
7426
   "chips": ["gfx8"],
7427
   "map": {"at": 213036, "to": "mm"},
7428
   "name": "CPF_PERFCOUNTER0_HI"
7429
  },
7430
  {
7431
   "chips": ["gfx8"],
7432
   "map": {"at": 213248, "to": "mm"},
7433
   "name": "GRBM_PERFCOUNTER0_LO"
7434
  },
7435
  {
7436
   "chips": ["gfx8"],
7437
   "map": {"at": 213252, "to": "mm"},
7438
   "name": "GRBM_PERFCOUNTER0_HI"
7439
  },
7440
  {
7441
   "chips": ["gfx8"],
7442
   "map": {"at": 213260, "to": "mm"},
7443
   "name": "GRBM_PERFCOUNTER1_LO"
7444
  },
7445
  {
7446
   "chips": ["gfx8"],
7447
   "map": {"at": 213264, "to": "mm"},
7448
   "name": "GRBM_PERFCOUNTER1_HI"
7449
  },
7450
  {
7451
   "chips": ["gfx8"],
7452
   "map": {"at": 213268, "to": "mm"},
7453
   "name": "GRBM_SE0_PERFCOUNTER_LO"
7454
  },
7455
  {
7456
   "chips": ["gfx8"],
7457
   "map": {"at": 213272, "to": "mm"},
7458
   "name": "GRBM_SE0_PERFCOUNTER_HI"
7459
  },
7460
  {
7461
   "chips": ["gfx8"],
7462
   "map": {"at": 213276, "to": "mm"},
7463
   "name": "GRBM_SE1_PERFCOUNTER_LO"
7464
  },
7465
  {
7466
   "chips": ["gfx8"],
7467
   "map": {"at": 213280, "to": "mm"},
7468
   "name": "GRBM_SE1_PERFCOUNTER_HI"
7469
  },
7470
  {
7471
   "chips": ["gfx8"],
7472
   "map": {"at": 213284, "to": "mm"},
7473
   "name": "GRBM_SE2_PERFCOUNTER_LO"
7474
  },
7475
  {
7476
   "chips": ["gfx8"],
7477
   "map": {"at": 213288, "to": "mm"},
7478
   "name": "GRBM_SE2_PERFCOUNTER_HI"
7479
  },
7480
  {
7481
   "chips": ["gfx8"],
7482
   "map": {"at": 213292, "to": "mm"},
7483
   "name": "GRBM_SE3_PERFCOUNTER_LO"
7484
  },
7485
  {
7486
   "chips": ["gfx8"],
7487
   "map": {"at": 213296, "to": "mm"},
7488
   "name": "GRBM_SE3_PERFCOUNTER_HI"
7489
  },
7490
  {
7491
   "chips": ["gfx8"],
7492
   "map": {"at": 213504, "to": "mm"},
7493
   "name": "WD_PERFCOUNTER0_LO"
7494
  },
7495
  {
7496
   "chips": ["gfx8"],
7497
   "map": {"at": 213508, "to": "mm"},
7498
   "name": "WD_PERFCOUNTER0_HI"
7499
  },
7500
  {
7501
   "chips": ["gfx8"],
7502
   "map": {"at": 213512, "to": "mm"},
7503
   "name": "WD_PERFCOUNTER1_LO"
7504
  },
7505
  {
7506
   "chips": ["gfx8"],
7507
   "map": {"at": 213516, "to": "mm"},
7508
   "name": "WD_PERFCOUNTER1_HI"
7509
  },
7510
  {
7511
   "chips": ["gfx8"],
7512
   "map": {"at": 213520, "to": "mm"},
7513
   "name": "WD_PERFCOUNTER2_LO"
7514
  },
7515
  {
7516
   "chips": ["gfx8"],
7517
   "map": {"at": 213524, "to": "mm"},
7518
   "name": "WD_PERFCOUNTER2_HI"
7519
  },
7520
  {
7521
   "chips": ["gfx8"],
7522
   "map": {"at": 213528, "to": "mm"},
7523
   "name": "WD_PERFCOUNTER3_LO"
7524
  },
7525
  {
7526
   "chips": ["gfx8"],
7527
   "map": {"at": 213532, "to": "mm"},
7528
   "name": "WD_PERFCOUNTER3_HI"
7529
  },
7530
  {
7531
   "chips": ["gfx8"],
7532
   "map": {"at": 213536, "to": "mm"},
7533
   "name": "IA_PERFCOUNTER0_LO"
7534
  },
7535
  {
7536
   "chips": ["gfx8"],
7537
   "map": {"at": 213540, "to": "mm"},
7538
   "name": "IA_PERFCOUNTER0_HI"
7539
  },
7540
  {
7541
   "chips": ["gfx8"],
7542
   "map": {"at": 213544, "to": "mm"},
7543
   "name": "IA_PERFCOUNTER1_LO"
7544
  },
7545
  {
7546
   "chips": ["gfx8"],
7547
   "map": {"at": 213548, "to": "mm"},
7548
   "name": "IA_PERFCOUNTER1_HI"
7549
  },
7550
  {
7551
   "chips": ["gfx8"],
7552
   "map": {"at": 213552, "to": "mm"},
7553
   "name": "IA_PERFCOUNTER2_LO"
7554
  },
7555
  {
7556
   "chips": ["gfx8"],
7557
   "map": {"at": 213556, "to": "mm"},
7558
   "name": "IA_PERFCOUNTER2_HI"
7559
  },
7560
  {
7561
   "chips": ["gfx8"],
7562
   "map": {"at": 213560, "to": "mm"},
7563
   "name": "IA_PERFCOUNTER3_LO"
7564
  },
7565
  {
7566
   "chips": ["gfx8"],
7567
   "map": {"at": 213564, "to": "mm"},
7568
   "name": "IA_PERFCOUNTER3_HI"
7569
  },
7570
  {
7571
   "chips": ["gfx8"],
7572
   "map": {"at": 213568, "to": "mm"},
7573
   "name": "VGT_PERFCOUNTER0_LO"
7574
  },
7575
  {
7576
   "chips": ["gfx8"],
7577
   "map": {"at": 213572, "to": "mm"},
7578
   "name": "VGT_PERFCOUNTER0_HI"
7579
  },
7580
  {
7581
   "chips": ["gfx8"],
7582
   "map": {"at": 213576, "to": "mm"},
7583
   "name": "VGT_PERFCOUNTER1_LO"
7584
  },
7585
  {
7586
   "chips": ["gfx8"],
7587
   "map": {"at": 213580, "to": "mm"},
7588
   "name": "VGT_PERFCOUNTER1_HI"
7589
  },
7590
  {
7591
   "chips": ["gfx8"],
7592
   "map": {"at": 213584, "to": "mm"},
7593
   "name": "VGT_PERFCOUNTER2_LO"
7594
  },
7595
  {
7596
   "chips": ["gfx8"],
7597
   "map": {"at": 213588, "to": "mm"},
7598
   "name": "VGT_PERFCOUNTER2_HI"
7599
  },
7600
  {
7601
   "chips": ["gfx8"],
7602
   "map": {"at": 213592, "to": "mm"},
7603
   "name": "VGT_PERFCOUNTER3_LO"
7604
  },
7605
  {
7606
   "chips": ["gfx8"],
7607
   "map": {"at": 213596, "to": "mm"},
7608
   "name": "VGT_PERFCOUNTER3_HI"
7609
  },
7610
  {
7611
   "chips": ["gfx8"],
7612
   "map": {"at": 214016, "to": "mm"},
7613
   "name": "PA_SU_PERFCOUNTER0_LO"
7614
  },
7615
  {
7616
   "chips": ["gfx8"],
7617
   "map": {"at": 214020, "to": "mm"},
7618
   "name": "PA_SU_PERFCOUNTER0_HI",
7619
   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7620
  },
7621
  {
7622
   "chips": ["gfx8"],
7623
   "map": {"at": 214024, "to": "mm"},
7624
   "name": "PA_SU_PERFCOUNTER1_LO"
7625
  },
7626
  {
7627
   "chips": ["gfx8"],
7628
   "map": {"at": 214028, "to": "mm"},
7629
   "name": "PA_SU_PERFCOUNTER1_HI",
7630
   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7631
  },
7632
  {
7633
   "chips": ["gfx8"],
7634
   "map": {"at": 214032, "to": "mm"},
7635
   "name": "PA_SU_PERFCOUNTER2_LO"
7636
  },
7637
  {
7638
   "chips": ["gfx8"],
7639
   "map": {"at": 214036, "to": "mm"},
7640
   "name": "PA_SU_PERFCOUNTER2_HI",
7641
   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7642
  },
7643
  {
7644
   "chips": ["gfx8"],
7645
   "map": {"at": 214040, "to": "mm"},
7646
   "name": "PA_SU_PERFCOUNTER3_LO"
7647
  },
7648
  {
7649
   "chips": ["gfx8"],
7650
   "map": {"at": 214044, "to": "mm"},
7651
   "name": "PA_SU_PERFCOUNTER3_HI",
7652
   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7653
  },
7654
  {
7655
   "chips": ["gfx8"],
7656
   "map": {"at": 214272, "to": "mm"},
7657
   "name": "PA_SC_PERFCOUNTER0_LO"
7658
  },
7659
  {
7660
   "chips": ["gfx8"],
7661
   "map": {"at": 214276, "to": "mm"},
7662
   "name": "PA_SC_PERFCOUNTER0_HI"
7663
  },
7664
  {
7665
   "chips": ["gfx8"],
7666
   "map": {"at": 214280, "to": "mm"},
7667
   "name": "PA_SC_PERFCOUNTER1_LO"
7668
  },
7669
  {
7670
   "chips": ["gfx8"],
7671
   "map": {"at": 214284, "to": "mm"},
7672
   "name": "PA_SC_PERFCOUNTER1_HI"
7673
  },
7674
  {
7675
   "chips": ["gfx8"],
7676
   "map": {"at": 214288, "to": "mm"},
7677
   "name": "PA_SC_PERFCOUNTER2_LO"
7678
  },
7679
  {
7680
   "chips": ["gfx8"],
7681
   "map": {"at": 214292, "to": "mm"},
7682
   "name": "PA_SC_PERFCOUNTER2_HI"
7683
  },
7684
  {
7685
   "chips": ["gfx8"],
7686
   "map": {"at": 214296, "to": "mm"},
7687
   "name": "PA_SC_PERFCOUNTER3_LO"
7688
  },
7689
  {
7690
   "chips": ["gfx8"],
7691
   "map": {"at": 214300, "to": "mm"},
7692
   "name": "PA_SC_PERFCOUNTER3_HI"
7693
  },
7694
  {
7695
   "chips": ["gfx8"],
7696
   "map": {"at": 214304, "to": "mm"},
7697
   "name": "PA_SC_PERFCOUNTER4_LO"
7698
  },
7699
  {
7700
   "chips": ["gfx8"],
7701
   "map": {"at": 214308, "to": "mm"},
7702
   "name": "PA_SC_PERFCOUNTER4_HI"
7703
  },
7704
  {
7705
   "chips": ["gfx8"],
7706
   "map": {"at": 214312, "to": "mm"},
7707
   "name": "PA_SC_PERFCOUNTER5_LO"
7708
  },
7709
  {
7710
   "chips": ["gfx8"],
7711
   "map": {"at": 214316, "to": "mm"},
7712
   "name": "PA_SC_PERFCOUNTER5_HI"
7713
  },
7714
  {
7715
   "chips": ["gfx8"],
7716
   "map": {"at": 214320, "to": "mm"},
7717
   "name": "PA_SC_PERFCOUNTER6_LO"
7718
  },
7719
  {
7720
   "chips": ["gfx8"],
7721
   "map": {"at": 214324, "to": "mm"},
7722
   "name": "PA_SC_PERFCOUNTER6_HI"
7723
  },
7724
  {
7725
   "chips": ["gfx8"],
7726
   "map": {"at": 214328, "to": "mm"},
7727
   "name": "PA_SC_PERFCOUNTER7_LO"
7728
  },
7729
  {
7730
   "chips": ["gfx8"],
7731
   "map": {"at": 214332, "to": "mm"},
7732
   "name": "PA_SC_PERFCOUNTER7_HI"
7733
  },
7734
  {
7735
   "chips": ["gfx8"],
7736
   "map": {"at": 214528, "to": "mm"},
7737
   "name": "SPI_PERFCOUNTER0_HI"
7738
  },
7739
  {
7740
   "chips": ["gfx8"],
7741
   "map": {"at": 214532, "to": "mm"},
7742
   "name": "SPI_PERFCOUNTER0_LO"
7743
  },
7744
  {
7745
   "chips": ["gfx8"],
7746
   "map": {"at": 214536, "to": "mm"},
7747
   "name": "SPI_PERFCOUNTER1_HI"
7748
  },
7749
  {
7750
   "chips": ["gfx8"],
7751
   "map": {"at": 214540, "to": "mm"},
7752
   "name": "SPI_PERFCOUNTER1_LO"
7753
  },
7754
  {
7755
   "chips": ["gfx8"],
7756
   "map": {"at": 214544, "to": "mm"},
7757
   "name": "SPI_PERFCOUNTER2_HI"
7758
  },
7759
  {
7760
   "chips": ["gfx8"],
7761
   "map": {"at": 214548, "to": "mm"},
7762
   "name": "SPI_PERFCOUNTER2_LO"
7763
  },
7764
  {
7765
   "chips": ["gfx8"],
7766
   "map": {"at": 214552, "to": "mm"},
7767
   "name": "SPI_PERFCOUNTER3_HI"
7768
  },
7769
  {
7770
   "chips": ["gfx8"],
7771
   "map": {"at": 214556, "to": "mm"},
7772
   "name": "SPI_PERFCOUNTER3_LO"
7773
  },
7774
  {
7775
   "chips": ["gfx8"],
7776
   "map": {"at": 214560, "to": "mm"},
7777
   "name": "SPI_PERFCOUNTER4_HI"
7778
  },
7779
  {
7780
   "chips": ["gfx8"],
7781
   "map": {"at": 214564, "to": "mm"},
7782
   "name": "SPI_PERFCOUNTER4_LO"
7783
  },
7784
  {
7785
   "chips": ["gfx8"],
7786
   "map": {"at": 214568, "to": "mm"},
7787
   "name": "SPI_PERFCOUNTER5_HI"
7788
  },
7789
  {
7790
   "chips": ["gfx8"],
7791
   "map": {"at": 214572, "to": "mm"},
7792
   "name": "SPI_PERFCOUNTER5_LO"
7793
  },
7794
  {
7795
   "chips": ["gfx8"],
7796
   "map": {"at": 214784, "to": "mm"},
7797
   "name": "SQ_PERFCOUNTER0_LO"
7798
  },
7799
  {
7800
   "chips": ["gfx8"],
7801
   "map": {"at": 214788, "to": "mm"},
7802
   "name": "SQ_PERFCOUNTER0_HI"
7803
  },
7804
  {
7805
   "chips": ["gfx8"],
7806
   "map": {"at": 214792, "to": "mm"},
7807
   "name": "SQ_PERFCOUNTER1_LO"
7808
  },
7809
  {
7810
   "chips": ["gfx8"],
7811
   "map": {"at": 214796, "to": "mm"},
7812
   "name": "SQ_PERFCOUNTER1_HI"
7813
  },
7814
  {
7815
   "chips": ["gfx8"],
7816
   "map": {"at": 214800, "to": "mm"},
7817
   "name": "SQ_PERFCOUNTER2_LO"
7818
  },
7819
  {
7820
   "chips": ["gfx8"],
7821
   "map": {"at": 214804, "to": "mm"},
7822
   "name": "SQ_PERFCOUNTER2_HI"
7823
  },
7824
  {
7825
   "chips": ["gfx8"],
7826
   "map": {"at": 214808, "to": "mm"},
7827
   "name": "SQ_PERFCOUNTER3_LO"
7828
  },
7829
  {
7830
   "chips": ["gfx8"],
7831
   "map": {"at": 214812, "to": "mm"},
7832
   "name": "SQ_PERFCOUNTER3_HI"
7833
  },
7834
  {
7835
   "chips": ["gfx8"],
7836
   "map": {"at": 214816, "to": "mm"},
7837
   "name": "SQ_PERFCOUNTER4_LO"
7838
  },
7839
  {
7840
   "chips": ["gfx8"],
7841
   "map": {"at": 214820, "to": "mm"},
7842
   "name": "SQ_PERFCOUNTER4_HI"
7843
  },
7844
  {
7845
   "chips": ["gfx8"],
7846
   "map": {"at": 214824, "to": "mm"},
7847
   "name": "SQ_PERFCOUNTER5_LO"
7848
  },
7849
  {
7850
   "chips": ["gfx8"],
7851
   "map": {"at": 214828, "to": "mm"},
7852
   "name": "SQ_PERFCOUNTER5_HI"
7853
  },
7854
  {
7855
   "chips": ["gfx8"],
7856
   "map": {"at": 214832, "to": "mm"},
7857
   "name": "SQ_PERFCOUNTER6_LO"
7858
  },
7859
  {
7860
   "chips": ["gfx8"],
7861
   "map": {"at": 214836, "to": "mm"},
7862
   "name": "SQ_PERFCOUNTER6_HI"
7863
  },
7864
  {
7865
   "chips": ["gfx8"],
7866
   "map": {"at": 214840, "to": "mm"},
7867
   "name": "SQ_PERFCOUNTER7_LO"
7868
  },
7869
  {
7870
   "chips": ["gfx8"],
7871
   "map": {"at": 214844, "to": "mm"},
7872
   "name": "SQ_PERFCOUNTER7_HI"
7873
  },
7874
  {
7875
   "chips": ["gfx8"],
7876
   "map": {"at": 214848, "to": "mm"},
7877
   "name": "SQ_PERFCOUNTER8_LO"
7878
  },
7879
  {
7880
   "chips": ["gfx8"],
7881
   "map": {"at": 214852, "to": "mm"},
7882
   "name": "SQ_PERFCOUNTER8_HI"
7883
  },
7884
  {
7885
   "chips": ["gfx8"],
7886
   "map": {"at": 214856, "to": "mm"},
7887
   "name": "SQ_PERFCOUNTER9_LO"
7888
  },
7889
  {
7890
   "chips": ["gfx8"],
7891
   "map": {"at": 214860, "to": "mm"},
7892
   "name": "SQ_PERFCOUNTER9_HI"
7893
  },
7894
  {
7895
   "chips": ["gfx8"],
7896
   "map": {"at": 214864, "to": "mm"},
7897
   "name": "SQ_PERFCOUNTER10_LO"
7898
  },
7899
  {
7900
   "chips": ["gfx8"],
7901
   "map": {"at": 214868, "to": "mm"},
7902
   "name": "SQ_PERFCOUNTER10_HI"
7903
  },
7904
  {
7905
   "chips": ["gfx8"],
7906
   "map": {"at": 214872, "to": "mm"},
7907
   "name": "SQ_PERFCOUNTER11_LO"
7908
  },
7909
  {
7910
   "chips": ["gfx8"],
7911
   "map": {"at": 214876, "to": "mm"},
7912
   "name": "SQ_PERFCOUNTER11_HI"
7913
  },
7914
  {
7915
   "chips": ["gfx8"],
7916
   "map": {"at": 214880, "to": "mm"},
7917
   "name": "SQ_PERFCOUNTER12_LO"
7918
  },
7919
  {
7920
   "chips": ["gfx8"],
7921
   "map": {"at": 214884, "to": "mm"},
7922
   "name": "SQ_PERFCOUNTER12_HI"
7923
  },
7924
  {
7925
   "chips": ["gfx8"],
7926
   "map": {"at": 214888, "to": "mm"},
7927
   "name": "SQ_PERFCOUNTER13_LO"
7928
  },
7929
  {
7930
   "chips": ["gfx8"],
7931
   "map": {"at": 214892, "to": "mm"},
7932
   "name": "SQ_PERFCOUNTER13_HI"
7933
  },
7934
  {
7935
   "chips": ["gfx8"],
7936
   "map": {"at": 214896, "to": "mm"},
7937
   "name": "SQ_PERFCOUNTER14_LO"
7938
  },
7939
  {
7940
   "chips": ["gfx8"],
7941
   "map": {"at": 214900, "to": "mm"},
7942
   "name": "SQ_PERFCOUNTER14_HI"
7943
  },
7944
  {
7945
   "chips": ["gfx8"],
7946
   "map": {"at": 214904, "to": "mm"},
7947
   "name": "SQ_PERFCOUNTER15_LO"
7948
  },
7949
  {
7950
   "chips": ["gfx8"],
7951
   "map": {"at": 214908, "to": "mm"},
7952
   "name": "SQ_PERFCOUNTER15_HI"
7953
  },
7954
  {
7955
   "chips": ["gfx8"],
7956
   "map": {"at": 215296, "to": "mm"},
7957
   "name": "SX_PERFCOUNTER0_LO"
7958
  },
7959
  {
7960
   "chips": ["gfx8"],
7961
   "map": {"at": 215300, "to": "mm"},
7962
   "name": "SX_PERFCOUNTER0_HI"
7963
  },
7964
  {
7965
   "chips": ["gfx8"],
7966
   "map": {"at": 215304, "to": "mm"},
7967
   "name": "SX_PERFCOUNTER1_LO"
7968
  },
7969
  {
7970
   "chips": ["gfx8"],
7971
   "map": {"at": 215308, "to": "mm"},
7972
   "name": "SX_PERFCOUNTER1_HI"
7973
  },
7974
  {
7975
   "chips": ["gfx8"],
7976
   "map": {"at": 215312, "to": "mm"},
7977
   "name": "SX_PERFCOUNTER2_LO"
7978
  },
7979
  {
7980
   "chips": ["gfx8"],
7981
   "map": {"at": 215316, "to": "mm"},
7982
   "name": "SX_PERFCOUNTER2_HI"
7983
  },
7984
  {
7985
   "chips": ["gfx8"],
7986
   "map": {"at": 215320, "to": "mm"},
7987
   "name": "SX_PERFCOUNTER3_LO"
7988
  },
7989
  {
7990
   "chips": ["gfx8"],
7991
   "map": {"at": 215324, "to": "mm"},
7992
   "name": "SX_PERFCOUNTER3_HI"
7993
  },
7994
  {
7995
   "chips": ["gfx8"],
7996
   "map": {"at": 215552, "to": "mm"},
7997
   "name": "GDS_PERFCOUNTER0_LO"
7998
  },
7999
  {
8000
   "chips": ["gfx8"],
8001
   "map": {"at": 215556, "to": "mm"},
8002
   "name": "GDS_PERFCOUNTER0_HI"
8003
  },
8004
  {
8005
   "chips": ["gfx8"],
8006
   "map": {"at": 215560, "to": "mm"},
8007
   "name": "GDS_PERFCOUNTER1_LO"
8008
  },
8009
  {
8010
   "chips": ["gfx8"],
8011
   "map": {"at": 215564, "to": "mm"},
8012
   "name": "GDS_PERFCOUNTER1_HI"
8013
  },
8014
  {
8015
   "chips": ["gfx8"],
8016
   "map": {"at": 215568, "to": "mm"},
8017
   "name": "GDS_PERFCOUNTER2_LO"
8018
  },
8019
  {
8020
   "chips": ["gfx8"],
8021
   "map": {"at": 215572, "to": "mm"},
8022
   "name": "GDS_PERFCOUNTER2_HI"
8023
  },
8024
  {
8025
   "chips": ["gfx8"],
8026
   "map": {"at": 215576, "to": "mm"},
8027
   "name": "GDS_PERFCOUNTER3_LO"
8028
  },
8029
  {
8030
   "chips": ["gfx8"],
8031
   "map": {"at": 215580, "to": "mm"},
8032
   "name": "GDS_PERFCOUNTER3_HI"
8033
  },
8034
  {
8035
   "chips": ["gfx8"],
8036
   "map": {"at": 215808, "to": "mm"},
8037
   "name": "TA_PERFCOUNTER0_LO"
8038
  },
8039
  {
8040
   "chips": ["gfx8"],
8041
   "map": {"at": 215812, "to": "mm"},
8042
   "name": "TA_PERFCOUNTER0_HI"
8043
  },
8044
  {
8045
   "chips": ["gfx8"],
8046
   "map": {"at": 215816, "to": "mm"},
8047
   "name": "TA_PERFCOUNTER1_LO"
8048
  },
8049
  {
8050
   "chips": ["gfx8"],
8051
   "map": {"at": 215820, "to": "mm"},
8052
   "name": "TA_PERFCOUNTER1_HI"
8053
  },
8054
  {
8055
   "chips": ["gfx8"],
8056
   "map": {"at": 216064, "to": "mm"},
8057
   "name": "TD_PERFCOUNTER0_LO"
8058
  },
8059
  {
8060
   "chips": ["gfx8"],
8061
   "map": {"at": 216068, "to": "mm"},
8062
   "name": "TD_PERFCOUNTER0_HI"
8063
  },
8064
  {
8065
   "chips": ["gfx8"],
8066
   "map": {"at": 216072, "to": "mm"},
8067
   "name": "TD_PERFCOUNTER1_LO"
8068
  },
8069
  {
8070
   "chips": ["gfx8"],
8071
   "map": {"at": 216076, "to": "mm"},
8072
   "name": "TD_PERFCOUNTER1_HI"
8073
  },
8074
  {
8075
   "chips": ["gfx8"],
8076
   "map": {"at": 216320, "to": "mm"},
8077
   "name": "TCP_PERFCOUNTER0_LO"
8078
  },
8079
  {
8080
   "chips": ["gfx8"],
8081
   "map": {"at": 216324, "to": "mm"},
8082
   "name": "TCP_PERFCOUNTER0_HI"
8083
  },
8084
  {
8085
   "chips": ["gfx8"],
8086
   "map": {"at": 216328, "to": "mm"},
8087
   "name": "TCP_PERFCOUNTER1_LO"
8088
  },
8089
  {
8090
   "chips": ["gfx8"],
8091
   "map": {"at": 216332, "to": "mm"},
8092
   "name": "TCP_PERFCOUNTER1_HI"
8093
  },
8094
  {
8095
   "chips": ["gfx8"],
8096
   "map": {"at": 216336, "to": "mm"},
8097
   "name": "TCP_PERFCOUNTER2_LO"
8098
  },
8099
  {
8100
   "chips": ["gfx8"],
8101
   "map": {"at": 216340, "to": "mm"},
8102
   "name": "TCP_PERFCOUNTER2_HI"
8103
  },
8104
  {
8105
   "chips": ["gfx8"],
8106
   "map": {"at": 216344, "to": "mm"},
8107
   "name": "TCP_PERFCOUNTER3_LO"
8108
  },
8109
  {
8110
   "chips": ["gfx8"],
8111
   "map": {"at": 216348, "to": "mm"},
8112
   "name": "TCP_PERFCOUNTER3_HI"
8113
  },
8114
  {
8115
   "chips": ["gfx8"],
8116
   "map": {"at": 216576, "to": "mm"},
8117
   "name": "TCC_PERFCOUNTER0_LO"
8118
  },
8119
  {
8120
   "chips": ["gfx8"],
8121
   "map": {"at": 216580, "to": "mm"},
8122
   "name": "TCC_PERFCOUNTER0_HI"
8123
  },
8124
  {
8125
   "chips": ["gfx8"],
8126
   "map": {"at": 216584, "to": "mm"},
8127
   "name": "TCC_PERFCOUNTER1_LO"
8128
  },
8129
  {
8130
   "chips": ["gfx8"],
8131
   "map": {"at": 216588, "to": "mm"},
8132
   "name": "TCC_PERFCOUNTER1_HI"
8133
  },
8134
  {
8135
   "chips": ["gfx8"],
8136
   "map": {"at": 216592, "to": "mm"},
8137
   "name": "TCC_PERFCOUNTER2_LO"
8138
  },
8139
  {
8140
   "chips": ["gfx8"],
8141
   "map": {"at": 216596, "to": "mm"},
8142
   "name": "TCC_PERFCOUNTER2_HI"
8143
  },
8144
  {
8145
   "chips": ["gfx8"],
8146
   "map": {"at": 216600, "to": "mm"},
8147
   "name": "TCC_PERFCOUNTER3_LO"
8148
  },
8149
  {
8150
   "chips": ["gfx8"],
8151
   "map": {"at": 216604, "to": "mm"},
8152
   "name": "TCC_PERFCOUNTER3_HI"
8153
  },
8154
  {
8155
   "chips": ["gfx8"],
8156
   "map": {"at": 216640, "to": "mm"},
8157
   "name": "TCA_PERFCOUNTER0_LO"
8158
  },
8159
  {
8160
   "chips": ["gfx8"],
8161
   "map": {"at": 216644, "to": "mm"},
8162
   "name": "TCA_PERFCOUNTER0_HI"
8163
  },
8164
  {
8165
   "chips": ["gfx8"],
8166
   "map": {"at": 216648, "to": "mm"},
8167
   "name": "TCA_PERFCOUNTER1_LO"
8168
  },
8169
  {
8170
   "chips": ["gfx8"],
8171
   "map": {"at": 216652, "to": "mm"},
8172
   "name": "TCA_PERFCOUNTER1_HI"
8173
  },
8174
  {
8175
   "chips": ["gfx8"],
8176
   "map": {"at": 216656, "to": "mm"},
8177
   "name": "TCA_PERFCOUNTER2_LO"
8178
  },
8179
  {
8180
   "chips": ["gfx8"],
8181
   "map": {"at": 216660, "to": "mm"},
8182
   "name": "TCA_PERFCOUNTER2_HI"
8183
  },
8184
  {
8185
   "chips": ["gfx8"],
8186
   "map": {"at": 216664, "to": "mm"},
8187
   "name": "TCA_PERFCOUNTER3_LO"
8188
  },
8189
  {
8190
   "chips": ["gfx8"],
8191
   "map": {"at": 216668, "to": "mm"},
8192
   "name": "TCA_PERFCOUNTER3_HI"
8193
  },
8194
  {
8195
   "chips": ["gfx8"],
8196
   "map": {"at": 217112, "to": "mm"},
8197
   "name": "CB_PERFCOUNTER0_LO"
8198
  },
8199
  {
8200
   "chips": ["gfx8"],
8201
   "map": {"at": 217116, "to": "mm"},
8202
   "name": "CB_PERFCOUNTER0_HI"
8203
  },
8204
  {
8205
   "chips": ["gfx8"],
8206
   "map": {"at": 217120, "to": "mm"},
8207
   "name": "CB_PERFCOUNTER1_LO"
8208
  },
8209
  {
8210
   "chips": ["gfx8"],
8211
   "map": {"at": 217124, "to": "mm"},
8212
   "name": "CB_PERFCOUNTER1_HI"
8213
  },
8214
  {
8215
   "chips": ["gfx8"],
8216
   "map": {"at": 217128, "to": "mm"},
8217
   "name": "CB_PERFCOUNTER2_LO"
8218
  },
8219
  {
8220
   "chips": ["gfx8"],
8221
   "map": {"at": 217132, "to": "mm"},
8222
   "name": "CB_PERFCOUNTER2_HI"
8223
  },
8224
  {
8225
   "chips": ["gfx8"],
8226
   "map": {"at": 217136, "to": "mm"},
8227
   "name": "CB_PERFCOUNTER3_LO"
8228
  },
8229
  {
8230
   "chips": ["gfx8"],
8231
   "map": {"at": 217140, "to": "mm"},
8232
   "name": "CB_PERFCOUNTER3_HI"
8233
  },
8234
  {
8235
   "chips": ["gfx8"],
8236
   "map": {"at": 217344, "to": "mm"},
8237
   "name": "DB_PERFCOUNTER0_LO"
8238
  },
8239
  {
8240
   "chips": ["gfx8"],
8241
   "map": {"at": 217348, "to": "mm"},
8242
   "name": "DB_PERFCOUNTER0_HI"
8243
  },
8244
  {
8245
   "chips": ["gfx8"],
8246
   "map": {"at": 217352, "to": "mm"},
8247
   "name": "DB_PERFCOUNTER1_LO"
8248
  },
8249
  {
8250
   "chips": ["gfx8"],
8251
   "map": {"at": 217356, "to": "mm"},
8252
   "name": "DB_PERFCOUNTER1_HI"
8253
  },
8254
  {
8255
   "chips": ["gfx8"],
8256
   "map": {"at": 217360, "to": "mm"},
8257
   "name": "DB_PERFCOUNTER2_LO"
8258
  },
8259
  {
8260
   "chips": ["gfx8"],
8261
   "map": {"at": 217364, "to": "mm"},
8262
   "name": "DB_PERFCOUNTER2_HI"
8263
  },
8264
  {
8265
   "chips": ["gfx8"],
8266
   "map": {"at": 217368, "to": "mm"},
8267
   "name": "DB_PERFCOUNTER3_LO"
8268
  },
8269
  {
8270
   "chips": ["gfx8"],
8271
   "map": {"at": 217372, "to": "mm"},
8272
   "name": "DB_PERFCOUNTER3_HI"
8273
  },
8274
  {
8275
   "chips": ["gfx8"],
8276
   "map": {"at": 217600, "to": "mm"},
8277
   "name": "RLC_PERFCOUNTER0_LO"
8278
  },
8279
  {
8280
   "chips": ["gfx8"],
8281
   "map": {"at": 217604, "to": "mm"},
8282
   "name": "RLC_PERFCOUNTER0_HI"
8283
  },
8284
  {
8285
   "chips": ["gfx8"],
8286
   "map": {"at": 217608, "to": "mm"},
8287
   "name": "RLC_PERFCOUNTER1_LO"
8288
  },
8289
  {
8290
   "chips": ["gfx8"],
8291
   "map": {"at": 217612, "to": "mm"},
8292
   "name": "RLC_PERFCOUNTER1_HI"
8293
  },
8294
  {
8295
   "chips": ["gfx8"],
8296
   "map": {"at": 221184, "to": "mm"},
8297
   "name": "CPG_PERFCOUNTER1_SELECT",
8298
   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8299
  },
8300
  {
8301
   "chips": ["gfx8"],
8302
   "map": {"at": 221188, "to": "mm"},
8303
   "name": "CPG_PERFCOUNTER0_SELECT1",
8304
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8305
  },
8306
  {
8307
   "chips": ["gfx8"],
8308
   "map": {"at": 221192, "to": "mm"},
8309
   "name": "CPG_PERFCOUNTER0_SELECT",
8310
   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8311
  },
8312
  {
8313
   "chips": ["gfx8"],
8314
   "map": {"at": 221196, "to": "mm"},
8315
   "name": "CPC_PERFCOUNTER1_SELECT",
8316
   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8317
  },
8318
  {
8319
   "chips": ["gfx8"],
8320
   "map": {"at": 221200, "to": "mm"},
8321
   "name": "CPC_PERFCOUNTER0_SELECT1",
8322
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8323
  },
8324
  {
8325
   "chips": ["gfx8"],
8326
   "map": {"at": 221204, "to": "mm"},
8327
   "name": "CPF_PERFCOUNTER1_SELECT",
8328
   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8329
  },
8330
  {
8331
   "chips": ["gfx8"],
8332
   "map": {"at": 221208, "to": "mm"},
8333
   "name": "CPF_PERFCOUNTER0_SELECT1",
8334
   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8335
  },
8336
  {
8337
   "chips": ["gfx8"],
8338
   "map": {"at": 221212, "to": "mm"},
8339
   "name": "CPF_PERFCOUNTER0_SELECT",
8340
   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8341
  },
8342
  {
8343
   "chips": ["gfx8"],
8344
   "map": {"at": 221216, "to": "mm"},
8345
   "name": "CP_PERFMON_CNTL",
8346
   "type_ref": "CP_PERFMON_CNTL"
8347
  },
8348
  {
8349
   "chips": ["gfx8"],
8350
   "map": {"at": 221220, "to": "mm"},
8351
   "name": "CPC_PERFCOUNTER0_SELECT",
8352
   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8353
  },
8354
  {
8355
   "chips": ["gfx8"],
8356
   "map": {"at": 221248, "to": "mm"},
8357
   "name": "CP_DRAW_OBJECT"
8358
  },
8359
  {
8360
   "chips": ["gfx8"],
8361
   "map": {"at": 221252, "to": "mm"},
8362
   "name": "CP_DRAW_OBJECT_COUNTER",
8363
   "type_ref": "CP_DRAW_OBJECT_COUNTER"
8364
  },
8365
  {
8366
   "chips": ["gfx8"],
8367
   "map": {"at": 221256, "to": "mm"},
8368
   "name": "CP_DRAW_WINDOW_MASK_HI"
8369
  },
8370
  {
8371
   "chips": ["gfx8"],
8372
   "map": {"at": 221260, "to": "mm"},
8373
   "name": "CP_DRAW_WINDOW_HI"
8374
  },
8375
  {
8376
   "chips": ["gfx8"],
8377
   "map": {"at": 221264, "to": "mm"},
8378
   "name": "CP_DRAW_WINDOW_LO",
8379
   "type_ref": "CP_DRAW_WINDOW_LO"
8380
  },
8381
  {
8382
   "chips": ["gfx8"],
8383
   "map": {"at": 221268, "to": "mm"},
8384
   "name": "CP_DRAW_WINDOW_CNTL",
8385
   "type_ref": "CP_DRAW_WINDOW_CNTL"
8386
  },
8387
  {
8388
   "chips": ["gfx8"],
8389
   "map": {"at": 221440, "to": "mm"},
8390
   "name": "GRBM_PERFCOUNTER0_SELECT",
8391
   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
8392
  },
8393
  {
8394
   "chips": ["gfx8"],
8395
   "map": {"at": 221444, "to": "mm"},
8396
   "name": "GRBM_PERFCOUNTER1_SELECT",
8397
   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
8398
  },
8399
  {
8400
   "chips": ["gfx8"],
8401
   "map": {"at": 221448, "to": "mm"},
8402
   "name": "GRBM_SE0_PERFCOUNTER_SELECT",
8403
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8404
  },
8405
  {
8406
   "chips": ["gfx8"],
8407
   "map": {"at": 221452, "to": "mm"},
8408
   "name": "GRBM_SE1_PERFCOUNTER_SELECT",
8409
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8410
  },
8411
  {
8412
   "chips": ["gfx8"],
8413
   "map": {"at": 221456, "to": "mm"},
8414
   "name": "GRBM_SE2_PERFCOUNTER_SELECT",
8415
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8416
  },
8417
  {
8418
   "chips": ["gfx8"],
8419
   "map": {"at": 221460, "to": "mm"},
8420
   "name": "GRBM_SE3_PERFCOUNTER_SELECT",
8421
   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8422
  },
8423
  {
8424
   "chips": ["gfx8"],
8425
   "map": {"at": 221696, "to": "mm"},
8426
   "name": "WD_PERFCOUNTER0_SELECT",
8427
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8428
  },
8429
  {
8430
   "chips": ["gfx8"],
8431
   "map": {"at": 221700, "to": "mm"},
8432
   "name": "WD_PERFCOUNTER1_SELECT",
8433
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8434
  },
8435
  {
8436
   "chips": ["gfx8"],
8437
   "map": {"at": 221704, "to": "mm"},
8438
   "name": "WD_PERFCOUNTER2_SELECT",
8439
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8440
  },
8441
  {
8442
   "chips": ["gfx8"],
8443
   "map": {"at": 221708, "to": "mm"},
8444
   "name": "WD_PERFCOUNTER3_SELECT",
8445
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8446
  },
8447
  {
8448
   "chips": ["gfx8"],
8449
   "map": {"at": 221712, "to": "mm"},
8450
   "name": "IA_PERFCOUNTER0_SELECT",
8451
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8452
  },
8453
  {
8454
   "chips": ["gfx8"],
8455
   "map": {"at": 221716, "to": "mm"},
8456
   "name": "IA_PERFCOUNTER1_SELECT",
8457
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8458
  },
8459
  {
8460
   "chips": ["gfx8"],
8461
   "map": {"at": 221720, "to": "mm"},
8462
   "name": "IA_PERFCOUNTER2_SELECT",
8463
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8464
  },
8465
  {
8466
   "chips": ["gfx8"],
8467
   "map": {"at": 221724, "to": "mm"},
8468
   "name": "IA_PERFCOUNTER3_SELECT",
8469
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8470
  },
8471
  {
8472
   "chips": ["gfx8"],
8473
   "map": {"at": 221728, "to": "mm"},
8474
   "name": "IA_PERFCOUNTER0_SELECT1",
8475
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8476
  },
8477
  {
8478
   "chips": ["gfx8"],
8479
   "map": {"at": 221744, "to": "mm"},
8480
   "name": "VGT_PERFCOUNTER0_SELECT",
8481
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8482
  },
8483
  {
8484
   "chips": ["gfx8"],
8485
   "map": {"at": 221748, "to": "mm"},
8486
   "name": "VGT_PERFCOUNTER1_SELECT",
8487
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8488
  },
8489
  {
8490
   "chips": ["gfx8"],
8491
   "map": {"at": 221752, "to": "mm"},
8492
   "name": "VGT_PERFCOUNTER2_SELECT",
8493
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8494
  },
8495
  {
8496
   "chips": ["gfx8"],
8497
   "map": {"at": 221756, "to": "mm"},
8498
   "name": "VGT_PERFCOUNTER3_SELECT",
8499
   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8500
  },
8501
  {
8502
   "chips": ["gfx8"],
8503
   "map": {"at": 221760, "to": "mm"},
8504
   "name": "VGT_PERFCOUNTER0_SELECT1",
8505
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8506
  },
8507
  {
8508
   "chips": ["gfx8"],
8509
   "map": {"at": 221764, "to": "mm"},
8510
   "name": "VGT_PERFCOUNTER1_SELECT1",
8511
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8512
  },
8513
  {
8514
   "chips": ["gfx8"],
8515
   "map": {"at": 221776, "to": "mm"},
8516
   "name": "VGT_PERFCOUNTER_SEID_MASK",
8517
   "type_ref": "VGT_PERFCOUNTER_SEID_MASK"
8518
  },
8519
  {
8520
   "chips": ["gfx8"],
8521
   "map": {"at": 222208, "to": "mm"},
8522
   "name": "PA_SU_PERFCOUNTER0_SELECT",
8523
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8524
  },
8525
  {
8526
   "chips": ["gfx8"],
8527
   "map": {"at": 222212, "to": "mm"},
8528
   "name": "PA_SU_PERFCOUNTER0_SELECT1",
8529
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8530
  },
8531
  {
8532
   "chips": ["gfx8"],
8533
   "map": {"at": 222216, "to": "mm"},
8534
   "name": "PA_SU_PERFCOUNTER1_SELECT",
8535
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8536
  },
8537
  {
8538
   "chips": ["gfx8"],
8539
   "map": {"at": 222220, "to": "mm"},
8540
   "name": "PA_SU_PERFCOUNTER1_SELECT1",
8541
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8542
  },
8543
  {
8544
   "chips": ["gfx8"],
8545
   "map": {"at": 222224, "to": "mm"},
8546
   "name": "PA_SU_PERFCOUNTER2_SELECT",
8547
   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
8548
  },
8549
  {
8550
   "chips": ["gfx8"],
8551
   "map": {"at": 222228, "to": "mm"},
8552
   "name": "PA_SU_PERFCOUNTER3_SELECT",
8553
   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
8554
  },
8555
  {
8556
   "chips": ["gfx8"],
8557
   "map": {"at": 222464, "to": "mm"},
8558
   "name": "PA_SC_PERFCOUNTER0_SELECT",
8559
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8560
  },
8561
  {
8562
   "chips": ["gfx8"],
8563
   "map": {"at": 222468, "to": "mm"},
8564
   "name": "PA_SC_PERFCOUNTER0_SELECT1",
8565
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8566
  },
8567
  {
8568
   "chips": ["gfx8"],
8569
   "map": {"at": 222472, "to": "mm"},
8570
   "name": "PA_SC_PERFCOUNTER1_SELECT",
8571
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8572
  },
8573
  {
8574
   "chips": ["gfx8"],
8575
   "map": {"at": 222476, "to": "mm"},
8576
   "name": "PA_SC_PERFCOUNTER2_SELECT",
8577
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8578
  },
8579
  {
8580
   "chips": ["gfx8"],
8581
   "map": {"at": 222480, "to": "mm"},
8582
   "name": "PA_SC_PERFCOUNTER3_SELECT",
8583
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8584
  },
8585
  {
8586
   "chips": ["gfx8"],
8587
   "map": {"at": 222484, "to": "mm"},
8588
   "name": "PA_SC_PERFCOUNTER4_SELECT",
8589
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8590
  },
8591
  {
8592
   "chips": ["gfx8"],
8593
   "map": {"at": 222488, "to": "mm"},
8594
   "name": "PA_SC_PERFCOUNTER5_SELECT",
8595
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8596
  },
8597
  {
8598
   "chips": ["gfx8"],
8599
   "map": {"at": 222492, "to": "mm"},
8600
   "name": "PA_SC_PERFCOUNTER6_SELECT",
8601
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8602
  },
8603
  {
8604
   "chips": ["gfx8"],
8605
   "map": {"at": 222496, "to": "mm"},
8606
   "name": "PA_SC_PERFCOUNTER7_SELECT",
8607
   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8608
  },
8609
  {
8610
   "chips": ["gfx8"],
8611
   "map": {"at": 222720, "to": "mm"},
8612
   "name": "SPI_PERFCOUNTER0_SELECT",
8613
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8614
  },
8615
  {
8616
   "chips": ["gfx8"],
8617
   "map": {"at": 222724, "to": "mm"},
8618
   "name": "SPI_PERFCOUNTER1_SELECT",
8619
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8620
  },
8621
  {
8622
   "chips": ["gfx8"],
8623
   "map": {"at": 222728, "to": "mm"},
8624
   "name": "SPI_PERFCOUNTER2_SELECT",
8625
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8626
  },
8627
  {
8628
   "chips": ["gfx8"],
8629
   "map": {"at": 222732, "to": "mm"},
8630
   "name": "SPI_PERFCOUNTER3_SELECT",
8631
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8632
  },
8633
  {
8634
   "chips": ["gfx8"],
8635
   "map": {"at": 222736, "to": "mm"},
8636
   "name": "SPI_PERFCOUNTER0_SELECT1",
8637
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8638
  },
8639
  {
8640
   "chips": ["gfx8"],
8641
   "map": {"at": 222740, "to": "mm"},
8642
   "name": "SPI_PERFCOUNTER1_SELECT1",
8643
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8644
  },
8645
  {
8646
   "chips": ["gfx8"],
8647
   "map": {"at": 222744, "to": "mm"},
8648
   "name": "SPI_PERFCOUNTER2_SELECT1",
8649
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8650
  },
8651
  {
8652
   "chips": ["gfx8"],
8653
   "map": {"at": 222748, "to": "mm"},
8654
   "name": "SPI_PERFCOUNTER3_SELECT1",
8655
   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8656
  },
8657
  {
8658
   "chips": ["gfx8"],
8659
   "map": {"at": 222752, "to": "mm"},
8660
   "name": "SPI_PERFCOUNTER4_SELECT",
8661
   "type_ref": "SPI_PERFCOUNTER4_SELECT"
8662
  },
8663
  {
8664
   "chips": ["gfx8"],
8665
   "map": {"at": 222756, "to": "mm"},
8666
   "name": "SPI_PERFCOUNTER5_SELECT",
8667
   "type_ref": "SPI_PERFCOUNTER4_SELECT"
8668
  },
8669
  {
8670
   "chips": ["gfx8"],
8671
   "map": {"at": 222760, "to": "mm"},
8672
   "name": "SPI_PERFCOUNTER_BINS",
8673
   "type_ref": "SPI_PERFCOUNTER_BINS"
8674
  },
8675
  {
8676
   "chips": ["gfx8"],
8677
   "map": {"at": 222976, "to": "mm"},
8678
   "name": "SQ_PERFCOUNTER0_SELECT",
8679
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8680
  },
8681
  {
8682
   "chips": ["gfx8"],
8683
   "map": {"at": 222980, "to": "mm"},
8684
   "name": "SQ_PERFCOUNTER1_SELECT",
8685
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8686
  },
8687
  {
8688
   "chips": ["gfx8"],
8689
   "map": {"at": 222984, "to": "mm"},
8690
   "name": "SQ_PERFCOUNTER2_SELECT",
8691
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8692
  },
8693
  {
8694
   "chips": ["gfx8"],
8695
   "map": {"at": 222988, "to": "mm"},
8696
   "name": "SQ_PERFCOUNTER3_SELECT",
8697
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8698
  },
8699
  {
8700
   "chips": ["gfx8"],
8701
   "map": {"at": 222992, "to": "mm"},
8702
   "name": "SQ_PERFCOUNTER4_SELECT",
8703
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8704
  },
8705
  {
8706
   "chips": ["gfx8"],
8707
   "map": {"at": 222996, "to": "mm"},
8708
   "name": "SQ_PERFCOUNTER5_SELECT",
8709
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8710
  },
8711
  {
8712
   "chips": ["gfx8"],
8713
   "map": {"at": 223000, "to": "mm"},
8714
   "name": "SQ_PERFCOUNTER6_SELECT",
8715
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8716
  },
8717
  {
8718
   "chips": ["gfx8"],
8719
   "map": {"at": 223004, "to": "mm"},
8720
   "name": "SQ_PERFCOUNTER7_SELECT",
8721
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8722
  },
8723
  {
8724
   "chips": ["gfx8"],
8725
   "map": {"at": 223008, "to": "mm"},
8726
   "name": "SQ_PERFCOUNTER8_SELECT",
8727
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8728
  },
8729
  {
8730
   "chips": ["gfx8"],
8731
   "map": {"at": 223012, "to": "mm"},
8732
   "name": "SQ_PERFCOUNTER9_SELECT",
8733
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8734
  },
8735
  {
8736
   "chips": ["gfx8"],
8737
   "map": {"at": 223016, "to": "mm"},
8738
   "name": "SQ_PERFCOUNTER10_SELECT",
8739
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8740
  },
8741
  {
8742
   "chips": ["gfx8"],
8743
   "map": {"at": 223020, "to": "mm"},
8744
   "name": "SQ_PERFCOUNTER11_SELECT",
8745
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8746
  },
8747
  {
8748
   "chips": ["gfx8"],
8749
   "map": {"at": 223024, "to": "mm"},
8750
   "name": "SQ_PERFCOUNTER12_SELECT",
8751
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8752
  },
8753
  {
8754
   "chips": ["gfx8"],
8755
   "map": {"at": 223028, "to": "mm"},
8756
   "name": "SQ_PERFCOUNTER13_SELECT",
8757
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8758
  },
8759
  {
8760
   "chips": ["gfx8"],
8761
   "map": {"at": 223032, "to": "mm"},
8762
   "name": "SQ_PERFCOUNTER14_SELECT",
8763
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8764
  },
8765
  {
8766
   "chips": ["gfx8"],
8767
   "map": {"at": 223036, "to": "mm"},
8768
   "name": "SQ_PERFCOUNTER15_SELECT",
8769
   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8770
  },
8771
  {
8772
   "chips": ["gfx8"],
8773
   "map": {"at": 223104, "to": "mm"},
8774
   "name": "SQ_PERFCOUNTER_CTRL",
8775
   "type_ref": "SQ_PERFCOUNTER_CTRL"
8776
  },
8777
  {
8778
   "chips": ["gfx8"],
8779
   "map": {"at": 223108, "to": "mm"},
8780
   "name": "SQ_PERFCOUNTER_MASK",
8781
   "type_ref": "SQ_PERFCOUNTER_MASK"
8782
  },
8783
  {
8784
   "chips": ["gfx8"],
8785
   "map": {"at": 223112, "to": "mm"},
8786
   "name": "SQ_PERFCOUNTER_CTRL2",
8787
   "type_ref": "SQ_PERFCOUNTER_CTRL2"
8788
  },
8789
  {
8790
   "chips": ["gfx8"],
8791
   "map": {"at": 223488, "to": "mm"},
8792
   "name": "SX_PERFCOUNTER0_SELECT",
8793
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8794
  },
8795
  {
8796
   "chips": ["gfx8"],
8797
   "map": {"at": 223492, "to": "mm"},
8798
   "name": "SX_PERFCOUNTER1_SELECT",
8799
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8800
  },
8801
  {
8802
   "chips": ["gfx8"],
8803
   "map": {"at": 223496, "to": "mm"},
8804
   "name": "SX_PERFCOUNTER2_SELECT",
8805
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8806
  },
8807
  {
8808
   "chips": ["gfx8"],
8809
   "map": {"at": 223500, "to": "mm"},
8810
   "name": "SX_PERFCOUNTER3_SELECT",
8811
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8812
  },
8813
  {
8814
   "chips": ["gfx8"],
8815
   "map": {"at": 223504, "to": "mm"},
8816
   "name": "SX_PERFCOUNTER0_SELECT1",
8817
   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8818
  },
8819
  {
8820
   "chips": ["gfx8"],
8821
   "map": {"at": 223508, "to": "mm"},
8822
   "name": "SX_PERFCOUNTER1_SELECT1",
8823
   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8824
  },
8825
  {
8826
   "chips": ["gfx8"],
8827
   "map": {"at": 223744, "to": "mm"},
8828
   "name": "GDS_PERFCOUNTER0_SELECT",
8829
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8830
  },
8831
  {
8832
   "chips": ["gfx8"],
8833
   "map": {"at": 223748, "to": "mm"},
8834
   "name": "GDS_PERFCOUNTER1_SELECT",
8835
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8836
  },
8837
  {
8838
   "chips": ["gfx8"],
8839
   "map": {"at": 223752, "to": "mm"},
8840
   "name": "GDS_PERFCOUNTER2_SELECT",
8841
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8842
  },
8843
  {
8844
   "chips": ["gfx8"],
8845
   "map": {"at": 223756, "to": "mm"},
8846
   "name": "GDS_PERFCOUNTER3_SELECT",
8847
   "type_ref": "SX_PERFCOUNTER0_SELECT"
8848
  },
8849
  {
8850
   "chips": ["gfx8"],
8851
   "map": {"at": 223760, "to": "mm"},
8852
   "name": "GDS_PERFCOUNTER0_SELECT1",
8853
   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8854
  },
8855
  {
8856
   "chips": ["gfx8"],
8857
   "map": {"at": 224000, "to": "mm"},
8858
   "name": "TA_PERFCOUNTER0_SELECT",
8859
   "type_ref": "TD_PERFCOUNTER0_SELECT"
8860
  },
8861
  {
8862
   "chips": ["gfx8"],
8863
   "map": {"at": 224004, "to": "mm"},
8864
   "name": "TA_PERFCOUNTER0_SELECT1",
8865
   "type_ref": "TD_PERFCOUNTER0_SELECT1"
8866
  },
8867
  {
8868
   "chips": ["gfx8"],
8869
   "map": {"at": 224008, "to": "mm"},
8870
   "name": "TA_PERFCOUNTER1_SELECT",
8871
   "type_ref": "TD_PERFCOUNTER0_SELECT"
8872
  },
8873
  {
8874
   "chips": ["gfx8"],
8875
   "map": {"at": 224256, "to": "mm"},
8876
   "name": "TD_PERFCOUNTER0_SELECT",
8877
   "type_ref": "TD_PERFCOUNTER0_SELECT"
8878
  },
8879
  {
8880
   "chips": ["gfx8"],
8881
   "map": {"at": 224260, "to": "mm"},
8882
   "name": "TD_PERFCOUNTER0_SELECT1",
8883
   "type_ref": "TD_PERFCOUNTER0_SELECT1"
8884
  },
8885
  {
8886
   "chips": ["gfx8"],
8887
   "map": {"at": 224264, "to": "mm"},
8888
   "name": "TD_PERFCOUNTER1_SELECT",
8889
   "type_ref": "TD_PERFCOUNTER0_SELECT"
8890
  },
8891
  {
8892
   "chips": ["gfx8"],
8893
   "map": {"at": 224512, "to": "mm"},
8894
   "name": "TCP_PERFCOUNTER0_SELECT",
8895
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8896
  },
8897
  {
8898
   "chips": ["gfx8"],
8899
   "map": {"at": 224516, "to": "mm"},
8900
   "name": "TCP_PERFCOUNTER0_SELECT1",
8901
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8902
  },
8903
  {
8904
   "chips": ["gfx8"],
8905
   "map": {"at": 224520, "to": "mm"},
8906
   "name": "TCP_PERFCOUNTER1_SELECT",
8907
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8908
  },
8909
  {
8910
   "chips": ["gfx8"],
8911
   "map": {"at": 224524, "to": "mm"},
8912
   "name": "TCP_PERFCOUNTER1_SELECT1",
8913
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8914
  },
8915
  {
8916
   "chips": ["gfx8"],
8917
   "map": {"at": 224528, "to": "mm"},
8918
   "name": "TCP_PERFCOUNTER2_SELECT",
8919
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8920
  },
8921
  {
8922
   "chips": ["gfx8"],
8923
   "map": {"at": 224532, "to": "mm"},
8924
   "name": "TCP_PERFCOUNTER3_SELECT",
8925
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8926
  },
8927
  {
8928
   "chips": ["gfx8"],
8929
   "map": {"at": 224768, "to": "mm"},
8930
   "name": "TCC_PERFCOUNTER0_SELECT",
8931
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8932
  },
8933
  {
8934
   "chips": ["gfx8"],
8935
   "map": {"at": 224772, "to": "mm"},
8936
   "name": "TCC_PERFCOUNTER0_SELECT1",
8937
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8938
  },
8939
  {
8940
   "chips": ["gfx8"],
8941
   "map": {"at": 224776, "to": "mm"},
8942
   "name": "TCC_PERFCOUNTER1_SELECT",
8943
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8944
  },
8945
  {
8946
   "chips": ["gfx8"],
8947
   "map": {"at": 224780, "to": "mm"},
8948
   "name": "TCC_PERFCOUNTER1_SELECT1",
8949
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8950
  },
8951
  {
8952
   "chips": ["gfx8"],
8953
   "map": {"at": 224784, "to": "mm"},
8954
   "name": "TCC_PERFCOUNTER2_SELECT",
8955
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8956
  },
8957
  {
8958
   "chips": ["gfx8"],
8959
   "map": {"at": 224788, "to": "mm"},
8960
   "name": "TCC_PERFCOUNTER3_SELECT",
8961
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8962
  },
8963
  {
8964
   "chips": ["gfx8"],
8965
   "map": {"at": 224832, "to": "mm"},
8966
   "name": "TCA_PERFCOUNTER0_SELECT",
8967
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8968
  },
8969
  {
8970
   "chips": ["gfx8"],
8971
   "map": {"at": 224836, "to": "mm"},
8972
   "name": "TCA_PERFCOUNTER0_SELECT1",
8973
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8974
  },
8975
  {
8976
   "chips": ["gfx8"],
8977
   "map": {"at": 224840, "to": "mm"},
8978
   "name": "TCA_PERFCOUNTER1_SELECT",
8979
   "type_ref": "DB_PERFCOUNTER0_SELECT"
8980
  },
8981
  {
8982
   "chips": ["gfx8"],
8983
   "map": {"at": 224844, "to": "mm"},
8984
   "name": "TCA_PERFCOUNTER1_SELECT1",
8985
   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8986
  },
8987
  {
8988
   "chips": ["gfx8"],
8989
   "map": {"at": 224848, "to": "mm"},
8990
   "name": "TCA_PERFCOUNTER2_SELECT",
8991
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8992
  },
8993
  {
8994
   "chips": ["gfx8"],
8995
   "map": {"at": 224852, "to": "mm"},
8996
   "name": "TCA_PERFCOUNTER3_SELECT",
8997
   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8998
  },
8999
  {
9000
   "chips": ["gfx8"],
9001
   "map": {"at": 225280, "to": "mm"},
9002
   "name": "CB_PERFCOUNTER_FILTER",
9003
   "type_ref": "CB_PERFCOUNTER_FILTER"
9004
  },
9005
  {
9006
   "chips": ["gfx8"],
9007
   "map": {"at": 225284, "to": "mm"},
9008
   "name": "CB_PERFCOUNTER0_SELECT",
9009
   "type_ref": "CB_PERFCOUNTER0_SELECT"
9010
  },
9011
  {
9012
   "chips": ["gfx8"],
9013
   "map": {"at": 225288, "to": "mm"},
9014
   "name": "CB_PERFCOUNTER0_SELECT1",
9015
   "type_ref": "CB_PERFCOUNTER0_SELECT1"
9016
  },
9017
  {
9018
   "chips": ["gfx8"],
9019
   "map": {"at": 225292, "to": "mm"},
9020
   "name": "CB_PERFCOUNTER1_SELECT",
9021
   "type_ref": "CB_PERFCOUNTER1_SELECT"
9022
  },
9023
  {
9024
   "chips": ["gfx8"],
9025
   "map": {"at": 225296, "to": "mm"},
9026
   "name": "CB_PERFCOUNTER2_SELECT",
9027
   "type_ref": "CB_PERFCOUNTER1_SELECT"
9028
  },
9029
  {
9030
   "chips": ["gfx8"],
9031
   "map": {"at": 225300, "to": "mm"},
9032
   "name": "CB_PERFCOUNTER3_SELECT",
9033
   "type_ref": "CB_PERFCOUNTER1_SELECT"
9034
  },
9035
  {
9036
   "chips": ["gfx8"],
9037
   "map": {"at": 225536, "to": "mm"},
9038
   "name": "DB_PERFCOUNTER0_SELECT",
9039
   "type_ref": "DB_PERFCOUNTER0_SELECT"
9040
  },
9041
  {
9042
   "chips": ["gfx8"],
9043
   "map": {"at": 225540, "to": "mm"},
9044
   "name": "DB_PERFCOUNTER0_SELECT1",
9045
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
9046
  },
9047
  {
9048
   "chips": ["gfx8"],
9049
   "map": {"at": 225544, "to": "mm"},
9050
   "name": "DB_PERFCOUNTER1_SELECT",
9051
   "type_ref": "DB_PERFCOUNTER0_SELECT"
9052
  },
9053
  {
9054
   "chips": ["gfx8"],
9055
   "map": {"at": 225548, "to": "mm"},
9056
   "name": "DB_PERFCOUNTER1_SELECT1",
9057
   "type_ref": "DB_PERFCOUNTER0_SELECT1"
9058
  },
9059
  {
9060
   "chips": ["gfx8"],
9061
   "map": {"at": 225552, "to": "mm"},
9062
   "name": "DB_PERFCOUNTER2_SELECT",
9063
   "type_ref": "DB_PERFCOUNTER0_SELECT"
9064
  },
9065
  {
9066
   "chips": ["gfx8"],
9067
   "map": {"at": 225560, "to": "mm"},
9068
   "name": "DB_PERFCOUNTER3_SELECT",
9069
   "type_ref": "DB_PERFCOUNTER0_SELECT"
9070
  },
9071
  {
9072
   "chips": ["gfx8"],
9073
   "map": {"at": 225792, "to": "mm"},
9074
   "name": "RLC_SPM_PERFMON_CNTL",
9075
   "type_ref": "RLC_SPM_PERFMON_CNTL"
9076
  },
9077
  {
9078
   "chips": ["gfx8"],
9079
   "map": {"at": 225796, "to": "mm"},
9080
   "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9081
  },
9082
  {
9083
   "chips": ["gfx8"],
9084
   "map": {"at": 225800, "to": "mm"},
9085
   "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9086
   "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"
9087
  },
9088
  {
9089
   "chips": ["gfx8"],
9090
   "map": {"at": 225804, "to": "mm"},
9091
   "name": "RLC_SPM_PERFMON_RING_SIZE"
9092
  },
9093
  {
9094
   "chips": ["gfx8"],
9095
   "map": {"at": 225808, "to": "mm"},
9096
   "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9097
   "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"
9098
  },
9099
  {
9100
   "chips": ["gfx8"],
9101
   "map": {"at": 225812, "to": "mm"},
9102
   "name": "RLC_SPM_SE_MUXSEL_ADDR"
9103
  },
9104
  {
9105
   "chips": ["gfx8"],
9106
   "map": {"at": 225816, "to": "mm"},
9107
   "name": "RLC_SPM_SE_MUXSEL_DATA"
9108
  },
9109
  {
9110
   "chips": ["gfx8"],
9111
   "map": {"at": 225820, "to": "mm"},
9112
   "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9113
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9114
  },
9115
  {
9116
   "chips": ["gfx8"],
9117
   "map": {"at": 225824, "to": "mm"},
9118
   "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9119
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9120
  },
9121
  {
9122
   "chips": ["gfx8"],
9123
   "map": {"at": 225828, "to": "mm"},
9124
   "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
9125
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9126
  },
9127
  {
9128
   "chips": ["gfx8"],
9129
   "map": {"at": 225832, "to": "mm"},
9130
   "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
9131
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9132
  },
9133
  {
9134
   "chips": ["gfx8"],
9135
   "map": {"at": 225836, "to": "mm"},
9136
   "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
9137
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9138
  },
9139
  {
9140
   "chips": ["gfx8"],
9141
   "map": {"at": 225840, "to": "mm"},
9142
   "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
9143
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9144
  },
9145
  {
9146
   "chips": ["gfx8"],
9147
   "map": {"at": 225844, "to": "mm"},
9148
   "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
9149
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9150
  },
9151
  {
9152
   "chips": ["gfx8"],
9153
   "map": {"at": 225848, "to": "mm"},
9154
   "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
9155
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9156
  },
9157
  {
9158
   "chips": ["gfx8"],
9159
   "map": {"at": 225856, "to": "mm"},
9160
   "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
9161
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9162
  },
9163
  {
9164
   "chips": ["gfx8"],
9165
   "map": {"at": 225860, "to": "mm"},
9166
   "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
9167
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9168
  },
9169
  {
9170
   "chips": ["gfx8"],
9171
   "map": {"at": 225864, "to": "mm"},
9172
   "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
9173
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9174
  },
9175
  {
9176
   "chips": ["gfx8"],
9177
   "map": {"at": 225868, "to": "mm"},
9178
   "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
9179
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9180
  },
9181
  {
9182
   "chips": ["gfx8"],
9183
   "map": {"at": 225872, "to": "mm"},
9184
   "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
9185
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9186
  },
9187
  {
9188
   "chips": ["gfx8"],
9189
   "map": {"at": 225876, "to": "mm"},
9190
   "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
9191
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9192
  },
9193
  {
9194
   "chips": ["gfx8"],
9195
   "map": {"at": 225880, "to": "mm"},
9196
   "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
9197
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9198
  },
9199
  {
9200
   "chips": ["gfx8"],
9201
   "map": {"at": 225884, "to": "mm"},
9202
   "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
9203
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9204
  },
9205
  {
9206
   "chips": ["gfx8"],
9207
   "map": {"at": 225888, "to": "mm"},
9208
   "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
9209
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9210
  },
9211
  {
9212
   "chips": ["gfx8"],
9213
   "map": {"at": 225896, "to": "mm"},
9214
   "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9215
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9216
  },
9217
  {
9218
   "chips": ["gfx8"],
9219
   "map": {"at": 225900, "to": "mm"},
9220
   "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
9221
  },
9222
  {
9223
   "chips": ["gfx8"],
9224
   "map": {"at": 225904, "to": "mm"},
9225
   "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
9226
  },
9227
  {
9228
   "chips": ["gfx8"],
9229
   "map": {"at": 225908, "to": "mm"},
9230
   "name": "RLC_SPM_RING_RDPTR"
9231
  },
9232
  {
9233
   "chips": ["gfx8"],
9234
   "map": {"at": 225912, "to": "mm"},
9235
   "name": "RLC_SPM_SEGMENT_THRESHOLD"
9236
  },
9237
  {
9238
   "chips": ["gfx8"],
9239
   "map": {"at": 225916, "to": "mm"},
9240
   "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",
9241
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9242
  },
9243
  {
9244
   "chips": ["gfx8"],
9245
   "map": {"at": 225920, "to": "mm"},
9246
   "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",
9247
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9248
  },
9249
  {
9250
   "chips": ["gfx8"],
9251
   "map": {"at": 225924, "to": "mm"},
9252
   "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",
9253
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9254
  },
9255
  {
9256
   "chips": ["gfx8"],
9257
   "map": {"at": 225928, "to": "mm"},
9258
   "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",
9259
   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9260
  },
9261
  {
9262
   "chips": ["gfx8"],
9263
   "map": {"at": 226044, "to": "mm"},
9264
   "name": "RLC_PERFMON_CLK_CNTL",
9265
   "type_ref": "RLC_PERFMON_CLK_CNTL"
9266
  },
9267
  {
9268
   "chips": ["gfx8"],
9269
   "map": {"at": 226048, "to": "mm"},
9270
   "name": "RLC_PERFMON_CNTL",
9271
   "type_ref": "RLC_PERFMON_CNTL"
9272
  },
9273
  {
9274
   "chips": ["gfx8"],
9275
   "map": {"at": 226052, "to": "mm"},
9276
   "name": "RLC_PERFCOUNTER0_SELECT",
9277
   "type_ref": "RLC_PERFCOUNTER0_SELECT"
9278
  },
9279
  {
9280
   "chips": ["gfx8"],
9281
   "map": {"at": 226056, "to": "mm"},
9282
   "name": "RLC_PERFCOUNTER1_SELECT",
9283
   "type_ref": "RLC_PERFCOUNTER0_SELECT"
9284
  }
9285
 ],
9286
 "register_types": {
9287
  "CB_BLEND0_CONTROL": {
9288
   "fields": [
9289
    {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
9290
    {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
9291
    {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
9292
    {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
9293
    {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
9294
    {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
9295
    {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
9296
    {"bits": [30, 30], "name": "ENABLE"},
9297
    {"bits": [31, 31], "name": "DISABLE_ROP3"}
9298
   ]
9299
  },
9300
  "CB_COLOR0_ATTRIB": {
9301
   "fields": [
9302
    {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
9303
    {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
9304
    {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
9305
    {"bits": [12, 14], "name": "NUM_SAMPLES"},
9306
    {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
9307
    {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
9308
   ]
9309
  },
9310
  "CB_COLOR0_CMASK_SLICE": {
9311
   "fields": [
9312
    {"bits": [0, 13], "name": "TILE_MAX"}
9313
   ]
9314
  },
9315
  "CB_COLOR0_DCC_CONTROL": {
9316
   "fields": [
9317
    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9318
    {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
9319
    {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
9320
    {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
9321
    {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
9322
    {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
9323
    {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
9324
    {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
9325
    {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}
9326
   ]
9327
  },
9328
  "CB_COLOR0_INFO": {
9329
   "fields": [
9330
    {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
9331
    {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
9332
    {"bits": [7, 7], "name": "LINEAR_GENERAL"},
9333
    {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
9334
    {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
9335
    {"bits": [13, 13], "name": "FAST_CLEAR"},
9336
    {"bits": [14, 14], "name": "COMPRESSION"},
9337
    {"bits": [15, 15], "name": "BLEND_CLAMP"},
9338
    {"bits": [16, 16], "name": "BLEND_BYPASS"},
9339
    {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
9340
    {"bits": [18, 18], "name": "ROUND_MODE"},
9341
    {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
9342
    {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
9343
    {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
9344
    {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
9345
    {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
9346
    {"bits": [28, 28], "name": "DCC_ENABLE"},
9347
    {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
9348
   ]
9349
  },
9350
  "CB_COLOR0_PITCH": {
9351
   "fields": [
9352
    {"bits": [0, 10], "name": "TILE_MAX"},
9353
    {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
9354
   ]
9355
  },
9356
  "CB_COLOR0_SLICE": {
9357
   "fields": [
9358
    {"bits": [0, 21], "name": "TILE_MAX"}
9359
   ]
9360
  },
9361
  "CB_COLOR0_VIEW": {
9362
   "fields": [
9363
    {"bits": [0, 10], "name": "SLICE_START"},
9364
    {"bits": [13, 23], "name": "SLICE_MAX"}
9365
   ]
9366
  },
9367
  "CB_COLOR_CONTROL": {
9368
   "fields": [
9369
    {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
9370
    {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
9371
    {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
9372
   ]
9373
  },
9374
  "CB_DCC_CONTROL": {
9375
   "fields": [
9376
    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9377
    {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
9378
    {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}
9379
   ]
9380
  },
9381
  "CB_PERFCOUNTER0_SELECT": {
9382
   "fields": [
9383
    {"bits": [0, 8], "name": "PERF_SEL"},
9384
    {"bits": [10, 18], "name": "PERF_SEL1"},
9385
    {"bits": [20, 23], "name": "CNTR_MODE"},
9386
    {"bits": [24, 27], "name": "PERF_MODE1"},
9387
    {"bits": [28, 31], "name": "PERF_MODE"}
9388
   ]
9389
  },
9390
  "CB_PERFCOUNTER0_SELECT1": {
9391
   "fields": [
9392
    {"bits": [0, 8], "name": "PERF_SEL2"},
9393
    {"bits": [10, 18], "name": "PERF_SEL3"},
9394
    {"bits": [24, 27], "name": "PERF_MODE3"},
9395
    {"bits": [28, 31], "name": "PERF_MODE2"}
9396
   ]
9397
  },
9398
  "CB_PERFCOUNTER1_SELECT": {
9399
   "fields": [
9400
    {"bits": [0, 8], "name": "PERF_SEL"},
9401
    {"bits": [28, 31], "name": "PERF_MODE"}
9402
   ]
9403
  },
9404
  "CB_PERFCOUNTER_FILTER": {
9405
   "fields": [
9406
    {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
9407
    {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
9408
    {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
9409
    {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
9410
    {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
9411
    {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
9412
    {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
9413
    {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
9414
    {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
9415
    {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
9416
    {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
9417
    {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
9418
   ]
9419
  },
9420
  "CB_SHADER_MASK": {
9421
   "fields": [
9422
    {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
9423
    {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
9424
    {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
9425
    {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
9426
    {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
9427
    {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
9428
    {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
9429
    {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
9430
   ]
9431
  },
9432
  "CB_TARGET_MASK": {
9433
   "fields": [
9434
    {"bits": [0, 3], "name": "TARGET0_ENABLE"},
9435
    {"bits": [4, 7], "name": "TARGET1_ENABLE"},
9436
    {"bits": [8, 11], "name": "TARGET2_ENABLE"},
9437
    {"bits": [12, 15], "name": "TARGET3_ENABLE"},
9438
    {"bits": [16, 19], "name": "TARGET4_ENABLE"},
9439
    {"bits": [20, 23], "name": "TARGET5_ENABLE"},
9440
    {"bits": [24, 27], "name": "TARGET6_ENABLE"},
9441
    {"bits": [28, 31], "name": "TARGET7_ENABLE"}
9442
   ]
9443
  },
9444
  "COMPUTE_DISPATCH_INITIATOR": {
9445
   "fields": [
9446
    {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
9447
    {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
9448
    {"bits": [2, 2], "name": "FORCE_START_AT_000"},
9449
    {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
9450
    {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
9451
    {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
9452
    {"bits": [6, 6], "name": "ORDER_MODE"},
9453
    {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
9454
    {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
9455
    {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
9456
    {"bits": [12, 12], "name": "DATA_ATC"},
9457
    {"bits": [14, 14], "name": "RESTORE"}
9458
   ]
9459
  },
9460
  "COMPUTE_MISC_RESERVED": {
9461
   "fields": [
9462
    {"bits": [0, 1], "name": "SEND_SEID"},
9463
    {"bits": [2, 2], "name": "RESERVED2"},
9464
    {"bits": [3, 3], "name": "RESERVED3"},
9465
    {"bits": [4, 4], "name": "RESERVED4"},
9466
    {"bits": [5, 16], "name": "WAVE_ID_BASE"}
9467
   ]
9468
  },
9469
  "COMPUTE_NUM_THREAD_X": {
9470
   "fields": [
9471
    {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
9472
    {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
9473
   ]
9474
  },
9475
  "COMPUTE_PERFCOUNT_ENABLE": {
9476
   "fields": [
9477
    {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
9478
   ]
9479
  },
9480
  "COMPUTE_PGM_HI": {
9481
   "fields": [
9482
    {"bits": [0, 7], "name": "DATA"},
9483
    {"bits": [8, 8], "name": "INST_ATC"}
9484
   ]
9485
  },
9486
  "COMPUTE_PGM_RSRC1": {
9487
   "fields": [
9488
    {"bits": [0, 5], "name": "VGPRS"},
9489
    {"bits": [6, 9], "name": "SGPRS"},
9490
    {"bits": [10, 11], "name": "PRIORITY"},
9491
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
9492
    {"bits": [20, 20], "name": "PRIV"},
9493
    {"bits": [21, 21], "name": "DX10_CLAMP"},
9494
    {"bits": [22, 22], "name": "DEBUG_MODE"},
9495
    {"bits": [23, 23], "name": "IEEE_MODE"},
9496
    {"bits": [24, 24], "name": "BULKY"},
9497
    {"bits": [25, 25], "name": "CDBG_USER"}
9498
   ]
9499
  },
9500
  "COMPUTE_PGM_RSRC2": {
9501
   "fields": [
9502
    {"bits": [0, 0], "name": "SCRATCH_EN"},
9503
    {"bits": [1, 5], "name": "USER_SGPR"},
9504
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
9505
    {"bits": [7, 7], "name": "TGID_X_EN"},
9506
    {"bits": [8, 8], "name": "TGID_Y_EN"},
9507
    {"bits": [9, 9], "name": "TGID_Z_EN"},
9508
    {"bits": [10, 10], "name": "TG_SIZE_EN"},
9509
    {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
9510
    {"bits": [13, 14], "name": "EXCP_EN_MSB"},
9511
    {"bits": [15, 23], "name": "LDS_SIZE"},
9512
    {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
9513
   ]
9514
  },
9515
  "COMPUTE_PIPELINESTAT_ENABLE": {
9516
   "fields": [
9517
    {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
9518
   ]
9519
  },
9520
  "COMPUTE_RELAUNCH": {
9521
   "fields": [
9522
    {"bits": [0, 29], "name": "PAYLOAD"},
9523
    {"bits": [30, 30], "name": "IS_EVENT"},
9524
    {"bits": [31, 31], "name": "IS_STATE"}
9525
   ]
9526
  },
9527
  "COMPUTE_RESOURCE_LIMITS": {
9528
   "fields": [
9529
    {"bits": [0, 9], "name": "WAVES_PER_SH"},
9530
    {"bits": [12, 15], "name": "TG_PER_CU"},
9531
    {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
9532
    {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
9533
    {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
9534
    {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
9535
   ]
9536
  },
9537
  "COMPUTE_STATIC_THREAD_MGMT_SE0": {
9538
   "fields": [
9539
    {"bits": [0, 15], "name": "SH0_CU_EN"},
9540
    {"bits": [16, 31], "name": "SH1_CU_EN"}
9541
   ]
9542
  },
9543
  "COMPUTE_TBA_HI": {
9544
   "fields": [
9545
    {"bits": [0, 7], "name": "DATA"}
9546
   ]
9547
  },
9548
  "COMPUTE_THREAD_TRACE_ENABLE": {
9549
   "fields": [
9550
    {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
9551
   ]
9552
  },
9553
  "COMPUTE_TMPRING_SIZE": {
9554
   "fields": [
9555
    {"bits": [0, 11], "name": "WAVES"},
9556
    {"bits": [12, 24], "name": "WAVESIZE"}
9557
   ]
9558
  },
9559
  "COMPUTE_VMID": {
9560
   "fields": [
9561
    {"bits": [0, 3], "name": "DATA"}
9562
   ]
9563
  },
9564
  "COMPUTE_WAVE_RESTORE_ADDR_HI": {
9565
   "fields": [
9566
    {"bits": [0, 15], "name": "ADDR"}
9567
   ]
9568
  },
9569
  "COMPUTE_WAVE_RESTORE_CONTROL": {
9570
   "fields": [
9571
    {"bits": [0, 0], "name": "ATC"},
9572
    {"bits": [1, 2], "name": "MTYPE"}
9573
   ]
9574
  },
9575
  "CPG_PERFCOUNTER0_SELECT": {
9576
   "fields": [
9577
    {"bits": [0, 5], "name": "PERF_SEL"},
9578
    {"bits": [10, 15], "name": "PERF_SEL1"},
9579
    {"bits": [20, 23], "name": "CNTR_MODE"}
9580
   ]
9581
  },
9582
  "CPG_PERFCOUNTER0_SELECT1": {
9583
   "fields": [
9584
    {"bits": [0, 5], "name": "PERF_SEL2"},
9585
    {"bits": [10, 15], "name": "PERF_SEL3"}
9586
   ]
9587
  },
9588
  "CPG_PERFCOUNTER1_SELECT": {
9589
   "fields": [
9590
    {"bits": [0, 5], "name": "PERF_SEL"}
9591
   ]
9592
  },
9593
  "CP_APPEND_ADDR_HI": {
9594
   "fields": [
9595
    {"bits": [0, 15], "name": "MEM_ADDR_HI"},
9596
    {"bits": [16, 16], "name": "CS_PS_SEL"},
9597
    {"bits": [25, 25], "name": "CACHE_POLICY"},
9598
    {"bits": [27, 28], "name": "MTYPE"},
9599
    {"bits": [29, 31], "name": "COMMAND"}
9600
   ]
9601
  },
9602
  "CP_APPEND_ADDR_LO": {
9603
   "fields": [
9604
    {"bits": [2, 31], "name": "MEM_ADDR_LO"}
9605
   ]
9606
  },
9607
  "CP_CE_IB1_BASE_HI": {
9608
   "fields": [
9609
    {"bits": [0, 15], "name": "IB1_BASE_HI"}
9610
   ]
9611
  },
9612
  "CP_CE_IB1_BASE_LO": {
9613
   "fields": [
9614
    {"bits": [2, 31], "name": "IB1_BASE_LO"}
9615
   ]
9616
  },
9617
  "CP_CE_IB1_BUFSZ": {
9618
   "fields": [
9619
    {"bits": [0, 19], "name": "IB1_BUFSZ"}
9620
   ]
9621
  },
9622
  "CP_CE_IB2_BASE_HI": {
9623
   "fields": [
9624
    {"bits": [0, 15], "name": "IB2_BASE_HI"}
9625
   ]
9626
  },
9627
  "CP_CE_IB2_BASE_LO": {
9628
   "fields": [
9629
    {"bits": [2, 31], "name": "IB2_BASE_LO"}
9630
   ]
9631
  },
9632
  "CP_CE_IB2_BUFSZ": {
9633
   "fields": [
9634
    {"bits": [0, 19], "name": "IB2_BUFSZ"}
9635
   ]
9636
  },
9637
  "CP_CE_INIT_BASE_HI": {
9638
   "fields": [
9639
    {"bits": [0, 15], "name": "INIT_BASE_HI"}
9640
   ]
9641
  },
9642
  "CP_CE_INIT_BASE_LO": {
9643
   "fields": [
9644
    {"bits": [5, 31], "name": "INIT_BASE_LO"}
9645
   ]
9646
  },
9647
  "CP_CE_INIT_BUFSZ": {
9648
   "fields": [
9649
    {"bits": [0, 11], "name": "INIT_BUFSZ"}
9650
   ]
9651
  },
9652
  "CP_COHER_BASE_HI": {
9653
   "fields": [
9654
    {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
9655
   ]
9656
  },
9657
  "CP_COHER_CNTL": {
9658
   "fields": [
9659
    {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
9660
    {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
9661
    {"bits": [2, 2], "name": "TC_SD_ACTION_ENA"},
9662
    {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
9663
    {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
9664
    {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
9665
    {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
9666
    {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
9667
    {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
9668
    {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
9669
    {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
9670
    {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
9671
    {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
9672
    {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
9673
    {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
9674
    {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
9675
    {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
9676
    {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
9677
    {"bits": [23, 23], "name": "TC_ACTION_ENA"},
9678
    {"bits": [25, 25], "name": "CB_ACTION_ENA"},
9679
    {"bits": [26, 26], "name": "DB_ACTION_ENA"},
9680
    {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
9681
    {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
9682
    {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
9683
    {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"},
9684
    {"bits": [31, 31], "name": "SH_SD_ACTION_ENA"}
9685
   ]
9686
  },
9687
  "CP_COHER_SIZE_HI": {
9688
   "fields": [
9689
    {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
9690
   ]
9691
  },
9692
  "CP_COHER_START_DELAY": {
9693
   "fields": [
9694
    {"bits": [0, 5], "name": "START_DELAY_COUNT"}
9695
   ]
9696
  },
9697
  "CP_COHER_STATUS": {
9698
   "fields": [
9699
    {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
9700
    {"bits": [24, 25], "name": "MEID"},
9701
    {"bits": [30, 30], "name": "PHASE1_STATUS"},
9702
    {"bits": [31, 31], "name": "STATUS"}
9703
   ]
9704
  },
9705
  "CP_CPC_BUSY_STAT": {
9706
   "fields": [
9707
    {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
9708
    {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
9709
    {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
9710
    {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
9711
    {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
9712
    {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
9713
    {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
9714
    {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
9715
    {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
9716
    {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
9717
    {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
9718
    {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
9719
    {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
9720
    {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
9721
    {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
9722
    {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
9723
    {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
9724
    {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
9725
    {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
9726
    {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
9727
    {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
9728
    {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
9729
    {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
9730
    {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
9731
    {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
9732
    {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
9733
    {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
9734
    {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
9735
   ]
9736
  },
9737
  "CP_CPC_GRBM_FREE_COUNT": {
9738
   "fields": [
9739
    {"bits": [0, 5], "name": "FREE_COUNT"}
9740
   ]
9741
  },
9742
  "CP_CPC_HALT_HYST_COUNT": {
9743
   "fields": [
9744
    {"bits": [0, 3], "name": "COUNT"}
9745
   ]
9746
  },
9747
  "CP_CPC_SCRATCH_INDEX": {
9748
   "fields": [
9749
    {"bits": [0, 8], "name": "SCRATCH_INDEX"}
9750
   ]
9751
  },
9752
  "CP_CPC_STALLED_STAT1": {
9753
   "fields": [
9754
    {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
9755
    {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
9756
    {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
9757
    {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
9758
    {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
9759
    {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
9760
    {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
9761
    {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
9762
    {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
9763
    {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
9764
    {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
9765
    {"bits": [22, 22], "name": "ATCL2IU_WAITING_ON_FREE"},
9766
    {"bits": [23, 23], "name": "ATCL2IU_WAITING_ON_TAGS"},
9767
    {"bits": [24, 24], "name": "ATCL1_WAITING_ON_TRANS"}
9768
   ]
9769
  },
9770
  "CP_CPC_STATUS": {
9771
   "fields": [
9772
    {"bits": [0, 0], "name": "MEC1_BUSY"},
9773
    {"bits": [1, 1], "name": "MEC2_BUSY"},
9774
    {"bits": [2, 2], "name": "DC0_BUSY"},
9775
    {"bits": [3, 3], "name": "DC1_BUSY"},
9776
    {"bits": [4, 4], "name": "RCIU1_BUSY"},
9777
    {"bits": [5, 5], "name": "RCIU2_BUSY"},
9778
    {"bits": [6, 6], "name": "ROQ1_BUSY"},
9779
    {"bits": [7, 7], "name": "ROQ2_BUSY"},
9780
    {"bits": [10, 10], "name": "TCIU_BUSY"},
9781
    {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
9782
    {"bits": [12, 12], "name": "QU_BUSY"},
9783
    {"bits": [13, 13], "name": "ATCL2IU_BUSY"},
9784
    {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
9785
    {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
9786
    {"bits": [31, 31], "name": "CPC_BUSY"}
9787
   ]
9788
  },
9789
  "CP_CPF_BUSY_STAT": {
9790
   "fields": [
9791
    {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
9792
    {"bits": [1, 1], "name": "CSF_RING_BUSY"},
9793
    {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
9794
    {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
9795
    {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
9796
    {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
9797
    {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
9798
    {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
9799
    {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
9800
    {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
9801
    {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
9802
    {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
9803
    {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
9804
    {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
9805
    {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
9806
    {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
9807
    {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
9808
    {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
9809
    {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
9810
    {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
9811
    {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
9812
    {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
9813
    {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
9814
    {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
9815
    {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
9816
    {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
9817
    {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
9818
    {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
9819
    {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
9820
    {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
9821
    {"bits": [31, 31], "name": "HQD_IB_BUSY"}
9822
   ]
9823
  },
9824
  "CP_CPF_STALLED_STAT1": {
9825
   "fields": [
9826
    {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
9827
    {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
9828
    {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
9829
    {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
9830
    {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
9831
    {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
9832
    {"bits": [7, 7], "name": "ATCL2IU_WAITING_ON_FREE"},
9833
    {"bits": [8, 8], "name": "ATCL2IU_WAITING_ON_TAGS"},
9834
    {"bits": [9, 9], "name": "ATCL1_WAITING_ON_TRANS"}
9835
   ]
9836
  },
9837
  "CP_CPF_STATUS": {
9838
   "fields": [
9839
    {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
9840
    {"bits": [1, 1], "name": "CSF_BUSY"},
9841
    {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
9842
    {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
9843
    {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
9844
    {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
9845
    {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
9846
    {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
9847
    {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
9848
    {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
9849
    {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
9850
    {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
9851
    {"bits": [14, 14], "name": "TCIU_BUSY"},
9852
    {"bits": [15, 15], "name": "HQD_BUSY"},
9853
    {"bits": [16, 16], "name": "PRT_BUSY"},
9854
    {"bits": [17, 17], "name": "ATCL2IU_BUSY"},
9855
    {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
9856
    {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
9857
    {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
9858
    {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
9859
    {"bits": [31, 31], "name": "CPF_BUSY"}
9860
   ]
9861
  },
9862
  "CP_DMA_CNTL": {
9863
   "fields": [
9864
    {"bits": [4, 5], "name": "MIN_AVAILSZ"},
9865
    {"bits": [16, 19], "name": "BUFFER_DEPTH"},
9866
    {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
9867
    {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
9868
    {"bits": [30, 31], "name": "PIO_COUNT"}
9869
   ]
9870
  },
9871
  "CP_DMA_ME_COMMAND": {
9872
   "fields": [
9873
    {"bits": [0, 20], "name": "BYTE_COUNT"},
9874
    {"bits": [21, 21], "name": "DIS_WC"},
9875
    {"bits": [22, 23], "name": "SRC_SWAP"},
9876
    {"bits": [24, 25], "name": "DST_SWAP"},
9877
    {"bits": [26, 26], "name": "SAS"},
9878
    {"bits": [27, 27], "name": "DAS"},
9879
    {"bits": [28, 28], "name": "SAIC"},
9880
    {"bits": [29, 29], "name": "DAIC"},
9881
    {"bits": [30, 30], "name": "RAW_WAIT"}
9882
   ]
9883
  },
9884
  "CP_DMA_ME_CONTROL": {
9885
   "fields": [
9886
    {"bits": [10, 11], "name": "SRC_MTYPE"},
9887
    {"bits": [12, 12], "name": "SRC_ATC"},
9888
    {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
9889
    {"bits": [20, 21], "name": "DST_SELECT"},
9890
    {"bits": [22, 23], "name": "DST_MTYPE"},
9891
    {"bits": [24, 24], "name": "DST_ATC"},
9892
    {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
9893
    {"bits": [29, 30], "name": "SRC_SELECT"}
9894
   ]
9895
  },
9896
  "CP_DMA_ME_DST_ADDR_HI": {
9897
   "fields": [
9898
    {"bits": [0, 15], "name": "DST_ADDR_HI"}
9899
   ]
9900
  },
9901
  "CP_DMA_ME_SRC_ADDR_HI": {
9902
   "fields": [
9903
    {"bits": [0, 15], "name": "SRC_ADDR_HI"}
9904
   ]
9905
  },
9906
  "CP_DMA_READ_TAGS": {
9907
   "fields": [
9908
    {"bits": [0, 25], "name": "DMA_READ_TAG"},
9909
    {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
9910
   ]
9911
  },
9912
  "CP_DRAW_OBJECT_COUNTER": {
9913
   "fields": [
9914
    {"bits": [0, 15], "name": "COUNT"}
9915
   ]
9916
  },
9917
  "CP_DRAW_WINDOW_CNTL": {
9918
   "fields": [
9919
    {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
9920
    {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
9921
    {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
9922
    {"bits": [8, 8], "name": "MODE"}
9923
   ]
9924
  },
9925
  "CP_DRAW_WINDOW_LO": {
9926
   "fields": [
9927
    {"bits": [0, 15], "name": "MIN"},
9928
    {"bits": [16, 31], "name": "MAX"}
9929
   ]
9930
  },
9931
  "CP_EOP_DONE_ADDR_HI": {
9932
   "fields": [
9933
    {"bits": [0, 15], "name": "ADDR_HI"}
9934
   ]
9935
  },
9936
  "CP_EOP_DONE_ADDR_LO": {
9937
   "fields": [
9938
    {"bits": [2, 31], "name": "ADDR_LO"}
9939
   ]
9940
  },
9941
  "CP_EOP_DONE_CNTX_ID": {
9942
   "fields": [
9943
    {"bits": [0, 27], "name": "CNTX_ID"}
9944
   ]
9945
  },
9946
  "CP_EOP_DONE_DATA_CNTL": {
9947
   "fields": [
9948
    {"bits": [0, 15], "name": "CNTX_ID"},
9949
    {"bits": [16, 17], "name": "DST_SEL"},
9950
    {"bits": [24, 26], "name": "INT_SEL"},
9951
    {"bits": [29, 31], "name": "DATA_SEL"}
9952
   ]
9953
  },
9954
  "CP_EOP_DONE_EVENT_CNTL": {
9955
   "fields": [
9956
    {"bits": [0, 6], "name": "WBINV_TC_OP"},
9957
    {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
9958
    {"bits": [25, 25], "name": "CACHE_CONTROL"},
9959
    {"bits": [27, 28], "name": "MTYPE"}
9960
   ]
9961
  },
9962
  "CP_IB1_OFFSET": {
9963
   "fields": [
9964
    {"bits": [0, 19], "name": "IB1_OFFSET"}
9965
   ]
9966
  },
9967
  "CP_IB1_PREAMBLE_BEGIN": {
9968
   "fields": [
9969
    {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
9970
   ]
9971
  },
9972
  "CP_IB1_PREAMBLE_END": {
9973
   "fields": [
9974
    {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
9975
   ]
9976
  },
9977
  "CP_IB2_OFFSET": {
9978
   "fields": [
9979
    {"bits": [0, 19], "name": "IB2_OFFSET"}
9980
   ]
9981
  },
9982
  "CP_IB2_PREAMBLE_BEGIN": {
9983
   "fields": [
9984
    {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
9985
   ]
9986
  },
9987
  "CP_IB2_PREAMBLE_END": {
9988
   "fields": [
9989
    {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
9990
   ]
9991
  },
9992
  "CP_INDEX_TYPE": {
9993
   "fields": [
9994
    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
9995
   ]
9996
  },
9997
  "CP_ME_MC_RADDR_HI": {
9998
   "fields": [
9999
    {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
10000
    {"bits": [20, 21], "name": "MTYPE"},
10001
    {"bits": [22, 22], "name": "CACHE_POLICY"}
10002
   ]
10003
  },
10004
  "CP_ME_MC_RADDR_LO": {
10005
   "fields": [
10006
    {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
10007
    {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
10008
   ]
10009
  },
10010
  "CP_ME_MC_WADDR_HI": {
10011
   "fields": [
10012
    {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
10013
    {"bits": [20, 21], "name": "MTYPE"},
10014
    {"bits": [22, 22], "name": "CACHE_POLICY"}
10015
   ]
10016
  },
10017
  "CP_ME_MC_WADDR_LO": {
10018
   "fields": [
10019
    {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
10020
    {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
10021
   ]
10022
  },
10023
  "CP_PERFMON_CNTL": {
10024
   "fields": [
10025
    {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
10026
    {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
10027
    {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
10028
    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
10029
   ]
10030
  },
10031
  "CP_PERFMON_CNTX_CNTL": {
10032
   "fields": [
10033
    {"bits": [31, 31], "name": "PERFMON_ENABLE"}
10034
   ]
10035
  },
10036
  "CP_PFP_COMPLETION_STATUS": {
10037
   "fields": [
10038
    {"bits": [0, 1], "name": "STATUS"}
10039
   ]
10040
  },
10041
  "CP_PFP_IB_CONTROL": {
10042
   "fields": [
10043
    {"bits": [0, 7], "name": "IB_EN"}
10044
   ]
10045
  },
10046
  "CP_PFP_LOAD_CONTROL": {
10047
   "fields": [
10048
    {"bits": [0, 0], "name": "CONFIG_REG_EN"},
10049
    {"bits": [1, 1], "name": "CNTX_REG_EN"},
10050
    {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
10051
    {"bits": [24, 24], "name": "SH_CS_REG_EN"}
10052
   ]
10053
  },
10054
  "CP_PIPE_STATS_ADDR_HI": {
10055
   "fields": [
10056
    {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
10057
   ]
10058
  },
10059
  "CP_PIPE_STATS_ADDR_LO": {
10060
   "fields": [
10061
    {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
10062
   ]
10063
  },
10064
  "CP_PIPE_STATS_CONTROL": {
10065
   "fields": [
10066
    {"bits": [25, 25], "name": "CACHE_CONTROL"},
10067
    {"bits": [27, 28], "name": "MTYPE"}
10068
   ]
10069
  },
10070
  "CP_PRED_NOT_VISIBLE": {
10071
   "fields": [
10072
    {"bits": [0, 0], "name": "NOT_VISIBLE"}
10073
   ]
10074
  },
10075
  "CP_RB_OFFSET": {
10076
   "fields": [
10077
    {"bits": [0, 19], "name": "RB_OFFSET"}
10078
   ]
10079
  },
10080
  "CP_RINGID": {
10081
   "fields": [
10082
    {"bits": [0, 1], "name": "RINGID"}
10083
   ]
10084
  },
10085
  "CP_SAMPLE_STATUS": {
10086
   "fields": [
10087
    {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
10088
    {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
10089
    {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
10090
    {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
10091
    {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
10092
    {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
10093
    {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
10094
    {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
10095
   ]
10096
  },
10097
  "CP_SCRATCH_INDEX": {
10098
   "fields": [
10099
    {"bits": [0, 7], "name": "SCRATCH_INDEX"}
10100
   ]
10101
  },
10102
  "CP_SIG_SEM_ADDR_HI": {
10103
   "fields": [
10104
    {"bits": [0, 15], "name": "SEM_ADDR_HI"},
10105
    {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
10106
    {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
10107
    {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
10108
    {"bits": [29, 31], "name": "SEM_SELECT"}
10109
   ]
10110
  },
10111
  "CP_SIG_SEM_ADDR_LO": {
10112
   "fields": [
10113
    {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
10114
    {"bits": [3, 31], "name": "SEM_ADDR_LO"}
10115
   ]
10116
  },
10117
  "CP_STREAM_OUT_ADDR_HI": {
10118
   "fields": [
10119
    {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
10120
   ]
10121
  },
10122
  "CP_STREAM_OUT_ADDR_LO": {
10123
   "fields": [
10124
    {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
10125
   ]
10126
  },
10127
  "CP_STRMOUT_CNTL": {
10128
   "fields": [
10129
    {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
10130
   ]
10131
  },
10132
  "CP_ST_BASE_HI": {
10133
   "fields": [
10134
    {"bits": [0, 15], "name": "ST_BASE_HI"}
10135
   ]
10136
  },
10137
  "CP_ST_BASE_LO": {
10138
   "fields": [
10139
    {"bits": [2, 31], "name": "ST_BASE_LO"}
10140
   ]
10141
  },
10142
  "CP_ST_BUFSZ": {
10143
   "fields": [
10144
    {"bits": [0, 19], "name": "ST_BUFSZ"}
10145
   ]
10146
  },
10147
  "CP_VMID": {
10148
   "fields": [
10149
    {"bits": [0, 3], "name": "VMID"}
10150
   ]
10151
  },
10152
  "CS_COPY_STATE": {
10153
   "fields": [
10154
    {"bits": [0, 2], "name": "SRC_STATE_ID"}
10155
   ]
10156
  },
10157
  "DB_ALPHA_TO_MASK": {
10158
   "fields": [
10159
    {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
10160
    {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
10161
    {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
10162
    {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
10163
    {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
10164
    {"bits": [16, 16], "name": "OFFSET_ROUND"}
10165
   ]
10166
  },
10167
  "DB_COUNT_CONTROL": {
10168
   "fields": [
10169
    {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
10170
    {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
10171
    {"bits": [4, 6], "name": "SAMPLE_RATE"},
10172
    {"bits": [8, 11], "name": "ZPASS_ENABLE"},
10173
    {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
10174
    {"bits": [16, 19], "name": "SFAIL_ENABLE"},
10175
    {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
10176
    {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
10177
    {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
10178
   ]
10179
  },
10180
  "DB_DEPTH_CONTROL": {
10181
   "fields": [
10182
    {"bits": [0, 0], "name": "STENCIL_ENABLE"},
10183
    {"bits": [1, 1], "name": "Z_ENABLE"},
10184
    {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
10185
    {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
10186
    {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
10187
    {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
10188
    {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
10189
    {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
10190
    {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
10191
    {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
10192
   ]
10193
  },
10194
  "DB_DEPTH_INFO": {
10195
   "fields": [
10196
    {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
10197
    {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10198
    {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10199
    {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10200
    {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10201
    {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10202
    {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10203
   ]
10204
  },
10205
  "DB_DEPTH_SIZE": {
10206
   "fields": [
10207
    {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
10208
    {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
10209
   ]
10210
  },
10211
  "DB_DEPTH_SLICE": {
10212
   "fields": [
10213
    {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
10214
   ]
10215
  },
10216
  "DB_DEPTH_VIEW": {
10217
   "fields": [
10218
    {"bits": [0, 10], "name": "SLICE_START"},
10219
    {"bits": [13, 23], "name": "SLICE_MAX"},
10220
    {"bits": [24, 24], "name": "Z_READ_ONLY"},
10221
    {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
10222
   ]
10223
  },
10224
  "DB_EQAA": {
10225
   "fields": [
10226
    {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
10227
    {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
10228
    {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
10229
    {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
10230
    {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
10231
    {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
10232
    {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
10233
    {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
10234
    {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
10235
    {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
10236
    {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
10237
    {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
10238
   ]
10239
  },
10240
  "DB_HTILE_SURFACE": {
10241
   "fields": [
10242
    {"bits": [0, 0], "name": "LINEAR"},
10243
    {"bits": [1, 1], "name": "FULL_CACHE"},
10244
    {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
10245
    {"bits": [3, 3], "name": "PRELOAD"},
10246
    {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
10247
    {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
10248
    {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
10249
    {"bits": [17, 17], "name": "TC_COMPATIBLE"}
10250
   ]
10251
  },
10252
  "DB_PERFCOUNTER0_SELECT": {
10253
   "fields": [
10254
    {"bits": [0, 9], "name": "PERF_SEL"},
10255
    {"bits": [10, 19], "name": "PERF_SEL1"},
10256
    {"bits": [20, 23], "name": "CNTR_MODE"},
10257
    {"bits": [24, 27], "name": "PERF_MODE1"},
10258
    {"bits": [28, 31], "name": "PERF_MODE"}
10259
   ]
10260
  },
10261
  "DB_PERFCOUNTER0_SELECT1": {
10262
   "fields": [
10263
    {"bits": [0, 9], "name": "PERF_SEL2"},
10264
    {"bits": [10, 19], "name": "PERF_SEL3"},
10265
    {"bits": [24, 27], "name": "PERF_MODE3"},
10266
    {"bits": [28, 31], "name": "PERF_MODE2"}
10267
   ]
10268
  },
10269
  "DB_PRELOAD_CONTROL": {
10270
   "fields": [
10271
    {"bits": [0, 7], "name": "START_X"},
10272
    {"bits": [8, 15], "name": "START_Y"},
10273
    {"bits": [16, 23], "name": "MAX_X"},
10274
    {"bits": [24, 31], "name": "MAX_Y"}
10275
   ]
10276
  },
10277
  "DB_RENDER_CONTROL": {
10278
   "fields": [
10279
    {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
10280
    {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
10281
    {"bits": [2, 2], "name": "DEPTH_COPY"},
10282
    {"bits": [3, 3], "name": "STENCIL_COPY"},
10283
    {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
10284
    {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
10285
    {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
10286
    {"bits": [7, 7], "name": "COPY_CENTROID"},
10287
    {"bits": [8, 11], "name": "COPY_SAMPLE"},
10288
    {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
10289
   ]
10290
  },
10291
  "DB_RENDER_OVERRIDE": {
10292
   "fields": [
10293
    {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
10294
    {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
10295
    {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
10296
    {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
10297
    {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
10298
    {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
10299
    {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
10300
    {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
10301
    {"bits": [11, 11], "name": "FORCE_Z_READ"},
10302
    {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
10303
    {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
10304
    {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
10305
    {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
10306
    {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
10307
    {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
10308
    {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
10309
    {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
10310
    {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
10311
    {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
10312
    {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
10313
    {"bits": [29, 29], "name": "FORCE_Z_VALID"},
10314
    {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
10315
    {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
10316
   ]
10317
  },
10318
  "DB_RENDER_OVERRIDE2": {
10319
   "fields": [
10320
    {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
10321
    {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
10322
    {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
10323
    {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
10324
    {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
10325
    {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
10326
    {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
10327
    {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
10328
    {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
10329
    {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
10330
    {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
10331
    {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
10332
    {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
10333
    {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
10334
    {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
10335
   ]
10336
  },
10337
  "DB_SHADER_CONTROL": {
10338
   "fields": [
10339
    {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
10340
    {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
10341
    {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
10342
    {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
10343
    {"bits": [6, 6], "name": "KILL_ENABLE"},
10344
    {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
10345
    {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
10346
    {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
10347
    {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
10348
    {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
10349
    {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
10350
    {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}
10351
   ]
10352
  },
10353
  "DB_SRESULTS_COMPARE_STATE0": {
10354
   "fields": [
10355
    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
10356
    {"bits": [4, 11], "name": "COMPAREVALUE0"},
10357
    {"bits": [12, 19], "name": "COMPAREMASK0"},
10358
    {"bits": [24, 24], "name": "ENABLE0"}
10359
   ]
10360
  },
10361
  "DB_SRESULTS_COMPARE_STATE1": {
10362
   "fields": [
10363
    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
10364
    {"bits": [4, 11], "name": "COMPAREVALUE1"},
10365
    {"bits": [12, 19], "name": "COMPAREMASK1"},
10366
    {"bits": [24, 24], "name": "ENABLE1"}
10367
   ]
10368
  },
10369
  "DB_STENCILREFMASK": {
10370
   "fields": [
10371
    {"bits": [0, 7], "name": "STENCILTESTVAL"},
10372
    {"bits": [8, 15], "name": "STENCILMASK"},
10373
    {"bits": [16, 23], "name": "STENCILWRITEMASK"},
10374
    {"bits": [24, 31], "name": "STENCILOPVAL"}
10375
   ]
10376
  },
10377
  "DB_STENCILREFMASK_BF": {
10378
   "fields": [
10379
    {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
10380
    {"bits": [8, 15], "name": "STENCILMASK_BF"},
10381
    {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
10382
    {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
10383
   ]
10384
  },
10385
  "DB_STENCIL_CLEAR": {
10386
   "fields": [
10387
    {"bits": [0, 7], "name": "CLEAR"}
10388
   ]
10389
  },
10390
  "DB_STENCIL_CONTROL": {
10391
   "fields": [
10392
    {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
10393
    {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
10394
    {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
10395
    {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
10396
    {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
10397
    {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
10398
   ]
10399
  },
10400
  "DB_STENCIL_INFO": {
10401
   "fields": [
10402
    {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
10403
    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10404
    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10405
    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10406
    {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
10407
    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
10408
   ]
10409
  },
10410
  "DB_ZPASS_COUNT_HI": {
10411
   "fields": [
10412
    {"bits": [0, 30], "name": "COUNT_HI"}
10413
   ]
10414
  },
10415
  "DB_Z_INFO": {
10416
   "fields": [
10417
    {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
10418
    {"bits": [2, 3], "name": "NUM_SAMPLES"},
10419
    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10420
    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10421
    {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
10422
    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10423
    {"bits": [28, 28], "name": "READ_SIZE"},
10424
    {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
10425
    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
10426
    {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
10427
   ]
10428
  },
10429
  "GB_ADDR_CONFIG": {
10430
   "fields": [
10431
    {"bits": [0, 2], "name": "NUM_PIPES"},
10432
    {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
10433
    {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
10434
    {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
10435
    {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
10436
    {"bits": [20, 22], "name": "NUM_GPUS"},
10437
    {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
10438
    {"bits": [28, 29], "name": "ROW_SIZE"},
10439
    {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
10440
   ]
10441
  },
10442
  "GB_MACROTILE_MODE0": {
10443
   "fields": [
10444
    {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10445
    {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10446
    {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10447
    {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10448
   ]
10449
  },
10450
  "GB_TILE_MODE0": {
10451
   "fields": [
10452
    {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10453
    {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10454
    {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10455
    {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
10456
    {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
10457
   ]
10458
  },
10459
  "GDS_ATOM_BASE": {
10460
   "fields": [
10461
    {"bits": [0, 15], "name": "BASE"},
10462
    {"bits": [16, 31], "name": "UNUSED"}
10463
   ]
10464
  },
10465
  "GDS_ATOM_CNTL": {
10466
   "fields": [
10467
    {"bits": [0, 5], "name": "AINC"},
10468
    {"bits": [6, 7], "name": "UNUSED1"},
10469
    {"bits": [8, 9], "name": "DMODE"},
10470
    {"bits": [10, 31], "name": "UNUSED2"}
10471
   ]
10472
  },
10473
  "GDS_ATOM_COMPLETE": {
10474
   "fields": [
10475
    {"bits": [0, 0], "name": "COMPLETE"},
10476
    {"bits": [1, 31], "name": "UNUSED"}
10477
   ]
10478
  },
10479
  "GDS_ATOM_OFFSET0": {
10480
   "fields": [
10481
    {"bits": [0, 7], "name": "OFFSET0"},
10482
    {"bits": [8, 31], "name": "UNUSED"}
10483
   ]
10484
  },
10485
  "GDS_ATOM_OFFSET1": {
10486
   "fields": [
10487
    {"bits": [0, 7], "name": "OFFSET1"},
10488
    {"bits": [8, 31], "name": "UNUSED"}
10489
   ]
10490
  },
10491
  "GDS_ATOM_OP": {
10492
   "fields": [
10493
    {"bits": [0, 7], "name": "OP"},
10494
    {"bits": [8, 31], "name": "UNUSED"}
10495
   ]
10496
  },
10497
  "GDS_ATOM_SIZE": {
10498
   "fields": [
10499
    {"bits": [0, 15], "name": "SIZE"},
10500
    {"bits": [16, 31], "name": "UNUSED"}
10501
   ]
10502
  },
10503
  "GDS_GWS_RESOURCE": {
10504
   "fields": [
10505
    {"bits": [0, 0], "name": "FLAG"},
10506
    {"bits": [1, 12], "name": "COUNTER"},
10507
    {"bits": [13, 13], "name": "TYPE"},
10508
    {"bits": [14, 14], "name": "DED"},
10509
    {"bits": [15, 15], "name": "RELEASE_ALL"},
10510
    {"bits": [16, 26], "name": "HEAD_QUEUE"},
10511
    {"bits": [27, 27], "name": "HEAD_VALID"},
10512
    {"bits": [28, 28], "name": "HEAD_FLAG"},
10513
    {"bits": [29, 31], "name": "UNUSED1"}
10514
   ]
10515
  },
10516
  "GDS_GWS_RESOURCE_CNT": {
10517
   "fields": [
10518
    {"bits": [0, 15], "name": "RESOURCE_CNT"},
10519
    {"bits": [16, 31], "name": "UNUSED"}
10520
   ]
10521
  },
10522
  "GDS_GWS_RESOURCE_CNTL": {
10523
   "fields": [
10524
    {"bits": [0, 5], "name": "INDEX"},
10525
    {"bits": [6, 31], "name": "UNUSED"}
10526
   ]
10527
  },
10528
  "GDS_OA_ADDRESS": {
10529
   "fields": [
10530
    {"bits": [0, 15], "name": "DS_ADDRESS"},
10531
    {"bits": [16, 19], "name": "CRAWLER"},
10532
    {"bits": [20, 21], "name": "CRAWLER_TYPE"},
10533
    {"bits": [22, 29], "name": "UNUSED"},
10534
    {"bits": [30, 30], "name": "NO_ALLOC"},
10535
    {"bits": [31, 31], "name": "ENABLE"}
10536
   ]
10537
  },
10538
  "GDS_OA_CNTL": {
10539
   "fields": [
10540
    {"bits": [0, 3], "name": "INDEX"},
10541
    {"bits": [4, 31], "name": "UNUSED"}
10542
   ]
10543
  },
10544
  "GDS_OA_INCDEC": {
10545
   "fields": [
10546
    {"bits": [0, 30], "name": "VALUE"},
10547
    {"bits": [31, 31], "name": "INCDEC"}
10548
   ]
10549
  },
10550
  "GRBM_GFX_INDEX": {
10551
   "fields": [
10552
    {"bits": [0, 7], "name": "INSTANCE_INDEX"},
10553
    {"bits": [8, 15], "name": "SH_INDEX"},
10554
    {"bits": [16, 23], "name": "SE_INDEX"},
10555
    {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
10556
    {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
10557
    {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
10558
   ]
10559
  },
10560
  "GRBM_PERFCOUNTER0_SELECT": {
10561
   "fields": [
10562
    {"bits": [0, 5], "name": "PERF_SEL"},
10563
    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10564
    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10565
    {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10566
    {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
10567
    {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
10568
    {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10569
    {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
10570
    {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
10571
    {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
10572
    {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
10573
    {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
10574
    {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
10575
    {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
10576
    {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
10577
    {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
10578
    {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
10579
    {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
10580
    {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
10581
   ]
10582
  },
10583
  "GRBM_SE0_PERFCOUNTER_SELECT": {
10584
   "fields": [
10585
    {"bits": [0, 5], "name": "PERF_SEL"},
10586
    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10587
    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10588
    {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
10589
    {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
10590
    {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10591
    {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
10592
    {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
10593
    {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
10594
    {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10595
    {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
10596
    {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
10597
   ]
10598
  },
10599
  "GRBM_STATUS": {
10600
   "fields": [
10601
    {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
10602
    {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
10603
    {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
10604
    {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
10605
    {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
10606
    {"bits": [12, 12], "name": "DB_CLEAN"},
10607
    {"bits": [13, 13], "name": "CB_CLEAN"},
10608
    {"bits": [14, 14], "name": "TA_BUSY"},
10609
    {"bits": [15, 15], "name": "GDS_BUSY"},
10610
    {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
10611
    {"bits": [17, 17], "name": "VGT_BUSY"},
10612
    {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
10613
    {"bits": [19, 19], "name": "IA_BUSY"},
10614
    {"bits": [20, 20], "name": "SX_BUSY"},
10615
    {"bits": [21, 21], "name": "WD_BUSY"},
10616
    {"bits": [22, 22], "name": "SPI_BUSY"},
10617
    {"bits": [23, 23], "name": "BCI_BUSY"},
10618
    {"bits": [24, 24], "name": "SC_BUSY"},
10619
    {"bits": [25, 25], "name": "PA_BUSY"},
10620
    {"bits": [26, 26], "name": "DB_BUSY"},
10621
    {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
10622
    {"bits": [29, 29], "name": "CP_BUSY"},
10623
    {"bits": [30, 30], "name": "CB_BUSY"},
10624
    {"bits": [31, 31], "name": "GUI_ACTIVE"}
10625
   ]
10626
  },
10627
  "GRBM_STATUS2": {
10628
   "fields": [
10629
    {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
10630
    {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
10631
    {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
10632
    {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
10633
    {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
10634
    {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
10635
    {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
10636
    {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
10637
    {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
10638
    {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
10639
    {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
10640
    {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
10641
    {"bits": [24, 24], "name": "RLC_BUSY"},
10642
    {"bits": [25, 25], "name": "TC_BUSY"},
10643
    {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
10644
    {"bits": [28, 28], "name": "CPF_BUSY"},
10645
    {"bits": [29, 29], "name": "CPC_BUSY"},
10646
    {"bits": [30, 30], "name": "CPG_BUSY"}
10647
   ]
10648
  },
10649
  "GRBM_STATUS_SE0": {
10650
   "fields": [
10651
    {"bits": [1, 1], "name": "DB_CLEAN"},
10652
    {"bits": [2, 2], "name": "CB_CLEAN"},
10653
    {"bits": [22, 22], "name": "BCI_BUSY"},
10654
    {"bits": [23, 23], "name": "VGT_BUSY"},
10655
    {"bits": [24, 24], "name": "PA_BUSY"},
10656
    {"bits": [25, 25], "name": "TA_BUSY"},
10657
    {"bits": [26, 26], "name": "SX_BUSY"},
10658
    {"bits": [27, 27], "name": "SPI_BUSY"},
10659
    {"bits": [29, 29], "name": "SC_BUSY"},
10660
    {"bits": [30, 30], "name": "DB_BUSY"},
10661
    {"bits": [31, 31], "name": "CB_BUSY"}
10662
   ]
10663
  },
10664
  "IA_MULTI_VGT_PARAM": {
10665
   "fields": [
10666
    {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
10667
    {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
10668
    {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
10669
    {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
10670
    {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
10671
    {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
10672
    {"bits": [28, 31], "name": "MAX_PRIMGRP_IN_WAVE"}
10673
   ]
10674
  },
10675
  "PA_CL_CLIP_CNTL": {
10676
   "fields": [
10677
    {"bits": [0, 0], "name": "UCP_ENA_0"},
10678
    {"bits": [1, 1], "name": "UCP_ENA_1"},
10679
    {"bits": [2, 2], "name": "UCP_ENA_2"},
10680
    {"bits": [3, 3], "name": "UCP_ENA_3"},
10681
    {"bits": [4, 4], "name": "UCP_ENA_4"},
10682
    {"bits": [5, 5], "name": "UCP_ENA_5"},
10683
    {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
10684
    {"bits": [14, 15], "name": "PS_UCP_MODE"},
10685
    {"bits": [16, 16], "name": "CLIP_DISABLE"},
10686
    {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
10687
    {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
10688
    {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
10689
    {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
10690
    {"bits": [21, 21], "name": "VTX_KILL_OR"},
10691
    {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
10692
    {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
10693
    {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
10694
    {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
10695
    {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
10696
   ]
10697
  },
10698
  "PA_CL_NANINF_CNTL": {
10699
   "fields": [
10700
    {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
10701
    {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
10702
    {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
10703
    {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
10704
    {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
10705
    {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
10706
    {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
10707
    {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
10708
    {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
10709
    {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
10710
    {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
10711
    {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
10712
    {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
10713
    {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
10714
    {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
10715
    {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
10716
   ]
10717
  },
10718
  "PA_CL_VS_OUT_CNTL": {
10719
   "fields": [
10720
    {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
10721
    {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
10722
    {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
10723
    {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
10724
    {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
10725
    {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
10726
    {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
10727
    {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
10728
    {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
10729
    {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
10730
    {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
10731
    {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
10732
    {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
10733
    {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
10734
    {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
10735
    {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
10736
    {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
10737
    {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
10738
    {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
10739
    {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
10740
    {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
10741
    {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
10742
    {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
10743
    {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
10744
    {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
10745
    {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
10746
    {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}
10747
   ]
10748
  },
10749
  "PA_CL_VTE_CNTL": {
10750
   "fields": [
10751
    {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
10752
    {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
10753
    {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
10754
    {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
10755
    {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
10756
    {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
10757
    {"bits": [8, 8], "name": "VTX_XY_FMT"},
10758
    {"bits": [9, 9], "name": "VTX_Z_FMT"},
10759
    {"bits": [10, 10], "name": "VTX_W0_FMT"},
10760
    {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
10761
   ]
10762
  },
10763
  "PA_SC_AA_CONFIG": {
10764
   "fields": [
10765
    {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
10766
    {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
10767
    {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
10768
    {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
10769
    {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
10770
   ]
10771
  },
10772
  "PA_SC_AA_MASK_X0Y0_X1Y0": {
10773
   "fields": [
10774
    {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
10775
    {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
10776
   ]
10777
  },
10778
  "PA_SC_AA_MASK_X0Y1_X1Y1": {
10779
   "fields": [
10780
    {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
10781
    {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
10782
   ]
10783
  },
10784
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {
10785
   "fields": [
10786
    {"bits": [0, 3], "name": "S0_X"},
10787
    {"bits": [4, 7], "name": "S0_Y"},
10788
    {"bits": [8, 11], "name": "S1_X"},
10789
    {"bits": [12, 15], "name": "S1_Y"},
10790
    {"bits": [16, 19], "name": "S2_X"},
10791
    {"bits": [20, 23], "name": "S2_Y"},
10792
    {"bits": [24, 27], "name": "S3_X"},
10793
    {"bits": [28, 31], "name": "S3_Y"}
10794
   ]
10795
  },
10796
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {
10797
   "fields": [
10798
    {"bits": [0, 3], "name": "S4_X"},
10799
    {"bits": [4, 7], "name": "S4_Y"},
10800
    {"bits": [8, 11], "name": "S5_X"},
10801
    {"bits": [12, 15], "name": "S5_Y"},
10802
    {"bits": [16, 19], "name": "S6_X"},
10803
    {"bits": [20, 23], "name": "S6_Y"},
10804
    {"bits": [24, 27], "name": "S7_X"},
10805
    {"bits": [28, 31], "name": "S7_Y"}
10806
   ]
10807
  },
10808
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {
10809
   "fields": [
10810
    {"bits": [0, 3], "name": "S8_X"},
10811
    {"bits": [4, 7], "name": "S8_Y"},
10812
    {"bits": [8, 11], "name": "S9_X"},
10813
    {"bits": [12, 15], "name": "S9_Y"},
10814
    {"bits": [16, 19], "name": "S10_X"},
10815
    {"bits": [20, 23], "name": "S10_Y"},
10816
    {"bits": [24, 27], "name": "S11_X"},
10817
    {"bits": [28, 31], "name": "S11_Y"}
10818
   ]
10819
  },
10820
  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {
10821
   "fields": [
10822
    {"bits": [0, 3], "name": "S12_X"},
10823
    {"bits": [4, 7], "name": "S12_Y"},
10824
    {"bits": [8, 11], "name": "S13_X"},
10825
    {"bits": [12, 15], "name": "S13_Y"},
10826
    {"bits": [16, 19], "name": "S14_X"},
10827
    {"bits": [20, 23], "name": "S14_Y"},
10828
    {"bits": [24, 27], "name": "S15_X"},
10829
    {"bits": [28, 31], "name": "S15_Y"}
10830
   ]
10831
  },
10832
  "PA_SC_CENTROID_PRIORITY_0": {
10833
   "fields": [
10834
    {"bits": [0, 3], "name": "DISTANCE_0"},
10835
    {"bits": [4, 7], "name": "DISTANCE_1"},
10836
    {"bits": [8, 11], "name": "DISTANCE_2"},
10837
    {"bits": [12, 15], "name": "DISTANCE_3"},
10838
    {"bits": [16, 19], "name": "DISTANCE_4"},
10839
    {"bits": [20, 23], "name": "DISTANCE_5"},
10840
    {"bits": [24, 27], "name": "DISTANCE_6"},
10841
    {"bits": [28, 31], "name": "DISTANCE_7"}
10842
   ]
10843
  },
10844
  "PA_SC_CENTROID_PRIORITY_1": {
10845
   "fields": [
10846
    {"bits": [0, 3], "name": "DISTANCE_8"},
10847
    {"bits": [4, 7], "name": "DISTANCE_9"},
10848
    {"bits": [8, 11], "name": "DISTANCE_10"},
10849
    {"bits": [12, 15], "name": "DISTANCE_11"},
10850
    {"bits": [16, 19], "name": "DISTANCE_12"},
10851
    {"bits": [20, 23], "name": "DISTANCE_13"},
10852
    {"bits": [24, 27], "name": "DISTANCE_14"},
10853
    {"bits": [28, 31], "name": "DISTANCE_15"}
10854
   ]
10855
  },
10856
  "PA_SC_CLIPRECT_0_BR": {
10857
   "fields": [
10858
    {"bits": [0, 14], "name": "BR_X"},
10859
    {"bits": [16, 30], "name": "BR_Y"}
10860
   ]
10861
  },
10862
  "PA_SC_CLIPRECT_0_TL": {
10863
   "fields": [
10864
    {"bits": [0, 14], "name": "TL_X"},
10865
    {"bits": [16, 30], "name": "TL_Y"}
10866
   ]
10867
  },
10868
  "PA_SC_CLIPRECT_RULE": {
10869
   "fields": [
10870
    {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
10871
   ]
10872
  },
10873
  "PA_SC_EDGERULE": {
10874
   "fields": [
10875
    {"bits": [0, 3], "name": "ER_TRI"},
10876
    {"bits": [4, 7], "name": "ER_POINT"},
10877
    {"bits": [8, 11], "name": "ER_RECT"},
10878
    {"bits": [12, 17], "name": "ER_LINE_LR"},
10879
    {"bits": [18, 23], "name": "ER_LINE_RL"},
10880
    {"bits": [24, 27], "name": "ER_LINE_TB"},
10881
    {"bits": [28, 31], "name": "ER_LINE_BT"}
10882
   ]
10883
  },
10884
  "PA_SC_GENERIC_SCISSOR_TL": {
10885
   "fields": [
10886
    {"bits": [0, 14], "name": "TL_X"},
10887
    {"bits": [16, 30], "name": "TL_Y"},
10888
    {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
10889
   ]
10890
  },
10891
  "PA_SC_LINE_CNTL": {
10892
   "fields": [
10893
    {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
10894
    {"bits": [10, 10], "name": "LAST_PIXEL"},
10895
    {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
10896
    {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
10897
   ]
10898
  },
10899
  "PA_SC_LINE_STIPPLE": {
10900
   "fields": [
10901
    {"bits": [0, 15], "name": "LINE_PATTERN"},
10902
    {"bits": [16, 23], "name": "REPEAT_COUNT"},
10903
    {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
10904
    {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
10905
   ]
10906
  },
10907
  "PA_SC_LINE_STIPPLE_STATE": {
10908
   "fields": [
10909
    {"bits": [0, 3], "name": "CURRENT_PTR"},
10910
    {"bits": [8, 15], "name": "CURRENT_COUNT"}
10911
   ]
10912
  },
10913
  "PA_SC_MODE_CNTL_0": {
10914
   "fields": [
10915
    {"bits": [0, 0], "name": "MSAA_ENABLE"},
10916
    {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
10917
    {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
10918
    {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
10919
   ]
10920
  },
10921
  "PA_SC_MODE_CNTL_1": {
10922
   "fields": [
10923
    {"bits": [0, 0], "name": "WALK_SIZE"},
10924
    {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
10925
    {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
10926
    {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
10927
    {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
10928
    {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
10929
    {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
10930
    {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
10931
    {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
10932
    {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
10933
    {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
10934
    {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
10935
    {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
10936
    {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
10937
    {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
10938
    {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
10939
    {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
10940
    {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
10941
    {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
10942
    {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
10943
    {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
10944
    {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
10945
    {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
10946
    {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
10947
   ]
10948
  },
10949
  "PA_SC_P3D_TRAP_SCREEN_H": {
10950
   "fields": [
10951
    {"bits": [0, 13], "name": "X_COORD"}
10952
   ]
10953
  },
10954
  "PA_SC_P3D_TRAP_SCREEN_HV_EN": {
10955
   "fields": [
10956
    {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
10957
    {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
10958
   ]
10959
  },
10960
  "PA_SC_P3D_TRAP_SCREEN_V": {
10961
   "fields": [
10962
    {"bits": [0, 13], "name": "Y_COORD"}
10963
   ]
10964
  },
10965
  "PA_SC_PERFCOUNTER1_SELECT": {
10966
   "fields": [
10967
    {"bits": [0, 9], "name": "PERF_SEL"}
10968
   ]
10969
  },
10970
  "PA_SC_RASTER_CONFIG": {
10971
   "fields": [
10972
    {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
10973
    {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
10974
    {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
10975
    {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
10976
    {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
10977
    {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
10978
    {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
10979
    {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
10980
    {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
10981
    {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
10982
    {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
10983
    {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
10984
    {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
10985
    {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
10986
    {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
10987
   ]
10988
  },
10989
  "PA_SC_RASTER_CONFIG_1": {
10990
   "fields": [
10991
    {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
10992
    {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
10993
    {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
10994
   ]
10995
  },
10996
  "PA_SC_SCREEN_EXTENT_CONTROL": {
10997
   "fields": [
10998
    {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
10999
    {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
11000
   ]
11001
  },
11002
  "PA_SC_SCREEN_EXTENT_MIN_0": {
11003
   "fields": [
11004
    {"bits": [0, 15], "name": "X"},
11005
    {"bits": [16, 31], "name": "Y"}
11006
   ]
11007
  },
11008
  "PA_SC_SCREEN_SCISSOR_BR": {
11009
   "fields": [
11010
    {"bits": [0, 15], "name": "BR_X"},
11011
    {"bits": [16, 31], "name": "BR_Y"}
11012
   ]
11013
  },
11014
  "PA_SC_SCREEN_SCISSOR_TL": {
11015
   "fields": [
11016
    {"bits": [0, 15], "name": "TL_X"},
11017
    {"bits": [16, 31], "name": "TL_Y"}
11018
   ]
11019
  },
11020
  "PA_SC_WINDOW_OFFSET": {
11021
   "fields": [
11022
    {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
11023
    {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
11024
   ]
11025
  },
11026
  "PA_SU_HARDWARE_SCREEN_OFFSET": {
11027
   "fields": [
11028
    {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
11029
    {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
11030
   ]
11031
  },
11032
  "PA_SU_LINE_CNTL": {
11033
   "fields": [
11034
    {"bits": [0, 15], "name": "WIDTH"}
11035
   ]
11036
  },
11037
  "PA_SU_LINE_STIPPLE_CNTL": {
11038
   "fields": [
11039
    {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
11040
    {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
11041
    {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
11042
    {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
11043
   ]
11044
  },
11045
  "PA_SU_LINE_STIPPLE_VALUE": {
11046
   "fields": [
11047
    {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
11048
   ]
11049
  },
11050
  "PA_SU_PERFCOUNTER0_HI": {
11051
   "fields": [
11052
    {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
11053
   ]
11054
  },
11055
  "PA_SU_PERFCOUNTER0_SELECT": {
11056
   "fields": [
11057
    {"bits": [0, 9], "name": "PERF_SEL"},
11058
    {"bits": [10, 19], "name": "PERF_SEL1"},
11059
    {"bits": [20, 23], "name": "CNTR_MODE"}
11060
   ]
11061
  },
11062
  "PA_SU_PERFCOUNTER0_SELECT1": {
11063
   "fields": [
11064
    {"bits": [0, 9], "name": "PERF_SEL2"},
11065
    {"bits": [10, 19], "name": "PERF_SEL3"}
11066
   ]
11067
  },
11068
  "PA_SU_PERFCOUNTER2_SELECT": {
11069
   "fields": [
11070
    {"bits": [0, 9], "name": "PERF_SEL"},
11071
    {"bits": [20, 23], "name": "CNTR_MODE"}
11072
   ]
11073
  },
11074
  "PA_SU_POINT_MINMAX": {
11075
   "fields": [
11076
    {"bits": [0, 15], "name": "MIN_SIZE"},
11077
    {"bits": [16, 31], "name": "MAX_SIZE"}
11078
   ]
11079
  },
11080
  "PA_SU_POINT_SIZE": {
11081
   "fields": [
11082
    {"bits": [0, 15], "name": "HEIGHT"},
11083
    {"bits": [16, 31], "name": "WIDTH"}
11084
   ]
11085
  },
11086
  "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {
11087
   "fields": [
11088
    {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
11089
    {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
11090
   ]
11091
  },
11092
  "PA_SU_PRIM_FILTER_CNTL": {
11093
   "fields": [
11094
    {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
11095
    {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
11096
    {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
11097
    {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
11098
    {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
11099
    {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
11100
    {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
11101
    {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
11102
    {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
11103
    {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
11104
    {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
11105
   ]
11106
  },
11107
  "PA_SU_SC_MODE_CNTL": {
11108
   "fields": [
11109
    {"bits": [0, 0], "name": "CULL_FRONT"},
11110
    {"bits": [1, 1], "name": "CULL_BACK"},
11111
    {"bits": [2, 2], "name": "FACE"},
11112
    {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
11113
    {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
11114
    {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
11115
    {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
11116
    {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
11117
    {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
11118
    {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
11119
    {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
11120
    {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
11121
    {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
11122
   ]
11123
  },
11124
  "PA_SU_VTX_CNTL": {
11125
   "fields": [
11126
    {"bits": [0, 0], "name": "PIX_CENTER"},
11127
    {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
11128
    {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
11129
   ]
11130
  },
11131
  "RLC_PERFCOUNTER0_SELECT": {
11132
   "fields": [
11133
    {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
11134
   ]
11135
  },
11136
  "RLC_PERFMON_CLK_CNTL": {
11137
   "fields": [
11138
    {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
11139
   ]
11140
  },
11141
  "RLC_PERFMON_CNTL": {
11142
   "fields": [
11143
    {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11144
    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11145
   ]
11146
  },
11147
  "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {
11148
   "fields": [
11149
    {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
11150
    {"bits": [8, 31], "name": "RESERVED"}
11151
   ]
11152
  },
11153
  "RLC_SPM_PERFMON_CNTL": {
11154
   "fields": [
11155
    {"bits": [0, 11], "name": "RESERVED1"},
11156
    {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
11157
    {"bits": [14, 15], "name": "RESERVED"},
11158
    {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
11159
   ]
11160
  },
11161
  "RLC_SPM_PERFMON_RING_BASE_HI": {
11162
   "fields": [
11163
    {"bits": [0, 15], "name": "RING_BASE_HI"},
11164
    {"bits": [16, 31], "name": "RESERVED"}
11165
   ]
11166
  },
11167
  "RLC_SPM_PERFMON_SEGMENT_SIZE": {
11168
   "fields": [
11169
    {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
11170
    {"bits": [8, 10], "name": "RESERVED1"},
11171
    {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
11172
    {"bits": [16, 20], "name": "SE0_NUM_LINE"},
11173
    {"bits": [21, 25], "name": "SE1_NUM_LINE"},
11174
    {"bits": [26, 30], "name": "SE2_NUM_LINE"},
11175
    {"bits": [31, 31], "name": "RESERVED"}
11176
   ]
11177
  },
11178
  "SCRATCH_UMSK": {
11179
   "fields": [
11180
    {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
11181
    {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
11182
   ]
11183
  },
11184
  "SPI_BARYC_CNTL": {
11185
   "fields": [
11186
    {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
11187
    {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
11188
    {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
11189
    {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
11190
    {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
11191
    {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
11192
    {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
11193
   ]
11194
  },
11195
  "SPI_CONFIG_CNTL": {
11196
   "fields": [
11197
    {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
11198
    {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
11199
    {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
11200
    {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
11201
    {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
11202
    {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
11203
   ]
11204
  },
11205
  "SPI_INTERP_CONTROL_0": {
11206
   "fields": [
11207
    {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
11208
    {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
11209
    {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
11210
    {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
11211
    {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
11212
    {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
11213
    {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
11214
   ]
11215
  },
11216
  "SPI_PERFCOUNTER4_SELECT": {
11217
   "fields": [
11218
    {"bits": [0, 7], "name": "PERF_SEL"}
11219
   ]
11220
  },
11221
  "SPI_PERFCOUNTER_BINS": {
11222
   "fields": [
11223
    {"bits": [0, 3], "name": "BIN0_MIN"},
11224
    {"bits": [4, 7], "name": "BIN0_MAX"},
11225
    {"bits": [8, 11], "name": "BIN1_MIN"},
11226
    {"bits": [12, 15], "name": "BIN1_MAX"},
11227
    {"bits": [16, 19], "name": "BIN2_MIN"},
11228
    {"bits": [20, 23], "name": "BIN2_MAX"},
11229
    {"bits": [24, 27], "name": "BIN3_MIN"},
11230
    {"bits": [28, 31], "name": "BIN3_MAX"}
11231
   ]
11232
  },
11233
  "SPI_PS_INPUT_CNTL_0": {
11234
   "fields": [
11235
    {"bits": [0, 5], "name": "OFFSET"},
11236
    {"bits": [8, 9], "name": "DEFAULT_VAL"},
11237
    {"bits": [10, 10], "name": "FLAT_SHADE"},
11238
    {"bits": [13, 16], "name": "CYL_WRAP"},
11239
    {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
11240
    {"bits": [18, 18], "name": "DUP"},
11241
    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11242
    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11243
    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11244
    {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
11245
    {"bits": [24, 24], "name": "ATTR0_VALID"},
11246
    {"bits": [25, 25], "name": "ATTR1_VALID"}
11247
   ]
11248
  },
11249
  "SPI_PS_INPUT_CNTL_20": {
11250
   "fields": [
11251
    {"bits": [0, 5], "name": "OFFSET"},
11252
    {"bits": [8, 9], "name": "DEFAULT_VAL"},
11253
    {"bits": [10, 10], "name": "FLAT_SHADE"},
11254
    {"bits": [18, 18], "name": "DUP"},
11255
    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11256
    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11257
    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11258
    {"bits": [24, 24], "name": "ATTR0_VALID"},
11259
    {"bits": [25, 25], "name": "ATTR1_VALID"}
11260
   ]
11261
  },
11262
  "SPI_PS_INPUT_ENA": {
11263
   "fields": [
11264
    {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
11265
    {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
11266
    {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
11267
    {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
11268
    {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
11269
    {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
11270
    {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
11271
    {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
11272
    {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
11273
    {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
11274
    {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
11275
    {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
11276
    {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
11277
    {"bits": [13, 13], "name": "ANCILLARY_ENA"},
11278
    {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
11279
    {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
11280
   ]
11281
  },
11282
  "SPI_PS_IN_CONTROL": {
11283
   "fields": [
11284
    {"bits": [0, 5], "name": "NUM_INTERP"},
11285
    {"bits": [6, 6], "name": "PARAM_GEN"},
11286
    {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
11287
   ]
11288
  },
11289
  "SPI_SHADER_COL_FORMAT": {
11290
   "fields": [
11291
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
11292
    {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
11293
    {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
11294
    {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
11295
    {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
11296
    {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
11297
    {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
11298
    {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
11299
   ]
11300
  },
11301
  "SPI_SHADER_LATE_ALLOC_VS": {
11302
   "fields": [
11303
    {"bits": [0, 5], "name": "LIMIT"}
11304
   ]
11305
  },
11306
  "SPI_SHADER_PGM_RSRC1_GS": {
11307
   "fields": [
11308
    {"bits": [0, 5], "name": "VGPRS"},
11309
    {"bits": [6, 9], "name": "SGPRS"},
11310
    {"bits": [10, 11], "name": "PRIORITY"},
11311
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11312
    {"bits": [20, 20], "name": "PRIV"},
11313
    {"bits": [21, 21], "name": "DX10_CLAMP"},
11314
    {"bits": [22, 22], "name": "DEBUG_MODE"},
11315
    {"bits": [23, 23], "name": "IEEE_MODE"},
11316
    {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
11317
    {"bits": [25, 27], "name": "CACHE_CTL"},
11318
    {"bits": [28, 28], "name": "CDBG_USER"}
11319
   ]
11320
  },
11321
  "SPI_SHADER_PGM_RSRC1_HS": {
11322
   "fields": [
11323
    {"bits": [0, 5], "name": "VGPRS"},
11324
    {"bits": [6, 9], "name": "SGPRS"},
11325
    {"bits": [10, 11], "name": "PRIORITY"},
11326
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11327
    {"bits": [20, 20], "name": "PRIV"},
11328
    {"bits": [21, 21], "name": "DX10_CLAMP"},
11329
    {"bits": [22, 22], "name": "DEBUG_MODE"},
11330
    {"bits": [23, 23], "name": "IEEE_MODE"},
11331
    {"bits": [24, 26], "name": "CACHE_CTL"},
11332
    {"bits": [27, 27], "name": "CDBG_USER"}
11333
   ]
11334
  },
11335
  "SPI_SHADER_PGM_RSRC1_LS": {
11336
   "fields": [
11337
    {"bits": [0, 5], "name": "VGPRS"},
11338
    {"bits": [6, 9], "name": "SGPRS"},
11339
    {"bits": [10, 11], "name": "PRIORITY"},
11340
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11341
    {"bits": [20, 20], "name": "PRIV"},
11342
    {"bits": [21, 21], "name": "DX10_CLAMP"},
11343
    {"bits": [22, 22], "name": "DEBUG_MODE"},
11344
    {"bits": [23, 23], "name": "IEEE_MODE"},
11345
    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11346
    {"bits": [26, 28], "name": "CACHE_CTL"},
11347
    {"bits": [29, 29], "name": "CDBG_USER"}
11348
   ]
11349
  },
11350
  "SPI_SHADER_PGM_RSRC1_PS": {
11351
   "fields": [
11352
    {"bits": [0, 5], "name": "VGPRS"},
11353
    {"bits": [6, 9], "name": "SGPRS"},
11354
    {"bits": [10, 11], "name": "PRIORITY"},
11355
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11356
    {"bits": [20, 20], "name": "PRIV"},
11357
    {"bits": [21, 21], "name": "DX10_CLAMP"},
11358
    {"bits": [22, 22], "name": "DEBUG_MODE"},
11359
    {"bits": [23, 23], "name": "IEEE_MODE"},
11360
    {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
11361
    {"bits": [25, 27], "name": "CACHE_CTL"},
11362
    {"bits": [28, 28], "name": "CDBG_USER"}
11363
   ]
11364
  },
11365
  "SPI_SHADER_PGM_RSRC1_VS": {
11366
   "fields": [
11367
    {"bits": [0, 5], "name": "VGPRS"},
11368
    {"bits": [6, 9], "name": "SGPRS"},
11369
    {"bits": [10, 11], "name": "PRIORITY"},
11370
    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11371
    {"bits": [20, 20], "name": "PRIV"},
11372
    {"bits": [21, 21], "name": "DX10_CLAMP"},
11373
    {"bits": [22, 22], "name": "DEBUG_MODE"},
11374
    {"bits": [23, 23], "name": "IEEE_MODE"},
11375
    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11376
    {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
11377
    {"bits": [27, 29], "name": "CACHE_CTL"},
11378
    {"bits": [30, 30], "name": "CDBG_USER"}
11379
   ]
11380
  },
11381
  "SPI_SHADER_PGM_RSRC2_ES_VS": {
11382
   "fields": [
11383
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11384
    {"bits": [1, 5], "name": "USER_SGPR"},
11385
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11386
    {"bits": [7, 7], "name": "OC_LDS_EN"},
11387
    {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11388
    {"bits": [20, 28], "name": "LDS_SIZE"}
11389
   ]
11390
  },
11391
  "SPI_SHADER_PGM_RSRC2_GS": {
11392
   "fields": [
11393
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11394
    {"bits": [1, 5], "name": "USER_SGPR"},
11395
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11396
    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11397
   ]
11398
  },
11399
  "SPI_SHADER_PGM_RSRC2_HS": {
11400
   "fields": [
11401
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11402
    {"bits": [1, 5], "name": "USER_SGPR"},
11403
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11404
    {"bits": [7, 7], "name": "OC_LDS_EN"},
11405
    {"bits": [8, 8], "name": "TG_SIZE_EN"},
11406
    {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11407
   ]
11408
  },
11409
  "SPI_SHADER_PGM_RSRC2_LS_VS": {
11410
   "fields": [
11411
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11412
    {"bits": [1, 5], "name": "USER_SGPR"},
11413
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11414
    {"bits": [7, 15], "name": "LDS_SIZE"},
11415
    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11416
   ]
11417
  },
11418
  "SPI_SHADER_PGM_RSRC2_PS": {
11419
   "fields": [
11420
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11421
    {"bits": [1, 5], "name": "USER_SGPR"},
11422
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11423
    {"bits": [7, 7], "name": "WAVE_CNT_EN"},
11424
    {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
11425
    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11426
   ]
11427
  },
11428
  "SPI_SHADER_PGM_RSRC2_VS": {
11429
   "fields": [
11430
    {"bits": [0, 0], "name": "SCRATCH_EN"},
11431
    {"bits": [1, 5], "name": "USER_SGPR"},
11432
    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11433
    {"bits": [7, 7], "name": "OC_LDS_EN"},
11434
    {"bits": [8, 8], "name": "SO_BASE0_EN"},
11435
    {"bits": [9, 9], "name": "SO_BASE1_EN"},
11436
    {"bits": [10, 10], "name": "SO_BASE2_EN"},
11437
    {"bits": [11, 11], "name": "SO_BASE3_EN"},
11438
    {"bits": [12, 12], "name": "SO_EN"},
11439
    {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11440
    {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}
11441
   ]
11442
  },
11443
  "SPI_SHADER_PGM_RSRC3_GS": {
11444
   "fields": [
11445
    {"bits": [0, 15], "name": "CU_EN"},
11446
    {"bits": [16, 21], "name": "WAVE_LIMIT"},
11447
    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
11448
    {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"}
11449
   ]
11450
  },
11451
  "SPI_SHADER_PGM_RSRC3_HS": {
11452
   "fields": [
11453
    {"bits": [0, 5], "name": "WAVE_LIMIT"},
11454
    {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
11455
    {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}
11456
   ]
11457
  },
11458
  "SPI_SHADER_PGM_RSRC3_PS": {
11459
   "fields": [
11460
    {"bits": [0, 15], "name": "CU_EN"},
11461
    {"bits": [16, 21], "name": "WAVE_LIMIT"},
11462
    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
11463
   ]
11464
  },
11465
  "SPI_SHADER_POS_FORMAT": {
11466
   "fields": [
11467
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
11468
    {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
11469
    {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
11470
    {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
11471
   ]
11472
  },
11473
  "SPI_SHADER_TBA_HI_PS": {
11474
   "fields": [
11475
    {"bits": [0, 7], "name": "MEM_BASE"}
11476
   ]
11477
  },
11478
  "SPI_SHADER_Z_FORMAT": {
11479
   "fields": [
11480
    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
11481
   ]
11482
  },
11483
  "SPI_VS_OUT_CONFIG": {
11484
   "fields": [
11485
    {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
11486
    {"bits": [6, 6], "name": "VS_HALF_PACK"}
11487
   ]
11488
  },
11489
  "SQC_CACHES": {
11490
   "fields": [
11491
    {"bits": [0, 0], "name": "TARGET_INST"},
11492
    {"bits": [1, 1], "name": "TARGET_DATA"},
11493
    {"bits": [2, 2], "name": "INVALIDATE"},
11494
    {"bits": [3, 3], "name": "WRITEBACK"},
11495
    {"bits": [4, 4], "name": "VOL"},
11496
    {"bits": [16, 16], "name": "COMPLETE"}
11497
   ]
11498
  },
11499
  "SQC_WRITEBACK": {
11500
   "fields": [
11501
    {"bits": [0, 0], "name": "DWB"},
11502
    {"bits": [1, 1], "name": "DIRTY"}
11503
   ]
11504
  },
11505
  "SQ_BUF_RSRC_WORD1": {
11506
   "fields": [
11507
    {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
11508
    {"bits": [16, 29], "name": "STRIDE"},
11509
    {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
11510
    {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
11511
   ]
11512
  },
11513
  "SQ_BUF_RSRC_WORD3": {
11514
   "fields": [
11515
    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11516
    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11517
    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11518
    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11519
    {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
11520
    {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
11521
    {"bits": [19, 20], "name": "ELEMENT_SIZE"},
11522
    {"bits": [21, 22], "name": "INDEX_STRIDE"},
11523
    {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
11524
    {"bits": [24, 24], "name": "ATC"},
11525
    {"bits": [25, 25], "name": "HASH_ENABLE"},
11526
    {"bits": [26, 26], "name": "HEAP"},
11527
    {"bits": [27, 29], "name": "MTYPE"},
11528
    {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
11529
   ]
11530
  },
11531
  "SQ_IMG_RSRC_WORD1": {
11532
   "fields": [
11533
    {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
11534
    {"bits": [8, 19], "name": "MIN_LOD"},
11535
    {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
11536
    {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
11537
    {"bits": [30, 31], "name": "MTYPE"}
11538
   ]
11539
  },
11540
  "SQ_IMG_RSRC_WORD2": {
11541
   "fields": [
11542
    {"bits": [0, 13], "name": "WIDTH"},
11543
    {"bits": [14, 27], "name": "HEIGHT"},
11544
    {"bits": [28, 30], "name": "PERF_MOD"},
11545
    {"bits": [31, 31], "name": "INTERLACED"}
11546
   ]
11547
  },
11548
  "SQ_IMG_RSRC_WORD3": {
11549
   "fields": [
11550
    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11551
    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11552
    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11553
    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11554
    {"bits": [12, 15], "name": "BASE_LEVEL"},
11555
    {"bits": [16, 19], "name": "LAST_LEVEL"},
11556
    {"bits": [20, 24], "name": "TILING_INDEX"},
11557
    {"bits": [25, 25], "name": "POW2_PAD"},
11558
    {"bits": [26, 26], "name": "MTYPE"},
11559
    {"bits": [27, 27], "name": "ATC"},
11560
    {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
11561
   ]
11562
  },
11563
  "SQ_IMG_RSRC_WORD4": {
11564
   "fields": [
11565
    {"bits": [0, 12], "name": "DEPTH"},
11566
    {"bits": [13, 26], "name": "PITCH"}
11567
   ]
11568
  },
11569
  "SQ_IMG_RSRC_WORD5": {
11570
   "fields": [
11571
    {"bits": [0, 12], "name": "BASE_ARRAY"},
11572
    {"bits": [13, 25], "name": "LAST_ARRAY"}
11573
   ]
11574
  },
11575
  "SQ_IMG_RSRC_WORD6": {
11576
   "fields": [
11577
    {"bits": [0, 11], "name": "MIN_LOD_WARN"},
11578
    {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
11579
    {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
11580
    {"bits": [21, 21], "name": "COMPRESSION_EN"},
11581
    {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
11582
    {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
11583
    {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
11584
    {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
11585
   ]
11586
  },
11587
  "SQ_IMG_SAMP_WORD0": {
11588
   "fields": [
11589
    {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
11590
    {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
11591
    {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
11592
    {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
11593
    {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
11594
    {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
11595
    {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
11596
    {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
11597
    {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
11598
    {"bits": [21, 26], "name": "ANISO_BIAS"},
11599
    {"bits": [27, 27], "name": "TRUNC_COORD"},
11600
    {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
11601
    {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
11602
    {"bits": [31, 31], "name": "COMPAT_MODE"}
11603
   ]
11604
  },
11605
  "SQ_IMG_SAMP_WORD1": {
11606
   "fields": [
11607
    {"bits": [0, 11], "name": "MIN_LOD"},
11608
    {"bits": [12, 23], "name": "MAX_LOD"},
11609
    {"bits": [24, 27], "name": "PERF_MIP"},
11610
    {"bits": [28, 31], "name": "PERF_Z"}
11611
   ]
11612
  },
11613
  "SQ_IMG_SAMP_WORD2": {
11614
   "fields": [
11615
    {"bits": [0, 13], "name": "LOD_BIAS"},
11616
    {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
11617
    {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
11618
    {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
11619
    {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
11620
    {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
11621
    {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
11622
    {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
11623
    {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
11624
    {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
11625
   ]
11626
  },
11627
  "SQ_IMG_SAMP_WORD3": {
11628
   "fields": [
11629
    {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
11630
    {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
11631
    {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
11632
   ]
11633
  },
11634
  "SQ_PERFCOUNTER0_SELECT": {
11635
   "fields": [
11636
    {"bits": [0, 8], "name": "PERF_SEL"},
11637
    {"bits": [12, 15], "name": "SQC_BANK_MASK"},
11638
    {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
11639
    {"bits": [20, 23], "name": "SPM_MODE"},
11640
    {"bits": [24, 27], "name": "SIMD_MASK"},
11641
    {"bits": [28, 31], "name": "PERF_MODE"}
11642
   ]
11643
  },
11644
  "SQ_PERFCOUNTER_CTRL": {
11645
   "fields": [
11646
    {"bits": [0, 0], "name": "PS_EN"},
11647
    {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11648
    {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11649
    {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11650
    {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11651
    {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11652
    {"bits": [6, 6], "name": "CS_EN"},
11653
    {"bits": [8, 12], "name": "CNTR_RATE"},
11654
    {"bits": [13, 13], "name": "DISABLE_FLUSH"}
11655
   ]
11656
  },
11657
  "SQ_PERFCOUNTER_CTRL2": {
11658
   "fields": [
11659
    {"bits": [0, 0], "name": "FORCE_EN"}
11660
   ]
11661
  },
11662
  "SQ_PERFCOUNTER_MASK": {
11663
   "fields": [
11664
    {"bits": [0, 15], "name": "SH0_MASK"},
11665
    {"bits": [16, 31], "name": "SH1_MASK"}
11666
   ]
11667
  },
11668
  "SQ_THREAD_TRACE_BASE2": {
11669
   "fields": [
11670
    {"bits": [0, 3], "name": "ADDR_HI"}
11671
   ]
11672
  },
11673
  "SQ_THREAD_TRACE_CTRL": {
11674
   "fields": [
11675
    {"bits": [31, 31], "name": "RESET_BUFFER"}
11676
   ]
11677
  },
11678
  "SQ_THREAD_TRACE_HIWATER": {
11679
   "fields": [
11680
    {"bits": [0, 2], "name": "HIWATER"}
11681
   ]
11682
  },
11683
  "SQ_THREAD_TRACE_MASK": {
11684
   "fields": [
11685
    {"bits": [0, 4], "name": "CU_SEL"},
11686
    {"bits": [5, 5], "name": "SH_SEL"},
11687
    {"bits": [7, 7], "name": "REG_STALL_EN"},
11688
    {"bits": [8, 11], "name": "SIMD_EN"},
11689
    {"bits": [12, 13], "name": "VM_ID_MASK"},
11690
    {"bits": [14, 14], "name": "SPI_STALL_EN"},
11691
    {"bits": [15, 15], "name": "SQ_STALL_EN"},
11692
    {"bits": [16, 31], "name": "RANDOM_SEED"}
11693
   ]
11694
  },
11695
  "SQ_THREAD_TRACE_MODE": {
11696
   "fields": [
11697
    {"bits": [0, 2], "name": "MASK_PS"},
11698
    {"bits": [3, 5], "name": "MASK_VS"},
11699
    {"bits": [6, 8], "name": "MASK_GS"},
11700
    {"bits": [9, 11], "name": "MASK_ES"},
11701
    {"bits": [12, 14], "name": "MASK_HS"},
11702
    {"bits": [15, 17], "name": "MASK_LS"},
11703
    {"bits": [18, 20], "name": "MASK_CS"},
11704
    {"bits": [21, 22], "name": "MODE"},
11705
    {"bits": [23, 24], "name": "CAPTURE_MODE"},
11706
    {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
11707
    {"bits": [26, 26], "name": "PRIV"},
11708
    {"bits": [27, 28], "name": "ISSUE_MASK"},
11709
    {"bits": [29, 29], "name": "TEST_MODE"},
11710
    {"bits": [30, 30], "name": "INTERRUPT_EN"},
11711
    {"bits": [31, 31], "name": "WRAP"}
11712
   ]
11713
  },
11714
  "SQ_THREAD_TRACE_SIZE": {
11715
   "fields": [
11716
    {"bits": [0, 21], "name": "SIZE"}
11717
   ]
11718
  },
11719
  "SQ_THREAD_TRACE_STATUS": {
11720
   "fields": [
11721
    {"bits": [0, 9], "name": "FINISH_PENDING"},
11722
    {"bits": [16, 25], "name": "FINISH_DONE"},
11723
    {"bits": [29, 29], "name": "NEW_BUF"},
11724
    {"bits": [30, 30], "name": "BUSY"},
11725
    {"bits": [31, 31], "name": "FULL"}
11726
   ]
11727
  },
11728
  "SQ_THREAD_TRACE_TOKEN_MASK": {
11729
   "fields": [
11730
    {"bits": [0, 15], "name": "TOKEN_MASK"},
11731
    {"bits": [16, 23], "name": "REG_MASK"},
11732
    {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
11733
   ]
11734
  },
11735
  "SQ_THREAD_TRACE_WPTR": {
11736
   "fields": [
11737
    {"bits": [0, 29], "name": "WPTR"},
11738
    {"bits": [30, 31], "name": "READ_OFFSET"}
11739
   ]
11740
  },
11741
  "SQ_WAVE_GPR_ALLOC": {
11742
   "fields": [
11743
    {"bits": [0, 5], "name": "VGPR_BASE"},
11744
    {"bits": [8, 13], "name": "VGPR_SIZE"},
11745
    {"bits": [16, 21], "name": "SGPR_BASE"},
11746
    {"bits": [24, 27], "name": "SGPR_SIZE"}
11747
   ]
11748
  },
11749
  "SQ_WAVE_HW_ID": {
11750
   "fields": [
11751
    {"bits": [0, 3], "name": "WAVE_ID"},
11752
    {"bits": [4, 5], "name": "SIMD_ID"},
11753
    {"bits": [6, 7], "name": "PIPE_ID"},
11754
    {"bits": [8, 11], "name": "CU_ID"},
11755
    {"bits": [12, 12], "name": "SH_ID"},
11756
    {"bits": [13, 14], "name": "SE_ID"},
11757
    {"bits": [16, 19], "name": "TG_ID"},
11758
    {"bits": [20, 23], "name": "VM_ID"},
11759
    {"bits": [24, 26], "name": "QUEUE_ID"},
11760
    {"bits": [27, 29], "name": "STATE_ID"},
11761
    {"bits": [30, 31], "name": "ME_ID"}
11762
   ]
11763
  },
11764
  "SQ_WAVE_IB_DBG0": {
11765
   "fields": [
11766
    {"bits": [0, 2], "name": "IBUF_ST"},
11767
    {"bits": [3, 3], "name": "PC_INVALID"},
11768
    {"bits": [4, 4], "name": "NEED_NEXT_DW"},
11769
    {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
11770
    {"bits": [8, 9], "name": "IBUF_RPTR"},
11771
    {"bits": [10, 11], "name": "IBUF_WPTR"},
11772
    {"bits": [16, 19], "name": "INST_STR_ST"},
11773
    {"bits": [20, 23], "name": "MISC_CNT"},
11774
    {"bits": [24, 25], "name": "ECC_ST"},
11775
    {"bits": [26, 26], "name": "IS_HYB"},
11776
    {"bits": [27, 28], "name": "HYB_CNT"},
11777
    {"bits": [29, 29], "name": "KILL"},
11778
    {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}
11779
   ]
11780
  },
11781
  "SQ_WAVE_IB_DBG1": {
11782
   "fields": [
11783
    {"bits": [0, 0], "name": "IXNACK"},
11784
    {"bits": [1, 1], "name": "XNACK"},
11785
    {"bits": [2, 2], "name": "TA_NEED_RESET"},
11786
    {"bits": [4, 7], "name": "XCNT"},
11787
    {"bits": [8, 11], "name": "QCNT"}
11788
   ]
11789
  },
11790
  "SQ_WAVE_IB_STS": {
11791
   "fields": [
11792
    {"bits": [0, 3], "name": "VM_CNT"},
11793
    {"bits": [4, 6], "name": "EXP_CNT"},
11794
    {"bits": [8, 11], "name": "LGKM_CNT"},
11795
    {"bits": [12, 14], "name": "VALU_CNT"},
11796
    {"bits": [15, 15], "name": "FIRST_REPLAY"},
11797
    {"bits": [16, 19], "name": "RCNT"}
11798
   ]
11799
  },
11800
  "SQ_WAVE_LDS_ALLOC": {
11801
   "fields": [
11802
    {"bits": [0, 7], "name": "LDS_BASE"},
11803
    {"bits": [12, 20], "name": "LDS_SIZE"}
11804
   ]
11805
  },
11806
  "SQ_WAVE_MODE": {
11807
   "fields": [
11808
    {"bits": [0, 3], "name": "FP_ROUND"},
11809
    {"bits": [4, 7], "name": "FP_DENORM"},
11810
    {"bits": [8, 8], "name": "DX10_CLAMP"},
11811
    {"bits": [9, 9], "name": "IEEE"},
11812
    {"bits": [10, 10], "name": "LOD_CLAMPED"},
11813
    {"bits": [11, 11], "name": "DEBUG_EN"},
11814
    {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11815
    {"bits": [27, 27], "name": "GPR_IDX_EN"},
11816
    {"bits": [28, 28], "name": "VSKIP"},
11817
    {"bits": [29, 31], "name": "CSP"}
11818
   ]
11819
  },
11820
  "SQ_WAVE_PC_HI": {
11821
   "fields": [
11822
    {"bits": [0, 7], "name": "PC_HI"}
11823
   ]
11824
  },
11825
  "SQ_WAVE_STATUS": {
11826
   "fields": [
11827
    {"bits": [0, 0], "name": "SCC"},
11828
    {"bits": [1, 2], "name": "SPI_PRIO"},
11829
    {"bits": [3, 4], "name": "USER_PRIO"},
11830
    {"bits": [5, 5], "name": "PRIV"},
11831
    {"bits": [6, 6], "name": "TRAP_EN"},
11832
    {"bits": [7, 7], "name": "TTRACE_EN"},
11833
    {"bits": [8, 8], "name": "EXPORT_RDY"},
11834
    {"bits": [9, 9], "name": "EXECZ"},
11835
    {"bits": [10, 10], "name": "VCCZ"},
11836
    {"bits": [11, 11], "name": "IN_TG"},
11837
    {"bits": [12, 12], "name": "IN_BARRIER"},
11838
    {"bits": [13, 13], "name": "HALT"},
11839
    {"bits": [14, 14], "name": "TRAP"},
11840
    {"bits": [15, 15], "name": "TTRACE_CU_EN"},
11841
    {"bits": [16, 16], "name": "VALID"},
11842
    {"bits": [17, 17], "name": "ECC_ERR"},
11843
    {"bits": [18, 18], "name": "SKIP_EXPORT"},
11844
    {"bits": [19, 19], "name": "PERF_EN"},
11845
    {"bits": [20, 20], "name": "COND_DBG_USER"},
11846
    {"bits": [21, 21], "name": "COND_DBG_SYS"},
11847
    {"bits": [22, 22], "name": "ALLOW_REPLAY"},
11848
    {"bits": [23, 23], "name": "INST_ATC"},
11849
    {"bits": [27, 27], "name": "MUST_EXPORT"}
11850
   ]
11851
  },
11852
  "SQ_WAVE_TBA_HI": {
11853
   "fields": [
11854
    {"bits": [0, 7], "name": "ADDR_HI"}
11855
   ]
11856
  },
11857
  "SQ_WAVE_TRAPSTS": {
11858
   "fields": [
11859
    {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
11860
    {"bits": [10, 10], "name": "SAVECTX"},
11861
    {"bits": [16, 21], "name": "EXCP_CYCLE"},
11862
    {"bits": [29, 31], "name": "DP_RATE"}
11863
   ]
11864
  },
11865
  "SX_PERFCOUNTER0_SELECT": {
11866
   "fields": [
11867
    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
11868
    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
11869
    {"bits": [20, 23], "name": "CNTR_MODE"}
11870
   ]
11871
  },
11872
  "SX_PERFCOUNTER0_SELECT1": {
11873
   "fields": [
11874
    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
11875
    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
11876
   ]
11877
  },
11878
  "TA_BC_BASE_ADDR_HI": {
11879
   "fields": [
11880
    {"bits": [0, 7], "name": "ADDRESS"}
11881
   ]
11882
  },
11883
  "TCC_PERFCOUNTER0_SELECT1": {
11884
   "fields": [
11885
    {"bits": [0, 9], "name": "PERF_SEL2"},
11886
    {"bits": [10, 19], "name": "PERF_SEL3"},
11887
    {"bits": [24, 27], "name": "PERF_MODE2"},
11888
    {"bits": [28, 31], "name": "PERF_MODE3"}
11889
   ]
11890
  },
11891
  "TCC_PERFCOUNTER2_SELECT": {
11892
   "fields": [
11893
    {"bits": [0, 9], "name": "PERF_SEL"},
11894
    {"bits": [20, 23], "name": "CNTR_MODE"},
11895
    {"bits": [28, 31], "name": "PERF_MODE"}
11896
   ]
11897
  },
11898
  "TD_PERFCOUNTER0_SELECT": {
11899
   "fields": [
11900
    {"bits": [0, 7], "name": "PERF_SEL"},
11901
    {"bits": [10, 17], "name": "PERF_SEL1"},
11902
    {"bits": [20, 23], "name": "CNTR_MODE"},
11903
    {"bits": [24, 27], "name": "PERF_MODE1"},
11904
    {"bits": [28, 31], "name": "PERF_MODE"}
11905
   ]
11906
  },
11907
  "TD_PERFCOUNTER0_SELECT1": {
11908
   "fields": [
11909
    {"bits": [0, 7], "name": "PERF_SEL2"},
11910
    {"bits": [10, 17], "name": "PERF_SEL3"},
11911
    {"bits": [24, 27], "name": "PERF_MODE3"},
11912
    {"bits": [28, 31], "name": "PERF_MODE2"}
11913
   ]
11914
  },
11915
  "VGT_DMA_BASE_HI": {
11916
   "fields": [
11917
    {"bits": [0, 7], "name": "BASE_ADDR"}
11918
   ]
11919
  },
11920
  "VGT_DMA_INDEX_TYPE": {
11921
   "fields": [
11922
    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
11923
    {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
11924
    {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
11925
    {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
11926
    {"bits": [9, 9], "name": "NOT_EOP"},
11927
    {"bits": [10, 10], "name": "REQ_PATH"},
11928
    {"bits": [11, 12], "name": "MTYPE"}
11929
   ]
11930
  },
11931
  "VGT_DRAW_INITIATOR": {
11932
   "fields": [
11933
    {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
11934
    {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
11935
    {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
11936
    {"bits": [5, 5], "name": "NOT_EOP"},
11937
    {"bits": [6, 6], "name": "USE_OPAQUE"}
11938
   ]
11939
  },
11940
  "VGT_ESGS_RING_ITEMSIZE": {
11941
   "fields": [
11942
    {"bits": [0, 14], "name": "ITEMSIZE"}
11943
   ]
11944
  },
11945
  "VGT_ES_PER_GS": {
11946
   "fields": [
11947
    {"bits": [0, 10], "name": "ES_PER_GS"}
11948
   ]
11949
  },
11950
  "VGT_EVENT_ADDRESS_REG": {
11951
   "fields": [
11952
    {"bits": [0, 27], "name": "ADDRESS_LOW"}
11953
   ]
11954
  },
11955
  "VGT_EVENT_INITIATOR": {
11956
   "fields": [
11957
    {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
11958
    {"bits": [18, 26], "name": "ADDRESS_HI"},
11959
    {"bits": [27, 27], "name": "EXTENDED_EVENT"}
11960
   ]
11961
  },
11962
  "VGT_GROUP_DECR": {
11963
   "fields": [
11964
    {"bits": [0, 3], "name": "DECR"}
11965
   ]
11966
  },
11967
  "VGT_GROUP_FIRST_DECR": {
11968
   "fields": [
11969
    {"bits": [0, 3], "name": "FIRST_DECR"}
11970
   ]
11971
  },
11972
  "VGT_GROUP_PRIM_TYPE": {
11973
   "fields": [
11974
    {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
11975
    {"bits": [14, 14], "name": "RETAIN_ORDER"},
11976
    {"bits": [15, 15], "name": "RETAIN_QUADS"},
11977
    {"bits": [16, 18], "name": "PRIM_ORDER"}
11978
   ]
11979
  },
11980
  "VGT_GROUP_VECT_0_CNTL": {
11981
   "fields": [
11982
    {"bits": [0, 0], "name": "COMP_X_EN"},
11983
    {"bits": [1, 1], "name": "COMP_Y_EN"},
11984
    {"bits": [2, 2], "name": "COMP_Z_EN"},
11985
    {"bits": [3, 3], "name": "COMP_W_EN"},
11986
    {"bits": [8, 15], "name": "STRIDE"},
11987
    {"bits": [16, 23], "name": "SHIFT"}
11988
   ]
11989
  },
11990
  "VGT_GROUP_VECT_0_FMT_CNTL": {
11991
   "fields": [
11992
    {"bits": [0, 3], "name": "X_CONV"},
11993
    {"bits": [4, 7], "name": "X_OFFSET"},
11994
    {"bits": [8, 11], "name": "Y_CONV"},
11995
    {"bits": [12, 15], "name": "Y_OFFSET"},
11996
    {"bits": [16, 19], "name": "Z_CONV"},
11997
    {"bits": [20, 23], "name": "Z_OFFSET"},
11998
    {"bits": [24, 27], "name": "W_CONV"},
11999
    {"bits": [28, 31], "name": "W_OFFSET"}
12000
   ]
12001
  },
12002
  "VGT_GSVS_RING_OFFSET_1": {
12003
   "fields": [
12004
    {"bits": [0, 14], "name": "OFFSET"}
12005
   ]
12006
  },
12007
  "VGT_GS_INSTANCE_CNT": {
12008
   "fields": [
12009
    {"bits": [0, 0], "name": "ENABLE"},
12010
    {"bits": [2, 8], "name": "CNT"}
12011
   ]
12012
  },
12013
  "VGT_GS_MAX_VERT_OUT": {
12014
   "fields": [
12015
    {"bits": [0, 10], "name": "MAX_VERT_OUT"}
12016
   ]
12017
  },
12018
  "VGT_GS_MODE": {
12019
   "fields": [
12020
    {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
12021
    {"bits": [3, 3], "name": "RESERVED_0"},
12022
    {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
12023
    {"bits": [6, 10], "name": "RESERVED_1"},
12024
    {"bits": [11, 11], "name": "GS_C_PACK_EN"},
12025
    {"bits": [12, 12], "name": "RESERVED_2"},
12026
    {"bits": [13, 13], "name": "ES_PASSTHRU"},
12027
    {"bits": [14, 14], "name": "RESERVED_3"},
12028
    {"bits": [15, 15], "name": "RESERVED_4"},
12029
    {"bits": [16, 16], "name": "RESERVED_5"},
12030
    {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
12031
    {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
12032
    {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
12033
    {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
12034
    {"bits": [21, 22], "name": "ONCHIP"}
12035
   ]
12036
  },
12037
  "VGT_GS_ONCHIP_CNTL": {
12038
   "fields": [
12039
    {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
12040
    {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
12041
   ]
12042
  },
12043
  "VGT_GS_OUT_PRIM_TYPE": {
12044
   "fields": [
12045
    {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
12046
    {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
12047
    {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
12048
    {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
12049
    {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
12050
   ]
12051
  },
12052
  "VGT_GS_PER_ES": {
12053
   "fields": [
12054
    {"bits": [0, 10], "name": "GS_PER_ES"}
12055
   ]
12056
  },
12057
  "VGT_GS_PER_VS": {
12058
   "fields": [
12059
    {"bits": [0, 3], "name": "GS_PER_VS"}
12060
   ]
12061
  },
12062
  "VGT_HOS_CNTL": {
12063
   "fields": [
12064
    {"bits": [0, 1], "name": "TESS_MODE"}
12065
   ]
12066
  },
12067
  "VGT_HOS_REUSE_DEPTH": {
12068
   "fields": [
12069
    {"bits": [0, 7], "name": "REUSE_DEPTH"}
12070
   ]
12071
  },
12072
  "VGT_HS_OFFCHIP_PARAM": {
12073
   "fields": [
12074
    {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
12075
    {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
12076
   ]
12077
  },
12078
  "VGT_LS_HS_CONFIG": {
12079
   "fields": [
12080
    {"bits": [0, 7], "name": "NUM_PATCHES"},
12081
    {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
12082
    {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
12083
   ]
12084
  },
12085
  "VGT_MULTI_PRIM_IB_RESET_EN": {
12086
   "fields": [
12087
    {"bits": [0, 0], "name": "RESET_EN"}
12088
   ]
12089
  },
12090
  "VGT_OUTPUT_PATH_CNTL": {
12091
   "fields": [
12092
    {"bits": [0, 2], "name": "PATH_SELECT"}
12093
   ]
12094
  },
12095
  "VGT_OUT_DEALLOC_CNTL": {
12096
   "fields": [
12097
    {"bits": [0, 6], "name": "DEALLOC_DIST"}
12098
   ]
12099
  },
12100
  "VGT_PERFCOUNTER2_SELECT": {
12101
   "fields": [
12102
    {"bits": [0, 7], "name": "PERF_SEL"},
12103
    {"bits": [28, 31], "name": "PERF_MODE"}
12104
   ]
12105
  },
12106
  "VGT_PERFCOUNTER_SEID_MASK": {
12107
   "fields": [
12108
    {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
12109
   ]
12110
  },
12111
  "VGT_PRIMITIVEID_EN": {
12112
   "fields": [
12113
    {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
12114
    {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
12115
   ]
12116
  },
12117
  "VGT_PRIMITIVE_TYPE": {
12118
   "fields": [
12119
    {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
12120
   ]
12121
  },
12122
  "VGT_REUSE_OFF": {
12123
   "fields": [
12124
    {"bits": [0, 0], "name": "REUSE_OFF"}
12125
   ]
12126
  },
12127
  "VGT_SHADER_STAGES_EN": {
12128
   "fields": [
12129
    {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12130
    {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12131
    {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12132
    {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12133
    {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12134
    {"bits": [8, 8], "name": "DYNAMIC_HS"},
12135
    {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
12136
    {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
12137
    {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
12138
    {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}
12139
   ]
12140
  },
12141
  "VGT_STRMOUT_BUFFER_CONFIG": {
12142
   "fields": [
12143
    {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
12144
    {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
12145
    {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
12146
    {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
12147
   ]
12148
  },
12149
  "VGT_STRMOUT_CONFIG": {
12150
   "fields": [
12151
    {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
12152
    {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
12153
    {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
12154
    {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
12155
    {"bits": [4, 6], "name": "RAST_STREAM"},
12156
    {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
12157
    {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
12158
   ]
12159
  },
12160
  "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {
12161
   "fields": [
12162
    {"bits": [0, 8], "name": "VERTEX_STRIDE"}
12163
   ]
12164
  },
12165
  "VGT_STRMOUT_VTX_STRIDE_0": {
12166
   "fields": [
12167
    {"bits": [0, 9], "name": "STRIDE"}
12168
   ]
12169
  },
12170
  "VGT_TESS_DISTRIBUTION": {
12171
   "fields": [
12172
    {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
12173
    {"bits": [8, 15], "name": "ACCUM_TRI"},
12174
    {"bits": [16, 23], "name": "ACCUM_QUAD"}
12175
   ]
12176
  },
12177
  "VGT_TF_PARAM": {
12178
   "fields": [
12179
    {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
12180
    {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
12181
    {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
12182
    {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
12183
    {"bits": [9, 9], "name": "DEPRECATED"},
12184
    {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
12185
    {"bits": [14, 14], "name": "DISABLE_DONUTS"},
12186
    {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
12187
    {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"},
12188
    {"bits": [19, 20], "name": "MTYPE"}
12189
   ]
12190
  },
12191
  "VGT_TF_RING_SIZE": {
12192
   "fields": [
12193
    {"bits": [0, 15], "name": "SIZE"}
12194
   ]
12195
  },
12196
  "VGT_VERTEX_REUSE_BLOCK_CNTL": {
12197
   "fields": [
12198
    {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
12199
   ]
12200
  },
12201
  "VGT_VTX_CNT_EN": {
12202
   "fields": [
12203
    {"bits": [0, 0], "name": "VTX_CNT_EN"}
12204
   ]
12205
  }
12206
 }
12207
}
12208

12209
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