CoCalc -- builtin

GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/compiler/glsl/builtin_int64.h
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ir_function_signature *
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umul64(void *mem_ctx, builtin_available_predicate avail)
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{
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   ir_function_signature *const sig =
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      new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
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   ir_factory body(&sig->body, mem_ctx);
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   sig->is_defined = true;
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   exec_list sig_parameters;
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   ir_variable *const r0001 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
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   sig_parameters.push_tail(r0001);
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   ir_variable *const r0002 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
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   sig_parameters.push_tail(r0002);
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   ir_variable *const r0003 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "result", ir_var_auto);
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   body.emit(r0003);
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   body.emit(assign(r0003, imul_high(swizzle_x(r0001), swizzle_x(r0002)), 0x02));
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   body.emit(assign(r0003, mul(swizzle_x(r0001), swizzle_x(r0002)), 0x01));
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   ir_expression *const r0004 = mul(swizzle_x(r0001), swizzle_y(r0002));
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   ir_expression *const r0005 = mul(swizzle_y(r0001), swizzle_x(r0002));
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   ir_expression *const r0006 = add(r0004, r0005);
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   body.emit(assign(r0003, add(swizzle_y(r0003), r0006), 0x02));
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   body.emit(ret(r0003));
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   sig->replace_parameters(&sig_parameters);
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   return sig;
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}
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ir_function_signature *
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sign64(void *mem_ctx, builtin_available_predicate avail)
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{
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   ir_function_signature *const sig =
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      new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
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   ir_factory body(&sig->body, mem_ctx);
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   sig->is_defined = true;
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   exec_list sig_parameters;
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   ir_variable *const r0007 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "a", ir_var_function_in);
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   sig_parameters.push_tail(r0007);
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   ir_variable *const r0008 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "result", ir_var_auto);
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   body.emit(r0008);
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   body.emit(assign(r0008, rshift(swizzle_y(r0007), body.constant(int(31))), 0x02));
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   ir_expression *const r0009 = bit_or(swizzle_x(r0007), swizzle_y(r0007));
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   ir_expression *const r000A = nequal(r0009, body.constant(int(0)));
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   ir_expression *const r000B = expr(ir_unop_b2i, r000A);
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   body.emit(assign(r0008, bit_or(swizzle_y(r0008), r000B), 0x01));
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   body.emit(ret(r0008));
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   sig->replace_parameters(&sig_parameters);
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   return sig;
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}
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ir_function_signature *
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udivmod64(void *mem_ctx, builtin_available_predicate avail)
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{
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   ir_function_signature *const sig =
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      new(mem_ctx) ir_function_signature(glsl_type::uvec4_type, avail);
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   ir_factory body(&sig->body, mem_ctx);
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   sig->is_defined = true;
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   exec_list sig_parameters;
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   ir_variable *const r000C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
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   sig_parameters.push_tail(r000C);
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   ir_variable *const r000D = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
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   sig_parameters.push_tail(r000D);
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   ir_variable *const r000E = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
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   body.emit(r000E);
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   ir_variable *const r000F = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
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   body.emit(r000F);
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   ir_variable *const r0010 = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
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   body.emit(r0010);
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   ir_variable *const r0011 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
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   body.emit(r0011);
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   body.emit(assign(r0011, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
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   ir_expression *const r0012 = expr(ir_unop_find_msb, swizzle_y(r000D));
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   body.emit(assign(r0010, add(r0012, body.constant(int(32))), 0x01));
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   /* IF CONDITION */
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   ir_expression *const r0014 = equal(swizzle_y(r000D), body.constant(0u));
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   ir_expression *const r0015 = gequal(swizzle_y(r000C), swizzle_x(r000D));
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   ir_expression *const r0016 = logic_and(r0014, r0015);
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   ir_if *f0013 = new(mem_ctx) ir_if(operand(r0016).val);
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   exec_list *const f0013_parent_instructions = body.instructions;
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      /* THEN INSTRUCTIONS */
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      body.instructions = &f0013->then_instructions;
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      ir_variable *const r0017 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
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      body.emit(r0017);
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      ir_variable *const r0018 = body.make_temp(glsl_type::int_type, "findMSB_retval");
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      body.emit(assign(r0018, expr(ir_unop_find_msb, swizzle_x(r000D)), 0x01));
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      body.emit(assign(r0010, r0018, 0x01));
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      body.emit(assign(r0017, body.constant(int(31)), 0x01));
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      /* LOOP BEGIN */
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      ir_loop *f0019 = new(mem_ctx) ir_loop();
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      exec_list *const f0019_parent_instructions = body.instructions;
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         body.instructions = &f0019->body_instructions;
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         /* IF CONDITION */
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         ir_expression *const r001B = less(r0017, body.constant(int(1)));
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         ir_if *f001A = new(mem_ctx) ir_if(operand(r001B).val);
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         exec_list *const f001A_parent_instructions = body.instructions;
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            /* THEN INSTRUCTIONS */
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            body.instructions = &f001A->then_instructions;
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            body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
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119

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         body.instructions = f001A_parent_instructions;
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         body.emit(f001A);
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         /* END IF */
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         /* IF CONDITION */
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         ir_expression *const r001D = sub(body.constant(int(31)), r0017);
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         ir_expression *const r001E = lequal(r0018, r001D);
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         ir_expression *const r001F = lshift(swizzle_x(r000D), r0017);
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         ir_expression *const r0020 = lequal(r001F, swizzle_y(r000C));
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         ir_expression *const r0021 = logic_and(r001E, r0020);
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         ir_if *f001C = new(mem_ctx) ir_if(operand(r0021).val);
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         exec_list *const f001C_parent_instructions = body.instructions;
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            /* THEN INSTRUCTIONS */
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            body.instructions = &f001C->then_instructions;
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            ir_expression *const r0022 = lshift(swizzle_x(r000D), r0017);
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            body.emit(assign(r000C, sub(swizzle_y(r000C), r0022), 0x02));
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            ir_expression *const r0023 = lshift(body.constant(1u), r0017);
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            body.emit(assign(r0011, bit_or(swizzle_y(r0011), r0023), 0x02));
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         body.instructions = f001C_parent_instructions;
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         body.emit(f001C);
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         /* END IF */
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         body.emit(assign(r0017, add(r0017, body.constant(int(-1))), 0x01));
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      /* LOOP END */
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      body.instructions = f0019_parent_instructions;
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      body.emit(f0019);
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      /* IF CONDITION */
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      ir_expression *const r0025 = lequal(swizzle_x(r000D), swizzle_y(r000C));
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      ir_if *f0024 = new(mem_ctx) ir_if(operand(r0025).val);
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      exec_list *const f0024_parent_instructions = body.instructions;
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         /* THEN INSTRUCTIONS */
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         body.instructions = &f0024->then_instructions;
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         body.emit(assign(r000C, sub(swizzle_y(r000C), swizzle_x(r000D)), 0x02));
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         body.emit(assign(r0011, bit_or(swizzle_y(r0011), body.constant(1u)), 0x02));
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168

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      body.instructions = f0024_parent_instructions;
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      body.emit(f0024);
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      /* END IF */
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   body.instructions = f0013_parent_instructions;
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   body.emit(f0013);
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   /* END IF */
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   ir_variable *const r0026 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
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   body.emit(assign(r0026, expr(ir_unop_pack_uint_2x32, r000D), 0x01));
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   body.emit(assign(r000F, expr(ir_unop_pack_uint_2x32, r000C), 0x01));
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   body.emit(assign(r000E, body.constant(int(31)), 0x01));
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   /* LOOP BEGIN */
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   ir_loop *f0027 = new(mem_ctx) ir_loop();
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   exec_list *const f0027_parent_instructions = body.instructions;
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      body.instructions = &f0027->body_instructions;
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      /* IF CONDITION */
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      ir_expression *const r0029 = less(r000E, body.constant(int(1)));
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      ir_if *f0028 = new(mem_ctx) ir_if(operand(r0029).val);
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      exec_list *const f0028_parent_instructions = body.instructions;
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         /* THEN INSTRUCTIONS */
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         body.instructions = &f0028->then_instructions;
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         body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
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      body.instructions = f0028_parent_instructions;
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      body.emit(f0028);
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      /* END IF */
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      /* IF CONDITION */
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      ir_expression *const r002B = sub(body.constant(int(63)), r000E);
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      ir_expression *const r002C = lequal(r0010, r002B);
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      ir_expression *const r002D = lshift(r0026, r000E);
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      ir_expression *const r002E = lequal(r002D, r000F);
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      ir_expression *const r002F = logic_and(r002C, r002E);
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      ir_if *f002A = new(mem_ctx) ir_if(operand(r002F).val);
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      exec_list *const f002A_parent_instructions = body.instructions;
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         /* THEN INSTRUCTIONS */
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         body.instructions = &f002A->then_instructions;
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         ir_expression *const r0030 = lshift(r0026, r000E);
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         body.emit(assign(r000F, sub(r000F, r0030), 0x01));
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         ir_expression *const r0031 = lshift(body.constant(1u), r000E);
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         body.emit(assign(r0011, bit_or(swizzle_x(r0011), r0031), 0x01));
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      body.instructions = f002A_parent_instructions;
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      body.emit(f002A);
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      /* END IF */
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      body.emit(assign(r000E, add(r000E, body.constant(int(-1))), 0x01));
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   /* LOOP END */
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   body.instructions = f0027_parent_instructions;
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   body.emit(f0027);
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   /* IF CONDITION */
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   ir_expression *const r0033 = lequal(r0026, r000F);
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   ir_if *f0032 = new(mem_ctx) ir_if(operand(r0033).val);
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   exec_list *const f0032_parent_instructions = body.instructions;
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      /* THEN INSTRUCTIONS */
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      body.instructions = &f0032->then_instructions;
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      body.emit(assign(r000F, sub(r000F, r0026), 0x01));
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      body.emit(assign(r0011, bit_or(swizzle_x(r0011), body.constant(1u)), 0x01));
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252

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   body.instructions = f0032_parent_instructions;
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   body.emit(f0032);
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   /* END IF */
257

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   ir_variable *const r0034 = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
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   body.emit(assign(r0034, r0011, 0x03));
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   body.emit(assign(r0034, expr(ir_unop_unpack_uint_2x32, r000F), 0x0c));
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   body.emit(ret(r0034));
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   sig->replace_parameters(&sig_parameters);
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   return sig;
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}
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ir_function_signature *
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udiv64(void *mem_ctx, builtin_available_predicate avail)
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{
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   ir_function_signature *const sig =
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      new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
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   ir_factory body(&sig->body, mem_ctx);
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   sig->is_defined = true;
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   exec_list sig_parameters;
277

278
   ir_variable *const r0035 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
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   sig_parameters.push_tail(r0035);
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   ir_variable *const r0036 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
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   sig_parameters.push_tail(r0036);
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   ir_variable *const r0037 = body.make_temp(glsl_type::uvec2_type, "n");
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   body.emit(assign(r0037, r0035, 0x03));
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   ir_variable *const r0038 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
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   body.emit(r0038);
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   ir_variable *const r0039 = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
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   body.emit(r0039);
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   ir_variable *const r003A = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
290
   body.emit(r003A);
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   ir_variable *const r003B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
292
   body.emit(r003B);
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   body.emit(assign(r003B, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
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295
   ir_expression *const r003C = expr(ir_unop_find_msb, swizzle_y(r0036));
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   body.emit(assign(r003A, add(r003C, body.constant(int(32))), 0x01));
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298
   /* IF CONDITION */
299
   ir_expression *const r003E = equal(swizzle_y(r0036), body.constant(0u));
300
   ir_expression *const r003F = gequal(swizzle_y(r0035), swizzle_x(r0036));
301
   ir_expression *const r0040 = logic_and(r003E, r003F);
302
   ir_if *f003D = new(mem_ctx) ir_if(operand(r0040).val);
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   exec_list *const f003D_parent_instructions = body.instructions;
304

305
      /* THEN INSTRUCTIONS */
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      body.instructions = &f003D->then_instructions;
307

308
      ir_variable *const r0041 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
309
      body.emit(r0041);
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      ir_variable *const r0042 = body.make_temp(glsl_type::int_type, "findMSB_retval");
311
      body.emit(assign(r0042, expr(ir_unop_find_msb, swizzle_x(r0036)), 0x01));
312

313
      body.emit(assign(r003A, r0042, 0x01));
314

315
      body.emit(assign(r0041, body.constant(int(31)), 0x01));
316

317
      /* LOOP BEGIN */
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      ir_loop *f0043 = new(mem_ctx) ir_loop();
319
      exec_list *const f0043_parent_instructions = body.instructions;
320

321
         body.instructions = &f0043->body_instructions;
322

323
         /* IF CONDITION */
324
         ir_expression *const r0045 = less(r0041, body.constant(int(1)));
325
         ir_if *f0044 = new(mem_ctx) ir_if(operand(r0045).val);
326
         exec_list *const f0044_parent_instructions = body.instructions;
327

328
            /* THEN INSTRUCTIONS */
329
            body.instructions = &f0044->then_instructions;
330

331
            body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
332

333

334
         body.instructions = f0044_parent_instructions;
335
         body.emit(f0044);
336

337
         /* END IF */
338

339
         /* IF CONDITION */
340
         ir_expression *const r0047 = sub(body.constant(int(31)), r0041);
341
         ir_expression *const r0048 = lequal(r0042, r0047);
342
         ir_expression *const r0049 = lshift(swizzle_x(r0036), r0041);
343
         ir_expression *const r004A = lequal(r0049, swizzle_y(r0037));
344
         ir_expression *const r004B = logic_and(r0048, r004A);
345
         ir_if *f0046 = new(mem_ctx) ir_if(operand(r004B).val);
346
         exec_list *const f0046_parent_instructions = body.instructions;
347

348
            /* THEN INSTRUCTIONS */
349
            body.instructions = &f0046->then_instructions;
350

351
            ir_expression *const r004C = lshift(swizzle_x(r0036), r0041);
352
            body.emit(assign(r0037, sub(swizzle_y(r0037), r004C), 0x02));
353

354
            ir_expression *const r004D = lshift(body.constant(1u), r0041);
355
            body.emit(assign(r003B, bit_or(swizzle_y(r003B), r004D), 0x02));
356

357

358
         body.instructions = f0046_parent_instructions;
359
         body.emit(f0046);
360

361
         /* END IF */
362

363
         body.emit(assign(r0041, add(r0041, body.constant(int(-1))), 0x01));
364

365
      /* LOOP END */
366

367
      body.instructions = f0043_parent_instructions;
368
      body.emit(f0043);
369

370
      /* IF CONDITION */
371
      ir_expression *const r004F = lequal(swizzle_x(r0036), swizzle_y(r0037));
372
      ir_if *f004E = new(mem_ctx) ir_if(operand(r004F).val);
373
      exec_list *const f004E_parent_instructions = body.instructions;
374

375
         /* THEN INSTRUCTIONS */
376
         body.instructions = &f004E->then_instructions;
377

378
         body.emit(assign(r0037, sub(swizzle_y(r0037), swizzle_x(r0036)), 0x02));
379

380
         body.emit(assign(r003B, bit_or(swizzle_y(r003B), body.constant(1u)), 0x02));
381

382

383
      body.instructions = f004E_parent_instructions;
384
      body.emit(f004E);
385

386
      /* END IF */
387

388

389
   body.instructions = f003D_parent_instructions;
390
   body.emit(f003D);
391

392
   /* END IF */
393

394
   ir_variable *const r0050 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
395
   body.emit(assign(r0050, expr(ir_unop_pack_uint_2x32, r0036), 0x01));
396

397
   body.emit(assign(r0039, expr(ir_unop_pack_uint_2x32, r0037), 0x01));
398

399
   body.emit(assign(r0038, body.constant(int(31)), 0x01));
400

401
   /* LOOP BEGIN */
402
   ir_loop *f0051 = new(mem_ctx) ir_loop();
403
   exec_list *const f0051_parent_instructions = body.instructions;
404

405
      body.instructions = &f0051->body_instructions;
406

407
      /* IF CONDITION */
408
      ir_expression *const r0053 = less(r0038, body.constant(int(1)));
409
      ir_if *f0052 = new(mem_ctx) ir_if(operand(r0053).val);
410
      exec_list *const f0052_parent_instructions = body.instructions;
411

412
         /* THEN INSTRUCTIONS */
413
         body.instructions = &f0052->then_instructions;
414

415
         body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
416

417

418
      body.instructions = f0052_parent_instructions;
419
      body.emit(f0052);
420

421
      /* END IF */
422

423
      /* IF CONDITION */
424
      ir_expression *const r0055 = sub(body.constant(int(63)), r0038);
425
      ir_expression *const r0056 = lequal(r003A, r0055);
426
      ir_expression *const r0057 = lshift(r0050, r0038);
427
      ir_expression *const r0058 = lequal(r0057, r0039);
428
      ir_expression *const r0059 = logic_and(r0056, r0058);
429
      ir_if *f0054 = new(mem_ctx) ir_if(operand(r0059).val);
430
      exec_list *const f0054_parent_instructions = body.instructions;
431

432
         /* THEN INSTRUCTIONS */
433
         body.instructions = &f0054->then_instructions;
434

435
         ir_expression *const r005A = lshift(r0050, r0038);
436
         body.emit(assign(r0039, sub(r0039, r005A), 0x01));
437

438
         ir_expression *const r005B = lshift(body.constant(1u), r0038);
439
         body.emit(assign(r003B, bit_or(swizzle_x(r003B), r005B), 0x01));
440

441

442
      body.instructions = f0054_parent_instructions;
443
      body.emit(f0054);
444

445
      /* END IF */
446

447
      body.emit(assign(r0038, add(r0038, body.constant(int(-1))), 0x01));
448

449
   /* LOOP END */
450

451
   body.instructions = f0051_parent_instructions;
452
   body.emit(f0051);
453

454
   /* IF CONDITION */
455
   ir_expression *const r005D = lequal(r0050, r0039);
456
   ir_if *f005C = new(mem_ctx) ir_if(operand(r005D).val);
457
   exec_list *const f005C_parent_instructions = body.instructions;
458

459
      /* THEN INSTRUCTIONS */
460
      body.instructions = &f005C->then_instructions;
461

462
      body.emit(assign(r0039, sub(r0039, r0050), 0x01));
463

464
      body.emit(assign(r003B, bit_or(swizzle_x(r003B), body.constant(1u)), 0x01));
465

466

467
   body.instructions = f005C_parent_instructions;
468
   body.emit(f005C);
469

470
   /* END IF */
471

472
   body.emit(ret(r003B));
473

474
   sig->replace_parameters(&sig_parameters);
475
   return sig;
476
}
477
ir_function_signature *
478
idiv64(void *mem_ctx, builtin_available_predicate avail)
479
{
480
   ir_function_signature *const sig =
481
      new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
482
   ir_factory body(&sig->body, mem_ctx);
483
   sig->is_defined = true;
484

485
   exec_list sig_parameters;
486

487
   ir_variable *const r005E = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_n", ir_var_function_in);
488
   sig_parameters.push_tail(r005E);
489
   ir_variable *const r005F = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_d", ir_var_function_in);
490
   sig_parameters.push_tail(r005F);
491
   ir_variable *const r0060 = new(mem_ctx) ir_variable(glsl_type::bool_type, "negate", ir_var_auto);
492
   body.emit(r0060);
493
   ir_expression *const r0061 = less(swizzle_y(r005E), body.constant(int(0)));
494
   ir_expression *const r0062 = less(swizzle_y(r005F), body.constant(int(0)));
495
   body.emit(assign(r0060, nequal(r0061, r0062), 0x01));
496

497
   ir_variable *const r0063 = body.make_temp(glsl_type::uvec2_type, "n");
498
   ir_expression *const r0064 = expr(ir_unop_pack_int_2x32, r005E);
499
   ir_expression *const r0065 = expr(ir_unop_abs, r0064);
500
   ir_expression *const r0066 = expr(ir_unop_i642u64, r0065);
501
   body.emit(assign(r0063, expr(ir_unop_unpack_uint_2x32, r0066), 0x03));
502

503
   ir_variable *const r0067 = body.make_temp(glsl_type::uvec2_type, "d");
504
   ir_expression *const r0068 = expr(ir_unop_pack_int_2x32, r005F);
505
   ir_expression *const r0069 = expr(ir_unop_abs, r0068);
506
   ir_expression *const r006A = expr(ir_unop_i642u64, r0069);
507
   body.emit(assign(r0067, expr(ir_unop_unpack_uint_2x32, r006A), 0x03));
508

509
   ir_variable *const r006B = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
510
   body.emit(r006B);
511
   ir_variable *const r006C = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
512
   body.emit(r006C);
513
   ir_variable *const r006D = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
514
   body.emit(r006D);
515
   ir_variable *const r006E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
516
   body.emit(r006E);
517
   body.emit(assign(r006E, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
518

519
   ir_expression *const r006F = expr(ir_unop_find_msb, swizzle_y(r0067));
520
   body.emit(assign(r006D, add(r006F, body.constant(int(32))), 0x01));
521

522
   /* IF CONDITION */
523
   ir_expression *const r0071 = equal(swizzle_y(r0067), body.constant(0u));
524
   ir_expression *const r0072 = gequal(swizzle_y(r0063), swizzle_x(r0067));
525
   ir_expression *const r0073 = logic_and(r0071, r0072);
526
   ir_if *f0070 = new(mem_ctx) ir_if(operand(r0073).val);
527
   exec_list *const f0070_parent_instructions = body.instructions;
528

529
      /* THEN INSTRUCTIONS */
530
      body.instructions = &f0070->then_instructions;
531

532
      ir_variable *const r0074 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
533
      body.emit(r0074);
534
      ir_variable *const r0075 = body.make_temp(glsl_type::int_type, "findMSB_retval");
535
      body.emit(assign(r0075, expr(ir_unop_find_msb, swizzle_x(r0067)), 0x01));
536

537
      body.emit(assign(r006D, r0075, 0x01));
538

539
      body.emit(assign(r0074, body.constant(int(31)), 0x01));
540

541
      /* LOOP BEGIN */
542
      ir_loop *f0076 = new(mem_ctx) ir_loop();
543
      exec_list *const f0076_parent_instructions = body.instructions;
544

545
         body.instructions = &f0076->body_instructions;
546

547
         /* IF CONDITION */
548
         ir_expression *const r0078 = less(r0074, body.constant(int(1)));
549
         ir_if *f0077 = new(mem_ctx) ir_if(operand(r0078).val);
550
         exec_list *const f0077_parent_instructions = body.instructions;
551

552
            /* THEN INSTRUCTIONS */
553
            body.instructions = &f0077->then_instructions;
554

555
            body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
556

557

558
         body.instructions = f0077_parent_instructions;
559
         body.emit(f0077);
560

561
         /* END IF */
562

563
         /* IF CONDITION */
564
         ir_expression *const r007A = sub(body.constant(int(31)), r0074);
565
         ir_expression *const r007B = lequal(r0075, r007A);
566
         ir_expression *const r007C = lshift(swizzle_x(r0067), r0074);
567
         ir_expression *const r007D = lequal(r007C, swizzle_y(r0063));
568
         ir_expression *const r007E = logic_and(r007B, r007D);
569
         ir_if *f0079 = new(mem_ctx) ir_if(operand(r007E).val);
570
         exec_list *const f0079_parent_instructions = body.instructions;
571

572
            /* THEN INSTRUCTIONS */
573
            body.instructions = &f0079->then_instructions;
574

575
            ir_expression *const r007F = lshift(swizzle_x(r0067), r0074);
576
            body.emit(assign(r0063, sub(swizzle_y(r0063), r007F), 0x02));
577

578
            ir_expression *const r0080 = lshift(body.constant(1u), r0074);
579
            body.emit(assign(r006E, bit_or(swizzle_y(r006E), r0080), 0x02));
580

581

582
         body.instructions = f0079_parent_instructions;
583
         body.emit(f0079);
584

585
         /* END IF */
586

587
         body.emit(assign(r0074, add(r0074, body.constant(int(-1))), 0x01));
588

589
      /* LOOP END */
590

591
      body.instructions = f0076_parent_instructions;
592
      body.emit(f0076);
593

594
      /* IF CONDITION */
595
      ir_expression *const r0082 = lequal(swizzle_x(r0067), swizzle_y(r0063));
596
      ir_if *f0081 = new(mem_ctx) ir_if(operand(r0082).val);
597
      exec_list *const f0081_parent_instructions = body.instructions;
598

599
         /* THEN INSTRUCTIONS */
600
         body.instructions = &f0081->then_instructions;
601

602
         body.emit(assign(r0063, sub(swizzle_y(r0063), swizzle_x(r0067)), 0x02));
603

604
         body.emit(assign(r006E, bit_or(swizzle_y(r006E), body.constant(1u)), 0x02));
605

606

607
      body.instructions = f0081_parent_instructions;
608
      body.emit(f0081);
609

610
      /* END IF */
611

612

613
   body.instructions = f0070_parent_instructions;
614
   body.emit(f0070);
615

616
   /* END IF */
617

618
   ir_variable *const r0083 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
619
   body.emit(assign(r0083, expr(ir_unop_pack_uint_2x32, r0067), 0x01));
620

621
   body.emit(assign(r006C, expr(ir_unop_pack_uint_2x32, r0063), 0x01));
622

623
   body.emit(assign(r006B, body.constant(int(31)), 0x01));
624

625
   /* LOOP BEGIN */
626
   ir_loop *f0084 = new(mem_ctx) ir_loop();
627
   exec_list *const f0084_parent_instructions = body.instructions;
628

629
      body.instructions = &f0084->body_instructions;
630

631
      /* IF CONDITION */
632
      ir_expression *const r0086 = less(r006B, body.constant(int(1)));
633
      ir_if *f0085 = new(mem_ctx) ir_if(operand(r0086).val);
634
      exec_list *const f0085_parent_instructions = body.instructions;
635

636
         /* THEN INSTRUCTIONS */
637
         body.instructions = &f0085->then_instructions;
638

639
         body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
640

641

642
      body.instructions = f0085_parent_instructions;
643
      body.emit(f0085);
644

645
      /* END IF */
646

647
      /* IF CONDITION */
648
      ir_expression *const r0088 = sub(body.constant(int(63)), r006B);
649
      ir_expression *const r0089 = lequal(r006D, r0088);
650
      ir_expression *const r008A = lshift(r0083, r006B);
651
      ir_expression *const r008B = lequal(r008A, r006C);
652
      ir_expression *const r008C = logic_and(r0089, r008B);
653
      ir_if *f0087 = new(mem_ctx) ir_if(operand(r008C).val);
654
      exec_list *const f0087_parent_instructions = body.instructions;
655

656
         /* THEN INSTRUCTIONS */
657
         body.instructions = &f0087->then_instructions;
658

659
         ir_expression *const r008D = lshift(r0083, r006B);
660
         body.emit(assign(r006C, sub(r006C, r008D), 0x01));
661

662
         ir_expression *const r008E = lshift(body.constant(1u), r006B);
663
         body.emit(assign(r006E, bit_or(swizzle_x(r006E), r008E), 0x01));
664

665

666
      body.instructions = f0087_parent_instructions;
667
      body.emit(f0087);
668

669
      /* END IF */
670

671
      body.emit(assign(r006B, add(r006B, body.constant(int(-1))), 0x01));
672

673
   /* LOOP END */
674

675
   body.instructions = f0084_parent_instructions;
676
   body.emit(f0084);
677

678
   /* IF CONDITION */
679
   ir_expression *const r0090 = lequal(r0083, r006C);
680
   ir_if *f008F = new(mem_ctx) ir_if(operand(r0090).val);
681
   exec_list *const f008F_parent_instructions = body.instructions;
682

683
      /* THEN INSTRUCTIONS */
684
      body.instructions = &f008F->then_instructions;
685

686
      body.emit(assign(r006C, sub(r006C, r0083), 0x01));
687

688
      body.emit(assign(r006E, bit_or(swizzle_x(r006E), body.constant(1u)), 0x01));
689

690

691
   body.instructions = f008F_parent_instructions;
692
   body.emit(f008F);
693

694
   /* END IF */
695

696
   ir_variable *const r0091 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp");
697
   /* IF CONDITION */
698
   ir_if *f0092 = new(mem_ctx) ir_if(operand(r0060).val);
699
   exec_list *const f0092_parent_instructions = body.instructions;
700

701
      /* THEN INSTRUCTIONS */
702
      body.instructions = &f0092->then_instructions;
703

704
      ir_expression *const r0093 = expr(ir_unop_pack_uint_2x32, r006E);
705
      ir_expression *const r0094 = expr(ir_unop_u642i64, r0093);
706
      ir_expression *const r0095 = neg(r0094);
707
      body.emit(assign(r0091, expr(ir_unop_unpack_int_2x32, r0095), 0x03));
708

709

710
      /* ELSE INSTRUCTIONS */
711
      body.instructions = &f0092->else_instructions;
712

713
      body.emit(assign(r0091, expr(ir_unop_u2i, r006E), 0x03));
714

715

716
   body.instructions = f0092_parent_instructions;
717
   body.emit(f0092);
718

719
   /* END IF */
720

721
   body.emit(ret(r0091));
722

723
   sig->replace_parameters(&sig_parameters);
724
   return sig;
725
}
726
ir_function_signature *
727
umod64(void *mem_ctx, builtin_available_predicate avail)
728
{
729
   ir_function_signature *const sig =
730
      new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
731
   ir_factory body(&sig->body, mem_ctx);
732
   sig->is_defined = true;
733

734
   exec_list sig_parameters;
735

736
   ir_variable *const r0096 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
737
   sig_parameters.push_tail(r0096);
738
   ir_variable *const r0097 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
739
   sig_parameters.push_tail(r0097);
740
   ir_variable *const r0098 = body.make_temp(glsl_type::uvec2_type, "n");
741
   body.emit(assign(r0098, r0096, 0x03));
742

743
   ir_variable *const r0099 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
744
   body.emit(r0099);
745
   ir_variable *const r009A = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
746
   body.emit(r009A);
747
   ir_variable *const r009B = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
748
   body.emit(r009B);
749
   ir_variable *const r009C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
750
   body.emit(r009C);
751
   body.emit(assign(r009C, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
752

753
   ir_expression *const r009D = expr(ir_unop_find_msb, swizzle_y(r0097));
754
   body.emit(assign(r009B, add(r009D, body.constant(int(32))), 0x01));
755

756
   /* IF CONDITION */
757
   ir_expression *const r009F = equal(swizzle_y(r0097), body.constant(0u));
758
   ir_expression *const r00A0 = gequal(swizzle_y(r0096), swizzle_x(r0097));
759
   ir_expression *const r00A1 = logic_and(r009F, r00A0);
760
   ir_if *f009E = new(mem_ctx) ir_if(operand(r00A1).val);
761
   exec_list *const f009E_parent_instructions = body.instructions;
762

763
      /* THEN INSTRUCTIONS */
764
      body.instructions = &f009E->then_instructions;
765

766
      ir_variable *const r00A2 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
767
      body.emit(r00A2);
768
      ir_variable *const r00A3 = body.make_temp(glsl_type::int_type, "findMSB_retval");
769
      body.emit(assign(r00A3, expr(ir_unop_find_msb, swizzle_x(r0097)), 0x01));
770

771
      body.emit(assign(r009B, r00A3, 0x01));
772

773
      body.emit(assign(r00A2, body.constant(int(31)), 0x01));
774

775
      /* LOOP BEGIN */
776
      ir_loop *f00A4 = new(mem_ctx) ir_loop();
777
      exec_list *const f00A4_parent_instructions = body.instructions;
778

779
         body.instructions = &f00A4->body_instructions;
780

781
         /* IF CONDITION */
782
         ir_expression *const r00A6 = less(r00A2, body.constant(int(1)));
783
         ir_if *f00A5 = new(mem_ctx) ir_if(operand(r00A6).val);
784
         exec_list *const f00A5_parent_instructions = body.instructions;
785

786
            /* THEN INSTRUCTIONS */
787
            body.instructions = &f00A5->then_instructions;
788

789
            body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
790

791

792
         body.instructions = f00A5_parent_instructions;
793
         body.emit(f00A5);
794

795
         /* END IF */
796

797
         /* IF CONDITION */
798
         ir_expression *const r00A8 = sub(body.constant(int(31)), r00A2);
799
         ir_expression *const r00A9 = lequal(r00A3, r00A8);
800
         ir_expression *const r00AA = lshift(swizzle_x(r0097), r00A2);
801
         ir_expression *const r00AB = lequal(r00AA, swizzle_y(r0098));
802
         ir_expression *const r00AC = logic_and(r00A9, r00AB);
803
         ir_if *f00A7 = new(mem_ctx) ir_if(operand(r00AC).val);
804
         exec_list *const f00A7_parent_instructions = body.instructions;
805

806
            /* THEN INSTRUCTIONS */
807
            body.instructions = &f00A7->then_instructions;
808

809
            ir_expression *const r00AD = lshift(swizzle_x(r0097), r00A2);
810
            body.emit(assign(r0098, sub(swizzle_y(r0098), r00AD), 0x02));
811

812
            ir_expression *const r00AE = lshift(body.constant(1u), r00A2);
813
            body.emit(assign(r009C, bit_or(swizzle_y(r009C), r00AE), 0x02));
814

815

816
         body.instructions = f00A7_parent_instructions;
817
         body.emit(f00A7);
818

819
         /* END IF */
820

821
         body.emit(assign(r00A2, add(r00A2, body.constant(int(-1))), 0x01));
822

823
      /* LOOP END */
824

825
      body.instructions = f00A4_parent_instructions;
826
      body.emit(f00A4);
827

828
      /* IF CONDITION */
829
      ir_expression *const r00B0 = lequal(swizzle_x(r0097), swizzle_y(r0098));
830
      ir_if *f00AF = new(mem_ctx) ir_if(operand(r00B0).val);
831
      exec_list *const f00AF_parent_instructions = body.instructions;
832

833
         /* THEN INSTRUCTIONS */
834
         body.instructions = &f00AF->then_instructions;
835

836
         body.emit(assign(r0098, sub(swizzle_y(r0098), swizzle_x(r0097)), 0x02));
837

838
         body.emit(assign(r009C, bit_or(swizzle_y(r009C), body.constant(1u)), 0x02));
839

840

841
      body.instructions = f00AF_parent_instructions;
842
      body.emit(f00AF);
843

844
      /* END IF */
845

846

847
   body.instructions = f009E_parent_instructions;
848
   body.emit(f009E);
849

850
   /* END IF */
851

852
   ir_variable *const r00B1 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
853
   body.emit(assign(r00B1, expr(ir_unop_pack_uint_2x32, r0097), 0x01));
854

855
   body.emit(assign(r009A, expr(ir_unop_pack_uint_2x32, r0098), 0x01));
856

857
   body.emit(assign(r0099, body.constant(int(31)), 0x01));
858

859
   /* LOOP BEGIN */
860
   ir_loop *f00B2 = new(mem_ctx) ir_loop();
861
   exec_list *const f00B2_parent_instructions = body.instructions;
862

863
      body.instructions = &f00B2->body_instructions;
864

865
      /* IF CONDITION */
866
      ir_expression *const r00B4 = less(r0099, body.constant(int(1)));
867
      ir_if *f00B3 = new(mem_ctx) ir_if(operand(r00B4).val);
868
      exec_list *const f00B3_parent_instructions = body.instructions;
869

870
         /* THEN INSTRUCTIONS */
871
         body.instructions = &f00B3->then_instructions;
872

873
         body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
874

875

876
      body.instructions = f00B3_parent_instructions;
877
      body.emit(f00B3);
878

879
      /* END IF */
880

881
      /* IF CONDITION */
882
      ir_expression *const r00B6 = sub(body.constant(int(63)), r0099);
883
      ir_expression *const r00B7 = lequal(r009B, r00B6);
884
      ir_expression *const r00B8 = lshift(r00B1, r0099);
885
      ir_expression *const r00B9 = lequal(r00B8, r009A);
886
      ir_expression *const r00BA = logic_and(r00B7, r00B9);
887
      ir_if *f00B5 = new(mem_ctx) ir_if(operand(r00BA).val);
888
      exec_list *const f00B5_parent_instructions = body.instructions;
889

890
         /* THEN INSTRUCTIONS */
891
         body.instructions = &f00B5->then_instructions;
892

893
         ir_expression *const r00BB = lshift(r00B1, r0099);
894
         body.emit(assign(r009A, sub(r009A, r00BB), 0x01));
895

896
         ir_expression *const r00BC = lshift(body.constant(1u), r0099);
897
         body.emit(assign(r009C, bit_or(swizzle_x(r009C), r00BC), 0x01));
898

899

900
      body.instructions = f00B5_parent_instructions;
901
      body.emit(f00B5);
902

903
      /* END IF */
904

905
      body.emit(assign(r0099, add(r0099, body.constant(int(-1))), 0x01));
906

907
   /* LOOP END */
908

909
   body.instructions = f00B2_parent_instructions;
910
   body.emit(f00B2);
911

912
   /* IF CONDITION */
913
   ir_expression *const r00BE = lequal(r00B1, r009A);
914
   ir_if *f00BD = new(mem_ctx) ir_if(operand(r00BE).val);
915
   exec_list *const f00BD_parent_instructions = body.instructions;
916

917
      /* THEN INSTRUCTIONS */
918
      body.instructions = &f00BD->then_instructions;
919

920
      body.emit(assign(r009A, sub(r009A, r00B1), 0x01));
921

922
      body.emit(assign(r009C, bit_or(swizzle_x(r009C), body.constant(1u)), 0x01));
923

924

925
   body.instructions = f00BD_parent_instructions;
926
   body.emit(f00BD);
927

928
   /* END IF */
929

930
   ir_variable *const r00BF = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
931
   body.emit(assign(r00BF, r009C, 0x03));
932

933
   body.emit(assign(r00BF, expr(ir_unop_unpack_uint_2x32, r009A), 0x0c));
934

935
   ir_swizzle *const r00C0 = swizzle(r00BF, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_X, SWIZZLE_X), 2);
936
   body.emit(ret(r00C0));
937

938
   sig->replace_parameters(&sig_parameters);
939
   return sig;
940
}
941
ir_function_signature *
942
imod64(void *mem_ctx, builtin_available_predicate avail)
943
{
944
   ir_function_signature *const sig =
945
      new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
946
   ir_factory body(&sig->body, mem_ctx);
947
   sig->is_defined = true;
948

949
   exec_list sig_parameters;
950

951
   ir_variable *const r00C1 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_n", ir_var_function_in);
952
   sig_parameters.push_tail(r00C1);
953
   ir_variable *const r00C2 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_d", ir_var_function_in);
954
   sig_parameters.push_tail(r00C2);
955
   ir_variable *const r00C3 = new(mem_ctx) ir_variable(glsl_type::bool_type, "negate", ir_var_auto);
956
   body.emit(r00C3);
957
   ir_expression *const r00C4 = less(swizzle_y(r00C1), body.constant(int(0)));
958
   ir_expression *const r00C5 = less(swizzle_y(r00C2), body.constant(int(0)));
959
   body.emit(assign(r00C3, nequal(r00C4, r00C5), 0x01));
960

961
   ir_variable *const r00C6 = body.make_temp(glsl_type::uvec2_type, "n");
962
   ir_expression *const r00C7 = expr(ir_unop_pack_int_2x32, r00C1);
963
   ir_expression *const r00C8 = expr(ir_unop_abs, r00C7);
964
   ir_expression *const r00C9 = expr(ir_unop_i642u64, r00C8);
965
   body.emit(assign(r00C6, expr(ir_unop_unpack_uint_2x32, r00C9), 0x03));
966

967
   ir_variable *const r00CA = body.make_temp(glsl_type::uvec2_type, "d");
968
   ir_expression *const r00CB = expr(ir_unop_pack_int_2x32, r00C2);
969
   ir_expression *const r00CC = expr(ir_unop_abs, r00CB);
970
   ir_expression *const r00CD = expr(ir_unop_i642u64, r00CC);
971
   body.emit(assign(r00CA, expr(ir_unop_unpack_uint_2x32, r00CD), 0x03));
972

973
   ir_variable *const r00CE = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
974
   body.emit(r00CE);
975
   ir_variable *const r00CF = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
976
   body.emit(r00CF);
977
   ir_variable *const r00D0 = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
978
   body.emit(r00D0);
979
   ir_variable *const r00D1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
980
   body.emit(r00D1);
981
   body.emit(assign(r00D1, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
982

983
   ir_expression *const r00D2 = expr(ir_unop_find_msb, swizzle_y(r00CA));
984
   body.emit(assign(r00D0, add(r00D2, body.constant(int(32))), 0x01));
985

986
   /* IF CONDITION */
987
   ir_expression *const r00D4 = equal(swizzle_y(r00CA), body.constant(0u));
988
   ir_expression *const r00D5 = gequal(swizzle_y(r00C6), swizzle_x(r00CA));
989
   ir_expression *const r00D6 = logic_and(r00D4, r00D5);
990
   ir_if *f00D3 = new(mem_ctx) ir_if(operand(r00D6).val);
991
   exec_list *const f00D3_parent_instructions = body.instructions;
992

993
      /* THEN INSTRUCTIONS */
994
      body.instructions = &f00D3->then_instructions;
995

996
      ir_variable *const r00D7 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
997
      body.emit(r00D7);
998
      ir_variable *const r00D8 = body.make_temp(glsl_type::int_type, "findMSB_retval");
999
      body.emit(assign(r00D8, expr(ir_unop_find_msb, swizzle_x(r00CA)), 0x01));
1000

1001
      body.emit(assign(r00D0, r00D8, 0x01));
1002

1003
      body.emit(assign(r00D7, body.constant(int(31)), 0x01));
1004

1005
      /* LOOP BEGIN */
1006
      ir_loop *f00D9 = new(mem_ctx) ir_loop();
1007
      exec_list *const f00D9_parent_instructions = body.instructions;
1008

1009
         body.instructions = &f00D9->body_instructions;
1010

1011
         /* IF CONDITION */
1012
         ir_expression *const r00DB = less(r00D7, body.constant(int(1)));
1013
         ir_if *f00DA = new(mem_ctx) ir_if(operand(r00DB).val);
1014
         exec_list *const f00DA_parent_instructions = body.instructions;
1015

1016
            /* THEN INSTRUCTIONS */
1017
            body.instructions = &f00DA->then_instructions;
1018

1019
            body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
1020

1021

1022
         body.instructions = f00DA_parent_instructions;
1023
         body.emit(f00DA);
1024

1025
         /* END IF */
1026

1027
         /* IF CONDITION */
1028
         ir_expression *const r00DD = sub(body.constant(int(31)), r00D7);
1029
         ir_expression *const r00DE = lequal(r00D8, r00DD);
1030
         ir_expression *const r00DF = lshift(swizzle_x(r00CA), r00D7);
1031
         ir_expression *const r00E0 = lequal(r00DF, swizzle_y(r00C6));
1032
         ir_expression *const r00E1 = logic_and(r00DE, r00E0);
1033
         ir_if *f00DC = new(mem_ctx) ir_if(operand(r00E1).val);
1034
         exec_list *const f00DC_parent_instructions = body.instructions;
1035

1036
            /* THEN INSTRUCTIONS */
1037
            body.instructions = &f00DC->then_instructions;
1038

1039
            ir_expression *const r00E2 = lshift(swizzle_x(r00CA), r00D7);
1040
            body.emit(assign(r00C6, sub(swizzle_y(r00C6), r00E2), 0x02));
1041

1042
            ir_expression *const r00E3 = lshift(body.constant(1u), r00D7);
1043
            body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), r00E3), 0x02));
1044

1045

1046
         body.instructions = f00DC_parent_instructions;
1047
         body.emit(f00DC);
1048

1049
         /* END IF */
1050

1051
         body.emit(assign(r00D7, add(r00D7, body.constant(int(-1))), 0x01));
1052

1053
      /* LOOP END */
1054

1055
      body.instructions = f00D9_parent_instructions;
1056
      body.emit(f00D9);
1057

1058
      /* IF CONDITION */
1059
      ir_expression *const r00E5 = lequal(swizzle_x(r00CA), swizzle_y(r00C6));
1060
      ir_if *f00E4 = new(mem_ctx) ir_if(operand(r00E5).val);
1061
      exec_list *const f00E4_parent_instructions = body.instructions;
1062

1063
         /* THEN INSTRUCTIONS */
1064
         body.instructions = &f00E4->then_instructions;
1065

1066
         body.emit(assign(r00C6, sub(swizzle_y(r00C6), swizzle_x(r00CA)), 0x02));
1067

1068
         body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), body.constant(1u)), 0x02));
1069

1070

1071
      body.instructions = f00E4_parent_instructions;
1072
      body.emit(f00E4);
1073

1074
      /* END IF */
1075

1076

1077
   body.instructions = f00D3_parent_instructions;
1078
   body.emit(f00D3);
1079

1080
   /* END IF */
1081

1082
   ir_variable *const r00E6 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
1083
   body.emit(assign(r00E6, expr(ir_unop_pack_uint_2x32, r00CA), 0x01));
1084

1085
   body.emit(assign(r00CF, expr(ir_unop_pack_uint_2x32, r00C6), 0x01));
1086

1087
   body.emit(assign(r00CE, body.constant(int(31)), 0x01));
1088

1089
   /* LOOP BEGIN */
1090
   ir_loop *f00E7 = new(mem_ctx) ir_loop();
1091
   exec_list *const f00E7_parent_instructions = body.instructions;
1092

1093
      body.instructions = &f00E7->body_instructions;
1094

1095
      /* IF CONDITION */
1096
      ir_expression *const r00E9 = less(r00CE, body.constant(int(1)));
1097
      ir_if *f00E8 = new(mem_ctx) ir_if(operand(r00E9).val);
1098
      exec_list *const f00E8_parent_instructions = body.instructions;
1099

1100
         /* THEN INSTRUCTIONS */
1101
         body.instructions = &f00E8->then_instructions;
1102

1103
         body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
1104

1105

1106
      body.instructions = f00E8_parent_instructions;
1107
      body.emit(f00E8);
1108

1109
      /* END IF */
1110

1111
      /* IF CONDITION */
1112
      ir_expression *const r00EB = sub(body.constant(int(63)), r00CE);
1113
      ir_expression *const r00EC = lequal(r00D0, r00EB);
1114
      ir_expression *const r00ED = lshift(r00E6, r00CE);
1115
      ir_expression *const r00EE = lequal(r00ED, r00CF);
1116
      ir_expression *const r00EF = logic_and(r00EC, r00EE);
1117
      ir_if *f00EA = new(mem_ctx) ir_if(operand(r00EF).val);
1118
      exec_list *const f00EA_parent_instructions = body.instructions;
1119

1120
         /* THEN INSTRUCTIONS */
1121
         body.instructions = &f00EA->then_instructions;
1122

1123
         ir_expression *const r00F0 = lshift(r00E6, r00CE);
1124
         body.emit(assign(r00CF, sub(r00CF, r00F0), 0x01));
1125

1126
         ir_expression *const r00F1 = lshift(body.constant(1u), r00CE);
1127
         body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), r00F1), 0x01));
1128

1129

1130
      body.instructions = f00EA_parent_instructions;
1131
      body.emit(f00EA);
1132

1133
      /* END IF */
1134

1135
      body.emit(assign(r00CE, add(r00CE, body.constant(int(-1))), 0x01));
1136

1137
   /* LOOP END */
1138

1139
   body.instructions = f00E7_parent_instructions;
1140
   body.emit(f00E7);
1141

1142
   /* IF CONDITION */
1143
   ir_expression *const r00F3 = lequal(r00E6, r00CF);
1144
   ir_if *f00F2 = new(mem_ctx) ir_if(operand(r00F3).val);
1145
   exec_list *const f00F2_parent_instructions = body.instructions;
1146

1147
      /* THEN INSTRUCTIONS */
1148
      body.instructions = &f00F2->then_instructions;
1149

1150
      body.emit(assign(r00CF, sub(r00CF, r00E6), 0x01));
1151

1152
      body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), body.constant(1u)), 0x01));
1153

1154

1155
   body.instructions = f00F2_parent_instructions;
1156
   body.emit(f00F2);
1157

1158
   /* END IF */
1159

1160
   ir_variable *const r00F4 = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
1161
   body.emit(assign(r00F4, r00D1, 0x03));
1162

1163
   body.emit(assign(r00F4, expr(ir_unop_unpack_uint_2x32, r00CF), 0x0c));
1164

1165
   ir_variable *const r00F5 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp");
1166
   /* IF CONDITION */
1167
   ir_if *f00F6 = new(mem_ctx) ir_if(operand(r00C3).val);
1168
   exec_list *const f00F6_parent_instructions = body.instructions;
1169

1170
      /* THEN INSTRUCTIONS */
1171
      body.instructions = &f00F6->then_instructions;
1172

1173
      ir_swizzle *const r00F7 = swizzle(r00F4, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_X, SWIZZLE_X), 2);
1174
      ir_expression *const r00F8 = expr(ir_unop_pack_uint_2x32, r00F7);
1175
      ir_expression *const r00F9 = expr(ir_unop_u642i64, r00F8);
1176
      ir_expression *const r00FA = neg(r00F9);
1177
      body.emit(assign(r00F5, expr(ir_unop_unpack_int_2x32, r00FA), 0x03));
1178

1179

1180
      /* ELSE INSTRUCTIONS */
1181
      body.instructions = &f00F6->else_instructions;
1182

1183
      ir_swizzle *const r00FB = swizzle(r00F4, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_X, SWIZZLE_X), 2);
1184
      body.emit(assign(r00F5, expr(ir_unop_u2i, r00FB), 0x03));
1185

1186

1187
   body.instructions = f00F6_parent_instructions;
1188
   body.emit(f00F6);
1189

1190
   /* END IF */
1191

1192
   body.emit(ret(r00F5));
1193

1194
   sig->replace_parameters(&sig_parameters);
1195
   return sig;
1196
}
1197

1198
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