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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/compiler/nir/nir_inline_uniforms.c
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/*
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* Copyright © 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/* These passes enable converting uniforms to literals when it's profitable,
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* effectively inlining uniform values in the IR. The main benefit is register
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* usage decrease leading to better SMT (hyperthreading). It's accomplished
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* by targetting uniforms that determine whether a conditional branch is
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* taken.
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*
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* Only uniforms used in if conditions are analyzed.
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*
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* nir_find_inlinable_uniforms finds uniforms that can be inlined and stores
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* that information in shader_info.
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*
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* nir_inline_uniforms inlines uniform values.
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*
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* (uniforms must be lowered to load_ubo before calling this)
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*/
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#include "compiler/nir/nir_builder.h"
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/* Maximum value in shader_info::inlinable_uniform_dw_offsets[] */
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#define MAX_OFFSET (UINT16_MAX * 4)
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static bool
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src_only_uses_uniforms(const nir_src *src, struct set **uni_offsets)
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{
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if (!src->is_ssa)
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return false;
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nir_instr *instr = src->ssa->parent_instr;
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switch (instr->type) {
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case nir_instr_type_alu: {
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/* Return true if all sources return true. */
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/* TODO: Swizzles are ignored, so vectors can prevent inlining. */
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
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if (!src_only_uses_uniforms(&alu->src[i].src, uni_offsets))
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return false;
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}
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return true;
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}
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case nir_instr_type_intrinsic: {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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/* Return true if the intrinsic loads from UBO 0 with a constant
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* offset.
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*/
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if (intr->intrinsic == nir_intrinsic_load_ubo &&
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nir_src_is_const(intr->src[0]) &&
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nir_src_as_uint(intr->src[0]) == 0 &&
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nir_src_is_const(intr->src[1]) &&
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nir_src_as_uint(intr->src[1]) <= MAX_OFFSET &&
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/* TODO: Can't handle vectors and other bit sizes for now. */
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/* UBO loads should be scalarized. */
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intr->dest.ssa.num_components == 1 &&
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intr->dest.ssa.bit_size == 32) {
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/* Record the uniform offset. */
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if (!*uni_offsets)
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*uni_offsets = _mesa_set_create_u32_keys(NULL);
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/* Add 1 because the set doesn't allow NULL keys. */
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_mesa_set_add(*uni_offsets,
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(void*)(uintptr_t)(nir_src_as_uint(intr->src[1]) + 1));
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return true;
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}
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return false;
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}
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case nir_instr_type_load_const:
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/* Always return true for constants. */
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return true;
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default:
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return false;
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}
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}
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void
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nir_find_inlinable_uniforms(nir_shader *shader)
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{
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struct set *uni_offsets = NULL;
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nir_foreach_function(function, shader) {
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if (function->impl) {
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foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
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switch (node->type) {
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case nir_cf_node_if: {
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const nir_src *cond = &nir_cf_node_as_if(node)->condition;
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struct set *found_offsets = NULL;
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if (src_only_uses_uniforms(cond, &found_offsets) &&
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found_offsets) {
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/* All uniforms are lowerable. Save uniform offsets. */
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set_foreach(found_offsets, entry) {
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if (!uni_offsets)
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uni_offsets = _mesa_set_create_u32_keys(NULL);
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_mesa_set_add(uni_offsets, entry->key);
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}
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}
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if (found_offsets)
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_mesa_set_destroy(found_offsets, NULL);
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break;
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}
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case nir_cf_node_loop:
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/* TODO: handle loops if we want to unroll them at draw time */
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break;
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default:
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break;
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}
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}
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}
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}
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if (uni_offsets) {
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unsigned num = 0;
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set_foreach(uni_offsets, entry) {
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/* Subtract 1 because all keys are + 1. */
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uint32_t offset = (uintptr_t)entry->key - 1;
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assert(offset < MAX_OFFSET);
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if (num < MAX_INLINABLE_UNIFORMS)
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shader->info.inlinable_uniform_dw_offsets[num++] = offset / 4;
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}
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shader->info.num_inlinable_uniforms = num;
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_mesa_set_destroy(uni_offsets, NULL);
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}
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}
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void
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nir_inline_uniforms(nir_shader *shader, unsigned num_uniforms,
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const uint32_t *uniform_values,
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const uint16_t *uniform_dw_offsets)
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{
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if (!num_uniforms)
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return;
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nir_foreach_function(function, shader) {
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if (function->impl) {
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nir_builder b;
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nir_builder_init(&b, function->impl);
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nir_foreach_block(block, function->impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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/* Only replace UBO 0 with constant offsets. */
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if (intr->intrinsic == nir_intrinsic_load_ubo &&
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nir_src_is_const(intr->src[0]) &&
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nir_src_as_uint(intr->src[0]) == 0 &&
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nir_src_is_const(intr->src[1]) &&
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/* TODO: Can't handle vectors and other bit sizes for now. */
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/* UBO loads should be scalarized. */
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intr->dest.ssa.num_components == 1 &&
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intr->dest.ssa.bit_size == 32) {
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uint64_t offset = nir_src_as_uint(intr->src[1]);
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for (unsigned i = 0; i < num_uniforms; i++) {
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if (offset == uniform_dw_offsets[i] * 4) {
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b.cursor = nir_before_instr(&intr->instr);
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nir_ssa_def *def = nir_imm_int(&b, uniform_values[i]);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, def);
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nir_instr_remove(&intr->instr);
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break;
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}
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}
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}
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}
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}
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nir_metadata_preserve(function->impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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}
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}
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