Path: blob/21.2-virgl/src/freedreno/afuc/emu-ds.c
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/*1* Copyright © 2021 Google, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*/2223#include <assert.h>24#include <ctype.h>25#include <stdio.h>26#include <stdlib.h>2728#include "emu.h"29#include "util.h"3031/*32* Emulation for draw-state (ie. CP_SET_DRAW_STATE) related control registers:33*/3435EMU_CONTROL_REG(DRAW_STATE_SET);36EMU_CONTROL_REG(DRAW_STATE_SEL);37EMU_CONTROL_REG(DRAW_STATE_ACTIVE_BITMASK);38EMU_CONTROL_REG(DRAW_STATE_HDR);39EMU_CONTROL_REG(DRAW_STATE_BASE);40EMU_CONTROL_REG(SDS_BASE);41EMU_CONTROL_REG(SDS_DWORDS);4243uint32_t44emu_get_draw_state_reg(struct emu *emu, unsigned n)45{46// TODO maybe we don't need to do anything here47return emu->control_regs.val[n];48}4950void51emu_set_draw_state_reg(struct emu *emu, unsigned n, uint32_t val)52{53struct emu_draw_state *ds = &emu->draw_state;54unsigned cur_idx = emu_get_reg32(emu, &DRAW_STATE_SEL);5556if (n == emu_reg_offset(&DRAW_STATE_SET)) {57if (ds->write_idx == 0) {58cur_idx = (val >> 24) & 0x1f;59ds->state[cur_idx].count = val & 0xffff;60ds->state[cur_idx].mode_mask = (val >> 20) & 0x7;6162unsigned active_mask = emu_get_reg32(emu, &DRAW_STATE_ACTIVE_BITMASK);63active_mask |= (1 << cur_idx);6465emu_set_reg32(emu, &DRAW_STATE_ACTIVE_BITMASK, active_mask);66emu_set_reg32(emu, &DRAW_STATE_SEL, cur_idx);67} else {68ds->state[cur_idx].base_lohi[ds->write_idx - 1] = val;69}7071ds->write_idx = (ds->write_idx + 1) % 3;72} else if (n == emu_reg_offset(&DRAW_STATE_SEL)) {73emu_set_reg32(emu, &DRAW_STATE_HDR, ds->state[val].hdr);74emu_set_reg64(emu, &DRAW_STATE_BASE, ds->state[val].base);7576/* It seems that SDS_BASE/SDS_DWORDS is also per draw-state group,77* and that when a new state-group is selected, SQE compares to78* the previous values to new DRAW_STATE_BASE & count to detect79* that new state has been appended to existing draw-state group:80*/81unsigned prev_idx = ds->prev_draw_state_sel;82ds->state[prev_idx].sds_base = emu_get_reg64(emu, &SDS_BASE);83ds->state[prev_idx].sds_dwords = emu_get_reg32(emu, &SDS_DWORDS);8485emu_set_reg64(emu, &SDS_BASE, ds->state[val].sds_base);86emu_set_reg32(emu, &SDS_DWORDS, ds->state[val].sds_dwords);8788ds->prev_draw_state_sel = val;89}90}919293