Path: blob/21.2-virgl/src/freedreno/drm/freedreno_drmif.h
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/*1* Copyright (C) 2012-2018 Rob Clark <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22* Authors:23* Rob Clark <[email protected]>24*/2526#ifndef FREEDRENO_DRMIF_H_27#define FREEDRENO_DRMIF_H_2829#include <stdint.h>3031#include "util/bitset.h"32#include "util/u_debug.h"3334#ifdef __cplusplus35extern "C" {36#endif3738struct fd_bo;39struct fd_pipe;40struct fd_device;4142enum fd_pipe_id {43FD_PIPE_3D = 1,44FD_PIPE_2D = 2,45/* some devices have two 2d blocks.. not really sure how to46* use that yet, so just ignoring the 2nd 2d pipe for now47*/48FD_PIPE_MAX49};5051enum fd_param_id {52FD_DEVICE_ID,53FD_GMEM_SIZE,54FD_GMEM_BASE,55FD_GPU_ID,56FD_CHIP_ID,57FD_MAX_FREQ,58FD_TIMESTAMP,59FD_NR_RINGS, /* # of rings == # of distinct priority levels */60FD_PP_PGTABLE, /* are per-process pagetables used for the pipe/ctx */61FD_CTX_FAULTS, /* # of per context faults */62FD_GLOBAL_FAULTS, /* # of global (all context) faults */63FD_SUSPEND_COUNT, /* # of times the GPU has suspended, and potentially lost state */64};6566/**67* Helper for fence/seqno comparisions which deals properly with rollover.68* Returns true if fence 'a' is before fence 'b'69*/70static inline bool71fd_fence_before(uint32_t a, uint32_t b)72{73return (int32_t)(a - b) < 0;74}7576static inline bool77fd_fence_after(uint32_t a, uint32_t b)78{79return (int32_t)(a - b) > 0;80}8182/**83* Per submit, there are actually two fences:84* 1) The userspace maintained fence, which is used to optimistically85* avoid kernel ioctls to query if specific rendering is completed86* 2) The kernel maintained fence, which we cannot directly do anything87* with, other than pass it back to the kernel88*89* The userspace fence is mostly internal to the drm layer, but we want90* the gallium layer to be able to pass it back to us for things like91* fd_pipe_wait(). So this struct encapsulates the two.92*/93struct fd_fence {94uint32_t kfence; /* kernel fence */95uint32_t ufence; /* userspace fence */96};9798/* bo flags: */99#define FD_BO_GPUREADONLY BITSET_BIT(1)100#define FD_BO_SCANOUT BITSET_BIT(2)101/* Default caching is WRITECOMBINE, we can add new bo flags later for cached/etc */102103/* bo access flags: (keep aligned to MSM_PREP_x) */104#define FD_BO_PREP_READ BITSET_BIT(0)105#define FD_BO_PREP_WRITE BITSET_BIT(1)106#define FD_BO_PREP_NOSYNC BITSET_BIT(2)107#define FD_BO_PREP_FLUSH BITSET_BIT(3)108109110/* device functions:111*/112113struct fd_device *fd_device_new(int fd);114struct fd_device *fd_device_new_dup(int fd);115struct fd_device *fd_device_ref(struct fd_device *dev);116void fd_device_purge(struct fd_device *dev);117void fd_device_del(struct fd_device *dev);118int fd_device_fd(struct fd_device *dev);119120enum fd_version {121FD_VERSION_MADVISE = 1, /* kernel supports madvise */122FD_VERSION_UNLIMITED_CMDS = 1, /* submits w/ >4 cmd buffers (growable ringbuffer) */123FD_VERSION_FENCE_FD = 2, /* submit command supports in/out fences */124FD_VERSION_GMEM_BASE = 3, /* supports querying GMEM base address */125FD_VERSION_SUBMIT_QUEUES = 3, /* submit queues and multiple priority levels */126FD_VERSION_BO_IOVA = 3, /* supports fd_bo_get/put_iova() */127FD_VERSION_SOFTPIN = 4, /* adds softpin, bo name, and dump flag */128FD_VERSION_ROBUSTNESS = 5, /* adds FD_NR_FAULTS and FD_PP_PGTABLE */129FD_VERSION_MEMORY_FD = 2, /* supports shared memory objects */130};131enum fd_version fd_device_version(struct fd_device *dev);132133bool fd_has_syncobj(struct fd_device *dev);134135/* pipe functions:136*/137138struct fd_pipe *fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id);139struct fd_pipe *fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id,140uint32_t prio);141struct fd_pipe *fd_pipe_ref(struct fd_pipe *pipe);142struct fd_pipe *fd_pipe_ref_locked(struct fd_pipe *pipe);143void fd_pipe_del(struct fd_pipe *pipe);144void fd_pipe_purge(struct fd_pipe *pipe);145int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,146uint64_t *value);147int fd_pipe_wait(struct fd_pipe *pipe, const struct fd_fence *fence);148/* timeout in nanosec */149int fd_pipe_wait_timeout(struct fd_pipe *pipe, const struct fd_fence *fence,150uint64_t timeout);151152/* buffer-object functions:153*/154155struct fd_bo *_fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags);156void _fd_bo_set_name(struct fd_bo *bo, const char *fmt, va_list ap);157158static inline void fd_bo_set_name(struct fd_bo *bo, const char *fmt, ...)159_util_printf_format(2, 3);160161static inline void162fd_bo_set_name(struct fd_bo *bo, const char *fmt, ...)163{164#ifndef NDEBUG165va_list ap;166va_start(ap, fmt);167_fd_bo_set_name(bo, fmt, ap);168va_end(ap);169#endif170}171172static inline struct fd_bo *fd_bo_new(struct fd_device *dev, uint32_t size,173uint32_t flags, const char *fmt, ...)174_util_printf_format(4, 5);175176static inline struct fd_bo *177fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags, const char *fmt,178...)179{180struct fd_bo *bo = _fd_bo_new(dev, size, flags);181#ifndef NDEBUG182if (fmt) {183va_list ap;184va_start(ap, fmt);185_fd_bo_set_name(bo, fmt, ap);186va_end(ap);187}188#endif189return bo;190}191192struct fd_bo *fd_bo_from_handle(struct fd_device *dev, uint32_t handle,193uint32_t size);194struct fd_bo *fd_bo_from_name(struct fd_device *dev, uint32_t name);195struct fd_bo *fd_bo_from_dmabuf(struct fd_device *dev, int fd);196void fd_bo_mark_for_dump(struct fd_bo *bo);197uint64_t fd_bo_get_iova(struct fd_bo *bo);198struct fd_bo *fd_bo_ref(struct fd_bo *bo);199void fd_bo_del(struct fd_bo *bo);200int fd_bo_get_name(struct fd_bo *bo, uint32_t *name);201uint32_t fd_bo_handle(struct fd_bo *bo);202int fd_bo_dmabuf(struct fd_bo *bo);203uint32_t fd_bo_size(struct fd_bo *bo);204void *fd_bo_map(struct fd_bo *bo);205int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op);206void fd_bo_cpu_fini(struct fd_bo *bo);207208#ifdef __cplusplus209} /* end of extern "C" */210#endif211212#endif /* FREEDRENO_DRMIF_H_ */213214215