Path: blob/21.2-virgl/src/freedreno/ir3/ir3_cp_postsched.c
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/*1* Copyright © 2020 Google, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*/2223#include "util/ralloc.h"24#include "util/u_dynarray.h"2526#include "ir3.h"2728/**29* A bit more extra cleanup after sched pass. In particular, prior to30* instruction scheduling, we can't easily eliminate unneeded mov's31* from "arrays", because we don't yet know if there is an intervening32* array-write scheduled before the use of the array-read.33*34* NOTE array is equivalent to nir "registers".. ie. it can be length of35* one. It is basically anything that is not SSA.36*/3738/**39* Check if any instruction before `use` and after `src` writes to the40* specified array. If `offset` is negative, it is a relative (a0.x)41* access and we care about all writes to the array (as we don't know42* which array element is read). Otherwise in the case of non-relative43* access, we only have to care about the write to the specified (>= 0)44* offset. In this case, we update `def` to point to the last write in45* between `use` and `src` to the same array, so that `use` points to46* the correct array write.47*/48static bool49has_conflicting_write(struct ir3_instruction *src, struct ir3_instruction *use,50struct ir3_register **def, unsigned id, int offset)51{52assert(src->block == use->block);53bool last_write = true;5455/* NOTE that since src and use are in the same block, src by56* definition appears in the block's instr_list before use:57*/58foreach_instr_rev (instr, &use->node) {59if (instr == src)60break;6162/* if we are looking at a RELATIV read, we can't move63* it past an a0.x write:64*/65if ((offset < 0) && (dest_regs(instr) > 0) &&66(instr->dsts[0]->num == regid(REG_A0, 0)))67return true;6869if (!writes_gpr(instr))70continue;7172struct ir3_register *dst = instr->dsts[0];73if (!(dst->flags & IR3_REG_ARRAY))74continue;7576if (dst->array.id != id)77continue;7879/*80* At this point, we have narrowed down an instruction81* that writes to the same array.. check if it the write82* is to an array element that we care about:83*/8485/* is write to an unknown array element? */86if (dst->flags & IR3_REG_RELATIV)87return true;8889/* is read from an unknown array element? */90if (offset < 0)91return true;9293/* is write to same array element? */94if (dst->array.offset == offset)95return true;9697if (last_write)98*def = dst;99100last_write = false;101}102103return false;104}105106/* Can we fold the mov src into use without invalid flags? */107static bool108valid_flags(struct ir3_instruction *use, struct ir3_instruction *mov)109{110struct ir3_register *src = mov->srcs[0];111112foreach_src_n (reg, n, use) {113if (ssa(reg) != mov)114continue;115116if (!ir3_valid_flags(use, n, reg->flags | src->flags))117return false;118}119120return true;121}122123static bool124instr_cp_postsched(struct ir3_instruction *mov)125{126struct ir3_register *src = mov->srcs[0];127128/* only consider mov's from "arrays", other cases we have129* already considered already:130*/131if (!(src->flags & IR3_REG_ARRAY))132return false;133134int offset = (src->flags & IR3_REG_RELATIV) ? -1 : src->array.offset;135136/* Once we move the array read directly into the consuming137* instruction(s), we will also need to update instructions138* that had a false-dep on the original mov to have deps139* on the consuming instructions:140*/141struct util_dynarray newdeps;142util_dynarray_init(&newdeps, mov->uses);143144foreach_ssa_use (use, mov) {145if (use->block != mov->block)146continue;147148if (is_meta(use))149continue;150151struct ir3_register *def = src->def;152if (has_conflicting_write(mov, use, &def, src->array.id, offset))153continue;154155if (conflicts(mov->address, use->address))156continue;157158if (!valid_flags(use, mov))159continue;160161/* Ok, we've established that it is safe to remove this copy: */162163bool removed = false;164foreach_src_n (reg, n, use) {165if (ssa(reg) != mov)166continue;167168use->srcs[n] = ir3_reg_clone(mov->block->shader, src);169170/* preserve (abs)/etc modifiers: */171use->srcs[n]->flags |= reg->flags;172173/* If we're sinking the array read past any writes, make174* sure to update it to point to the new previous write:175*/176use->srcs[n]->def = def;177178removed = true;179}180181/* the use could have been only a false-dep, only add to the newdeps182* array and update the address if we've actually updated a real src183* reg for the use:184*/185if (removed) {186if (src->flags & IR3_REG_RELATIV)187ir3_instr_set_address(use, mov->address->def->instr);188189util_dynarray_append(&newdeps, struct ir3_instruction *, use);190191/* Remove the use from the src instruction: */192_mesa_set_remove_key(mov->uses, use);193}194}195196/* Once we have the complete set of instruction(s) that are are now197* directly reading from the array, update any false-dep uses to198* now depend on these instructions. The only remaining uses at199* this point should be false-deps:200*/201foreach_ssa_use (use, mov) {202util_dynarray_foreach (&newdeps, struct ir3_instruction *, instrp) {203struct ir3_instruction *newdep = *instrp;204ir3_instr_add_dep(use, newdep);205}206}207208return util_dynarray_num_elements(&newdeps, struct ir3_instruction **) > 0;209}210211bool212ir3_cp_postsched(struct ir3 *ir)213{214void *mem_ctx = ralloc_context(NULL);215bool progress = false;216217ir3_find_ssa_uses(ir, mem_ctx, false);218219foreach_block (block, &ir->block_list) {220foreach_instr_safe (instr, &block->instr_list) {221if (is_same_type_mov(instr))222progress |= instr_cp_postsched(instr);223}224}225226ralloc_free(mem_ctx);227228return progress;229}230231232