Path: blob/21.2-virgl/src/freedreno/ir3/ir3_cse.c
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/*1* Copyright (C) 2014 Valve Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*/2223#include "ir3.h"2425#define XXH_INLINE_ALL26#include "xxhash.h"2728/* This pass handles CSE'ing repeated expressions created in the process of29* translating from NIR. Currently this is just collect's. Also, currently30* this is intra-block only, to make it work over multiple block we'd need to31* bring forward dominance calculation.32*/3334#define HASH(hash, data) XXH32(&(data), sizeof(data), hash)3536static uint32_t37hash_instr(const void *data)38{39const struct ir3_instruction *instr = data;40uint32_t hash = 0;4142hash = HASH(hash, instr->opc);43hash = HASH(hash, instr->dsts[0]->flags);44foreach_src (src, (struct ir3_instruction *)instr) {45if (src->flags & IR3_REG_CONST)46hash = HASH(hash, src->num);47else if (src->flags & IR3_REG_IMMED)48hash = HASH(hash, src->uim_val);49else50hash = HASH(hash, src->def);51}5253return hash;54}5556static bool57instrs_equal(const struct ir3_instruction *i1, const struct ir3_instruction *i2)58{59if (i1->opc != i2->opc)60return false;6162if (i1->dsts_count != i2->dsts_count)63return false;6465if (i1->srcs_count != i2->srcs_count)66return false;6768if (i1->dsts[0]->flags != i2->dsts[0]->flags)69return false;7071for (unsigned i = 0; i < i1->srcs_count; i++) {72const struct ir3_register *i1_reg = i1->srcs[i], *i2_reg = i2->srcs[i];7374if (i1_reg->flags != i2_reg->flags)75return false;7677if (i1_reg->flags & IR3_REG_CONST) {78if (i1_reg->num != i2_reg->num)79return false;80} else if (i1_reg->flags & IR3_REG_IMMED) {81if (i1_reg->uim_val != i2_reg->uim_val)82return false;83} else {84if (i1_reg->def != i2_reg->def)85return false;86}87}8889return true;90}9192static bool93instr_can_cse(const struct ir3_instruction *instr)94{95if (instr->opc != OPC_META_COLLECT)96return false;9798return true;99}100101static bool102cmp_func(const void *data1, const void *data2)103{104return instrs_equal(data1, data2);105}106107bool108ir3_cse(struct ir3 *ir)109{110struct set *instr_set = _mesa_set_create(NULL, hash_instr, cmp_func);111foreach_block (block, &ir->block_list) {112_mesa_set_clear(instr_set, NULL);113114foreach_instr (instr, &block->instr_list) {115instr->data = NULL;116117if (!instr_can_cse(instr))118continue;119120bool found;121struct set_entry *entry =122_mesa_set_search_or_add(instr_set, instr, &found);123if (found)124instr->data = (void *)entry->key;125}126}127128bool progress = false;129foreach_block (block, &ir->block_list) {130foreach_instr (instr, &block->instr_list) {131foreach_src (src, instr) {132if ((src->flags & IR3_REG_SSA) && src->def &&133src->def->instr->data) {134progress = true;135struct ir3_instruction *instr = src->def->instr->data;136src->def = instr->dsts[0];137}138}139}140}141142_mesa_set_destroy(instr_set, NULL);143return progress;144}145146147