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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/freedreno/ir3/ir3_image.c
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/*
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* Copyright (C) 2017-2018 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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#include "ir3_image.h"
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/*
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* SSBO/Image to/from IBO/tex hw mapping table:
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*/
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void
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ir3_ibo_mapping_init(struct ir3_ibo_mapping *mapping, unsigned num_textures)
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{
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memset(mapping, IBO_INVALID, sizeof(*mapping));
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mapping->num_tex = 0;
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mapping->tex_base = num_textures;
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}
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struct ir3_instruction *
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ir3_ssbo_to_ibo(struct ir3_context *ctx, nir_src src)
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{
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if (ir3_bindless_resource(src)) {
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ctx->so->bindless_ibo = true;
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return ir3_get_src(ctx, &src)[0];
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} else {
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/* can this be non-const buffer_index? how do we handle that? */
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int ssbo_idx = nir_src_as_uint(src);
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return create_immed(ctx->block, ssbo_idx);
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}
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}
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unsigned
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ir3_ssbo_to_tex(struct ir3_ibo_mapping *mapping, unsigned ssbo)
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{
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if (mapping->ssbo_to_tex[ssbo] == IBO_INVALID) {
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unsigned tex = mapping->num_tex++;
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mapping->ssbo_to_tex[ssbo] = tex;
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mapping->tex_to_image[tex] = IBO_SSBO | ssbo;
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}
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return mapping->ssbo_to_tex[ssbo] + mapping->tex_base;
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}
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struct ir3_instruction *
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ir3_image_to_ibo(struct ir3_context *ctx, nir_src src)
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{
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if (ir3_bindless_resource(src)) {
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ctx->so->bindless_ibo = true;
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return ir3_get_src(ctx, &src)[0];
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} else {
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/* can this be non-const buffer_index? how do we handle that? */
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int image_idx = nir_src_as_uint(src);
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return create_immed(ctx->block, ctx->s->info.num_ssbos + image_idx);
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}
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}
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unsigned
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ir3_image_to_tex(struct ir3_ibo_mapping *mapping, unsigned image)
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{
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if (mapping->image_to_tex[image] == IBO_INVALID) {
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unsigned tex = mapping->num_tex++;
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mapping->image_to_tex[image] = tex;
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mapping->tex_to_image[tex] = image;
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}
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return mapping->image_to_tex[image] + mapping->tex_base;
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}
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/* see tex_info() for equiv logic for texture instructions.. it would be
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* nice if this could be better unified..
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*/
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unsigned
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ir3_get_image_coords(const nir_intrinsic_instr *instr, unsigned *flagsp)
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{
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unsigned coords = nir_image_intrinsic_coord_components(instr);
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unsigned flags = 0;
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if (coords == 3)
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flags |= IR3_INSTR_3D;
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if (nir_intrinsic_image_array(instr))
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flags |= IR3_INSTR_A;
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if (flagsp)
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*flagsp = flags;
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return coords;
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}
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type_t
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ir3_get_type_for_image_intrinsic(const nir_intrinsic_instr *instr)
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{
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const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
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int bit_size = info->has_dest ? nir_dest_bit_size(instr->dest) : 32;
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nir_alu_type type = nir_type_uint;
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switch (instr->intrinsic) {
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case nir_intrinsic_image_load:
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case nir_intrinsic_bindless_image_load:
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type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(instr));
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/* SpvOpAtomicLoad doesn't have dest type */
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if (type == nir_type_invalid)
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type = nir_type_uint;
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break;
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case nir_intrinsic_image_store:
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case nir_intrinsic_bindless_image_store:
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type = nir_alu_type_get_base_type(nir_intrinsic_src_type(instr));
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/* SpvOpAtomicStore doesn't have src type */
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if (type == nir_type_invalid)
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type = nir_type_uint;
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break;
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case nir_intrinsic_image_atomic_add:
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case nir_intrinsic_bindless_image_atomic_add:
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case nir_intrinsic_image_atomic_umin:
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case nir_intrinsic_bindless_image_atomic_umin:
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case nir_intrinsic_image_atomic_umax:
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case nir_intrinsic_bindless_image_atomic_umax:
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case nir_intrinsic_image_atomic_and:
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case nir_intrinsic_bindless_image_atomic_and:
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case nir_intrinsic_image_atomic_or:
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case nir_intrinsic_bindless_image_atomic_or:
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case nir_intrinsic_image_atomic_xor:
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case nir_intrinsic_bindless_image_atomic_xor:
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case nir_intrinsic_image_atomic_exchange:
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case nir_intrinsic_bindless_image_atomic_exchange:
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case nir_intrinsic_image_atomic_comp_swap:
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case nir_intrinsic_bindless_image_atomic_comp_swap:
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case nir_intrinsic_image_atomic_inc_wrap:
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case nir_intrinsic_bindless_image_atomic_inc_wrap:
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type = nir_type_uint;
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break;
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case nir_intrinsic_image_atomic_imin:
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case nir_intrinsic_bindless_image_atomic_imin:
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case nir_intrinsic_image_atomic_imax:
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case nir_intrinsic_bindless_image_atomic_imax:
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type = nir_type_int;
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break;
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default:
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unreachable("Unhandled NIR image intrinsic");
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}
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switch (type) {
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case nir_type_uint:
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return bit_size == 16 ? TYPE_U16 : TYPE_U32;
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case nir_type_int:
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return bit_size == 16 ? TYPE_S16 : TYPE_S32;
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case nir_type_float:
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return bit_size == 16 ? TYPE_F16 : TYPE_F32;
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default:
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unreachable("bad type");
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}
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}
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/* Returns the number of components for the different image formats
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* supported by the GLES 3.1 spec, plus those added by the
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* GL_NV_image_formats extension.
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*/
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unsigned
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ir3_get_num_components_for_image_format(enum pipe_format format)
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{
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if (format == PIPE_FORMAT_NONE)
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return 4;
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else
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return util_format_get_nr_components(format);
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}
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