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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/freedreno/ir3/ir3_print.c
4565 views
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/*
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* Copyright (C) 2014 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include "util/log.h"
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#include "ir3.h"
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#define PTRID(x) ((unsigned long)(x))
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35
/* ansi escape sequences: */
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#define RESET "\x1b[0m"
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#define RED "\x1b[0;31m"
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#define GREEN "\x1b[0;32m"
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#define BLUE "\x1b[0;34m"
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#define MAGENTA "\x1b[0;35m"
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/* syntax coloring, mostly to make it easier to see different sorts of
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* srcs (immediate, constant, ssa, array, ...)
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*/
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#define SYN_REG(x) RED x RESET
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#define SYN_IMMED(x) GREEN x RESET
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#define SYN_CONST(x) GREEN x RESET
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#define SYN_SSA(x) BLUE x RESET
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#define SYN_ARRAY(x) MAGENTA x RESET
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static const char *
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type_name(type_t type)
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{
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static const char *type_names[] = {
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/* clang-format off */
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[TYPE_F16] = "f16",
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[TYPE_F32] = "f32",
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[TYPE_U16] = "u16",
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[TYPE_U32] = "u32",
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[TYPE_S16] = "s16",
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[TYPE_S32] = "s32",
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[TYPE_U8] = "u8",
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[TYPE_S8] = "s8",
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/* clang-format on */
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};
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return type_names[type];
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}
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static void
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print_instr_name(struct log_stream *stream, struct ir3_instruction *instr,
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bool flags)
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{
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if (!instr)
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return;
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#ifdef DEBUG
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mesa_log_stream_printf(stream, "%04u:", instr->serialno);
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#endif
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mesa_log_stream_printf(stream, "%04u:", instr->name);
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mesa_log_stream_printf(stream, "%04u:", instr->ip);
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if (instr->flags & IR3_INSTR_UNUSED) {
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mesa_log_stream_printf(stream, "XXX: ");
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} else {
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mesa_log_stream_printf(stream, "%03u: ", instr->use_count);
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}
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if (flags) {
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mesa_log_stream_printf(stream, "\t");
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if (instr->flags & IR3_INSTR_SY)
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mesa_log_stream_printf(stream, "(sy)");
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if (instr->flags & IR3_INSTR_SS)
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mesa_log_stream_printf(stream, "(ss)");
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if (instr->flags & IR3_INSTR_JP)
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mesa_log_stream_printf(stream, "(jp)");
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if (instr->repeat)
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mesa_log_stream_printf(stream, "(rpt%d)", instr->repeat);
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if (instr->nop)
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mesa_log_stream_printf(stream, "(nop%d)", instr->nop);
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if (instr->flags & IR3_INSTR_UL)
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mesa_log_stream_printf(stream, "(ul)");
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} else {
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mesa_log_stream_printf(stream, " ");
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}
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if (is_meta(instr)) {
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switch (instr->opc) {
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case OPC_META_INPUT:
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mesa_log_stream_printf(stream, "_meta:in");
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break;
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case OPC_META_SPLIT:
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mesa_log_stream_printf(stream, "_meta:split");
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break;
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case OPC_META_COLLECT:
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mesa_log_stream_printf(stream, "_meta:collect");
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break;
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case OPC_META_TEX_PREFETCH:
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mesa_log_stream_printf(stream, "_meta:tex_prefetch");
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break;
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case OPC_META_PARALLEL_COPY:
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mesa_log_stream_printf(stream, "_meta:parallel_copy");
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break;
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case OPC_META_PHI:
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mesa_log_stream_printf(stream, "_meta:phi");
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break;
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/* shouldn't hit here.. just for debugging: */
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default:
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mesa_log_stream_printf(stream, "_meta:%d", instr->opc);
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break;
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}
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} else if (opc_cat(instr->opc) == 1) {
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if (instr->opc == OPC_MOV) {
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if (instr->cat1.src_type == instr->cat1.dst_type)
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mesa_log_stream_printf(stream, "mov");
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else
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mesa_log_stream_printf(stream, "cov");
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} else {
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mesa_log_stream_printf(stream, "%s",
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disasm_a3xx_instr_name(instr->opc));
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}
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if (instr->opc != OPC_MOVMSK) {
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mesa_log_stream_printf(stream, ".%s%s",
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type_name(instr->cat1.src_type),
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type_name(instr->cat1.dst_type));
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}
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} else if (instr->opc == OPC_B) {
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const char *name[8] = {
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/* clang-format off */
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[BRANCH_PLAIN] = "br",
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[BRANCH_OR] = "brao",
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[BRANCH_AND] = "braa",
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[BRANCH_CONST] = "brac",
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[BRANCH_ANY] = "bany",
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[BRANCH_ALL] = "ball",
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[BRANCH_X] = "brax",
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/* clang-format on */
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};
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mesa_log_stream_printf(stream, "%s", name[instr->cat0.brtype]);
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} else {
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mesa_log_stream_printf(stream, "%s", disasm_a3xx_instr_name(instr->opc));
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if (instr->flags & IR3_INSTR_3D)
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mesa_log_stream_printf(stream, ".3d");
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if (instr->flags & IR3_INSTR_A)
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mesa_log_stream_printf(stream, ".a");
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if (instr->flags & IR3_INSTR_O)
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mesa_log_stream_printf(stream, ".o");
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if (instr->flags & IR3_INSTR_P)
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mesa_log_stream_printf(stream, ".p");
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if (instr->flags & IR3_INSTR_S)
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mesa_log_stream_printf(stream, ".s");
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if (instr->flags & IR3_INSTR_A1EN)
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mesa_log_stream_printf(stream, ".a1en");
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if (instr->opc == OPC_LDC)
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mesa_log_stream_printf(stream, ".offset%d", instr->cat6.d);
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if (instr->flags & IR3_INSTR_B) {
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mesa_log_stream_printf(
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stream, ".base%d",
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is_tex(instr) ? instr->cat5.tex_base : instr->cat6.base);
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}
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if (instr->flags & IR3_INSTR_S2EN)
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mesa_log_stream_printf(stream, ".s2en");
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static const char *cond[0x7] = {
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"lt", "le", "gt", "ge", "eq", "ne",
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};
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187
switch (instr->opc) {
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case OPC_CMPS_F:
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case OPC_CMPS_U:
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case OPC_CMPS_S:
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case OPC_CMPV_F:
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case OPC_CMPV_U:
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case OPC_CMPV_S:
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mesa_log_stream_printf(stream, ".%s",
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cond[instr->cat2.condition & 0x7]);
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break;
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default:
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break;
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}
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}
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}
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static void
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print_ssa_def_name(struct log_stream *stream, struct ir3_register *reg)
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{
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mesa_log_stream_printf(stream, SYN_SSA("ssa_%u"), reg->instr->serialno);
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if (reg->name != 0)
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mesa_log_stream_printf(stream, ":%u", reg->name);
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}
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static void
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print_ssa_name(struct log_stream *stream, struct ir3_register *reg, bool dst)
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{
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if (!dst) {
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if (!reg->def)
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mesa_log_stream_printf(stream, SYN_SSA("undef"));
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else
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print_ssa_def_name(stream, reg->def);
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} else {
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print_ssa_def_name(stream, reg);
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}
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if (reg->num != INVALID_REG && !(reg->flags & IR3_REG_ARRAY))
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mesa_log_stream_printf(stream, "(" SYN_REG("r%u.%c") ")", reg_num(reg),
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"xyzw"[reg_comp(reg)]);
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}
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static void
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print_reg_name(struct log_stream *stream, struct ir3_instruction *instr,
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struct ir3_register *reg, bool dest)
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{
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if ((reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) &&
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(reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)))
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mesa_log_stream_printf(stream, "(absneg)");
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else if (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT))
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mesa_log_stream_printf(stream, "(neg)");
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else if (reg->flags & (IR3_REG_FABS | IR3_REG_SABS))
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mesa_log_stream_printf(stream, "(abs)");
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if (reg->flags & IR3_REG_FIRST_KILL)
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mesa_log_stream_printf(stream, "(kill)");
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if (reg->flags & IR3_REG_UNUSED)
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mesa_log_stream_printf(stream, "(unused)");
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if (reg->flags & IR3_REG_R)
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mesa_log_stream_printf(stream, "(r)");
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/* Right now all instructions that use tied registers only have one
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* destination register, so we can just print (tied) as if it's a flag,
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* although it's more convenient for RA if it's a pointer.
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*/
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if (reg->tied)
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printf("(tied)");
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if (reg->flags & IR3_REG_SHARED)
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mesa_log_stream_printf(stream, "s");
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if (reg->flags & IR3_REG_HALF)
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mesa_log_stream_printf(stream, "h");
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if (reg->flags & IR3_REG_IMMED) {
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mesa_log_stream_printf(stream, SYN_IMMED("imm[%f,%d,0x%x]"), reg->fim_val,
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reg->iim_val, reg->iim_val);
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} else if (reg->flags & IR3_REG_ARRAY) {
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if (reg->flags & IR3_REG_SSA) {
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print_ssa_name(stream, reg, dest);
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mesa_log_stream_printf(stream, ":");
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}
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mesa_log_stream_printf(stream,
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SYN_ARRAY("arr[id=%u, offset=%d, size=%u]"),
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reg->array.id, reg->array.offset, reg->size);
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if (reg->array.base != INVALID_REG)
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mesa_log_stream_printf(stream, "(" SYN_REG("r%u.%c") ")",
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reg->array.base >> 2,
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"xyzw"[reg->array.base & 0x3]);
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} else if (reg->flags & IR3_REG_SSA) {
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print_ssa_name(stream, reg, dest);
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} else if (reg->flags & IR3_REG_RELATIV) {
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if (reg->flags & IR3_REG_CONST)
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mesa_log_stream_printf(stream, SYN_CONST("c<a0.x + %d>"),
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reg->array.offset);
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else
282
mesa_log_stream_printf(stream, SYN_REG("r<a0.x + %d>") " (%u)",
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reg->array.offset, reg->size);
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} else {
285
if (reg->flags & IR3_REG_CONST)
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mesa_log_stream_printf(stream, SYN_CONST("c%u.%c"), reg_num(reg),
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"xyzw"[reg_comp(reg)]);
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else
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mesa_log_stream_printf(stream, SYN_REG("r%u.%c"), reg_num(reg),
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"xyzw"[reg_comp(reg)]);
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}
292
293
if (reg->wrmask > 0x1)
294
mesa_log_stream_printf(stream, " (wrmask=0x%x)", reg->wrmask);
295
}
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297
static void
298
tab(struct log_stream *stream, int lvl)
299
{
300
for (int i = 0; i < lvl; i++)
301
mesa_log_stream_printf(stream, "\t");
302
}
303
304
static void
305
print_instr(struct log_stream *stream, struct ir3_instruction *instr, int lvl)
306
{
307
tab(stream, lvl);
308
309
print_instr_name(stream, instr, true);
310
311
if (is_tex(instr)) {
312
mesa_log_stream_printf(stream, " (%s)(", type_name(instr->cat5.type));
313
for (unsigned i = 0; i < 4; i++)
314
if (instr->dsts[0]->wrmask & (1 << i))
315
mesa_log_stream_printf(stream, "%c", "xyzw"[i]);
316
mesa_log_stream_printf(stream, ")");
317
} else if ((instr->srcs_count > 0 || instr->dsts_count > 0) &&
318
(instr->opc != OPC_B)) {
319
/* NOTE the b(ranch) instruction has a suffix, which is
320
* handled below
321
*/
322
mesa_log_stream_printf(stream, " ");
323
}
324
325
if (!is_flow(instr) || instr->opc == OPC_END || instr->opc == OPC_CHMASK) {
326
bool first = true;
327
foreach_dst (reg, instr) {
328
if (reg->wrmask == 0)
329
continue;
330
if (!first)
331
mesa_log_stream_printf(stream, ", ");
332
print_reg_name(stream, instr, reg, true);
333
first = false;
334
}
335
foreach_src (reg, instr) {
336
if (!first)
337
mesa_log_stream_printf(stream, ", ");
338
print_reg_name(stream, instr, reg, false);
339
first = false;
340
}
341
}
342
343
if (is_tex(instr) && !(instr->flags & IR3_INSTR_S2EN)) {
344
if (!!(instr->flags & IR3_INSTR_B)) {
345
if (!!(instr->flags & IR3_INSTR_A1EN)) {
346
mesa_log_stream_printf(stream, ", s#%d", instr->cat5.samp);
347
} else {
348
mesa_log_stream_printf(stream, ", s#%d, t#%d",
349
instr->cat5.samp & 0xf,
350
instr->cat5.samp >> 4);
351
}
352
} else {
353
mesa_log_stream_printf(stream, ", s#%d, t#%d", instr->cat5.samp,
354
instr->cat5.tex);
355
}
356
}
357
358
if (instr->opc == OPC_META_SPLIT) {
359
mesa_log_stream_printf(stream, ", off=%d", instr->split.off);
360
} else if (instr->opc == OPC_META_TEX_PREFETCH) {
361
mesa_log_stream_printf(stream, ", tex=%d, samp=%d, input_offset=%d",
362
instr->prefetch.tex, instr->prefetch.samp,
363
instr->prefetch.input_offset);
364
}
365
366
if (is_flow(instr) && instr->cat0.target) {
367
/* the predicate register src is implied: */
368
if (instr->opc == OPC_B) {
369
static const struct {
370
const char *suffix;
371
int nsrc;
372
bool idx;
373
} brinfo[7] = {
374
/* clang-format off */
375
[BRANCH_PLAIN] = {"r", 1, false},
376
[BRANCH_OR] = {"rao", 2, false},
377
[BRANCH_AND] = {"raa", 2, false},
378
[BRANCH_CONST] = {"rac", 0, true},
379
[BRANCH_ANY] = {"any", 1, false},
380
[BRANCH_ALL] = {"all", 1, false},
381
[BRANCH_X] = {"rax", 0, false},
382
/* clang-format on */
383
};
384
385
mesa_log_stream_printf(stream, "%s",
386
brinfo[instr->cat0.brtype].suffix);
387
if (brinfo[instr->cat0.brtype].idx) {
388
mesa_log_stream_printf(stream, ".%u", instr->cat0.idx);
389
}
390
if (brinfo[instr->cat0.brtype].nsrc >= 1) {
391
mesa_log_stream_printf(stream, " %sp0.%c (",
392
instr->cat0.inv1 ? "!" : "",
393
"xyzw"[instr->cat0.comp1 & 0x3]);
394
print_reg_name(stream, instr, instr->srcs[0], false);
395
mesa_log_stream_printf(stream, "), ");
396
}
397
if (brinfo[instr->cat0.brtype].nsrc >= 2) {
398
mesa_log_stream_printf(stream, " %sp0.%c (",
399
instr->cat0.inv2 ? "!" : "",
400
"xyzw"[instr->cat0.comp2 & 0x3]);
401
print_reg_name(stream, instr, instr->srcs[1], false);
402
mesa_log_stream_printf(stream, "), ");
403
}
404
}
405
mesa_log_stream_printf(stream, " target=block%u",
406
block_id(instr->cat0.target));
407
}
408
409
if (instr->deps_count) {
410
mesa_log_stream_printf(stream, ", false-deps:");
411
unsigned n = 0;
412
for (unsigned i = 0; i < instr->deps_count; i++) {
413
if (!instr->deps[i])
414
continue;
415
if (n++ > 0)
416
mesa_log_stream_printf(stream, ", ");
417
mesa_log_stream_printf(stream, SYN_SSA("ssa_%u"),
418
instr->deps[i]->serialno);
419
}
420
}
421
422
mesa_log_stream_printf(stream, "\n");
423
}
424
425
void
426
ir3_print_instr(struct ir3_instruction *instr)
427
{
428
struct log_stream *stream = mesa_log_streami();
429
print_instr(stream, instr, 0);
430
mesa_log_stream_destroy(stream);
431
}
432
433
static void
434
print_block(struct ir3_block *block, int lvl)
435
{
436
struct log_stream *stream = mesa_log_streami();
437
438
tab(stream, lvl);
439
mesa_log_stream_printf(stream, "block%u {\n", block_id(block));
440
441
if (block->predecessors_count > 0) {
442
tab(stream, lvl + 1);
443
mesa_log_stream_printf(stream, "pred: ");
444
for (unsigned i = 0; i < block->predecessors_count; i++) {
445
struct ir3_block *pred = block->predecessors[i];
446
if (i != 0)
447
mesa_log_stream_printf(stream, ", ");
448
mesa_log_stream_printf(stream, "block%u", block_id(pred));
449
}
450
mesa_log_stream_printf(stream, "\n");
451
}
452
453
foreach_instr (instr, &block->instr_list) {
454
print_instr(stream, instr, lvl + 1);
455
}
456
457
tab(stream, lvl + 1);
458
mesa_log_stream_printf(stream, "/* keeps:\n");
459
for (unsigned i = 0; i < block->keeps_count; i++) {
460
print_instr(stream, block->keeps[i], lvl + 2);
461
}
462
tab(stream, lvl + 1);
463
mesa_log_stream_printf(stream, " */\n");
464
465
if (block->successors[1]) {
466
/* leading into if/else: */
467
tab(stream, lvl + 1);
468
mesa_log_stream_printf(stream, "/* succs: if ");
469
switch (block->brtype) {
470
case IR3_BRANCH_COND:
471
break;
472
case IR3_BRANCH_ANY:
473
printf("any ");
474
break;
475
case IR3_BRANCH_ALL:
476
printf("all ");
477
break;
478
case IR3_BRANCH_GETONE:
479
printf("getone ");
480
break;
481
}
482
if (block->condition)
483
mesa_log_stream_printf(stream, SYN_SSA("ssa_%u") " ",
484
block->condition->serialno);
485
mesa_log_stream_printf(stream, "block%u; else block%u; */\n",
486
block_id(block->successors[0]),
487
block_id(block->successors[1]));
488
} else if (block->successors[0]) {
489
tab(stream, lvl + 1);
490
mesa_log_stream_printf(stream, "/* succs: block%u; */\n",
491
block_id(block->successors[0]));
492
}
493
tab(stream, lvl);
494
mesa_log_stream_printf(stream, "}\n");
495
}
496
497
void
498
ir3_print(struct ir3 *ir)
499
{
500
foreach_block (block, &ir->block_list)
501
print_block(block, 0);
502
}
503
504