Path: blob/21.2-virgl/src/freedreno/isa/ir3-cat2.xml
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<?xml version="1.0" encoding="UTF-8"?>1<!--2Copyright © 2020 Google, Inc.34Permission is hereby granted, free of charge, to any person obtaining a5copy of this software and associated documentation files (the "Software"),6to deal in the Software without restriction, including without limitation7the rights to use, copy, modify, merge, publish, distribute, sublicense,8and/or sell copies of the Software, and to permit persons to whom the9Software is furnished to do so, subject to the following conditions:1011The above copyright notice and this permission notice (including the next12paragraph) shall be included in all copies or substantial portions of the13Software.1415THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,20OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21SOFTWARE.22-->2324<isa>2526<!--27Cat2 Instructions: one and two src ALU instructions28-->2930<bitset name="#instruction-cat2" extends="#instruction">31<field name="DST" low="32" high="39" type="#reg-gpr"/>32<field name="REPEAT" low="40" high="41" type="#rptN"/>33<field name="SAT" pos="42" type="bool" display="(sat)"/>34<field name="SS" pos="44" type="bool" display="(ss)"/>35<field name="UL" pos="45" type="bool" display="(ul)"/>36<field name="DST_CONV" pos="46" type="bool">37<doc>38Destination register is opposite precision as source, ie.39if {FULL} is true then destination is half precision, and40visa versa.41</doc>42</field>43<derived name="DST_HALF" expr="#dest-half" type="bool" display="h"/>44<field name="EI" pos="47" type="bool" display="(ei)"/>45<field name="FULL" pos="52" type="bool">46<doc>Full precision source registers</doc>47</field>48<field name="JP" pos="59" type="bool" display="(jp)"/>49<field name="SY" pos="60" type="bool" display="(sy)"/>50<pattern low="61" high="63">010</pattern> <!-- cat2 -->51<!--52NOTE, both SRC1_R and SRC2_R are defined at this level because53SRC2_R is still a valid bit for (nopN) (REPEAT==0) for cat254instructions with only a single src55-->56<field name="SRC1_R" pos="43" type="bool" display="(r)"/>57<field name="SRC2_R" pos="51" type="bool" display="(r)"/>58<derived name="ZERO" expr="#zero" type="bool" display=""/>59<encode>60<map name="SAT">!!(src->flags & IR3_INSTR_SAT)</map>61<map name="DST_CONV">62((src->dsts[0]->num >> 2) == 62) ? 0 :63!!((src->srcs[0]->flags ^ src->dsts[0]->flags) & IR3_REG_HALF)64</map>65<map name="EI">!!(src->dsts[0]->flags & IR3_REG_EI)</map>66<map name="FULL">!(src->srcs[0]->flags & IR3_REG_HALF)</map>67<map name="SRC1_R">extract_SRC1_R(src)</map>68<map name="SRC2_R">extract_SRC2_R(src)</map>69</encode>70</bitset>7172<bitset name="#instruction-cat2-1src" extends="#instruction-cat2">73<override expr="#cat2-cat3-nop-encoding">74<display>75{SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}76</display>77<derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/>78<field name="SRC1" low="0" high="15" type="#multisrc">79<param name="ZERO" as="SRC_R"/>80<param name="FULL"/>81</field>82</override>83<display>84{SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}85</display>86<pattern low="16" high="31">xxxxxxxxxxxxxxxx</pattern>87<pattern low="48" high="50">xxx</pattern> <!-- COND -->88<field name="SRC1" low="0" high="15" type="#multisrc">89<param name="SRC1_R" as="SRC_R"/>90<param name="FULL"/>91</field>92</bitset>9394<!-- TODO rest of cat2-1src -->9596<bitset name="#instruction-cat2-2src" extends="#instruction-cat2">97<override expr="#cat2-cat3-nop-encoding">98<display>99{SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2}100</display>101<derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/>102<field name="SRC1" low="0" high="15" type="#multisrc">103<param name="ZERO" as="SRC_R"/>104<param name="FULL"/>105</field>106<field name="SRC2" low="16" high="31" type="#multisrc">107<param name="ZERO" as="SRC_R"/>108<param name="FULL"/>109</field>110</override>111<display>112{SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2}113</display>114<field name="SRC1" low="0" high="15" type="#multisrc">115<param name="SRC1_R" as="SRC_R"/>116<param name="FULL"/>117</field>118<field name="SRC2" low="16" high="31" type="#multisrc">119<param name="SRC2_R" as="SRC_R"/>120<param name="FULL"/>121</field>122<pattern low="48" high="50">xxx</pattern> <!-- COND -->123</bitset>124125<!-- The cmp*.* instructions additionally have a condition code: -->126<bitset name="#instruction-cat2-2src-cond" extends="#instruction-cat2">127<override expr="#cat2-cat3-nop-encoding">128<display>129{SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME}.{COND} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2}130</display>131<derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/>132<field name="SRC1" low="0" high="15" type="#multisrc">133<param name="ZERO" as="SRC_R"/>134<param name="FULL"/>135</field>136<field name="SRC2" low="16" high="31" type="#multisrc">137<param name="ZERO" as="SRC_R"/>138<param name="FULL"/>139</field>140</override>141<display>142{SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME}.{COND} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2}143</display>144<field name="SRC1" low="0" high="15" type="#multisrc">145<param name="SRC1_R" as="SRC_R"/>146<param name="FULL"/>147</field>148<field name="SRC2" low="16" high="31" type="#multisrc">149<param name="SRC2_R" as="SRC_R"/>150<param name="FULL"/>151</field>152<field name="COND" low="48" high="50" type="#cond"/>153<encode>154<map name="COND">src->cat2.condition</map>155</encode>156</bitset>157158159<bitset name="add.f" extends="#instruction-cat2-2src">160<pattern low="53" high="58">000000</pattern>161</bitset>162163<bitset name="min.f" extends="#instruction-cat2-2src">164<pattern low="53" high="58">000001</pattern>165</bitset>166167<bitset name="max.f" extends="#instruction-cat2-2src">168<pattern low="53" high="58">000010</pattern>169</bitset>170171<bitset name="mul.f" extends="#instruction-cat2-2src">172<pattern low="53" high="58">000011</pattern>173</bitset>174175<bitset name="sign.f" extends="#instruction-cat2-1src">176<pattern low="53" high="58">000100</pattern>177</bitset>178179<bitset name="cmps.f" extends="#instruction-cat2-2src-cond">180<pattern low="53" high="58">000101</pattern>181</bitset>182183<bitset name="absneg.f" extends="#instruction-cat2-1src">184<pattern low="53" high="58">000110</pattern>185</bitset>186187<bitset name="cmpv.f" extends="#instruction-cat2-2src-cond">188<pattern low="53" high="58">000111</pattern>189</bitset>190191<bitset name="floor.f" extends="#instruction-cat2-1src">192<pattern low="53" high="58">001001</pattern>193</bitset>194195<bitset name="ceil.f" extends="#instruction-cat2-1src">196<pattern low="53" high="58">001010</pattern>197</bitset>198199<bitset name="rndne.f" extends="#instruction-cat2-1src">200<pattern low="53" high="58">001011</pattern>201</bitset>202203<bitset name="rndaz.f" extends="#instruction-cat2-1src">204<pattern low="53" high="58">001100</pattern>205</bitset>206207<bitset name="trunc.f" extends="#instruction-cat2-1src">208<pattern low="53" high="58">001101</pattern>209</bitset>210211<bitset name="add.u" extends="#instruction-cat2-2src">212<pattern low="53" high="58">010000</pattern>213</bitset>214215<bitset name="add.s" extends="#instruction-cat2-2src">216<pattern low="53" high="58">010001</pattern>217</bitset>218219<bitset name="sub.u" extends="#instruction-cat2-2src">220<pattern low="53" high="58">010010</pattern>221</bitset>222223<bitset name="sub.s" extends="#instruction-cat2-2src">224<pattern low="53" high="58">010011</pattern>225</bitset>226227<bitset name="cmps.u" extends="#instruction-cat2-2src-cond">228<pattern low="53" high="58">010100</pattern>229</bitset>230231<bitset name="cmps.s" extends="#instruction-cat2-2src-cond">232<pattern low="53" high="58">010101</pattern>233</bitset>234235<bitset name="min.u" extends="#instruction-cat2-2src">236<pattern low="53" high="58">010110</pattern>237</bitset>238239<bitset name="min.s" extends="#instruction-cat2-2src">240<pattern low="53" high="58">010111</pattern>241</bitset>242243<bitset name="max.u" extends="#instruction-cat2-2src">244<pattern low="53" high="58">011000</pattern>245</bitset>246247<bitset name="max.s" extends="#instruction-cat2-2src">248<pattern low="53" high="58">011001</pattern>249</bitset>250251<bitset name="absneg.s" extends="#instruction-cat2-1src">252<pattern low="53" high="58">011010</pattern>253</bitset>254255<bitset name="and.b" extends="#instruction-cat2-2src">256<pattern low="53" high="58">011100</pattern>257</bitset>258259<bitset name="or.b" extends="#instruction-cat2-2src">260<pattern low="53" high="58">011101</pattern>261</bitset>262263<bitset name="not.b" extends="#instruction-cat2-1src">264<pattern low="53" high="58">011110</pattern>265</bitset>266267<bitset name="xor.b" extends="#instruction-cat2-2src">268<pattern low="53" high="58">011111</pattern>269</bitset>270271<bitset name="cmpv.u" extends="#instruction-cat2-2src-cond">272<pattern low="53" high="58">100001</pattern>273</bitset>274275<bitset name="cmpv.s" extends="#instruction-cat2-2src-cond">276<pattern low="53" high="58">100010</pattern>277</bitset>278279<bitset name="mul.u24" extends="#instruction-cat2-2src">280<pattern low="53" high="58">110000</pattern>281</bitset>282283<bitset name="mul.s24" extends="#instruction-cat2-2src">284<pattern low="53" high="58">110001</pattern>285</bitset>286287<bitset name="mull.u" extends="#instruction-cat2-2src">288<pattern low="53" high="58">110010</pattern>289</bitset>290291<bitset name="bfrev.b" extends="#instruction-cat2-1src">292<pattern low="53" high="58">110011</pattern>293</bitset>294295<bitset name="clz.s" extends="#instruction-cat2-1src">296<pattern low="53" high="58">110100</pattern>297</bitset>298299<bitset name="clz.b" extends="#instruction-cat2-1src">300<pattern low="53" high="58">110101</pattern>301</bitset>302303<bitset name="shl.b" extends="#instruction-cat2-2src">304<pattern low="53" high="58">110110</pattern>305</bitset>306307<bitset name="shr.b" extends="#instruction-cat2-2src">308<pattern low="53" high="58">110111</pattern>309</bitset>310311<bitset name="ashr.b" extends="#instruction-cat2-2src">312<pattern low="53" high="58">111000</pattern>313</bitset>314315<bitset name="bary.f" extends="#instruction-cat2-2src">316<pattern low="53" high="58">111001</pattern>317</bitset>318319<bitset name="mgen.b" extends="#instruction-cat2-2src">320<pattern low="53" high="58">111010</pattern>321</bitset>322323<bitset name="getbit.b" extends="#instruction-cat2-2src">324<pattern low="53" high="58">111011</pattern>325</bitset>326327<bitset name="setrm" extends="#instruction-cat2-1src">328<pattern low="53" high="58">111100</pattern>329</bitset>330331<bitset name="cbits.b" extends="#instruction-cat2-1src">332<pattern low="53" high="58">111101</pattern>333</bitset>334335<bitset name="shb" extends="#instruction-cat2-2src">336<pattern low="53" high="58">111110</pattern>337</bitset>338339<bitset name="msad" extends="#instruction-cat2-2src">340<pattern low="53" high="58">111111</pattern>341</bitset>342343</isa>344345346