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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/freedreno/isa/ir3-cat6.xml
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<?xml version="1.0" encoding="UTF-8"?>
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<!--
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Copyright © 2020 Google, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the next
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paragraph) shall be included in all copies or substantial portions of the
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Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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-->
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<isa>
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<!--
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Cat6 Instructions: load/store/atomic instructions
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-->
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<bitset name="#instruction-cat6" extends="#instruction">
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<field pos="59" name="JP" type="bool" display="(jp)"/>
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<field pos="60" name="SY" type="bool" display="(sy)"/>
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<pattern low="61" high="63">110</pattern> <!-- cat6 -->
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<encode>
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<map name="TYPE">src->cat6.type</map>
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</encode>
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</bitset>
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<bitset name="#instruction-cat6-a3xx" extends="#instruction-cat6">
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<field name="TYPE" low="49" high="51" type="#type"/>
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<!-- TODO pull more fields up to this level, when they are common across sub-encodings -->
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</bitset>
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<bitset name="#instruction-cat6-ldg" extends="#instruction-cat6-a3xx">
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<pattern pos="0" >1</pattern>
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<field low="14" high="21" name="SRC1" type="#reg-gpr"/>
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<pattern pos="23" >1</pattern>
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<field low="24" high="31" name="SIZE" type="uint"/>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern low="40" high="48">xxxxxxxxx</pattern>
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<pattern low="52" high="53">00</pattern>
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<pattern low="54" high="58">00000</pattern> <!-- OPC -->
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</bitset>
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<bitset name="ldg" extends="#instruction-cat6-ldg">
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<doc>
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LoaD Global
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}{OFF}], {SIZE}
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</display>
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<field low="1" high="13" name="OFF" type="offset"/>
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<pattern pos="22" >0</pattern> <!-- Imm offset ldg form -->
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<encode>
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<map name="OFF">src->srcs[1]->iim_val</map>
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<map name="SIZE">src->srcs[2]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="ldg.a" extends="#instruction-cat6-ldg">
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<doc>
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LoaD Global
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</doc>
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<gen min="600"/>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}+({SRC2}{OFF})&lt;&lt;{SRC2_BYTE_SHIFT}], {SIZE}
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</display>
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<override>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}+{SRC2}&lt;&lt;{SRC2_BYTE_SHIFT}{OFF}&lt;&lt;2], {SIZE}
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</display>
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<expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr>
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</override>
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<field low="1" high="8" name="SRC2" type="#reg-gpr"/>
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<field low="9" high="10" name="OFF" type="uoffset"/>
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<assert pos="11" >0</assert>
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<field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/>
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<pattern pos="22" >1</pattern> <!-- Reg offset ldg form -->
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<derived name="SRC2_BYTE_SHIFT" width="3" type="uint">
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<expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr>
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</derived>
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<encode>
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<map name="SRC2">src->srcs[1]</map>
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<map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map>
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<map name="OFF">src->srcs[3]->uim_val</map>
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<map name="SIZE">src->srcs[4]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="#instruction-cat6-stg" extends="#instruction-cat6-a3xx">
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<pattern pos="0" >x</pattern>
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<field low="1" high="8" name="SRC3" type="#reg-gpr"/>
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<pattern low="14" high="21">xxxxxxxx</pattern>
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<pattern low="22" high="23">1x</pattern>
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<field low="24" high="31" name="SIZE" type="uint"/>
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<field pos="40" name="DST_OFF" type="bool"/>
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<field low="41" high="48" name="SRC1" type="#reg-gpr"/>
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<pattern pos="53" >x</pattern>
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<pattern low="54" high="58">00011</pattern> <!-- OPC -->
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<encode>
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<map name="DST_OFF" force="true">1</map>
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</encode>
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</bitset>
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<bitset name="stg" extends="#instruction-cat6-stg">
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<doc>
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STore Global
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} g[{SRC1}{OFF}], {SRC3}, {SIZE}
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</display>
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<derived name="OFF" width="13" type="offset">
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<expr>({OFF_HI} &lt;&lt; 8) | {OFF_LO}</expr>
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</derived>
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<field low="9" high="13" name="OFF_HI" type="uint"/>
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<field low="32" high="39" name="OFF_LO" type="uint"/>
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<pattern pos="52" >0</pattern> <!-- Imm offset stg form -->
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<encode>
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<map name="OFF_LO">src->srcs[1]->iim_val</map>
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<map name="OFF_HI">src->srcs[1]->iim_val >> 8</map>
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<map name="SRC3">src->srcs[2]</map>
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<map name="SIZE">src->srcs[3]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="stg.a" extends="#instruction-cat6-stg">
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<doc>
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STore Global
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</doc>
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<gen min="600"/>
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<display>
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{SY}{JP}{NAME}.{TYPE} g[{SRC1}+({SRC2}{OFF})&lt;&lt;{DST_BYTE_SHIFT}], {SRC3}, {SIZE}
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</display>
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<override>
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<display>
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{SY}{JP}{NAME}.{TYPE} g[{SRC1}+{SRC2}&lt;&lt;{DST_BYTE_SHIFT}{OFF}&lt;&lt;2], {SRC3}, {SIZE}
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</display>
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<expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr>
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</override>
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<derived name="DST_BYTE_SHIFT" width="3" type="uint">
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<expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr>
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</derived>
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<field low="9" high="10" name="OFF" type="uoffset"/>
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<assert pos="11" >0</assert>
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<field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/>
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<field low="32" high="39" name="SRC2" type="#reg-gpr"/>
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<pattern pos="52" >1</pattern> <!-- Reg offset stg form -->
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<encode>
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<map name="SRC2">src->srcs[1]</map>
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<map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map>
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<map name="OFF">src->srcs[3]->uim_val</map>
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<map name="SRC3">src->srcs[4]</map>
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<map name="SIZE">src->srcs[5]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="#instruction-cat6-a3xx-ld" extends="#instruction-cat6-a3xx">
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<pattern pos="0" >1</pattern>
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<field low="1" high="13" name="OFF" type="offset"/>
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<field low="14" high="21" name="SRC" type="#reg-gpr"/>
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<pattern pos="22" >x</pattern>
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<pattern pos="23" >1</pattern>
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<field low="24" high="31" name="SIZE" type="uint"/>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern low="40" high="48">xxxxxxxxx</pattern>
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<pattern low="52" high="53">xx</pattern>
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<encode>
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<map name="OFF">src->srcs[1]->uim_val</map>
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<map name="SRC">src->srcs[0]</map>
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<map name="SIZE">src->srcs[2]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="ldl" extends="#instruction-cat6-a3xx-ld">
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<doc>
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LoaD Local
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE}
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</display>
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<pattern low="54" high="58">00001</pattern> <!-- OPC -->
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</bitset>
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<bitset name="ldp" extends="#instruction-cat6-a3xx-ld">
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<doc>
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LoaD Private
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, p[{SRC}{OFF}], {SIZE}
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</display>
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<pattern low="54" high="58">00010</pattern> <!-- OPC -->
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</bitset>
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<bitset name="ldlw" extends="#instruction-cat6-a3xx-ld">
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<doc>
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LoaD Local (variant used for passing data between geom stages)
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE}
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</display>
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<pattern low="54" high="58">01010</pattern> <!-- OPC -->
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</bitset>
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<bitset name="ldlv" extends="#instruction-cat6-a3xx">
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<doc>
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LoaD Local Varying - read directly from varying storage
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} {DST}, l[{OFF}], {SIZE}
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</display>
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<pattern pos="0" >0</pattern>
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<field low="1" high="13" name="OFF" type="uint"/>
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<pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC -->
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<pattern low="22" high="23">11</pattern>
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<field low="24" high="31" name="SIZE" type="uint"/>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern low="40" high="48">xxxxxxxxx</pattern>
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<pattern low="52" high="53">xx</pattern>
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<pattern low="54" high="58">11111</pattern> <!-- OPC -->
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<encode>
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<map name="SIZE">src->srcs[1]->uim_val</map>
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<map name="OFF">src->srcs[0]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="#instruction-cat6-a3xx-st" extends="#instruction-cat6-a3xx">
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<derived name="OFF" width="13" type="offset">
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<expr>({OFF_HI} &lt;&lt; 8) | {OFF_LO}</expr>
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</derived>
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<field low="1" high="8" name="SRC" type="#reg-gpr"/>
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<field low="9" high="13" name="OFF_HI" type="uint"/>
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<pattern low="14" high="22">xxxxxxxxx</pattern>
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<pattern pos="23" >1</pattern>
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<field low="24" high="31" name="SIZE" type="uint"/>
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<field low="32" high="39" name="OFF_LO" type="uint"/>
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<pattern pos="40" >1</pattern>
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<field low="41" high="48" name="DST" type="#reg-gpr"/>
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<pattern low="52" high="53">xx</pattern>
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<encode>
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<!--
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TODO get rid of dst_offset and use a normal (potentially
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immed) reg.. for now match the existing ir3 until we can
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drop the old packed-struct encoding
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-->
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<map name="OFF_HI">src->cat6.dst_offset >> 8</map>
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<map name="OFF_LO">src->cat6.dst_offset &amp; 0xff</map>
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<map name="SRC">src->srcs[1]</map>
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<map name="DST">src->srcs[0]</map>"
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<map name="SIZE">src->srcs[2]->uim_val</map>
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</encode>
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</bitset>
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<bitset name="stl" extends="#instruction-cat6-a3xx-st">
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<doc>
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STore Local
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE}
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</display>
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<pattern pos="0" >x</pattern>
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<pattern low="54" high="58">00100</pattern> <!-- OPC -->
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</bitset>
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<bitset name="stp" extends="#instruction-cat6-a3xx-st">
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<doc>
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STore Private
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} p[{DST}{OFF}], {SRC}, {SIZE}
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</display>
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<pattern pos="0" >0</pattern> <!-- SRC_OFF -->
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<pattern low="54" high="58">00101</pattern> <!-- OPC -->
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</bitset>
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<bitset name="stlw" extends="#instruction-cat6-a3xx-st">
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<doc>
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STore Local (variant used for passing data between geom stages)
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</doc>
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<display>
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{SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE}
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</display>
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<pattern pos="0" >x</pattern>
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<pattern low="54" high="58">01011</pattern> <!-- OPC -->
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</bitset>
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<bitset name="stc" extends="#instruction-cat6-a3xx">
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<doc>
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STore Const - used for shader prolog (between shps and shpe)
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to store "uniform folded" values into CONST file
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NOTE: TYPE field actually seems to be set to different
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values (ie f32 vs u32), but I *think* it does not matter.
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(There is SP_MODE_CONTROL.CONSTANT_DEMOTION_ENABLE, but
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I think float results are already converted to 32b)
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NOTE: this could be the "old" encoding, although it
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would conflict with stgb from earlier gens
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</doc>
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<display>
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{SY}{JP}{NAME} c[{DST}], {SRC}, {SIZE}
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</display>
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<gen min="600"/>
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<pattern pos="0" >x</pattern>
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<field low="1" high="8" name="SRC" type="#reg-gpr"/>
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<pattern low="9" high="22">xxxxxxxxxxxxxx</pattern>
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<pattern pos="23" >1</pattern>
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<field low="24" high="26" name="SIZE" type="uint"/>
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<pattern low="27" high="31">xxxxx</pattern>
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<field low="32" high="39" name="DST" type="uint"/>
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<pattern low="40" high="48">xxxxxxxxx</pattern>
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<pattern low="52" high="53">xx</pattern>
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<pattern low="54" high="58">11100</pattern> <!-- OPC -->
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<encode>
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<map name="DST">src->srcs[0]->uim_val</map>
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<map name="SRC">src->srcs[1]</map>
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</encode>
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</bitset>
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<bitset name="resinfo" extends="#instruction-cat6-a3xx">
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<display>
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{SY}{JP}{NAME}.{TYPE}.{D}d {DST}, g[{SSBO}]
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</display>
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<derived name="D" expr="#cat6-d" type="uint"/>
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<pattern pos="0" >x</pattern>
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<pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 -->
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<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
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<pattern pos="11" >x</pattern> <!-- TYPED -->
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<pattern low="12" high="13">xx</pattern> <!-- TYPE_SIZE -->
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<pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC1 -->
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<pattern pos="22" >x</pattern> <!-- SRC1_IM -->
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<pattern pos="23" >x</pattern> <!-- SRC2_IM -->
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<pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 -->
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern pos="40" >0</pattern>
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<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
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<param name="SSBO_IM" as="SRC_IM"/>
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</field>
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<pattern pos="52" >x</pattern> <!-- G -->
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<field pos="53" name="SSBO_IM" type="bool"/>
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<pattern low="54" high="58">01111</pattern> <!-- OPC -->
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<encode>
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<map name="D_MINUS_ONE">src->cat6.d - 1</map>
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<map name="SSBO">src->srcs[0]</map>
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<map name="SSBO_IM">!!(src->srcs[0]->flags &amp; IR3_REG_IMMED)</map>
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</encode>
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</bitset>
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<!-- ldgb.untyped.4d.f32.4 r0.x, g[0], r0.x, r1.z -->
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<bitset name="ldgb" extends="#instruction-cat6-a3xx">
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<display>
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{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} {DST}, g[{SSBO}], {SRC1}, {SRC2}
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</display>
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<gen max="599"/>
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<derived name="D" expr="#cat6-d" type="uint"/>
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<derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/>
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<pattern pos="0" >x</pattern>
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<pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 -->
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<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
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<field pos="11" name="TYPED" type="#cat6-typed"/>
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<field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/>
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<field low="14" high="21" name="SRC1" type="#cat6-src">
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<param name="SRC1_IM" as="SRC_IM"/>
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</field>
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<field pos="22" name="SRC1_IM" type="bool"/>
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<field pos="23" name="SRC2_IM" type="bool"/>
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<field low="24" high="31" name="SRC2" type="#cat6-src">
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<param name="SRC2_IM" as="SRC_IM"/>
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</field>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern pos="40" >0</pattern>
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<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
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<param name="SSBO_IM" as="SRC_IM"/>
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</field>
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<pattern pos="52" >x</pattern> <!-- G -->
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<field pos="53" name="SSBO_IM" type="bool"/>
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<pattern low="54" high="58">11011</pattern> <!-- OPC -->
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<encode>
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<map name="D_MINUS_ONE">src->cat6.d - 1</map>
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<map name="TYPED">src</map>
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<map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map>
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<map name="SSBO">src->srcs[0]</map>
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<map name="SSBO_IM">!!(src->srcs[0]->flags &amp; IR3_REG_IMMED)</map>
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<map name="SRC1">src->srcs[1]</map>
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<map name="SRC1_IM">!!(src->srcs[1]->flags &amp; IR3_REG_IMMED)</map>
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<map name="SRC2">src->srcs[2]</map>
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<map name="SRC2_IM">!!(src->srcs[2]->flags &amp; IR3_REG_IMMED)</map>
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</encode>
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</bitset>
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<bitset name="#instruction-cat6-a3xx-ibo" extends="#instruction-cat6-a3xx">
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<display>
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{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} g[{SSBO}], {SRC1}, {SRC2}, {SRC3}
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</display>
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<gen max="599"/>
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<derived name="D" expr="#cat6-d" type="uint"/>
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<derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/>
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<pattern pos="0" >1</pattern>
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<field low="1" high="8" name="SRC1" type="#reg-gpr"/>
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<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
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<field pos="11" name="TYPED" type="#cat6-typed"/>
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<field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/>
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<pattern low="14" high="22">xxxxxxxxx</pattern>
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<field pos="23" name="SRC2_IM" type="bool"/>
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<field low="24" high="31" name="SRC2" type="#cat6-src">
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<param name="SRC2_IM" as="SRC_IM"/>
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</field>
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<field low="32" high="39" name="SRC3" type="#cat6-src">
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<param name="SRC3_IM" as="SRC_IM"/>
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</field>
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<field pos="40" name="SRC3_IM" type="bool"/>
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<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
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<param name="SSBO_IM" as="SRC_IM"/>
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</field>
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<pattern pos="52" >x</pattern> <!-- G -->
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<field pos="53" name="SSBO_IM" type="bool"/>
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<encode>
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<map name="D_MINUS_ONE">src->cat6.d - 1</map>
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<map name="TYPED">src</map>
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<map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map>
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<map name="SSBO">src->srcs[0]</map>
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<map name="SSBO_IM">!!(src->srcs[0]->flags &amp; IR3_REG_IMMED)</map>
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<map name="SRC1">src->srcs[1]</map>
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<map name="SRC1_IM">!!(src->srcs[1]->flags &amp; IR3_REG_IMMED)</map>
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<map name="SRC2">src->srcs[2]</map>
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<map name="SRC2_IM">!!(src->srcs[2]->flags &amp; IR3_REG_IMMED)</map>
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<map name="SRC3">src->srcs[3]</map>
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<map name="SRC3_IM">!!(src->srcs[3]->flags &amp; IR3_REG_IMMED)</map>
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</encode>
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</bitset>
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<bitset name="stgb" extends="#instruction-cat6-a3xx-ibo">
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<pattern low="54" high="58">11100</pattern> <!-- OPC -->
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</bitset>
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<bitset name="stib" extends="#instruction-cat6-a3xx-ibo">
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<pattern low="54" high="58">11101</pattern> <!-- OPC -->
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</bitset>
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<bitset name="#instruction-cat6-a3xx-atomic" extends="#instruction-cat6-a3xx">
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<doc>
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Base for atomic instructions (I think mostly a4xx+, as
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a3xx didn't have real image/ssbo.. it was all just global).
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Still used as of a6xx for local.
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NOTE that existing disasm and asm parser expect atomic inc/dec
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to still have an extra src. For now, match that.
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</doc>
485
486
<override expr="#cat6-global">
487
<display>
488
{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.g {DST}, g[{SSBO}], {SRC1}, {SRC2}, {SRC3}
489
</display>
490
<field low="1" high="8" name="SRC3" type="#reg-gpr"/>
491
<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
492
<param name="SSBO_IM" as="SRC_IM"/>
493
</field>
494
<field pos="53" name="SSBO_IM" type="bool"/>
495
</override>
496
<display>
497
{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.l {DST}, l[{SRC1}], {SRC2}
498
</display>
499
500
<derived name="D" expr="#cat6-d" type="uint"/>
501
<derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/>
502
503
<pattern pos="0" >1</pattern>
504
<pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 -->
505
<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
506
<field pos="11" name="TYPED" type="#cat6-typed"/>
507
<field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/>
508
<field low="14" high="21" name="SRC1" type="#cat6-src">
509
<param name="SRC1_IM" as="SRC_IM"/>
510
</field>
511
<field pos="22" name="SRC1_IM" type="bool"/>
512
<field pos="23" name="SRC2_IM" type="bool"/>
513
<field low="24" high="31" name="SRC2" type="#cat6-src">
514
<param name="SRC2_IM" as="SRC_IM"/>
515
</field>
516
<field low="32" high="39" name="DST" type="#reg-gpr"/>
517
<pattern pos="40" >x</pattern>
518
<assert low="41" high="48">00000000</assert> <!-- SSBO/image binding point -->
519
<field pos="52" name="G" type="bool"/>
520
<assert pos="53" >0</assert> <!-- SSBO_IM -->
521
<encode>
522
<map name="G">!!(src->flags &amp; IR3_INSTR_G)</map>
523
<map name="TYPED">src</map>
524
<map name="D_MINUS_ONE">src->cat6.d - 1</map>
525
<map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map>
526
<map name="SSBO">src->srcs[0]</map>
527
<map name="SSBO_IM">!!(src->srcs[0]->flags &amp; IR3_REG_IMMED)</map>
528
<map name="SRC1">extract_cat6_SRC(src, 0)</map>
529
<map name="SRC1_IM">!!(extract_cat6_SRC(src, 0)->flags &amp; IR3_REG_IMMED)</map>
530
<map name="SRC2">extract_cat6_SRC(src, 1)</map>
531
<map name="SRC2_IM">!!(extract_cat6_SRC(src, 1)->flags &amp; IR3_REG_IMMED)</map>
532
<map name="SRC3">extract_cat6_SRC(src, 2)</map>
533
<map name="SRC3_IM">!!(extract_cat6_SRC(src, 2)->flags &amp; IR3_REG_IMMED)</map>
534
</encode>
535
</bitset>
536
537
<bitset name="#instruction-cat6-a3xx-atomic-1src" extends="#instruction-cat6-a3xx-atomic">
538
<!-- TODO when asm parser is updated, shift display templates, etc, here -->
539
</bitset>
540
541
<bitset name="#instruction-cat6-a3xx-atomic-2src" extends="#instruction-cat6-a3xx-atomic">
542
<!-- TODO when asm parser is updated, shift display templates, etc, here -->
543
</bitset>
544
545
<bitset name="atomic.add" extends="#instruction-cat6-a3xx-atomic-2src">
546
<pattern low="54" high="58">10000</pattern> <!-- OPC -->
547
</bitset>
548
549
<bitset name="atomic.sub" extends="#instruction-cat6-a3xx-atomic-2src">
550
<pattern low="54" high="58">10001</pattern> <!-- OPC -->
551
</bitset>
552
553
<bitset name="atomic.xchg" extends="#instruction-cat6-a3xx-atomic-2src">
554
<pattern low="54" high="58">10010</pattern> <!-- OPC -->
555
</bitset>
556
557
<bitset name="atomic.inc" extends="#instruction-cat6-a3xx-atomic-1src">
558
<pattern low="54" high="58">10011</pattern> <!-- OPC -->
559
</bitset>
560
561
<bitset name="atomic.dec" extends="#instruction-cat6-a3xx-atomic-1src">
562
<pattern low="54" high="58">10100</pattern> <!-- OPC -->
563
</bitset>
564
565
<bitset name="atomic.cmpxchg" extends="#instruction-cat6-a3xx-atomic-2src">
566
<pattern low="54" high="58">10101</pattern> <!-- OPC -->
567
</bitset>
568
569
<bitset name="atomic.min" extends="#instruction-cat6-a3xx-atomic-2src">
570
<pattern low="54" high="58">10110</pattern> <!-- OPC -->
571
</bitset>
572
573
<bitset name="atomic.max" extends="#instruction-cat6-a3xx-atomic-2src">
574
<pattern low="54" high="58">10111</pattern> <!-- OPC -->
575
</bitset>
576
577
<bitset name="atomic.and" extends="#instruction-cat6-a3xx-atomic-2src">
578
<pattern low="54" high="58">11000</pattern> <!-- OPC -->
579
</bitset>
580
581
<bitset name="atomic.or" extends="#instruction-cat6-a3xx-atomic-2src">
582
<pattern low="54" high="58">11001</pattern> <!-- OPC -->
583
</bitset>
584
585
<bitset name="atomic.xor" extends="#instruction-cat6-a3xx-atomic-2src">
586
<pattern low="54" high="58">11010</pattern> <!-- OPC -->
587
</bitset>
588
589
590
<!--
591
New a6xx+ encodings for potentially bindless image/ssbo:
592
-->
593
594
<bitset name="#instruction-cat6-a6xx" extends="#instruction-cat6">
595
<doc>
596
Base for new instruction encoding that started being used
597
with a6xx for instructions supporting bindless mode.
598
</doc>
599
<gen min="600"/>
600
601
<derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/>
602
603
<field low="1" high="3" name="BASE" type="#cat6-base">
604
<param name="BINDLESS"/>
605
</field>
606
<pattern low="4" high="5" >00</pattern>
607
<field low="6" high="7" name="MODE" type="#cat6-src-mode"/>
608
<field pos="8" name="BINDLESS" type="bool"/>
609
<field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/>
610
<pattern pos="40" >0</pattern>
611
<pattern low="54" high="58">00000</pattern>
612
<encode>
613
<map name="MODE">extract_cat6_DESC_MODE(src)</map>
614
<map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map>
615
<map name="BINDLESS">!!(src->flags &amp; IR3_INSTR_B)</map>
616
<map name="BASE">src</map>
617
</encode>
618
</bitset>
619
620
<bitset name="ldc" extends="#instruction-cat6-a6xx">
621
<doc>
622
LoaD Constant - UBO load
623
</doc>
624
<override>
625
<!-- TODO.. wtf? -->
626
<expr>{K}</expr>
627
<display>
628
{SY}{JP}{NAME}.{TYPE_SIZE}.k.{MODE}{BASE} c[a1.x], {SRC1}, {SRC2}
629
</display>
630
<field low="32" high="39" name="TYPE_SIZE_MINUS_ONE" type="uint"/>
631
</override>
632
<!--
633
TODO are these *really* all bindless? Or does that bit have a different
634
meaning? Maybe I don't have enough ldc examples from deqp-glesN
635
-->
636
<display>
637
{SY}{JP}{NAME}.offset{OFFSET}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SRC1}, {SRC2}
638
</display>
639
<pattern pos="0" >x</pattern>
640
<field low="9" high="10" name="OFFSET" type="uint"/> <!-- D_MINUS_ONE -->
641
<pattern pos="11" >x</pattern> <!-- TYPED -->
642
<pattern low="14" high="19">011110</pattern> <!-- OPC -->
643
<pattern low="20" high="22">1xx</pattern>
644
<field pos="23" name="SRC1_IM" type="bool"/>
645
<derived name="SRC2_IM" expr="#cat6-direct" type="bool"/>
646
<field low="41" high="48" name="SRC2" type="#cat6-src">
647
<param name="SRC2_IM" as="SRC_IM"/>
648
</field>
649
<field low="24" high="31" name="SRC1" type="#cat6-src">
650
<param name="SRC1_IM" as="SRC_IM"/>
651
</field>
652
<field low="32" high="39" name="DST" type="#reg-gpr"/>
653
<pattern low="49" high="51">x11</pattern> <!-- TYPE -->
654
<field pos="52" name="K" type="bool"/>
655
<pattern pos="53" >1</pattern>
656
<encode>
657
<map name="K">0</map> <!-- TODO.. once we figure out what this is -->
658
<map name="SRC1_IM">!!(src->srcs[1]->flags &amp; IR3_REG_IMMED)</map>
659
<map name="OFFSET">src->cat6.d</map>
660
<map name="SRC1">src->srcs[1]</map>
661
<map name="SRC2">src->srcs[0]</map>
662
</encode>
663
</bitset>
664
665
<bitset name="getspid" extends="#instruction-cat6-a6xx">
666
<doc>
667
GET Shader Processor ID?
668
</doc>
669
<display>
670
{SY}{JP}{NAME}.{TYPE} {DST}
671
</display>
672
673
<pattern pos="0" >0</pattern>
674
<pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE -->
675
<pattern pos="11" >x</pattern> <!-- TYPED -->
676
<pattern low="14" high="19">100100</pattern> <!-- OPC -->
677
<pattern low="20" high="23">x1xx</pattern>
678
<pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 -->
679
<field low="32" high="39" name="DST" type="#reg-gpr"/>
680
<pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point -->
681
<field low="49" high="51" name="TYPE" type="#type"/>
682
<pattern low="52" high="53">1x</pattern>
683
</bitset>
684
685
<bitset name="getwid" extends="#instruction-cat6-a6xx">
686
<doc>
687
GET Wavefront ID
688
</doc>
689
<display>
690
{SY}{JP}{NAME}.{TYPE} {DST}
691
</display>
692
693
<pattern pos="0" >0</pattern>
694
<pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE -->
695
<pattern pos="11" >x</pattern> <!-- TYPED -->
696
<pattern low="14" high="19">100101</pattern> <!-- OPC -->
697
<pattern low="20" high="23">x1xx</pattern>
698
<pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 -->
699
<field low="32" high="39" name="DST" type="#reg-gpr"/>
700
<pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point -->
701
<field low="49" high="51" name="TYPE" type="#type"/>
702
<pattern low="52" high="53">1x</pattern>
703
</bitset>
704
705
<bitset name="resinfo.b" extends="#instruction-cat6-a6xx">
706
<doc>
707
RESourceINFO - returns image/ssbo dimensions (3 components)
708
</doc>
709
<display>
710
{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SSBO}
711
</display>
712
713
<derived name="D" expr="#cat6-d" type="uint"/>
714
<derived name="TRUE" expr="#true" type="bool"/>
715
716
<pattern pos="0" >0</pattern>
717
<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
718
<field pos="11" name="TYPED" type="#cat6-typed"/>
719
<pattern low="14" high="19">001111</pattern> <!-- OPC -->
720
<pattern low="20" high="23">0110</pattern>
721
<pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 -->
722
<field low="32" high="39" name="DST" type="#reg-gpr"/>
723
<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
724
<param name="TRUE" as="SRC_IM"/>
725
</field>
726
<field low="49" high="51" name="TYPE" type="#type"/>
727
<pattern low="52" high="53">1x</pattern>
728
<encode>
729
<map name="D_MINUS_ONE">src->cat6.d - 1</map>
730
<map name="TYPED">src</map>
731
<map name="SSBO">src->srcs[0]</map>
732
<map name="SRC1">src->srcs[1]</map>
733
</encode>
734
</bitset>
735
736
<bitset name="#instruction-cat6-a6xx-ibo" extends="#instruction-cat6-a6xx">
737
<doc>
738
IBO (ie. Image/SSBO) instructions
739
</doc>
740
<display>
741
{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {SRC1}, {SRC2}, {SSBO}
742
</display>
743
744
<derived name="D" expr="#cat6-d" type="uint"/>
745
<derived name="TRUE" expr="#true" type="bool"/>
746
747
<field low="9" high="10" name="D_MINUS_ONE" type="uint"/>
748
<field pos="11" name="TYPED" type="#cat6-typed"/>
749
<pattern low="20" high="23">0110</pattern>
750
<field low="24" high="31" name="SRC2" type="#reg-gpr"/>
751
<field low="32" high="39" name="SRC1" type="#reg-gpr"/>
752
<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
753
<param name="SSBO_IM" as="SRC_IM"/>
754
</field>
755
<derived name="SSBO_IM" expr="#cat6-direct" type="bool"/>
756
<field low="49" high="51" name="TYPE" type="#type"/>
757
<encode>
758
<map name="TYPED">src</map>
759
<map name="D_MINUS_ONE">src->cat6.d - 1</map>
760
<map name="SSBO">src->srcs[0]</map>
761
<map name="SRC1">src->srcs[2]</map>
762
<map name="SRC2">src->srcs[1]</map>
763
</encode>
764
</bitset>
765
766
<bitset name="stib.b" extends="#instruction-cat6-a6xx-ibo">
767
<doc>
768
STore IBo
769
</doc>
770
<pattern pos="0" >0</pattern>
771
<pattern low="14" high="19">011101</pattern> <!-- OPC -->
772
<pattern low="52" high="53">10</pattern>
773
</bitset>
774
775
<bitset name="ldib.b" extends="#instruction-cat6-a6xx-ibo">
776
<doc>
777
LoaD IBo
778
</doc>
779
<pattern pos="0" >x</pattern> <!-- blob seems to set randomly? -->
780
<pattern low="14" high="19">000110</pattern> <!-- OPC -->
781
<pattern low="52" high="53">10</pattern>
782
<encode>
783
<map name="SRC1">src->dsts[0]</map>
784
</encode>
785
</bitset>
786
787
<bitset name="atomic.b.add" extends="#instruction-cat6-a6xx-ibo">
788
<pattern pos="0" >x</pattern>
789
<pattern low="14" high="19">010000</pattern> <!-- OPC -->
790
<pattern low="52" high="53">11</pattern>
791
</bitset>
792
793
<bitset name="atomic.b.sub" extends="#instruction-cat6-a6xx-ibo">
794
<pattern pos="0" >x</pattern>
795
<pattern low="14" high="19">010001</pattern> <!-- OPC -->
796
<pattern low="52" high="53">11</pattern>
797
</bitset>
798
799
<bitset name="atomic.b.xchg" extends="#instruction-cat6-a6xx-ibo">
800
<pattern pos="0" >x</pattern>
801
<pattern low="14" high="19">010010</pattern> <!-- OPC -->
802
<pattern low="52" high="53">11</pattern>
803
</bitset>
804
805
<!-- inc/dec? -->
806
807
<bitset name="atomic.b.cmpxchg" extends="#instruction-cat6-a6xx-ibo">
808
<pattern pos="0" >x</pattern>
809
<pattern low="14" high="19">010101</pattern> <!-- OPC -->
810
<pattern low="52" high="53">11</pattern>
811
</bitset>
812
813
<bitset name="atomic.b.min" extends="#instruction-cat6-a6xx-ibo">
814
<pattern pos="0" >x</pattern>
815
<pattern low="14" high="19">010110</pattern> <!-- OPC -->
816
<pattern low="52" high="53">11</pattern>
817
</bitset>
818
819
<bitset name="atomic.b.max" extends="#instruction-cat6-a6xx-ibo">
820
<pattern pos="0" >x</pattern>
821
<pattern low="14" high="19">010111</pattern> <!-- OPC -->
822
<pattern low="52" high="53">11</pattern>
823
</bitset>
824
825
<bitset name="atomic.b.and" extends="#instruction-cat6-a6xx-ibo">
826
<pattern pos="0" >x</pattern>
827
<pattern low="14" high="19">011000</pattern> <!-- OPC -->
828
<pattern low="52" high="53">11</pattern>
829
</bitset>
830
831
<bitset name="atomic.b.or" extends="#instruction-cat6-a6xx-ibo">
832
<pattern pos="0" >x</pattern>
833
<pattern low="14" high="19">011001</pattern> <!-- OPC -->
834
<pattern low="52" high="53">11</pattern>
835
</bitset>
836
837
<bitset name="atomic.b.xor" extends="#instruction-cat6-a6xx-ibo">
838
<pattern pos="0" >x</pattern>
839
<pattern low="14" high="19">011010</pattern> <!-- OPC -->
840
<pattern low="52" high="53">11</pattern>
841
</bitset>
842
843
844
845
<expr name="#cat6-d">
846
{D_MINUS_ONE} + 1
847
</expr>
848
849
<expr name="#cat6-type-size">
850
{TYPE_SIZE_MINUS_ONE} + 1
851
</expr>
852
853
<!-- Image/SSBO (ie. not local) -->
854
<expr name="#cat6-global">
855
{G}
856
</expr>
857
858
<bitset name="#cat6-typed" size="1">
859
<override>
860
<expr>{TYPED}</expr>
861
<display>
862
typed
863
</display>
864
</override>
865
<display>
866
untyped
867
</display>
868
<field name="TYPED" pos="0" type="bool"/>
869
<encode type="struct ir3_instruction *">
870
<map name="TYPED" force="true">src->cat6.typed</map>
871
</encode>
872
</bitset>
873
874
<bitset name="#cat6-base" size="3">
875
<override>
876
<expr>{BINDLESS}</expr>
877
<display>
878
.base{BASE}
879
</display>
880
</override>
881
<display/>
882
<field name="BASE" low="0" high="2" type="uint"/>
883
<encode type="struct ir3_instruction *">
884
<map name="BASE">src->cat6.base</map>
885
</encode>
886
</bitset>
887
888
<bitset name="#cat6-src" size="8">
889
<doc>
890
Source value that can be either immed or gpr
891
</doc>
892
<override>
893
<expr>{SRC_IM}</expr>
894
<display>
895
{IMMED}
896
</display>
897
<field name="IMMED" low="0" high="7" type="int"/>
898
</override>
899
<display>
900
r{GPR}.{SWIZ}
901
</display>
902
<field name="SWIZ" low="0" high="1" type="#swiz"/>
903
<field name="GPR" low="2" high="7" type="uint"/>
904
<encode type="struct ir3_register *">
905
<map name="GPR">src->num >> 2</map>
906
<map name="SWIZ">src->num &amp; 0x3</map>
907
<map name="IMMED">src->iim_val</map>
908
</encode>
909
</bitset>
910
911
<expr name="#cat6-direct">
912
{MODE} == 0
913
</expr>
914
915
<enum name="#cat6-src-mode">
916
<doc>
917
Source mode for "new" a6xx+ instruction encodings
918
</doc>
919
<value val="0" display="imm">
920
<doc>
921
Immediate index.
922
</doc>
923
</value>
924
<value val="1" display="uniform">
925
<doc>
926
Index from a uniform register (ie. does not depend on flow control)
927
</doc>
928
</value>
929
<value val="2" display="nonuniform">
930
<doc>
931
Index from a non-uniform register (ie. potentially depends on flow control)
932
</doc>
933
</value>
934
</enum>
935
936
</isa>
937
938