<?xml version="1.0" encoding="UTF-8"?>1<!--2Copyright © 2020 Google, Inc.34Permission is hereby granted, free of charge, to any person obtaining a5copy of this software and associated documentation files (the "Software"),6to deal in the Software without restriction, including without limitation7the rights to use, copy, modify, merge, publish, distribute, sublicense,8and/or sell copies of the Software, and to permit persons to whom the9Software is furnished to do so, subject to the following conditions:1011The above copyright notice and this permission notice (including the next12paragraph) shall be included in all copies or substantial portions of the13Software.1415THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,20OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21SOFTWARE.22-->2324<!--25The basic idea is to define a hierarchy of encodings, where various26ranges of bits can be either:2728* patterns to match to select a sub-encoding (0, 1, x (dontcare))29* instruction parameters (ie. dst register, type, etc)30* range of bits that delegates to another hierarchy (ie. src reg31encoding which has multiple sub-encodings depending on gpr/const/32relative)3334The root of the encoding hierarchy defines the size. By the concrete35leaf nodes of an encoding hierarchy all bits should be accounted for36(ie. either defined fields or as 0/1/x).3738TODO:39* add optional min/max gen fields for cases where same binary maps40to different instructions and/or encodings on later gens41* schema42-->434445<isa>4647<import file="ir3-common.xml"/>4849<bitset name="#instruction" size="64">50<doc>51Encoding of an ir3 instruction. All instructions are 64b.52</doc>53<gen min="300"/>54<encode type="struct ir3_instruction *" case-prefix="OPC_">55<!--56Define mapping from encode src to individual fields,57which are common across all instruction categories58at the root instruction level5960Not all of these apply to all instructions, but we61can define mappings here for anything that is used62in more than one instruction category. For things63that are specific to a single instruction category,64mappings should be defined at that level instead.65-->66<map name="DST">src->dsts[0]</map>67<map name="SRC1">src->srcs[0]</map>68<map name="SRC2">src->srcs[1]</map>69<map name="SRC3">src->srcs[2]</map>70<map name="REPEAT">src->repeat</map>71<map name="SS">!!(src->flags & IR3_INSTR_SS)</map>72<map name="JP">!!(src->flags & IR3_INSTR_JP)</map>73<map name="SY">!!(src->flags & IR3_INSTR_SY)</map>74<map name="UL">!!(src->flags & IR3_INSTR_UL)</map>75<map name="EQ">0</map> <!-- We don't use this (yet) -->76<map name="SAT">!!(src->flags & IR3_INSTR_SAT)</map>77</encode>78</bitset>7980<import file="ir3-cat0.xml"/>81<import file="ir3-cat1.xml"/>82<import file="ir3-cat2.xml"/>83<import file="ir3-cat3.xml"/>84<import file="ir3-cat4.xml"/>85<import file="ir3-cat5.xml"/>86<import file="ir3-cat6.xml"/>87<import file="ir3-cat7.xml"/>8889</isa>909192