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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/freedreno/vulkan/tu_image.c
4565 views
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/*
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* based in part on anv driver which is:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "tu_private.h"
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#include "util/debug.h"
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#include "util/u_atomic.h"
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#include "util/format/u_format.h"
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#include "vk_format.h"
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#include "vk_util.h"
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#include "drm-uapi/drm_fourcc.h"
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#include "tu_cs.h"
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static uint32_t
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tu6_plane_count(VkFormat format)
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{
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switch (format) {
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default:
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return 1;
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case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
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case VK_FORMAT_D32_SFLOAT_S8_UINT:
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return 2;
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case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
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return 3;
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}
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}
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static VkFormat
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tu6_plane_format(VkFormat format, uint32_t plane)
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{
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switch (format) {
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case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
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/* note: with UBWC, and Y plane UBWC is different from R8_UNORM */
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return plane ? VK_FORMAT_R8G8_UNORM : VK_FORMAT_R8_UNORM;
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case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
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return VK_FORMAT_R8_UNORM;
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case VK_FORMAT_D32_SFLOAT_S8_UINT:
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return plane ? VK_FORMAT_S8_UINT : VK_FORMAT_D32_SFLOAT;
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default:
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return format;
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}
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}
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static uint32_t
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tu6_plane_index(VkFormat format, VkImageAspectFlags aspect_mask)
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{
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switch (aspect_mask) {
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default:
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return 0;
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case VK_IMAGE_ASPECT_PLANE_1_BIT:
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return 1;
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case VK_IMAGE_ASPECT_PLANE_2_BIT:
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return 2;
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case VK_IMAGE_ASPECT_STENCIL_BIT:
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return format == VK_FORMAT_D32_SFLOAT_S8_UINT;
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}
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}
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84
static void
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compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
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{
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unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
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VkComponentSwizzle vk_swiz[4] = {
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mapping->r, mapping->g, mapping->b, mapping->a
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};
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for (int i = 0; i < 4; i++) {
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switch (vk_swiz[i]) {
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case VK_COMPONENT_SWIZZLE_IDENTITY:
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swiz[i] = src_swiz[i];
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break;
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case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
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swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
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break;
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case VK_COMPONENT_SWIZZLE_ZERO:
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swiz[i] = A6XX_TEX_ZERO;
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break;
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case VK_COMPONENT_SWIZZLE_ONE:
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swiz[i] = A6XX_TEX_ONE;
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break;
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default:
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unreachable("unexpected swizzle");
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}
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}
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}
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static uint32_t
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tu6_texswiz(const VkComponentMapping *comps,
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const struct tu_sampler_ycbcr_conversion *conversion,
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VkFormat format,
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VkImageAspectFlagBits aspect_mask,
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bool has_z24uint_s8uint)
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{
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unsigned char swiz[4] = {
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A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
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};
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switch (format) {
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case VK_FORMAT_G8B8G8R8_422_UNORM:
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case VK_FORMAT_B8G8R8G8_422_UNORM:
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case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
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case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
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swiz[0] = A6XX_TEX_Z;
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swiz[1] = A6XX_TEX_X;
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swiz[2] = A6XX_TEX_Y;
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break;
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case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
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case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
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/* same hardware format is used for BC1_RGB / BC1_RGBA */
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swiz[3] = A6XX_TEX_ONE;
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break;
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case VK_FORMAT_D24_UNORM_S8_UINT:
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if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
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if (!has_z24uint_s8uint) {
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/* using FMT6_8_8_8_8_UINT */
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swiz[0] = A6XX_TEX_W;
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swiz[1] = A6XX_TEX_ZERO;
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} else {
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/* using FMT6_Z24_UINT_S8_UINT */
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swiz[0] = A6XX_TEX_Y;
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swiz[1] = A6XX_TEX_ZERO;
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}
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}
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break;
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default:
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break;
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}
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compose_swizzle(swiz, comps);
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if (conversion)
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compose_swizzle(swiz, &conversion->components);
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return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
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A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
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A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
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A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
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}
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void
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tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
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{
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tu_cs_emit(cs, iview->PITCH);
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tu_cs_emit(cs, iview->layer_size >> 6);
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tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
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}
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void
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tu_cs_image_stencil_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
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{
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tu_cs_emit(cs, iview->stencil_PITCH);
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tu_cs_emit(cs, iview->stencil_layer_size >> 6);
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tu_cs_emit_qw(cs, iview->stencil_base_addr + iview->stencil_layer_size * layer);
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}
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void
180
tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
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{
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tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
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/* SP_PS_2D_SRC_PITCH has shifted pitch field */
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tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
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}
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void
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tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
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{
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tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
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tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
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}
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void
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tu_image_view_init(struct tu_image_view *iview,
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const VkImageViewCreateInfo *pCreateInfo,
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bool has_z24uint_s8uint)
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{
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TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
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const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
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VkFormat format = pCreateInfo->format;
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VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
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const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
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vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
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const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
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tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
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iview->image = image;
210
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memset(iview->descriptor, 0, sizeof(iview->descriptor));
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struct fdl_layout *layout =
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&image->layout[tu6_plane_index(image->vk_format, aspect_mask)];
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uint32_t width = u_minify(layout->width0, range->baseMipLevel);
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uint32_t height = u_minify(layout->height0, range->baseMipLevel);
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uint32_t storage_depth = tu_get_layerCount(image, range);
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if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
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storage_depth = u_minify(image->layout[0].depth0, range->baseMipLevel);
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}
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uint32_t depth = storage_depth;
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if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
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pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
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/* Cubes are treated as 2D arrays for storage images, so only divide the
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* depth by 6 for the texture descriptor.
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*/
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depth /= 6;
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}
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uint64_t base_addr = image->bo->iova + image->bo_offset +
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fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
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uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
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fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
236
237
uint32_t pitch = fdl_pitch(layout, range->baseMipLevel);
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uint32_t ubwc_pitch = fdl_ubwc_pitch(layout, range->baseMipLevel);
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uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
240
241
if (aspect_mask != VK_IMAGE_ASPECT_COLOR_BIT)
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format = tu6_plane_format(format, tu6_plane_index(format, aspect_mask));
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244
struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
245
/* note: freedreno layout assumes no TILE_ALL bit for non-UBWC color formats
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* this means smaller mipmap levels have a linear tile mode.
247
* Depth/stencil formats have non-linear tile mode.
248
*/
249
fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
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251
bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
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253
bool is_d24s8 = (format == VK_FORMAT_D24_UNORM_S8_UINT ||
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format == VK_FORMAT_X8_D24_UNORM_PACK32);
255
256
if (is_d24s8 && ubwc_enabled)
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fmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
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259
unsigned fmt_tex = fmt.fmt;
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if (is_d24s8) {
261
if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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fmt_tex = FMT6_Z24_UNORM_S8_UINT;
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if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
264
fmt_tex = has_z24uint_s8uint ? FMT6_Z24_UINT_S8_UINT : FMT6_8_8_8_8_UINT;
265
/* TODO: also use this format with storage descriptor ? */
266
}
267
268
iview->descriptor[0] =
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A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
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COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
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A6XX_TEX_CONST_0_FMT(fmt_tex) |
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A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(layout->nr_samples)) |
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A6XX_TEX_CONST_0_SWAP(fmt.swap) |
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tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask, has_z24uint_s8uint) |
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A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
276
iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
277
iview->descriptor[2] =
278
A6XX_TEX_CONST_2_PITCHALIGN(layout->pitchalign - 6) |
279
A6XX_TEX_CONST_2_PITCH(pitch) |
280
A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
281
iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
282
iview->descriptor[4] = base_addr;
283
iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
284
285
if (layout->tile_all)
286
iview->descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL;
287
288
if (format == VK_FORMAT_G8_B8R8_2PLANE_420_UNORM ||
289
format == VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM) {
290
/* chroma offset re-uses MIPLVLS bits */
291
assert(tu_get_levelCount(image, range) == 1);
292
if (conversion) {
293
if (conversion->chroma_offsets[0] == VK_CHROMA_LOCATION_MIDPOINT)
294
iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_X;
295
if (conversion->chroma_offsets[1] == VK_CHROMA_LOCATION_MIDPOINT)
296
iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_Y;
297
}
298
299
uint64_t base_addr[3];
300
301
iview->descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL;
302
if (ubwc_enabled) {
303
iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG;
304
/* no separate ubwc base, image must have the expected layout */
305
for (uint32_t i = 0; i < 3; i++) {
306
base_addr[i] = image->bo->iova + image->bo_offset +
307
fdl_ubwc_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);
308
}
309
} else {
310
for (uint32_t i = 0; i < 3; i++) {
311
base_addr[i] = image->bo->iova + image->bo_offset +
312
fdl_surface_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);
313
}
314
}
315
316
iview->descriptor[4] = base_addr[0];
317
iview->descriptor[5] |= base_addr[0] >> 32;
318
iview->descriptor[6] =
319
A6XX_TEX_CONST_6_PLANE_PITCH(fdl_pitch(&image->layout[1], range->baseMipLevel));
320
iview->descriptor[7] = base_addr[1];
321
iview->descriptor[8] = base_addr[1] >> 32;
322
iview->descriptor[9] = base_addr[2];
323
iview->descriptor[10] = base_addr[2] >> 32;
324
325
assert(pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_3D);
326
return;
327
}
328
329
if (ubwc_enabled) {
330
uint32_t block_width, block_height;
331
fdl6_get_ubwc_blockwidth(layout, &block_width, &block_height);
332
333
iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG;
334
iview->descriptor[7] = ubwc_addr;
335
iview->descriptor[8] = ubwc_addr >> 32;
336
iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
337
iview->descriptor[10] |=
338
A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
339
A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
340
A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
341
}
342
343
if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
344
iview->descriptor[3] |=
345
A6XX_TEX_CONST_3_MIN_LAYERSZ(layout->slices[image->level_count - 1].size0);
346
}
347
348
iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
349
.color_format = fmt.fmt,
350
.tile_mode = fmt.tile_mode,
351
.color_swap = fmt.swap,
352
.flags = ubwc_enabled,
353
.srgb = vk_format_is_srgb(format),
354
.samples = tu_msaa_samples(layout->nr_samples),
355
.samples_average = layout->nr_samples > 1 &&
356
!vk_format_is_int(format) &&
357
!vk_format_is_depth_or_stencil(format),
358
.unk20 = 1,
359
.unk22 = 1).value;
360
iview->SP_PS_2D_SRC_SIZE =
361
A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
362
363
/* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
364
iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
365
iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
366
.pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
367
368
iview->base_addr = base_addr;
369
iview->ubwc_addr = ubwc_addr;
370
iview->layer_size = layer_size;
371
iview->ubwc_layer_size = layout->ubwc_layer_size;
372
373
/* Don't set fields that are only used for attachments/blit dest if COLOR
374
* is unsupported.
375
*/
376
if (!(fmt.supported & FMT_COLOR))
377
return;
378
379
struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
380
cfmt.tile_mode = fmt.tile_mode;
381
382
if (is_d24s8 && ubwc_enabled)
383
cfmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
384
385
memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
386
387
iview->storage_descriptor[0] =
388
A6XX_IBO_0_FMT(fmt.fmt) |
389
A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
390
iview->storage_descriptor[1] =
391
A6XX_IBO_1_WIDTH(width) |
392
A6XX_IBO_1_HEIGHT(height);
393
iview->storage_descriptor[2] =
394
A6XX_IBO_2_PITCH(pitch) |
395
A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
396
iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
397
398
iview->storage_descriptor[4] = base_addr;
399
iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
400
401
if (ubwc_enabled) {
402
iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
403
iview->storage_descriptor[7] |= ubwc_addr;
404
iview->storage_descriptor[8] |= ubwc_addr >> 32;
405
iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
406
iview->storage_descriptor[10] =
407
A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
408
}
409
410
iview->extent.width = width;
411
iview->extent.height = height;
412
iview->need_y2_align =
413
(fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
414
415
iview->ubwc_enabled = ubwc_enabled;
416
417
iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
418
.color_tile_mode = cfmt.tile_mode,
419
.color_format = cfmt.fmt,
420
.color_swap = cfmt.swap).value;
421
422
iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
423
.color_format = cfmt.fmt,
424
.color_sint = vk_format_is_sint(format),
425
.color_uint = vk_format_is_uint(format)).value;
426
427
iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
428
.color_format = cfmt.fmt,
429
.tile_mode = cfmt.tile_mode,
430
.color_swap = cfmt.swap,
431
.flags = ubwc_enabled,
432
.srgb = vk_format_is_srgb(format)).value;
433
434
iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
435
.tile_mode = cfmt.tile_mode,
436
.samples = tu_msaa_samples(layout->nr_samples),
437
.color_format = cfmt.fmt,
438
.color_swap = cfmt.swap,
439
.flags = ubwc_enabled).value;
440
441
if (image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT) {
442
layout = &image->layout[1];
443
iview->stencil_base_addr = image->bo->iova + image->bo_offset +
444
fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
445
iview->stencil_layer_size = fdl_layer_stride(layout, range->baseMipLevel);
446
iview->stencil_PITCH = A6XX_RB_STENCIL_BUFFER_PITCH(fdl_pitch(layout, range->baseMipLevel)).value;
447
}
448
}
449
450
bool
451
ubwc_possible(VkFormat format, VkImageType type, VkImageUsageFlags usage,
452
VkImageUsageFlags stencil_usage, const struct fd_dev_info *info,
453
VkSampleCountFlagBits samples)
454
{
455
/* no UBWC with compressed formats, E5B9G9R9, S8_UINT
456
* (S8_UINT because separate stencil doesn't have UBWC-enable bit)
457
*/
458
if (vk_format_is_compressed(format) ||
459
format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 ||
460
format == VK_FORMAT_S8_UINT)
461
return false;
462
463
if (!info->a6xx.has_8bpp_ubwc &&
464
(format == VK_FORMAT_R8_UNORM ||
465
format == VK_FORMAT_R8_SNORM ||
466
format == VK_FORMAT_R8_UINT ||
467
format == VK_FORMAT_R8_SINT ||
468
format == VK_FORMAT_R8_SRGB))
469
return false;
470
471
if (type == VK_IMAGE_TYPE_3D) {
472
tu_finishme("UBWC with 3D textures");
473
return false;
474
}
475
476
/* Disable UBWC for storage images.
477
*
478
* The closed GL driver skips UBWC for storage images (and additionally
479
* uses linear for writeonly images). We seem to have image tiling working
480
* in freedreno in general, so turnip matches that. freedreno also enables
481
* UBWC on images, but it's not really tested due to the lack of
482
* UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
483
* behavior of no UBWC.
484
*/
485
if ((usage | stencil_usage) & VK_IMAGE_USAGE_STORAGE_BIT)
486
return false;
487
488
/* Disable UBWC for D24S8 on A630 in some cases
489
*
490
* VK_IMAGE_ASPECT_STENCIL_BIT image view requires to be able to sample
491
* from the stencil component as UINT, however no format allows this
492
* on a630 (the special FMT6_Z24_UINT_S8_UINT format is missing)
493
*
494
* It must be sampled as FMT6_8_8_8_8_UINT, which is not UBWC-compatible
495
*
496
* Additionally, the special AS_R8G8B8A8 format is broken without UBWC,
497
* so we have to fallback to 8_8_8_8_UNORM when UBWC is disabled
498
*/
499
if (!info->a6xx.has_z24uint_s8uint &&
500
format == VK_FORMAT_D24_UNORM_S8_UINT &&
501
(stencil_usage & (VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)))
502
return false;
503
504
if (!info->a6xx.has_z24uint_s8uint && samples > VK_SAMPLE_COUNT_1_BIT)
505
return false;
506
507
return true;
508
}
509
510
VKAPI_ATTR VkResult VKAPI_CALL
511
tu_CreateImage(VkDevice _device,
512
const VkImageCreateInfo *pCreateInfo,
513
const VkAllocationCallbacks *alloc,
514
VkImage *pImage)
515
{
516
TU_FROM_HANDLE(tu_device, device, _device);
517
uint64_t modifier = DRM_FORMAT_MOD_INVALID;
518
const VkSubresourceLayout *plane_layouts = NULL;
519
struct tu_image *image;
520
521
if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
522
const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
523
vk_find_struct_const(pCreateInfo->pNext,
524
IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
525
const VkImageDrmFormatModifierExplicitCreateInfoEXT *drm_explicit_info =
526
vk_find_struct_const(pCreateInfo->pNext,
527
IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);
528
529
assert(mod_info || drm_explicit_info);
530
531
if (mod_info) {
532
modifier = DRM_FORMAT_MOD_LINEAR;
533
for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
534
if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
535
modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
536
}
537
} else {
538
modifier = drm_explicit_info->drmFormatModifier;
539
assert(modifier == DRM_FORMAT_MOD_LINEAR ||
540
modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED);
541
plane_layouts = drm_explicit_info->pPlaneLayouts;
542
}
543
} else {
544
const struct wsi_image_create_info *wsi_info =
545
vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
546
if (wsi_info && wsi_info->scanout)
547
modifier = DRM_FORMAT_MOD_LINEAR;
548
}
549
550
#ifdef ANDROID
551
const VkNativeBufferANDROID *gralloc_info =
552
vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
553
int dma_buf;
554
if (gralloc_info) {
555
VkResult result = tu_gralloc_info(device, gralloc_info, &dma_buf, &modifier);
556
if (result != VK_SUCCESS)
557
return result;
558
}
559
#endif
560
561
image = vk_object_zalloc(&device->vk, alloc, sizeof(*image),
562
VK_OBJECT_TYPE_IMAGE);
563
if (!image)
564
return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
565
566
const VkExternalMemoryImageCreateInfo *external_info =
567
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
568
image->shareable = external_info != NULL;
569
570
image->vk_format = pCreateInfo->format;
571
image->level_count = pCreateInfo->mipLevels;
572
image->layer_count = pCreateInfo->arrayLayers;
573
574
enum a6xx_tile_mode tile_mode = TILE6_3;
575
bool ubwc_enabled =
576
!(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
577
578
/* use linear tiling if requested */
579
if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR || modifier == DRM_FORMAT_MOD_LINEAR) {
580
tile_mode = TILE6_LINEAR;
581
ubwc_enabled = false;
582
}
583
584
/* Mutable images can be reinterpreted as any other compatible format.
585
* This is a problem with UBWC (compression for different formats is different),
586
* but also tiling ("swap" affects how tiled formats are stored in memory)
587
* Depth and stencil formats cannot be reintepreted as another format, and
588
* cannot be linear with sysmem rendering, so don't fall back for those.
589
*
590
* TODO:
591
* - if the fmt_list contains only formats which are swapped, but compatible
592
* with each other (B8G8R8A8_UNORM and B8G8R8A8_UINT for example), then
593
* tiling is still possible
594
* - figure out which UBWC compressions are compatible to keep it enabled
595
*/
596
if ((pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
597
!vk_format_is_depth_or_stencil(image->vk_format)) {
598
const VkImageFormatListCreateInfo *fmt_list =
599
vk_find_struct_const(pCreateInfo->pNext, IMAGE_FORMAT_LIST_CREATE_INFO);
600
bool may_be_swapped = true;
601
if (fmt_list) {
602
may_be_swapped = false;
603
for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
604
if (tu6_format_texture(fmt_list->pViewFormats[i], TILE6_LINEAR).swap) {
605
may_be_swapped = true;
606
break;
607
}
608
}
609
}
610
if (may_be_swapped)
611
tile_mode = TILE6_LINEAR;
612
ubwc_enabled = false;
613
}
614
615
const VkImageStencilUsageCreateInfo *stencil_usage_info =
616
vk_find_struct_const(pCreateInfo->pNext, IMAGE_STENCIL_USAGE_CREATE_INFO);
617
618
if (!ubwc_possible(image->vk_format, pCreateInfo->imageType, pCreateInfo->usage,
619
stencil_usage_info ? stencil_usage_info->stencilUsage : pCreateInfo->usage,
620
device->physical_device->info, pCreateInfo->samples))
621
ubwc_enabled = false;
622
623
/* expect UBWC enabled if we asked for it */
624
assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
625
626
for (uint32_t i = 0; i < tu6_plane_count(image->vk_format); i++) {
627
struct fdl_layout *layout = &image->layout[i];
628
VkFormat format = tu6_plane_format(image->vk_format, i);
629
uint32_t width0 = pCreateInfo->extent.width;
630
uint32_t height0 = pCreateInfo->extent.height;
631
632
if (i > 0) {
633
switch (image->vk_format) {
634
case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
635
case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
636
/* half width/height on chroma planes */
637
width0 = (width0 + 1) >> 1;
638
height0 = (height0 + 1) >> 1;
639
break;
640
case VK_FORMAT_D32_SFLOAT_S8_UINT:
641
/* no UBWC for separate stencil */
642
ubwc_enabled = false;
643
break;
644
default:
645
break;
646
}
647
}
648
649
struct fdl_explicit_layout plane_layout;
650
651
if (plane_layouts) {
652
/* only expect simple 2D images for now */
653
if (pCreateInfo->mipLevels != 1 ||
654
pCreateInfo->arrayLayers != 1 ||
655
pCreateInfo->extent.depth != 1)
656
goto invalid_layout;
657
658
plane_layout.offset = plane_layouts[i].offset;
659
plane_layout.pitch = plane_layouts[i].rowPitch;
660
/* note: use plane_layouts[0].arrayPitch to support array formats */
661
}
662
663
layout->tile_mode = tile_mode;
664
layout->ubwc = ubwc_enabled;
665
666
if (!fdl6_layout(layout, vk_format_to_pipe_format(format),
667
pCreateInfo->samples,
668
width0, height0,
669
pCreateInfo->extent.depth,
670
pCreateInfo->mipLevels,
671
pCreateInfo->arrayLayers,
672
pCreateInfo->imageType == VK_IMAGE_TYPE_3D,
673
plane_layouts ? &plane_layout : NULL)) {
674
assert(plane_layouts); /* can only fail with explicit layout */
675
goto invalid_layout;
676
}
677
678
/* fdl6_layout can't take explicit offset without explicit pitch
679
* add offset manually for extra layouts for planes
680
*/
681
if (!plane_layouts && i > 0) {
682
uint32_t offset = ALIGN_POT(image->total_size, 4096);
683
for (int i = 0; i < pCreateInfo->mipLevels; i++) {
684
layout->slices[i].offset += offset;
685
layout->ubwc_slices[i].offset += offset;
686
}
687
layout->size += offset;
688
}
689
690
image->total_size = MAX2(image->total_size, layout->size);
691
}
692
693
const struct util_format_description *desc = util_format_description(image->layout[0].format);
694
if (util_format_has_depth(desc) && !(device->instance->debug_flags & TU_DEBUG_NOLRZ))
695
{
696
/* Depth plane is the first one */
697
struct fdl_layout *layout = &image->layout[0];
698
unsigned width = layout->width0;
699
unsigned height = layout->height0;
700
701
/* LRZ buffer is super-sampled */
702
switch (layout->nr_samples) {
703
case 4:
704
width *= 2;
705
FALLTHROUGH;
706
case 2:
707
height *= 2;
708
break;
709
default:
710
break;
711
}
712
713
unsigned lrz_pitch = align(DIV_ROUND_UP(width, 8), 32);
714
unsigned lrz_height = align(DIV_ROUND_UP(height, 8), 16);
715
716
image->lrz_height = lrz_height;
717
image->lrz_pitch = lrz_pitch;
718
image->lrz_offset = image->total_size;
719
unsigned lrz_size = lrz_pitch * lrz_height * 2;
720
image->total_size += lrz_size;
721
}
722
723
*pImage = tu_image_to_handle(image);
724
725
#ifdef ANDROID
726
if (gralloc_info)
727
return tu_import_memory_from_gralloc_handle(_device, dma_buf, alloc, *pImage);
728
#endif
729
return VK_SUCCESS;
730
731
invalid_layout:
732
vk_object_free(&device->vk, alloc, image);
733
return vk_error(device->instance, VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT);
734
}
735
736
VKAPI_ATTR void VKAPI_CALL
737
tu_DestroyImage(VkDevice _device,
738
VkImage _image,
739
const VkAllocationCallbacks *pAllocator)
740
{
741
TU_FROM_HANDLE(tu_device, device, _device);
742
TU_FROM_HANDLE(tu_image, image, _image);
743
744
if (!image)
745
return;
746
747
#ifdef ANDROID
748
if (image->owned_memory != VK_NULL_HANDLE)
749
tu_FreeMemory(_device, image->owned_memory, pAllocator);
750
#endif
751
752
vk_object_free(&device->vk, pAllocator, image);
753
}
754
755
VKAPI_ATTR void VKAPI_CALL
756
tu_GetImageSubresourceLayout(VkDevice _device,
757
VkImage _image,
758
const VkImageSubresource *pSubresource,
759
VkSubresourceLayout *pLayout)
760
{
761
TU_FROM_HANDLE(tu_image, image, _image);
762
763
struct fdl_layout *layout =
764
&image->layout[tu6_plane_index(image->vk_format, pSubresource->aspectMask)];
765
const struct fdl_slice *slice = layout->slices + pSubresource->mipLevel;
766
767
pLayout->offset =
768
fdl_surface_offset(layout, pSubresource->mipLevel, pSubresource->arrayLayer);
769
pLayout->rowPitch = fdl_pitch(layout, pSubresource->mipLevel);
770
pLayout->arrayPitch = fdl_layer_stride(layout, pSubresource->mipLevel);
771
pLayout->depthPitch = slice->size0;
772
pLayout->size = pLayout->depthPitch * layout->depth0;
773
774
if (fdl_ubwc_enabled(layout, pSubresource->mipLevel)) {
775
/* UBWC starts at offset 0 */
776
pLayout->offset = 0;
777
/* UBWC scanout won't match what the kernel wants if we have levels/layers */
778
assert(image->level_count == 1 && image->layer_count == 1);
779
}
780
}
781
782
VKAPI_ATTR VkResult VKAPI_CALL
783
tu_GetImageDrmFormatModifierPropertiesEXT(
784
VkDevice device,
785
VkImage _image,
786
VkImageDrmFormatModifierPropertiesEXT* pProperties)
787
{
788
TU_FROM_HANDLE(tu_image, image, _image);
789
790
/* TODO invent a modifier for tiled but not UBWC buffers */
791
792
if (!image->layout[0].tile_mode)
793
pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
794
else if (image->layout[0].ubwc_layer_size)
795
pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
796
else
797
pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
798
799
return VK_SUCCESS;
800
}
801
802
803
VKAPI_ATTR VkResult VKAPI_CALL
804
tu_CreateImageView(VkDevice _device,
805
const VkImageViewCreateInfo *pCreateInfo,
806
const VkAllocationCallbacks *pAllocator,
807
VkImageView *pView)
808
{
809
TU_FROM_HANDLE(tu_device, device, _device);
810
struct tu_image_view *view;
811
812
view = vk_object_alloc(&device->vk, pAllocator, sizeof(*view),
813
VK_OBJECT_TYPE_IMAGE_VIEW);
814
if (view == NULL)
815
return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
816
817
tu_image_view_init(view, pCreateInfo, device->physical_device->info->a6xx.has_z24uint_s8uint);
818
819
*pView = tu_image_view_to_handle(view);
820
821
return VK_SUCCESS;
822
}
823
824
VKAPI_ATTR void VKAPI_CALL
825
tu_DestroyImageView(VkDevice _device,
826
VkImageView _iview,
827
const VkAllocationCallbacks *pAllocator)
828
{
829
TU_FROM_HANDLE(tu_device, device, _device);
830
TU_FROM_HANDLE(tu_image_view, iview, _iview);
831
832
if (!iview)
833
return;
834
835
vk_object_free(&device->vk, pAllocator, iview);
836
}
837
838
void
839
tu_buffer_view_init(struct tu_buffer_view *view,
840
struct tu_device *device,
841
const VkBufferViewCreateInfo *pCreateInfo)
842
{
843
TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
844
845
view->buffer = buffer;
846
847
enum VkFormat vfmt = pCreateInfo->format;
848
enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
849
const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
850
851
uint32_t range;
852
if (pCreateInfo->range == VK_WHOLE_SIZE)
853
range = buffer->size - pCreateInfo->offset;
854
else
855
range = pCreateInfo->range;
856
uint32_t elements = range / util_format_get_blocksize(pfmt);
857
858
static const VkComponentMapping components = {
859
.r = VK_COMPONENT_SWIZZLE_R,
860
.g = VK_COMPONENT_SWIZZLE_G,
861
.b = VK_COMPONENT_SWIZZLE_B,
862
.a = VK_COMPONENT_SWIZZLE_A,
863
};
864
865
uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
866
867
memset(&view->descriptor, 0, sizeof(view->descriptor));
868
869
view->descriptor[0] =
870
A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
871
A6XX_TEX_CONST_0_SWAP(fmt.swap) |
872
A6XX_TEX_CONST_0_FMT(fmt.fmt) |
873
A6XX_TEX_CONST_0_MIPLVLS(0) |
874
tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT, false);
875
COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
876
view->descriptor[1] =
877
A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
878
A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
879
view->descriptor[2] =
880
A6XX_TEX_CONST_2_UNK4 |
881
A6XX_TEX_CONST_2_UNK31;
882
view->descriptor[4] = iova;
883
view->descriptor[5] = iova >> 32;
884
}
885
886
VKAPI_ATTR VkResult VKAPI_CALL
887
tu_CreateBufferView(VkDevice _device,
888
const VkBufferViewCreateInfo *pCreateInfo,
889
const VkAllocationCallbacks *pAllocator,
890
VkBufferView *pView)
891
{
892
TU_FROM_HANDLE(tu_device, device, _device);
893
struct tu_buffer_view *view;
894
895
view = vk_object_alloc(&device->vk, pAllocator, sizeof(*view),
896
VK_OBJECT_TYPE_BUFFER_VIEW);
897
if (!view)
898
return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
899
900
tu_buffer_view_init(view, device, pCreateInfo);
901
902
*pView = tu_buffer_view_to_handle(view);
903
904
return VK_SUCCESS;
905
}
906
907
VKAPI_ATTR void VKAPI_CALL
908
tu_DestroyBufferView(VkDevice _device,
909
VkBufferView bufferView,
910
const VkAllocationCallbacks *pAllocator)
911
{
912
TU_FROM_HANDLE(tu_device, device, _device);
913
TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
914
915
if (!view)
916
return;
917
918
vk_object_free(&device->vk, pAllocator, view);
919
}
920
921