Path: blob/21.2-virgl/src/freedreno/vulkan/tu_image.c
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/*1* Copyright © 2016 Red Hat.2* Copyright © 2016 Bas Nieuwenhuizen3*4* based in part on anv driver which is:5* Copyright © 2015 Intel Corporation6*7* Permission is hereby granted, free of charge, to any person obtaining a8* copy of this software and associated documentation files (the "Software"),9* to deal in the Software without restriction, including without limitation10* the rights to use, copy, modify, merge, publish, distribute, sublicense,11* and/or sell copies of the Software, and to permit persons to whom the12* Software is furnished to do so, subject to the following conditions:13*14* The above copyright notice and this permission notice (including the next15* paragraph) shall be included in all copies or substantial portions of the16* Software.17*18* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR19* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,20* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL21* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER22* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING23* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER24* DEALINGS IN THE SOFTWARE.25*/2627#include "tu_private.h"2829#include "util/debug.h"30#include "util/u_atomic.h"31#include "util/format/u_format.h"32#include "vk_format.h"33#include "vk_util.h"34#include "drm-uapi/drm_fourcc.h"3536#include "tu_cs.h"3738static uint32_t39tu6_plane_count(VkFormat format)40{41switch (format) {42default:43return 1;44case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:45case VK_FORMAT_D32_SFLOAT_S8_UINT:46return 2;47case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:48return 3;49}50}5152static VkFormat53tu6_plane_format(VkFormat format, uint32_t plane)54{55switch (format) {56case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:57/* note: with UBWC, and Y plane UBWC is different from R8_UNORM */58return plane ? VK_FORMAT_R8G8_UNORM : VK_FORMAT_R8_UNORM;59case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:60return VK_FORMAT_R8_UNORM;61case VK_FORMAT_D32_SFLOAT_S8_UINT:62return plane ? VK_FORMAT_S8_UINT : VK_FORMAT_D32_SFLOAT;63default:64return format;65}66}6768static uint32_t69tu6_plane_index(VkFormat format, VkImageAspectFlags aspect_mask)70{71switch (aspect_mask) {72default:73return 0;74case VK_IMAGE_ASPECT_PLANE_1_BIT:75return 1;76case VK_IMAGE_ASPECT_PLANE_2_BIT:77return 2;78case VK_IMAGE_ASPECT_STENCIL_BIT:79return format == VK_FORMAT_D32_SFLOAT_S8_UINT;80}81}8283static void84compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)85{86unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };87VkComponentSwizzle vk_swiz[4] = {88mapping->r, mapping->g, mapping->b, mapping->a89};90for (int i = 0; i < 4; i++) {91switch (vk_swiz[i]) {92case VK_COMPONENT_SWIZZLE_IDENTITY:93swiz[i] = src_swiz[i];94break;95case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:96swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];97break;98case VK_COMPONENT_SWIZZLE_ZERO:99swiz[i] = A6XX_TEX_ZERO;100break;101case VK_COMPONENT_SWIZZLE_ONE:102swiz[i] = A6XX_TEX_ONE;103break;104default:105unreachable("unexpected swizzle");106}107}108}109110static uint32_t111tu6_texswiz(const VkComponentMapping *comps,112const struct tu_sampler_ycbcr_conversion *conversion,113VkFormat format,114VkImageAspectFlagBits aspect_mask,115bool has_z24uint_s8uint)116{117unsigned char swiz[4] = {118A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,119};120121switch (format) {122case VK_FORMAT_G8B8G8R8_422_UNORM:123case VK_FORMAT_B8G8R8G8_422_UNORM:124case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:125case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:126swiz[0] = A6XX_TEX_Z;127swiz[1] = A6XX_TEX_X;128swiz[2] = A6XX_TEX_Y;129break;130case VK_FORMAT_BC1_RGB_UNORM_BLOCK:131case VK_FORMAT_BC1_RGB_SRGB_BLOCK:132/* same hardware format is used for BC1_RGB / BC1_RGBA */133swiz[3] = A6XX_TEX_ONE;134break;135case VK_FORMAT_D24_UNORM_S8_UINT:136if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {137if (!has_z24uint_s8uint) {138/* using FMT6_8_8_8_8_UINT */139swiz[0] = A6XX_TEX_W;140swiz[1] = A6XX_TEX_ZERO;141} else {142/* using FMT6_Z24_UINT_S8_UINT */143swiz[0] = A6XX_TEX_Y;144swiz[1] = A6XX_TEX_ZERO;145}146}147break;148default:149break;150}151152compose_swizzle(swiz, comps);153if (conversion)154compose_swizzle(swiz, &conversion->components);155156return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |157A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |158A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |159A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);160}161162void163tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)164{165tu_cs_emit(cs, iview->PITCH);166tu_cs_emit(cs, iview->layer_size >> 6);167tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);168}169170void171tu_cs_image_stencil_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)172{173tu_cs_emit(cs, iview->stencil_PITCH);174tu_cs_emit(cs, iview->stencil_layer_size >> 6);175tu_cs_emit_qw(cs, iview->stencil_base_addr + iview->stencil_layer_size * layer);176}177178void179tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)180{181tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);182/* SP_PS_2D_SRC_PITCH has shifted pitch field */183tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));184}185186void187tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)188{189tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);190tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);191}192193void194tu_image_view_init(struct tu_image_view *iview,195const VkImageViewCreateInfo *pCreateInfo,196bool has_z24uint_s8uint)197{198TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);199const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;200VkFormat format = pCreateInfo->format;201VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;202203const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =204vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);205const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?206tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;207208iview->image = image;209210memset(iview->descriptor, 0, sizeof(iview->descriptor));211212struct fdl_layout *layout =213&image->layout[tu6_plane_index(image->vk_format, aspect_mask)];214215uint32_t width = u_minify(layout->width0, range->baseMipLevel);216uint32_t height = u_minify(layout->height0, range->baseMipLevel);217uint32_t storage_depth = tu_get_layerCount(image, range);218if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {219storage_depth = u_minify(image->layout[0].depth0, range->baseMipLevel);220}221222uint32_t depth = storage_depth;223if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||224pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {225/* Cubes are treated as 2D arrays for storage images, so only divide the226* depth by 6 for the texture descriptor.227*/228depth /= 6;229}230231uint64_t base_addr = image->bo->iova + image->bo_offset +232fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);233uint64_t ubwc_addr = image->bo->iova + image->bo_offset +234fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);235236uint32_t pitch = fdl_pitch(layout, range->baseMipLevel);237uint32_t ubwc_pitch = fdl_ubwc_pitch(layout, range->baseMipLevel);238uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);239240if (aspect_mask != VK_IMAGE_ASPECT_COLOR_BIT)241format = tu6_plane_format(format, tu6_plane_index(format, aspect_mask));242243struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);244/* note: freedreno layout assumes no TILE_ALL bit for non-UBWC color formats245* this means smaller mipmap levels have a linear tile mode.246* Depth/stencil formats have non-linear tile mode.247*/248fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);249250bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);251252bool is_d24s8 = (format == VK_FORMAT_D24_UNORM_S8_UINT ||253format == VK_FORMAT_X8_D24_UNORM_PACK32);254255if (is_d24s8 && ubwc_enabled)256fmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;257258unsigned fmt_tex = fmt.fmt;259if (is_d24s8) {260if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)261fmt_tex = FMT6_Z24_UNORM_S8_UINT;262if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)263fmt_tex = has_z24uint_s8uint ? FMT6_Z24_UINT_S8_UINT : FMT6_8_8_8_8_UINT;264/* TODO: also use this format with storage descriptor ? */265}266267iview->descriptor[0] =268A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |269COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |270A6XX_TEX_CONST_0_FMT(fmt_tex) |271A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(layout->nr_samples)) |272A6XX_TEX_CONST_0_SWAP(fmt.swap) |273tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask, has_z24uint_s8uint) |274A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);275iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);276iview->descriptor[2] =277A6XX_TEX_CONST_2_PITCHALIGN(layout->pitchalign - 6) |278A6XX_TEX_CONST_2_PITCH(pitch) |279A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));280iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);281iview->descriptor[4] = base_addr;282iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);283284if (layout->tile_all)285iview->descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL;286287if (format == VK_FORMAT_G8_B8R8_2PLANE_420_UNORM ||288format == VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM) {289/* chroma offset re-uses MIPLVLS bits */290assert(tu_get_levelCount(image, range) == 1);291if (conversion) {292if (conversion->chroma_offsets[0] == VK_CHROMA_LOCATION_MIDPOINT)293iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_X;294if (conversion->chroma_offsets[1] == VK_CHROMA_LOCATION_MIDPOINT)295iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_Y;296}297298uint64_t base_addr[3];299300iview->descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL;301if (ubwc_enabled) {302iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG;303/* no separate ubwc base, image must have the expected layout */304for (uint32_t i = 0; i < 3; i++) {305base_addr[i] = image->bo->iova + image->bo_offset +306fdl_ubwc_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);307}308} else {309for (uint32_t i = 0; i < 3; i++) {310base_addr[i] = image->bo->iova + image->bo_offset +311fdl_surface_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);312}313}314315iview->descriptor[4] = base_addr[0];316iview->descriptor[5] |= base_addr[0] >> 32;317iview->descriptor[6] =318A6XX_TEX_CONST_6_PLANE_PITCH(fdl_pitch(&image->layout[1], range->baseMipLevel));319iview->descriptor[7] = base_addr[1];320iview->descriptor[8] = base_addr[1] >> 32;321iview->descriptor[9] = base_addr[2];322iview->descriptor[10] = base_addr[2] >> 32;323324assert(pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_3D);325return;326}327328if (ubwc_enabled) {329uint32_t block_width, block_height;330fdl6_get_ubwc_blockwidth(layout, &block_width, &block_height);331332iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG;333iview->descriptor[7] = ubwc_addr;334iview->descriptor[8] = ubwc_addr >> 32;335iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);336iview->descriptor[10] |=337A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |338A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |339A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));340}341342if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {343iview->descriptor[3] |=344A6XX_TEX_CONST_3_MIN_LAYERSZ(layout->slices[image->level_count - 1].size0);345}346347iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(348.color_format = fmt.fmt,349.tile_mode = fmt.tile_mode,350.color_swap = fmt.swap,351.flags = ubwc_enabled,352.srgb = vk_format_is_srgb(format),353.samples = tu_msaa_samples(layout->nr_samples),354.samples_average = layout->nr_samples > 1 &&355!vk_format_is_int(format) &&356!vk_format_is_depth_or_stencil(format),357.unk20 = 1,358.unk22 = 1).value;359iview->SP_PS_2D_SRC_SIZE =360A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;361362/* note: these have same encoding for MRT and 2D (except 2D PITCH src) */363iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;364iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(365.pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;366367iview->base_addr = base_addr;368iview->ubwc_addr = ubwc_addr;369iview->layer_size = layer_size;370iview->ubwc_layer_size = layout->ubwc_layer_size;371372/* Don't set fields that are only used for attachments/blit dest if COLOR373* is unsupported.374*/375if (!(fmt.supported & FMT_COLOR))376return;377378struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);379cfmt.tile_mode = fmt.tile_mode;380381if (is_d24s8 && ubwc_enabled)382cfmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;383384memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));385386iview->storage_descriptor[0] =387A6XX_IBO_0_FMT(fmt.fmt) |388A6XX_IBO_0_TILE_MODE(fmt.tile_mode);389iview->storage_descriptor[1] =390A6XX_IBO_1_WIDTH(width) |391A6XX_IBO_1_HEIGHT(height);392iview->storage_descriptor[2] =393A6XX_IBO_2_PITCH(pitch) |394A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));395iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);396397iview->storage_descriptor[4] = base_addr;398iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);399400if (ubwc_enabled) {401iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;402iview->storage_descriptor[7] |= ubwc_addr;403iview->storage_descriptor[8] |= ubwc_addr >> 32;404iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);405iview->storage_descriptor[10] =406A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);407}408409iview->extent.width = width;410iview->extent.height = height;411iview->need_y2_align =412(fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);413414iview->ubwc_enabled = ubwc_enabled;415416iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,417.color_tile_mode = cfmt.tile_mode,418.color_format = cfmt.fmt,419.color_swap = cfmt.swap).value;420421iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,422.color_format = cfmt.fmt,423.color_sint = vk_format_is_sint(format),424.color_uint = vk_format_is_uint(format)).value;425426iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(427.color_format = cfmt.fmt,428.tile_mode = cfmt.tile_mode,429.color_swap = cfmt.swap,430.flags = ubwc_enabled,431.srgb = vk_format_is_srgb(format)).value;432433iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(434.tile_mode = cfmt.tile_mode,435.samples = tu_msaa_samples(layout->nr_samples),436.color_format = cfmt.fmt,437.color_swap = cfmt.swap,438.flags = ubwc_enabled).value;439440if (image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT) {441layout = &image->layout[1];442iview->stencil_base_addr = image->bo->iova + image->bo_offset +443fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);444iview->stencil_layer_size = fdl_layer_stride(layout, range->baseMipLevel);445iview->stencil_PITCH = A6XX_RB_STENCIL_BUFFER_PITCH(fdl_pitch(layout, range->baseMipLevel)).value;446}447}448449bool450ubwc_possible(VkFormat format, VkImageType type, VkImageUsageFlags usage,451VkImageUsageFlags stencil_usage, const struct fd_dev_info *info,452VkSampleCountFlagBits samples)453{454/* no UBWC with compressed formats, E5B9G9R9, S8_UINT455* (S8_UINT because separate stencil doesn't have UBWC-enable bit)456*/457if (vk_format_is_compressed(format) ||458format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 ||459format == VK_FORMAT_S8_UINT)460return false;461462if (!info->a6xx.has_8bpp_ubwc &&463(format == VK_FORMAT_R8_UNORM ||464format == VK_FORMAT_R8_SNORM ||465format == VK_FORMAT_R8_UINT ||466format == VK_FORMAT_R8_SINT ||467format == VK_FORMAT_R8_SRGB))468return false;469470if (type == VK_IMAGE_TYPE_3D) {471tu_finishme("UBWC with 3D textures");472return false;473}474475/* Disable UBWC for storage images.476*477* The closed GL driver skips UBWC for storage images (and additionally478* uses linear for writeonly images). We seem to have image tiling working479* in freedreno in general, so turnip matches that. freedreno also enables480* UBWC on images, but it's not really tested due to the lack of481* UBWC-enabled mipmaps in freedreno currently. Just match the closed GL482* behavior of no UBWC.483*/484if ((usage | stencil_usage) & VK_IMAGE_USAGE_STORAGE_BIT)485return false;486487/* Disable UBWC for D24S8 on A630 in some cases488*489* VK_IMAGE_ASPECT_STENCIL_BIT image view requires to be able to sample490* from the stencil component as UINT, however no format allows this491* on a630 (the special FMT6_Z24_UINT_S8_UINT format is missing)492*493* It must be sampled as FMT6_8_8_8_8_UINT, which is not UBWC-compatible494*495* Additionally, the special AS_R8G8B8A8 format is broken without UBWC,496* so we have to fallback to 8_8_8_8_UNORM when UBWC is disabled497*/498if (!info->a6xx.has_z24uint_s8uint &&499format == VK_FORMAT_D24_UNORM_S8_UINT &&500(stencil_usage & (VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)))501return false;502503if (!info->a6xx.has_z24uint_s8uint && samples > VK_SAMPLE_COUNT_1_BIT)504return false;505506return true;507}508509VKAPI_ATTR VkResult VKAPI_CALL510tu_CreateImage(VkDevice _device,511const VkImageCreateInfo *pCreateInfo,512const VkAllocationCallbacks *alloc,513VkImage *pImage)514{515TU_FROM_HANDLE(tu_device, device, _device);516uint64_t modifier = DRM_FORMAT_MOD_INVALID;517const VkSubresourceLayout *plane_layouts = NULL;518struct tu_image *image;519520if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {521const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =522vk_find_struct_const(pCreateInfo->pNext,523IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);524const VkImageDrmFormatModifierExplicitCreateInfoEXT *drm_explicit_info =525vk_find_struct_const(pCreateInfo->pNext,526IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);527528assert(mod_info || drm_explicit_info);529530if (mod_info) {531modifier = DRM_FORMAT_MOD_LINEAR;532for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {533if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)534modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;535}536} else {537modifier = drm_explicit_info->drmFormatModifier;538assert(modifier == DRM_FORMAT_MOD_LINEAR ||539modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED);540plane_layouts = drm_explicit_info->pPlaneLayouts;541}542} else {543const struct wsi_image_create_info *wsi_info =544vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);545if (wsi_info && wsi_info->scanout)546modifier = DRM_FORMAT_MOD_LINEAR;547}548549#ifdef ANDROID550const VkNativeBufferANDROID *gralloc_info =551vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);552int dma_buf;553if (gralloc_info) {554VkResult result = tu_gralloc_info(device, gralloc_info, &dma_buf, &modifier);555if (result != VK_SUCCESS)556return result;557}558#endif559560image = vk_object_zalloc(&device->vk, alloc, sizeof(*image),561VK_OBJECT_TYPE_IMAGE);562if (!image)563return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);564565const VkExternalMemoryImageCreateInfo *external_info =566vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);567image->shareable = external_info != NULL;568569image->vk_format = pCreateInfo->format;570image->level_count = pCreateInfo->mipLevels;571image->layer_count = pCreateInfo->arrayLayers;572573enum a6xx_tile_mode tile_mode = TILE6_3;574bool ubwc_enabled =575!(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);576577/* use linear tiling if requested */578if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR || modifier == DRM_FORMAT_MOD_LINEAR) {579tile_mode = TILE6_LINEAR;580ubwc_enabled = false;581}582583/* Mutable images can be reinterpreted as any other compatible format.584* This is a problem with UBWC (compression for different formats is different),585* but also tiling ("swap" affects how tiled formats are stored in memory)586* Depth and stencil formats cannot be reintepreted as another format, and587* cannot be linear with sysmem rendering, so don't fall back for those.588*589* TODO:590* - if the fmt_list contains only formats which are swapped, but compatible591* with each other (B8G8R8A8_UNORM and B8G8R8A8_UINT for example), then592* tiling is still possible593* - figure out which UBWC compressions are compatible to keep it enabled594*/595if ((pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&596!vk_format_is_depth_or_stencil(image->vk_format)) {597const VkImageFormatListCreateInfo *fmt_list =598vk_find_struct_const(pCreateInfo->pNext, IMAGE_FORMAT_LIST_CREATE_INFO);599bool may_be_swapped = true;600if (fmt_list) {601may_be_swapped = false;602for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {603if (tu6_format_texture(fmt_list->pViewFormats[i], TILE6_LINEAR).swap) {604may_be_swapped = true;605break;606}607}608}609if (may_be_swapped)610tile_mode = TILE6_LINEAR;611ubwc_enabled = false;612}613614const VkImageStencilUsageCreateInfo *stencil_usage_info =615vk_find_struct_const(pCreateInfo->pNext, IMAGE_STENCIL_USAGE_CREATE_INFO);616617if (!ubwc_possible(image->vk_format, pCreateInfo->imageType, pCreateInfo->usage,618stencil_usage_info ? stencil_usage_info->stencilUsage : pCreateInfo->usage,619device->physical_device->info, pCreateInfo->samples))620ubwc_enabled = false;621622/* expect UBWC enabled if we asked for it */623assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);624625for (uint32_t i = 0; i < tu6_plane_count(image->vk_format); i++) {626struct fdl_layout *layout = &image->layout[i];627VkFormat format = tu6_plane_format(image->vk_format, i);628uint32_t width0 = pCreateInfo->extent.width;629uint32_t height0 = pCreateInfo->extent.height;630631if (i > 0) {632switch (image->vk_format) {633case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:634case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:635/* half width/height on chroma planes */636width0 = (width0 + 1) >> 1;637height0 = (height0 + 1) >> 1;638break;639case VK_FORMAT_D32_SFLOAT_S8_UINT:640/* no UBWC for separate stencil */641ubwc_enabled = false;642break;643default:644break;645}646}647648struct fdl_explicit_layout plane_layout;649650if (plane_layouts) {651/* only expect simple 2D images for now */652if (pCreateInfo->mipLevels != 1 ||653pCreateInfo->arrayLayers != 1 ||654pCreateInfo->extent.depth != 1)655goto invalid_layout;656657plane_layout.offset = plane_layouts[i].offset;658plane_layout.pitch = plane_layouts[i].rowPitch;659/* note: use plane_layouts[0].arrayPitch to support array formats */660}661662layout->tile_mode = tile_mode;663layout->ubwc = ubwc_enabled;664665if (!fdl6_layout(layout, vk_format_to_pipe_format(format),666pCreateInfo->samples,667width0, height0,668pCreateInfo->extent.depth,669pCreateInfo->mipLevels,670pCreateInfo->arrayLayers,671pCreateInfo->imageType == VK_IMAGE_TYPE_3D,672plane_layouts ? &plane_layout : NULL)) {673assert(plane_layouts); /* can only fail with explicit layout */674goto invalid_layout;675}676677/* fdl6_layout can't take explicit offset without explicit pitch678* add offset manually for extra layouts for planes679*/680if (!plane_layouts && i > 0) {681uint32_t offset = ALIGN_POT(image->total_size, 4096);682for (int i = 0; i < pCreateInfo->mipLevels; i++) {683layout->slices[i].offset += offset;684layout->ubwc_slices[i].offset += offset;685}686layout->size += offset;687}688689image->total_size = MAX2(image->total_size, layout->size);690}691692const struct util_format_description *desc = util_format_description(image->layout[0].format);693if (util_format_has_depth(desc) && !(device->instance->debug_flags & TU_DEBUG_NOLRZ))694{695/* Depth plane is the first one */696struct fdl_layout *layout = &image->layout[0];697unsigned width = layout->width0;698unsigned height = layout->height0;699700/* LRZ buffer is super-sampled */701switch (layout->nr_samples) {702case 4:703width *= 2;704FALLTHROUGH;705case 2:706height *= 2;707break;708default:709break;710}711712unsigned lrz_pitch = align(DIV_ROUND_UP(width, 8), 32);713unsigned lrz_height = align(DIV_ROUND_UP(height, 8), 16);714715image->lrz_height = lrz_height;716image->lrz_pitch = lrz_pitch;717image->lrz_offset = image->total_size;718unsigned lrz_size = lrz_pitch * lrz_height * 2;719image->total_size += lrz_size;720}721722*pImage = tu_image_to_handle(image);723724#ifdef ANDROID725if (gralloc_info)726return tu_import_memory_from_gralloc_handle(_device, dma_buf, alloc, *pImage);727#endif728return VK_SUCCESS;729730invalid_layout:731vk_object_free(&device->vk, alloc, image);732return vk_error(device->instance, VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT);733}734735VKAPI_ATTR void VKAPI_CALL736tu_DestroyImage(VkDevice _device,737VkImage _image,738const VkAllocationCallbacks *pAllocator)739{740TU_FROM_HANDLE(tu_device, device, _device);741TU_FROM_HANDLE(tu_image, image, _image);742743if (!image)744return;745746#ifdef ANDROID747if (image->owned_memory != VK_NULL_HANDLE)748tu_FreeMemory(_device, image->owned_memory, pAllocator);749#endif750751vk_object_free(&device->vk, pAllocator, image);752}753754VKAPI_ATTR void VKAPI_CALL755tu_GetImageSubresourceLayout(VkDevice _device,756VkImage _image,757const VkImageSubresource *pSubresource,758VkSubresourceLayout *pLayout)759{760TU_FROM_HANDLE(tu_image, image, _image);761762struct fdl_layout *layout =763&image->layout[tu6_plane_index(image->vk_format, pSubresource->aspectMask)];764const struct fdl_slice *slice = layout->slices + pSubresource->mipLevel;765766pLayout->offset =767fdl_surface_offset(layout, pSubresource->mipLevel, pSubresource->arrayLayer);768pLayout->rowPitch = fdl_pitch(layout, pSubresource->mipLevel);769pLayout->arrayPitch = fdl_layer_stride(layout, pSubresource->mipLevel);770pLayout->depthPitch = slice->size0;771pLayout->size = pLayout->depthPitch * layout->depth0;772773if (fdl_ubwc_enabled(layout, pSubresource->mipLevel)) {774/* UBWC starts at offset 0 */775pLayout->offset = 0;776/* UBWC scanout won't match what the kernel wants if we have levels/layers */777assert(image->level_count == 1 && image->layer_count == 1);778}779}780781VKAPI_ATTR VkResult VKAPI_CALL782tu_GetImageDrmFormatModifierPropertiesEXT(783VkDevice device,784VkImage _image,785VkImageDrmFormatModifierPropertiesEXT* pProperties)786{787TU_FROM_HANDLE(tu_image, image, _image);788789/* TODO invent a modifier for tiled but not UBWC buffers */790791if (!image->layout[0].tile_mode)792pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;793else if (image->layout[0].ubwc_layer_size)794pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;795else796pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;797798return VK_SUCCESS;799}800801802VKAPI_ATTR VkResult VKAPI_CALL803tu_CreateImageView(VkDevice _device,804const VkImageViewCreateInfo *pCreateInfo,805const VkAllocationCallbacks *pAllocator,806VkImageView *pView)807{808TU_FROM_HANDLE(tu_device, device, _device);809struct tu_image_view *view;810811view = vk_object_alloc(&device->vk, pAllocator, sizeof(*view),812VK_OBJECT_TYPE_IMAGE_VIEW);813if (view == NULL)814return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);815816tu_image_view_init(view, pCreateInfo, device->physical_device->info->a6xx.has_z24uint_s8uint);817818*pView = tu_image_view_to_handle(view);819820return VK_SUCCESS;821}822823VKAPI_ATTR void VKAPI_CALL824tu_DestroyImageView(VkDevice _device,825VkImageView _iview,826const VkAllocationCallbacks *pAllocator)827{828TU_FROM_HANDLE(tu_device, device, _device);829TU_FROM_HANDLE(tu_image_view, iview, _iview);830831if (!iview)832return;833834vk_object_free(&device->vk, pAllocator, iview);835}836837void838tu_buffer_view_init(struct tu_buffer_view *view,839struct tu_device *device,840const VkBufferViewCreateInfo *pCreateInfo)841{842TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);843844view->buffer = buffer;845846enum VkFormat vfmt = pCreateInfo->format;847enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);848const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);849850uint32_t range;851if (pCreateInfo->range == VK_WHOLE_SIZE)852range = buffer->size - pCreateInfo->offset;853else854range = pCreateInfo->range;855uint32_t elements = range / util_format_get_blocksize(pfmt);856857static const VkComponentMapping components = {858.r = VK_COMPONENT_SWIZZLE_R,859.g = VK_COMPONENT_SWIZZLE_G,860.b = VK_COMPONENT_SWIZZLE_B,861.a = VK_COMPONENT_SWIZZLE_A,862};863864uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;865866memset(&view->descriptor, 0, sizeof(view->descriptor));867868view->descriptor[0] =869A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |870A6XX_TEX_CONST_0_SWAP(fmt.swap) |871A6XX_TEX_CONST_0_FMT(fmt.fmt) |872A6XX_TEX_CONST_0_MIPLVLS(0) |873tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT, false);874COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);875view->descriptor[1] =876A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |877A6XX_TEX_CONST_1_HEIGHT(elements >> 15);878view->descriptor[2] =879A6XX_TEX_CONST_2_UNK4 |880A6XX_TEX_CONST_2_UNK31;881view->descriptor[4] = iova;882view->descriptor[5] = iova >> 32;883}884885VKAPI_ATTR VkResult VKAPI_CALL886tu_CreateBufferView(VkDevice _device,887const VkBufferViewCreateInfo *pCreateInfo,888const VkAllocationCallbacks *pAllocator,889VkBufferView *pView)890{891TU_FROM_HANDLE(tu_device, device, _device);892struct tu_buffer_view *view;893894view = vk_object_alloc(&device->vk, pAllocator, sizeof(*view),895VK_OBJECT_TYPE_BUFFER_VIEW);896if (!view)897return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);898899tu_buffer_view_init(view, device, pCreateInfo);900901*pView = tu_buffer_view_to_handle(view);902903return VK_SUCCESS;904}905906VKAPI_ATTR void VKAPI_CALL907tu_DestroyBufferView(VkDevice _device,908VkBufferView bufferView,909const VkAllocationCallbacks *pAllocator)910{911TU_FROM_HANDLE(tu_device, device, _device);912TU_FROM_HANDLE(tu_buffer_view, view, bufferView);913914if (!view)915return;916917vk_object_free(&device->vk, pAllocator, view);918}919920921