Path: blob/21.2-virgl/src/freedreno/vulkan/tu_util.c
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/*1* Copyright © 2015 Intel Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER20* DEALINGS IN THE SOFTWARE.21*/2223#include "tu_private.h"2425#include <assert.h>26#include <errno.h>27#include <stdarg.h>28#include <stdio.h>29#include <stdlib.h>30#include <string.h>3132#include "util/u_math.h"33#include "vk_enum_to_str.h"3435void PRINTFLIKE(3, 4)36__tu_finishme(const char *file, int line, const char *format, ...)37{38va_list ap;39char buffer[256];4041va_start(ap, format);42vsnprintf(buffer, sizeof(buffer), format, ap);43va_end(ap);4445mesa_loge("%s:%d: FINISHME: %s\n", file, line, buffer);46}4748VkResult49__vk_errorf(struct tu_instance *instance,50VkResult error,51bool always_print,52const char *file,53int line,54const char *format,55...)56{57va_list ap;58char buffer[256];5960const char *error_str = vk_Result_to_str(error);6162#ifndef DEBUG63if (!always_print)64return error;65#endif6667if (format) {68va_start(ap, format);69vsnprintf(buffer, sizeof(buffer), format, ap);70va_end(ap);7172mesa_loge("%s:%d: %s (%s)\n", file, line, buffer, error_str);73} else {74mesa_loge("%s:%d: %s\n", file, line, error_str);75}7677return error;78}7980static void81tu_tiling_config_update_tile_layout(struct tu_framebuffer *fb,82const struct tu_device *dev,83const struct tu_render_pass *pass)84{85const uint32_t tile_align_w = pass->tile_align_w;86const uint32_t tile_align_h = dev->physical_device->info->tile_align_h;87const uint32_t max_tile_width = dev->physical_device->info->tile_max_w;88const uint32_t max_tile_height = dev->physical_device->info->tile_max_h;8990/* start from 1 tile */91fb->tile_count = (VkExtent2D) {92.width = 1,93.height = 1,94};95fb->tile0 = (VkExtent2D) {96.width = util_align_npot(fb->width, tile_align_w),97.height = align(fb->height, tile_align_h),98};99100/* will force to sysmem, don't bother trying to have a valid tile config101* TODO: just skip all GMEM stuff when sysmem is forced?102*/103if (!pass->gmem_pixels)104return;105106if (unlikely(dev->physical_device->instance->debug_flags & TU_DEBUG_FORCEBIN)) {107/* start with 2x2 tiles */108fb->tile_count.width = 2;109fb->tile_count.height = 2;110fb->tile0.width = util_align_npot(DIV_ROUND_UP(fb->width, 2), tile_align_w);111fb->tile0.height = align(DIV_ROUND_UP(fb->height, 2), tile_align_h);112}113114/* do not exceed max tile width */115while (fb->tile0.width > max_tile_width) {116fb->tile_count.width++;117fb->tile0.width =118util_align_npot(DIV_ROUND_UP(fb->width, fb->tile_count.width), tile_align_w);119}120121/* do not exceed max tile height */122while (fb->tile0.height > max_tile_height) {123fb->tile_count.height++;124fb->tile0.height =125util_align_npot(DIV_ROUND_UP(fb->height, fb->tile_count.height), tile_align_h);126}127128/* do not exceed gmem size */129while (fb->tile0.width * fb->tile0.height > pass->gmem_pixels) {130if (fb->tile0.width > MAX2(tile_align_w, fb->tile0.height)) {131fb->tile_count.width++;132fb->tile0.width =133util_align_npot(DIV_ROUND_UP(fb->width, fb->tile_count.width), tile_align_w);134} else {135/* if this assert fails then layout is impossible.. */136assert(fb->tile0.height > tile_align_h);137fb->tile_count.height++;138fb->tile0.height =139align(DIV_ROUND_UP(fb->height, fb->tile_count.height), tile_align_h);140}141}142}143144static void145tu_tiling_config_update_pipe_layout(struct tu_framebuffer *fb,146const struct tu_device *dev)147{148const uint32_t max_pipe_count = 32; /* A6xx */149150/* start from 1 tile per pipe */151fb->pipe0 = (VkExtent2D) {152.width = 1,153.height = 1,154};155fb->pipe_count = fb->tile_count;156157while (fb->pipe_count.width * fb->pipe_count.height > max_pipe_count) {158if (fb->pipe0.width < fb->pipe0.height) {159fb->pipe0.width += 1;160fb->pipe_count.width =161DIV_ROUND_UP(fb->tile_count.width, fb->pipe0.width);162} else {163fb->pipe0.height += 1;164fb->pipe_count.height =165DIV_ROUND_UP(fb->tile_count.height, fb->pipe0.height);166}167}168}169170static void171tu_tiling_config_update_pipes(struct tu_framebuffer *fb,172const struct tu_device *dev)173{174const uint32_t max_pipe_count = 32; /* A6xx */175const uint32_t used_pipe_count =176fb->pipe_count.width * fb->pipe_count.height;177const VkExtent2D last_pipe = {178.width = (fb->tile_count.width - 1) % fb->pipe0.width + 1,179.height = (fb->tile_count.height - 1) % fb->pipe0.height + 1,180};181182assert(used_pipe_count <= max_pipe_count);183assert(max_pipe_count <= ARRAY_SIZE(fb->pipe_config));184185for (uint32_t y = 0; y < fb->pipe_count.height; y++) {186for (uint32_t x = 0; x < fb->pipe_count.width; x++) {187const uint32_t pipe_x = fb->pipe0.width * x;188const uint32_t pipe_y = fb->pipe0.height * y;189const uint32_t pipe_w = (x == fb->pipe_count.width - 1)190? last_pipe.width191: fb->pipe0.width;192const uint32_t pipe_h = (y == fb->pipe_count.height - 1)193? last_pipe.height194: fb->pipe0.height;195const uint32_t n = fb->pipe_count.width * y + x;196197fb->pipe_config[n] = A6XX_VSC_PIPE_CONFIG_REG_X(pipe_x) |198A6XX_VSC_PIPE_CONFIG_REG_Y(pipe_y) |199A6XX_VSC_PIPE_CONFIG_REG_W(pipe_w) |200A6XX_VSC_PIPE_CONFIG_REG_H(pipe_h);201fb->pipe_sizes[n] = CP_SET_BIN_DATA5_0_VSC_SIZE(pipe_w * pipe_h);202}203}204205memset(fb->pipe_config + used_pipe_count, 0,206sizeof(uint32_t) * (max_pipe_count - used_pipe_count));207}208209void210tu_framebuffer_tiling_config(struct tu_framebuffer *fb,211const struct tu_device *device,212const struct tu_render_pass *pass)213{214tu_tiling_config_update_tile_layout(fb, device, pass);215tu_tiling_config_update_pipe_layout(fb, device);216tu_tiling_config_update_pipes(fb, device);217}218219220