Path: blob/21.2-virgl/src/gallium/auxiliary/driver_ddebug/dd_pipe.h
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/**************************************************************************1*2* Copyright 2015 Advanced Micro Devices, Inc.3* Copyright 2008 VMware, Inc.4* All Rights Reserved.5*6* Permission is hereby granted, free of charge, to any person obtaining a7* copy of this software and associated documentation files (the "Software"),8* to deal in the Software without restriction, including without limitation9* on the rights to use, copy, modify, merge, publish, distribute, sub10* license, and/or sell copies of the Software, and to permit persons to whom11* the Software is furnished to do so, subject to the following conditions:12*13* The above copyright notice and this permission notice (including the next14* paragraph) shall be included in all copies or substantial portions of the15* Software.16*17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,19* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL20* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,21* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR22* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE23* USE OR OTHER DEALINGS IN THE SOFTWARE.24*25**************************************************************************/2627#ifndef DD_H_28#define DD_H_2930#include "pipe/p_context.h"31#include "pipe/p_state.h"32#include "pipe/p_screen.h"33#include "dd_util.h"34#include "os/os_thread.h"35#include "util/list.h"36#include "util/u_log.h"37#include "util/u_queue.h"3839struct dd_context;4041enum dd_dump_mode {42DD_DUMP_ONLY_HANGS,43DD_DUMP_ALL_CALLS,44DD_DUMP_APITRACE_CALL,45};4647struct dd_screen48{49struct pipe_screen base;50struct pipe_screen *screen;51unsigned timeout_ms;52enum dd_dump_mode dump_mode;53bool flush_always;54bool transfers;55bool verbose;56unsigned skip_count;57unsigned apitrace_dump_call;58};5960enum call_type61{62CALL_FLUSH,63CALL_DRAW_VBO,64CALL_LAUNCH_GRID,65CALL_RESOURCE_COPY_REGION,66CALL_BLIT,67CALL_FLUSH_RESOURCE,68CALL_CLEAR,69CALL_CLEAR_BUFFER,70CALL_CLEAR_TEXTURE,71CALL_CLEAR_RENDER_TARGET,72CALL_CLEAR_DEPTH_STENCIL,73CALL_GENERATE_MIPMAP,74CALL_GET_QUERY_RESULT_RESOURCE,75CALL_TRANSFER_MAP,76CALL_TRANSFER_FLUSH_REGION,77CALL_TRANSFER_UNMAP,78CALL_BUFFER_SUBDATA,79CALL_TEXTURE_SUBDATA,80};8182struct call_resource_copy_region83{84struct pipe_resource *dst;85unsigned dst_level;86unsigned dstx, dsty, dstz;87struct pipe_resource *src;88unsigned src_level;89struct pipe_box src_box;90};9192struct call_clear93{94unsigned buffers;95struct pipe_scissor_state scissor_state;96union pipe_color_union color;97double depth;98unsigned stencil;99};100101struct call_clear_buffer102{103struct pipe_resource *res;104unsigned offset;105unsigned size;106const void *clear_value;107int clear_value_size;108};109110struct call_generate_mipmap {111struct pipe_resource *res;112enum pipe_format format;113unsigned base_level;114unsigned last_level;115unsigned first_layer;116unsigned last_layer;117};118119struct call_flush {120unsigned flags;121};122123struct call_draw_info {124struct pipe_draw_info info;125unsigned drawid_offset;126struct pipe_draw_indirect_info indirect;127struct pipe_draw_start_count_bias draw;128};129130struct call_get_query_result_resource {131struct pipe_query *query;132enum pipe_query_type query_type;133bool wait;134enum pipe_query_value_type result_type;135int index;136struct pipe_resource *resource;137unsigned offset;138};139140struct call_transfer_map {141struct pipe_transfer *transfer_ptr;142struct pipe_transfer transfer;143void *ptr;144};145146struct call_transfer_flush_region {147struct pipe_transfer *transfer_ptr;148struct pipe_transfer transfer;149struct pipe_box box;150};151152struct call_transfer_unmap {153struct pipe_transfer *transfer_ptr;154struct pipe_transfer transfer;155};156157struct call_buffer_subdata {158struct pipe_resource *resource;159unsigned usage;160unsigned offset;161unsigned size;162const void *data;163};164165struct call_texture_subdata {166struct pipe_resource *resource;167unsigned level;168unsigned usage;169struct pipe_box box;170const void *data;171unsigned stride;172unsigned layer_stride;173};174175struct dd_call176{177enum call_type type;178179union {180struct call_flush flush;181struct call_draw_info draw_vbo;182struct pipe_grid_info launch_grid;183struct call_resource_copy_region resource_copy_region;184struct pipe_blit_info blit;185struct pipe_resource *flush_resource;186struct call_clear clear;187struct call_clear_buffer clear_buffer;188struct call_generate_mipmap generate_mipmap;189struct call_get_query_result_resource get_query_result_resource;190struct call_transfer_map transfer_map;191struct call_transfer_flush_region transfer_flush_region;192struct call_transfer_unmap transfer_unmap;193struct call_buffer_subdata buffer_subdata;194struct call_texture_subdata texture_subdata;195} info;196};197198struct dd_query199{200unsigned type;201struct pipe_query *query;202};203204struct dd_state205{206void *cso;207208union {209struct pipe_blend_state blend;210struct pipe_depth_stencil_alpha_state dsa;211struct pipe_rasterizer_state rs;212struct pipe_sampler_state sampler;213struct {214struct pipe_vertex_element velems[PIPE_MAX_ATTRIBS];215unsigned count;216} velems;217struct pipe_shader_state shader;218} state;219};220221struct dd_draw_state222{223struct {224struct dd_query *query;225bool condition;226unsigned mode;227} render_cond;228229struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];230231unsigned num_so_targets;232struct pipe_stream_output_target *so_targets[PIPE_MAX_SO_BUFFERS];233unsigned so_offsets[PIPE_MAX_SO_BUFFERS];234235struct dd_state *shaders[PIPE_SHADER_TYPES];236struct pipe_constant_buffer constant_buffers[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];237struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];238struct dd_state *sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];239struct pipe_image_view shader_images[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_IMAGES];240struct pipe_shader_buffer shader_buffers[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];241242struct dd_state *velems;243struct dd_state *rs;244struct dd_state *dsa;245struct dd_state *blend;246247struct pipe_blend_color blend_color;248struct pipe_stencil_ref stencil_ref;249unsigned sample_mask;250unsigned min_samples;251struct pipe_clip_state clip_state;252struct pipe_framebuffer_state framebuffer_state;253struct pipe_poly_stipple polygon_stipple;254struct pipe_scissor_state scissors[PIPE_MAX_VIEWPORTS];255struct pipe_viewport_state viewports[PIPE_MAX_VIEWPORTS];256float tess_default_levels[6];257258unsigned apitrace_call_number;259};260261struct dd_draw_state_copy262{263struct dd_draw_state base;264265/* dd_draw_state_copy does not reference real CSOs. Instead, it points to266* these variables, which serve as storage.267*/268struct dd_query render_cond;269struct dd_state shaders[PIPE_SHADER_TYPES];270struct dd_state sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];271struct dd_state velems;272struct dd_state rs;273struct dd_state dsa;274struct dd_state blend;275};276277struct dd_draw_record {278struct list_head list;279struct dd_context *dctx;280281int64_t time_before;282int64_t time_after;283unsigned draw_call;284285/* The fence pointers are guaranteed to be valid once driver_finished is signalled */286struct pipe_fence_handle *prev_bottom_of_pipe;287struct pipe_fence_handle *top_of_pipe;288struct pipe_fence_handle *bottom_of_pipe;289290struct dd_call call;291struct dd_draw_state_copy draw_state;292293struct util_queue_fence driver_finished;294struct u_log_page *log_page;295};296297struct dd_context298{299struct pipe_context base;300struct pipe_context *pipe;301302struct dd_draw_state draw_state;303unsigned num_draw_calls;304305struct u_log_context log;306307/* Pipelined hang detection.308*309* Before each draw call, a new dd_draw_record is created that contains310* a copy of all states. After each draw call, the driver's log is added311* to this record. Additionally, deferred fences are associated to each312* record both before and after the draw.313*314* The records are handed off to a separate thread which waits on the315* records' fences. Records with signalled fences are freed. When a timeout316* is detected, the thread dumps the records of in-flight draws.317*/318thrd_t thread;319mtx_t mutex;320cnd_t cond;321struct list_head records; /* oldest record first */322unsigned num_records;323bool kill_thread;324bool api_stalled;325};326327328struct pipe_context *329dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe);330331void332dd_init_draw_functions(struct dd_context *dctx);333334void335dd_thread_join(struct dd_context *dctx);336int337dd_thread_main(void *input);338339FILE *340dd_get_file_stream(struct dd_screen *dscreen, unsigned apitrace_call_number);341342static inline struct dd_context *343dd_context(struct pipe_context *pipe)344{345return (struct dd_context *)pipe;346}347348static inline struct dd_screen *349dd_screen(struct pipe_screen *screen)350{351return (struct dd_screen*)screen;352}353354static inline struct dd_query *355dd_query(struct pipe_query *query)356{357return (struct dd_query *)query;358}359360static inline struct pipe_query *361dd_query_unwrap(struct pipe_query *query)362{363if (query) {364return dd_query(query)->query;365} else {366return NULL;367}368}369370371#define CTX_INIT(_member) \372dctx->base._member = dctx->pipe->_member ? dd_context_##_member : NULL373374#endif /* DD_H_ */375376377