Path: blob/21.2-virgl/src/gallium/auxiliary/tgsi/tgsi_info.h
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/**************************************************************************1*2* Copyright 2008 VMware, Inc.3* All Rights Reserved.4*5* Permission is hereby granted, free of charge, to any person obtaining a6* copy of this software and associated documentation files (the7* "Software"), to deal in the Software without restriction, including8* without limitation the rights to use, copy, modify, merge, publish,9* distribute, sub license, and/or sell copies of the Software, and to10* permit persons to whom the Software is furnished to do so, subject to11* the following conditions:12*13* The above copyright notice and this permission notice (including the14* next paragraph) shall be included in all copies or substantial portions15* of the Software.16*17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS18* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.20* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR21* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,22* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE23* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.24*25**************************************************************************/2627#ifndef TGSI_INFO_H28#define TGSI_INFO_H2930#include "pipe/p_compiler.h"31#include "pipe/p_shader_tokens.h"32#include "util/format/u_format.h"3334#if defined __cplusplus35extern "C" {36#endif3738/* This enum describes how an opcode calculates its result. */39enum tgsi_output_mode {40/** The opcode produces no result. */41TGSI_OUTPUT_NONE = 0,4243/** When this opcode writes to a channel of the destination register,44* it takes as arguments values from the same channel of the source45* register(s).46*47* Example: TGSI_OPCODE_ADD48*/49TGSI_OUTPUT_COMPONENTWISE = 1,5051/** This opcode writes the same value to all enabled channels of the52* destination register.53*54* Example: TGSI_OPCODE_RSQ55*/56TGSI_OUTPUT_REPLICATE = 2,5758/** The operation performed by this opcode is dependent on which channel59* of the destination register is being written.60*61* Example: TGSI_OPCODE_LOG62*/63TGSI_OUTPUT_CHAN_DEPENDENT = 3,6465/**66* Example: TGSI_OPCODE_TEX67*/68TGSI_OUTPUT_OTHER = 469};7071struct tgsi_opcode_info72{73unsigned num_dst:3;74unsigned num_src:3;75unsigned is_tex:1;76unsigned is_store:1;77unsigned is_branch:1;78unsigned pre_dedent:1;79unsigned post_indent:1;80enum tgsi_output_mode output_mode:4;81enum tgsi_opcode opcode:10;82};8384const struct tgsi_opcode_info *85tgsi_get_opcode_info(enum tgsi_opcode opcode);8687const char *88tgsi_get_opcode_name(enum tgsi_opcode opcode);8990const char *91tgsi_get_processor_name(enum pipe_shader_type processor);9293enum tgsi_opcode_type {94TGSI_TYPE_UNTYPED, /* for MOV */95TGSI_TYPE_VOID,96TGSI_TYPE_UNSIGNED,97TGSI_TYPE_SIGNED,98TGSI_TYPE_FLOAT,99TGSI_TYPE_DOUBLE,100TGSI_TYPE_UNSIGNED64,101TGSI_TYPE_SIGNED64,102};103104static inline bool tgsi_type_is_64bit(enum tgsi_opcode_type type)105{106if (type == TGSI_TYPE_DOUBLE || type == TGSI_TYPE_UNSIGNED64 ||107type == TGSI_TYPE_SIGNED64)108return true;109return false;110}111112enum tgsi_opcode_type113tgsi_opcode_infer_src_type(enum tgsi_opcode opcode, uint src_idx);114115enum tgsi_opcode_type116tgsi_opcode_infer_dst_type(enum tgsi_opcode opcode, uint dst_idx);117118#if defined __cplusplus119}120#endif121122#endif /* TGSI_INFO_H */123124125