Path: blob/21.2-virgl/src/gallium/drivers/crocus/crocus_resource.h
4570 views
/*1* Copyright 2017 Intel Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* on the rights to use, copy, modify, merge, publish, distribute, sub7* license, and/or sell copies of the Software, and to permit persons to whom8* the Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,18* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR19* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE20* USE OR OTHER DEALINGS IN THE SOFTWARE.21*/22#ifndef CROCUS_RESOURCE_H23#define CROCUS_RESOURCE_H2425#include "pipe/p_state.h"26#include "util/u_inlines.h"27#include "util/u_range.h"28#include "util/u_threaded_context.h"29#include "intel/isl/isl.h"30#include "intel/dev/intel_device_info.h"31#include "crocus_bufmgr.h"3233struct crocus_batch;34struct crocus_context;3536#define CROCUS_MAX_MIPLEVELS 153738struct crocus_format_info {39enum isl_format fmt;40enum pipe_swizzle swizzles[4];41};4243static inline enum isl_channel_select44pipe_to_isl_swizzle(const enum pipe_swizzle pswz, bool green_to_blue)45{46unsigned swz = (pswz + 4) & 7;4748return (green_to_blue && swz == ISL_CHANNEL_SELECT_GREEN) ? ISL_CHANNEL_SELECT_BLUE : swz;49}5051static inline struct isl_swizzle52pipe_to_isl_swizzles(const enum pipe_swizzle pswz[4])53{54struct isl_swizzle swz;55swz.r = pipe_to_isl_swizzle(pswz[0], false);56swz.g = pipe_to_isl_swizzle(pswz[1], false);57swz.b = pipe_to_isl_swizzle(pswz[2], false);58swz.a = pipe_to_isl_swizzle(pswz[3], false);59return swz;60}6162static inline void63crocus_combine_swizzle(enum pipe_swizzle outswz[4],64const enum pipe_swizzle fswz[4],65const enum pipe_swizzle vswz[4])66{67for (unsigned i = 0; i < 4; i++) {68switch (vswz[i]) {69case PIPE_SWIZZLE_X: outswz[i] = fswz[0]; break;70case PIPE_SWIZZLE_Y: outswz[i] = fswz[1]; break;71case PIPE_SWIZZLE_Z: outswz[i] = fswz[2]; break;72case PIPE_SWIZZLE_W: outswz[i] = fswz[3]; break;73case PIPE_SWIZZLE_1: outswz[i] = PIPE_SWIZZLE_1; break;74case PIPE_SWIZZLE_0: outswz[i] = PIPE_SWIZZLE_0; break;75default: unreachable("invalid swizzle");76}77}78}7980/**81* Resources represent a GPU buffer object or image (mipmap tree).82*83* They contain the storage (BO) and layout information (ISL surface).84*/85struct crocus_resource {86struct threaded_resource base;87enum pipe_format internal_format;8889/**90* The ISL surface layout information for this resource.91*92* This is not filled out for PIPE_BUFFER resources, but is guaranteed93* to be zeroed. Note that this also guarantees that res->surf.tiling94* will be ISL_TILING_LINEAR, so it's safe to check that.95*/96struct isl_surf surf;9798/** Backing storage for the resource */99struct crocus_bo *bo;100101/** offset at which data starts in the BO */102uint64_t offset;103104/**105* A bitfield of PIPE_BIND_* indicating how this resource was bound106* in the past. Only meaningful for PIPE_BUFFER; used for flushing.107*/108unsigned bind_history;109110/**111* A bitfield of MESA_SHADER_* stages indicating where this resource112* was bound.113*/114unsigned bind_stages;115116/**117* For PIPE_BUFFER resources, a range which may contain valid data.118*119* This is a conservative estimate of what part of the buffer contains120* valid data that we have to preserve. The rest of the buffer is121* considered invalid, and we can promote writes to that region to122* be unsynchronized writes, avoiding blit copies.123*/124struct util_range valid_buffer_range;125126/**127* Auxiliary buffer information (CCS, MCS, or HiZ).128*/129struct {130/** The surface layout for the auxiliary buffer. */131struct isl_surf surf;132133/** The buffer object containing the auxiliary data. */134struct crocus_bo *bo;135136/** Offset into 'bo' where the auxiliary surface starts. */137uint32_t offset;138139/**140* Fast clear color for this surface. For depth surfaces, the clear141* value is stored as a float32 in the red component.142*/143union isl_color_value clear_color;144145/**146* \brief The type of auxiliary compression used by this resource.147*148* This describes the type of auxiliary compression that is intended to149* be used by this resource. An aux usage of ISL_AUX_USAGE_NONE means150* that auxiliary compression is permanently disabled. An aux usage151* other than ISL_AUX_USAGE_NONE does not imply that auxiliary152* compression will always be enabled for this surface.153*/154enum isl_aux_usage usage;155156/**157* \brief Maps miptree slices to their current aux state.158*159* This two-dimensional array is indexed as [level][layer] and stores an160* aux state for each slice.161*/162enum isl_aux_state **state;163164/**165* If (1 << level) is set, HiZ is enabled for that miplevel.166*/167uint16_t has_hiz;168} aux;169170/**171* \brief Shadow miptree for sampling when the main isn't supported by HW.172*173* To workaround various sampler bugs and limitations, we blit the main174* texture into a new texture that can be sampled.175*176* This miptree may be used for:177* - Stencil texturing (pre-BDW) as required by GL_ARB_stencil_texturing.178*/179struct crocus_resource *shadow;180bool shadow_needs_update;181182/**183* For external surfaces, this is format that was used to create or import184* the surface. For internal surfaces, this will always be185* PIPE_FORMAT_NONE.186*/187enum pipe_format external_format;188189/**190* For external surfaces, this is DRM format modifier that was used to191* create or import the surface. For internal surfaces, this will always192* be DRM_FORMAT_MOD_INVALID.193*/194const struct isl_drm_modifier_info *mod_info;195196/**197* The screen the resource was originally created with, stored for refcounting.198*/199struct pipe_screen *orig_screen;200};201202/**203* A simple <resource, offset> tuple for storing a reference to a204* piece of state stored in a GPU buffer object.205*/206struct crocus_state_ref {207struct pipe_resource *res;208uint32_t offset;209};210211/**212* Gallium CSO for sampler views (texture views).213*214* In addition to the normal pipe_resource, this adds an ISL view215* which may reinterpret the format or restrict levels/layers.216*217* These can also be linear texture buffers.218*/219struct crocus_sampler_view {220struct pipe_sampler_view base;221struct isl_view view;222struct isl_view gather_view;223224enum pipe_swizzle swizzle[4];225union isl_color_value clear_color;226227/* A short-cut (not a reference) to the actual resource being viewed.228* Multi-planar (or depth+stencil) images may have multiple resources229* chained together; this skips having to traverse base->texture->*.230*/231struct crocus_resource *res;232};233234/**235* Image view representation.236*/237struct crocus_image_view {238struct pipe_image_view base;239struct isl_view view;240};241242/**243* Gallium CSO for surfaces (framebuffer attachments).244*245* A view of a surface that can be bound to a color render target or246* depth/stencil attachment.247*/248struct crocus_surface {249struct pipe_surface base;250struct isl_view view;251struct isl_view read_view;252struct isl_surf surf;253union isl_color_value clear_color;254255struct pipe_resource *align_res;256};257258/**259* Transfer object - information about a buffer mapping.260*/261struct crocus_transfer {262struct threaded_transfer base;263struct pipe_debug_callback *dbg;264void *buffer;265void *ptr;266267/** A linear staging resource for GPU-based copy_region transfers. */268struct pipe_resource *staging;269struct blorp_context *blorp;270struct crocus_batch *batch;271272bool dest_had_defined_contents;273bool has_swizzling;274275void (*unmap)(struct crocus_transfer *);276};277278/**279* Memory Object280*/281struct crocus_memory_object {282struct pipe_memory_object b;283struct crocus_bo *bo;284uint64_t format;285unsigned stride;286};287288/**289* Unwrap a pipe_resource to get the underlying crocus_bo (for convenience).290*/291static inline struct crocus_bo *292crocus_resource_bo(struct pipe_resource *p_res)293{294struct crocus_resource *res = (void *) p_res;295return res->bo;296}297298static inline uint32_t299crocus_mocs(const struct crocus_bo *bo,300const struct isl_device *dev)301{302return isl_mocs(dev, 0, bo && crocus_bo_is_external(bo));303}304305struct crocus_format_info crocus_format_for_usage(const struct intel_device_info *,306enum pipe_format pf,307isl_surf_usage_flags_t usage);308309static inline struct pipe_resource *310_crocus_resource_get_separate_stencil(struct pipe_resource *p_res)311{312/* For packed depth-stencil, we treat depth as the primary resource313* and store S8 as the "second plane" resource.314*/315if (p_res->next && p_res->next->format == PIPE_FORMAT_S8_UINT)316return p_res->next;317318return NULL;319320}321static inline void322crocus_get_depth_stencil_resources(const struct intel_device_info *devinfo,323struct pipe_resource *res,324struct crocus_resource **out_z,325struct crocus_resource **out_s)326{327/* gen4/5 only supports packed ds */328if (devinfo->ver < 6) {329*out_z = (void *)res;330*out_s = (void *)res;331return;332}333334if (res && res->format != PIPE_FORMAT_S8_UINT) {335*out_z = (void *) res;336*out_s = (void *) _crocus_resource_get_separate_stencil(res);337} else {338*out_z = NULL;339*out_s = (void *) res;340}341}342343344bool crocus_resource_set_clear_color(struct crocus_context *ice,345struct crocus_resource *res,346union isl_color_value color);347union isl_color_value348crocus_resource_get_clear_color(const struct crocus_resource *res);349350void351crocus_replace_buffer_storage(struct pipe_context *ctx,352struct pipe_resource *p_dst,353struct pipe_resource *p_src,354unsigned num_rebinds,355uint32_t rebind_mask,356uint32_t delete_buffer_id);357358void crocus_init_screen_resource_functions(struct pipe_screen *pscreen);359360void crocus_dirty_for_history(struct crocus_context *ice,361struct crocus_resource *res);362uint32_t crocus_flush_bits_for_history(struct crocus_resource *res);363364void crocus_flush_and_dirty_for_history(struct crocus_context *ice,365struct crocus_batch *batch,366struct crocus_resource *res,367uint32_t extra_flags,368const char *reason);369370unsigned crocus_get_num_logical_layers(const struct crocus_resource *res,371unsigned level);372373void crocus_resource_disable_aux(struct crocus_resource *res);374375#define INTEL_REMAINING_LAYERS UINT32_MAX376#define INTEL_REMAINING_LEVELS UINT32_MAX377378void379crocus_hiz_exec(struct crocus_context *ice,380struct crocus_batch *batch,381struct crocus_resource *res,382unsigned int level, unsigned int start_layer,383unsigned int num_layers, enum isl_aux_op op,384bool update_clear_depth);385386/**387* Prepare a miptree for access388*389* This function should be called prior to any access to miptree in order to390* perform any needed resolves.391*392* \param[in] start_level The first mip level to be accessed393*394* \param[in] num_levels The number of miplevels to be accessed or395* INTEL_REMAINING_LEVELS to indicate every level396* above start_level will be accessed397*398* \param[in] start_layer The first array slice or 3D layer to be accessed399*400* \param[in] num_layers The number of array slices or 3D layers be401* accessed or INTEL_REMAINING_LAYERS to indicate402* every layer above start_layer will be accessed403*404* \param[in] aux_supported Whether or not the access will support the405* miptree's auxiliary compression format; this406* must be false for uncompressed miptrees407*408* \param[in] fast_clear_supported Whether or not the access will support409* fast clears in the miptree's auxiliary410* compression format411*/412void413crocus_resource_prepare_access(struct crocus_context *ice,414struct crocus_resource *res,415uint32_t start_level, uint32_t num_levels,416uint32_t start_layer, uint32_t num_layers,417enum isl_aux_usage aux_usage,418bool fast_clear_supported);419420/**421* Complete a write operation422*423* This function should be called after any operation writes to a miptree.424* This will update the miptree's compression state so that future resolves425* happen correctly. Technically, this function can be called before the426* write occurs but the caller must ensure that they don't interlace427* crocus_resource_prepare_access and crocus_resource_finish_write calls to428* overlapping layer/level ranges.429*430* \param[in] level The mip level that was written431*432* \param[in] start_layer The first array slice or 3D layer written433*434* \param[in] num_layers The number of array slices or 3D layers435* written or INTEL_REMAINING_LAYERS to indicate436* every layer above start_layer was written437*438* \param[in] written_with_aux Whether or not the write was done with439* auxiliary compression enabled440*/441void442crocus_resource_finish_write(struct crocus_context *ice,443struct crocus_resource *res, uint32_t level,444uint32_t start_layer, uint32_t num_layers,445enum isl_aux_usage aux_usage);446447/** Get the auxiliary compression state of a miptree slice */448enum isl_aux_state449crocus_resource_get_aux_state(const struct crocus_resource *res,450uint32_t level, uint32_t layer);451452/**453* Set the auxiliary compression state of a miptree slice range454*455* This function directly sets the auxiliary compression state of a slice456* range of a miptree. It only modifies data structures and does not do any457* resolves. This should only be called by code which directly performs458* compression operations such as fast clears and resolves. Most code should459* use crocus_resource_prepare_access or crocus_resource_finish_write.460*/461void462crocus_resource_set_aux_state(struct crocus_context *ice,463struct crocus_resource *res, uint32_t level,464uint32_t start_layer, uint32_t num_layers,465enum isl_aux_state aux_state);466467/**468* Prepare a miptree for raw access469*470* This helper prepares the miptree for access that knows nothing about any471* sort of compression whatsoever. This is useful when mapping the surface or472* using it with the blitter.473*/474static inline void475crocus_resource_access_raw(struct crocus_context *ice,476struct crocus_resource *res,477uint32_t level, uint32_t layer,478uint32_t num_layers,479bool write)480{481crocus_resource_prepare_access(ice, res, level, 1, layer, num_layers,482ISL_AUX_USAGE_NONE, false);483if (write) {484crocus_resource_finish_write(ice, res, level, layer, num_layers,485ISL_AUX_USAGE_NONE);486}487}488489void490crocus_resource_get_image_offset(struct crocus_resource *res,491uint32_t level, uint32_t z,492uint32_t *x, uint32_t *y);493static inline enum isl_aux_usage494crocus_resource_texture_aux_usage(const struct crocus_resource *res)495{496return res->aux.usage == ISL_AUX_USAGE_MCS ? ISL_AUX_USAGE_MCS : ISL_AUX_USAGE_NONE;497}498499void crocus_resource_prepare_texture(struct crocus_context *ice,500struct crocus_resource *res,501enum isl_format view_format,502uint32_t start_level, uint32_t num_levels,503uint32_t start_layer, uint32_t num_layers);504505static inline bool506crocus_resource_unfinished_aux_import(struct crocus_resource *res)507{508return res->base.b.next != NULL && res->mod_info &&509res->mod_info->aux_usage != ISL_AUX_USAGE_NONE;510}511512void crocus_resource_finish_aux_import(struct pipe_screen *pscreen,513struct crocus_resource *res);514515bool crocus_has_invalid_primary(const struct crocus_resource *res,516unsigned start_level, unsigned num_levels,517unsigned start_layer, unsigned num_layers);518519void crocus_resource_check_level_layer(const struct crocus_resource *res,520uint32_t level, uint32_t layer);521522bool crocus_resource_level_has_hiz(const struct crocus_resource *res,523uint32_t level);524bool crocus_has_color_unresolved(const struct crocus_resource *res,525unsigned start_level, unsigned num_levels,526unsigned start_layer, unsigned num_layers);527528enum isl_aux_usage crocus_resource_render_aux_usage(struct crocus_context *ice,529struct crocus_resource *res,530uint32_t level,531enum isl_format render_fmt,532bool draw_aux_disabled);533void crocus_resource_prepare_render(struct crocus_context *ice,534struct crocus_resource *res, uint32_t level,535uint32_t start_layer, uint32_t layer_count,536enum isl_aux_usage aux_usage);537void crocus_resource_finish_render(struct crocus_context *ice,538struct crocus_resource *res, uint32_t level,539uint32_t start_layer, uint32_t layer_count,540enum isl_aux_usage aux_usage);541#endif542543544