Path: blob/21.2-virgl/src/gallium/drivers/etnaviv/etnaviv_resource.c
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/*1* Copyright (c) 2012-2015 Etnaviv Project2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sub license,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the11* next paragraph) shall be included in all copies or substantial portions12* of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER20* DEALINGS IN THE SOFTWARE.21*22* Authors:23* Wladimir J. van der Laan <[email protected]>24*/2526#include "etnaviv_resource.h"2728#include "hw/common.xml.h"2930#include "etnaviv_context.h"31#include "etnaviv_debug.h"32#include "etnaviv_screen.h"33#include "etnaviv_translate.h"3435#include "util/hash_table.h"36#include "util/u_inlines.h"37#include "util/u_memory.h"3839#include "drm-uapi/drm_fourcc.h"4041static enum etna_surface_layout modifier_to_layout(uint64_t modifier)42{43switch (modifier) {44case DRM_FORMAT_MOD_VIVANTE_TILED:45return ETNA_LAYOUT_TILED;46case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:47return ETNA_LAYOUT_SUPER_TILED;48case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:49return ETNA_LAYOUT_MULTI_TILED;50case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:51return ETNA_LAYOUT_MULTI_SUPERTILED;52case DRM_FORMAT_MOD_LINEAR:53default:54return ETNA_LAYOUT_LINEAR;55}56}5758static uint64_t layout_to_modifier(enum etna_surface_layout layout)59{60switch (layout) {61case ETNA_LAYOUT_TILED:62return DRM_FORMAT_MOD_VIVANTE_TILED;63case ETNA_LAYOUT_SUPER_TILED:64return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;65case ETNA_LAYOUT_MULTI_TILED:66return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;67case ETNA_LAYOUT_MULTI_SUPERTILED:68return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;69case ETNA_LAYOUT_LINEAR:70return DRM_FORMAT_MOD_LINEAR;71default:72return DRM_FORMAT_MOD_INVALID;73}74}7576/* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.77* So, in a buffer of N pixels, there are N / (4 * 4) tiles.78* We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or79* N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.80*/81bool82etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,83struct etna_resource *rsc)84{85struct etna_screen *screen = etna_screen(pscreen);86size_t rt_ts_size, ts_layer_stride;87size_t ts_bits_per_tile, bytes_per_tile;88uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */89int8_t ts_compress_fmt;9091assert(!rsc->ts_bo);9293/* pre-v4 compression is largely useless, so disable it when not wanted for MSAA94* v4 compression can be enabled everywhere without any known drawback,95* except that in-place resolve must go through a slower path96*/97ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?98translate_ts_format(rsc->base.format) : -1;99100if (screen->specs.halti >= 5) {101/* enable 256B ts mode with compression, as it improves performance102* the size of the resource might also determine if we want to use it or not103*/104if (ts_compress_fmt >= 0)105ts_mode = TS_MODE_256B;106107ts_bits_per_tile = 4;108bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;109} else {110ts_bits_per_tile = screen->specs.bits_per_tile;111bytes_per_tile = 64;112}113114ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,115bytes_per_tile * 8 / ts_bits_per_tile),1160x100 * screen->specs.pixel_pipes);117rt_ts_size = ts_layer_stride * rsc->base.array_size;118if (rt_ts_size == 0)119return true;120121DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",122rsc, rt_ts_size);123124struct etna_bo *rt_ts;125rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);126127if (unlikely(!rt_ts)) {128BUG("Problem allocating tile status for resource");129return false;130}131132rsc->ts_bo = rt_ts;133rsc->levels[0].ts_offset = 0;134rsc->levels[0].ts_layer_stride = ts_layer_stride;135rsc->levels[0].ts_size = rt_ts_size;136rsc->levels[0].ts_mode = ts_mode;137rsc->levels[0].ts_compress_fmt = ts_compress_fmt;138139return true;140}141142static bool143etna_screen_can_create_resource(struct pipe_screen *pscreen,144const struct pipe_resource *templat)145{146struct etna_screen *screen = etna_screen(pscreen);147if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL))148return false;149150/* templat->bind is not set here, so we must use the minimum sizes */151uint max_size =152MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);153154if (templat->width0 > max_size || templat->height0 > max_size)155return false;156157return true;158}159160static unsigned161setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,162unsigned msaa_xscale, unsigned msaa_yscale)163{164struct pipe_resource *prsc = &rsc->base;165unsigned level, size = 0;166unsigned width = prsc->width0;167unsigned height = prsc->height0;168unsigned depth = prsc->depth0;169170for (level = 0; level <= prsc->last_level; level++) {171struct etna_resource_level *mip = &rsc->levels[level];172173mip->width = width;174mip->height = height;175mip->depth = depth;176mip->padded_width = align(width * msaa_xscale, paddingX);177mip->padded_height = align(height * msaa_yscale, paddingY);178mip->stride = util_format_get_stride(prsc->format, mip->padded_width);179mip->offset = size;180mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);181mip->size = prsc->array_size * mip->layer_stride;182183/* align levels to 64 bytes to be able to render to them */184size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;185186width = u_minify(width, 1);187height = u_minify(height, 1);188depth = u_minify(depth, 1);189}190191return size;192}193194/* Is rs alignment needed? */195static bool is_rs_align(struct etna_screen *screen,196const struct pipe_resource *tmpl)197{198return screen->specs.use_blt ? false : (199VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||200!etna_resource_sampler_only(tmpl));201}202203/* Create a new resource object, using the given template info */204struct pipe_resource *205etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,206uint64_t modifier, const struct pipe_resource *templat)207{208struct etna_screen *screen = etna_screen(pscreen);209struct etna_resource *rsc;210unsigned size;211212DBG_F(ETNA_DBG_RESOURCE_MSGS,213"target=%d, format=%s, %ux%ux%u, array_size=%u, "214"last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",215templat->target, util_format_name(templat->format), templat->width0,216templat->height0, templat->depth0, templat->array_size,217templat->last_level, templat->nr_samples, templat->usage,218templat->bind, templat->flags);219220/* Determine scaling for antialiasing, allow override using debug flag */221int nr_samples = templat->nr_samples;222if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&223!(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {224if (DBG_ENABLED(ETNA_DBG_MSAA_2X))225nr_samples = 2;226if (DBG_ENABLED(ETNA_DBG_MSAA_4X))227nr_samples = 4;228}229230int msaa_xscale = 1, msaa_yscale = 1;231if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale)) {232/* Number of samples not supported */233return NULL;234}235236/* Determine needed padding (alignment of height/width) */237unsigned paddingX = 0, paddingY = 0;238unsigned halign = TEXTURE_HALIGN_FOUR;239if (!util_format_is_compressed(templat->format)) {240/* If we have the TEXTURE_HALIGN feature, we can always align to the241* resolve engine's width. If not, we must not align resources used242* only for textures. If this GPU uses the BLT engine, never do RS align.243*/244etna_layout_multiple(layout, screen->specs.pixel_pipes,245is_rs_align (screen, templat),246&paddingX, &paddingY, &halign);247assert(paddingX && paddingY);248} else {249/* Compressed textures are padded to their block size, but we don't have250* to do anything special for that. */251paddingX = 1;252paddingY = 1;253}254255if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)256paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);257258rsc = CALLOC_STRUCT(etna_resource);259if (!rsc)260return NULL;261262rsc->base = *templat;263rsc->base.screen = pscreen;264rsc->base.nr_samples = nr_samples;265rsc->layout = layout;266rsc->halign = halign;267rsc->explicit_flush = true;268269pipe_reference_init(&rsc->base.reference, 1);270util_range_init(&rsc->valid_buffer_range);271272size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);273274if (unlikely(templat->bind & PIPE_BIND_SCANOUT) && screen->ro) {275struct pipe_resource scanout_templat = *templat;276struct winsys_handle handle;277278scanout_templat.width0 = align(scanout_templat.width0, paddingX);279scanout_templat.height0 = align(scanout_templat.height0, paddingY);280281rsc->scanout = renderonly_scanout_for_resource(&scanout_templat,282screen->ro, &handle);283if (!rsc->scanout) {284BUG("Problem allocating kms memory for resource");285goto free_rsc;286}287288assert(handle.type == WINSYS_HANDLE_TYPE_FD);289rsc->levels[0].stride = handle.stride;290rsc->bo = etna_screen_bo_from_handle(pscreen, &handle);291close(handle.handle);292if (unlikely(!rsc->bo))293goto free_rsc;294} else {295uint32_t flags = DRM_ETNA_GEM_CACHE_WC;296297if (templat->bind & PIPE_BIND_VERTEX_BUFFER)298flags |= DRM_ETNA_GEM_FORCE_MMU;299300rsc->bo = etna_bo_new(screen->dev, size, flags);301if (unlikely(!rsc->bo)) {302BUG("Problem allocating video memory for resource");303goto free_rsc;304}305}306307if (DBG_ENABLED(ETNA_DBG_ZERO)) {308void *map = etna_bo_map(rsc->bo);309etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_WRITE);310memset(map, 0, size);311etna_bo_cpu_fini(rsc->bo);312}313314mtx_init(&rsc->lock, mtx_recursive);315rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,316_mesa_key_pointer_equal);317if (!rsc->pending_ctx)318goto free_rsc;319320return &rsc->base;321322free_rsc:323FREE(rsc);324return NULL;325}326327static struct pipe_resource *328etna_resource_create(struct pipe_screen *pscreen,329const struct pipe_resource *templat)330{331struct etna_screen *screen = etna_screen(pscreen);332unsigned layout = ETNA_LAYOUT_TILED;333334/* At this point we don't know if the resource will be used as a texture,335* render target, or both, because gallium sets the bits whenever possible336* This matters because on some GPUs (GC2000) there is no tiling that is337* compatible with both TE and PE.338*339* We expect that depth/stencil buffers will always be used by PE (rendering),340* and any other non-scanout resource will be used as a texture at some point,341* So allocate a render-compatible base buffer for scanout/depthstencil buffers,342* and a texture-compatible base buffer in other cases343*344*/345if (templat->bind & PIPE_BIND_DEPTH_STENCIL) {346if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)347layout |= ETNA_LAYOUT_BIT_MULTI;348if (screen->specs.can_supertile)349layout |= ETNA_LAYOUT_BIT_SUPER;350} else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&351etna_resource_hw_tileable(screen->specs.use_blt, templat)) {352layout |= ETNA_LAYOUT_BIT_SUPER;353}354355if (/* linear base or scanout without modifier requested */356(templat->bind & (PIPE_BIND_LINEAR | PIPE_BIND_SCANOUT)) ||357templat->target == PIPE_BUFFER || /* buffer always linear */358/* compressed textures don't use tiling, they have their own "tiles" */359util_format_is_compressed(templat->format)) {360layout = ETNA_LAYOUT_LINEAR;361}362363/* modifier is only used for scanout surfaces, so safe to use LINEAR here */364return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);365}366367enum modifier_priority {368MODIFIER_PRIORITY_INVALID = 0,369MODIFIER_PRIORITY_LINEAR,370MODIFIER_PRIORITY_SPLIT_TILED,371MODIFIER_PRIORITY_SPLIT_SUPER_TILED,372MODIFIER_PRIORITY_TILED,373MODIFIER_PRIORITY_SUPER_TILED,374};375376static const uint64_t priority_to_modifier[] = {377[MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,378[MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,379[MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,380[MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,381[MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,382[MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,383};384385static uint64_t386select_best_modifier(const struct etna_screen * screen,387const uint64_t *modifiers, const unsigned count)388{389enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;390391for (int i = 0; i < count; i++) {392switch (modifiers[i]) {393case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:394if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||395!screen->specs.can_supertile)396break;397prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);398break;399case DRM_FORMAT_MOD_VIVANTE_TILED:400if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)401break;402prio = MAX2(prio, MODIFIER_PRIORITY_TILED);403break;404case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:405if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)406break;407prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);408break;409case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:410if (screen->specs.pixel_pipes < 2)411break;412prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);413break;414case DRM_FORMAT_MOD_LINEAR:415prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);416break;417case DRM_FORMAT_MOD_INVALID:418default:419break;420}421}422423return priority_to_modifier[prio];424}425426static struct pipe_resource *427etna_resource_create_modifiers(struct pipe_screen *pscreen,428const struct pipe_resource *templat,429const uint64_t *modifiers, int count)430{431struct etna_screen *screen = etna_screen(pscreen);432struct pipe_resource tmpl = *templat;433uint64_t modifier = select_best_modifier(screen, modifiers, count);434435if (modifier == DRM_FORMAT_MOD_INVALID)436return NULL;437438/*439* We currently assume that all buffers allocated through this interface440* should be scanout enabled.441*/442tmpl.bind |= PIPE_BIND_SCANOUT;443444return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);445}446447static void448etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)449{450etna_resource(prsc)->seqno++;451}452453static void454etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)455{456struct etna_resource *rsc = etna_resource(prsc);457458mtx_lock(&rsc->lock);459assert(!_mesa_set_next_entry(rsc->pending_ctx, NULL));460_mesa_set_destroy(rsc->pending_ctx, NULL);461mtx_unlock(&rsc->lock);462463if (rsc->bo)464etna_bo_del(rsc->bo);465466if (rsc->ts_bo)467etna_bo_del(rsc->ts_bo);468469if (rsc->scanout)470renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);471472util_range_destroy(&rsc->valid_buffer_range);473474pipe_resource_reference(&rsc->texture, NULL);475pipe_resource_reference(&rsc->render, NULL);476477for (unsigned i = 0; i < ETNA_NUM_LOD; i++)478FREE(rsc->levels[i].patch_offsets);479480mtx_destroy(&rsc->lock);481482FREE(rsc);483}484485static struct pipe_resource *486etna_resource_from_handle(struct pipe_screen *pscreen,487const struct pipe_resource *tmpl,488struct winsys_handle *handle, unsigned usage)489{490struct etna_screen *screen = etna_screen(pscreen);491struct etna_resource *rsc;492struct etna_resource_level *level;493struct pipe_resource *prsc;494495DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "496"nr_samples=%u, usage=%u, bind=%x, flags=%x",497tmpl->target, util_format_name(tmpl->format), tmpl->width0,498tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,499tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);500501rsc = CALLOC_STRUCT(etna_resource);502if (!rsc)503return NULL;504505level = &rsc->levels[0];506prsc = &rsc->base;507508*prsc = *tmpl;509510pipe_reference_init(&prsc->reference, 1);511util_range_init(&rsc->valid_buffer_range);512prsc->screen = pscreen;513514rsc->bo = etna_screen_bo_from_handle(pscreen, handle);515if (!rsc->bo)516goto fail;517518rsc->seqno = 1;519rsc->layout = modifier_to_layout(handle->modifier);520rsc->halign = TEXTURE_HALIGN_FOUR;521522if (usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH)523rsc->explicit_flush = true;524525level->width = tmpl->width0;526level->height = tmpl->height0;527level->depth = tmpl->depth0;528level->stride = handle->stride;529level->offset = handle->offset;530531/* Determine padding of the imported resource. */532unsigned paddingX = 0, paddingY = 0;533etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,534is_rs_align(screen, tmpl),535&paddingX, &paddingY, &rsc->halign);536537if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)538paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);539level->padded_width = align(level->width, paddingX);540level->padded_height = align(level->height, paddingY);541542level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,543level->padded_height);544level->size = level->layer_stride;545546/* The DDX must give us a BO which conforms to our padding size.547* The stride of the BO must be greater or equal to our padded548* stride. The size of the BO must accomodate the padded height. */549if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {550BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",551level->stride, util_format_get_stride(tmpl->format, level->padded_width),552util_format_name(tmpl->format));553goto fail;554}555if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {556BUG("BO size %u is too small for RS engine height padding (%u, format %s)",557etna_bo_size(rsc->bo), level->stride * level->padded_height,558util_format_name(tmpl->format));559goto fail;560}561562mtx_init(&rsc->lock, mtx_recursive);563rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,564_mesa_key_pointer_equal);565if (!rsc->pending_ctx)566goto fail;567568if (screen->ro) {569struct pipe_resource *imp_prsc = prsc;570do {571etna_resource(imp_prsc)->scanout =572renderonly_create_gpu_import_for_resource(imp_prsc, screen->ro,573NULL);574/* failure is expected for scanout incompatible buffers */575} while ((imp_prsc = imp_prsc->next));576}577578return prsc;579580fail:581etna_resource_destroy(pscreen, prsc);582583return NULL;584}585586static bool587etna_resource_get_handle(struct pipe_screen *pscreen,588struct pipe_context *pctx,589struct pipe_resource *prsc,590struct winsys_handle *handle, unsigned usage)591{592struct etna_screen *screen = etna_screen(pscreen);593struct etna_resource *rsc = etna_resource(prsc);594struct renderonly_scanout *scanout;595596if (handle->plane) {597struct pipe_resource *cur = prsc;598599for (int i = 0; i < handle->plane; i++) {600cur = cur->next;601if (!cur)602return false;603}604rsc = etna_resource(cur);605}606607/* Scanout is always attached to the base resource */608scanout = rsc->scanout;609610handle->stride = rsc->levels[0].stride;611handle->offset = rsc->levels[0].offset;612handle->modifier = layout_to_modifier(rsc->layout);613614if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))615rsc->explicit_flush = false;616617if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {618return etna_bo_get_name(rsc->bo, &handle->handle) == 0;619} else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {620if (screen->ro) {621return renderonly_get_handle(scanout, handle);622} else {623handle->handle = etna_bo_handle(rsc->bo);624return true;625}626} else if (handle->type == WINSYS_HANDLE_TYPE_FD) {627handle->handle = etna_bo_dmabuf(rsc->bo);628return true;629} else {630return false;631}632}633634static bool635etna_resource_get_param(struct pipe_screen *pscreen,636struct pipe_context *pctx, struct pipe_resource *prsc,637unsigned plane, unsigned layer, unsigned level,638enum pipe_resource_param param,639unsigned usage, uint64_t *value)640{641switch (param) {642case PIPE_RESOURCE_PARAM_NPLANES: {643unsigned count = 0;644645for (struct pipe_resource *cur = prsc; cur; cur = cur->next)646count++;647*value = count;648return true;649}650default:651return false;652}653}654655void656etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,657enum etna_resource_status status)658{659struct pipe_resource *referenced = NULL;660struct etna_resource *rsc;661662if (!prsc)663return;664665mtx_lock(&ctx->lock);666667rsc = etna_resource(prsc);668again:669mtx_lock(&rsc->lock);670671set_foreach(rsc->pending_ctx, entry) {672struct etna_context *extctx = (struct etna_context *)entry->key;673struct pipe_context *pctx = &extctx->base;674bool need_flush = false;675676if (mtx_trylock(&extctx->lock) != thrd_success) {677/*678* The other context could be locked in etna_flush() and679* stuck waiting for the resource lock, so release the680* resource lock here, let etna_flush() finish, and try681* again.682*/683mtx_unlock(&rsc->lock);684thrd_yield();685goto again;686}687688set_foreach(extctx->used_resources_read, entry2) {689struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;690if (ctx == extctx || rsc2 != rsc)691continue;692693if (status & ETNA_PENDING_WRITE) {694need_flush = true;695break;696}697}698699if (need_flush) {700pctx->flush(pctx, NULL, 0);701mtx_unlock(&extctx->lock);702continue;703}704705set_foreach(extctx->used_resources_write, entry2) {706struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;707if (ctx == extctx || rsc2 != rsc)708continue;709710need_flush = true;711break;712}713714if (need_flush)715pctx->flush(pctx, NULL, 0);716717mtx_unlock(&extctx->lock);718}719720rsc->status = status;721722if (!_mesa_set_search(rsc->pending_ctx, ctx)) {723pipe_resource_reference(&referenced, prsc);724_mesa_set_add((status & ETNA_PENDING_READ) ?725ctx->used_resources_read : ctx->used_resources_write, rsc);726_mesa_set_add(rsc->pending_ctx, ctx);727}728729mtx_unlock(&rsc->lock);730mtx_unlock(&ctx->lock);731}732733bool734etna_resource_has_valid_ts(struct etna_resource *rsc)735{736if (!rsc->ts_bo)737return false;738739for (int level = 0; level <= rsc->base.last_level; level++)740if (rsc->levels[level].ts_valid)741return true;742743return false;744}745746void747etna_resource_screen_init(struct pipe_screen *pscreen)748{749pscreen->can_create_resource = etna_screen_can_create_resource;750pscreen->resource_create = etna_resource_create;751pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;752pscreen->resource_from_handle = etna_resource_from_handle;753pscreen->resource_get_handle = etna_resource_get_handle;754pscreen->resource_get_param = etna_resource_get_param;755pscreen->resource_changed = etna_resource_changed;756pscreen->resource_destroy = etna_resource_destroy;757}758759760