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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/etnaviv/etnaviv_resource.c
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1
/*
2
* Copyright (c) 2012-2015 Etnaviv Project
3
*
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
9
* Software is furnished to do so, subject to the following conditions:
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*
11
* The above copyright notice and this permission notice (including the
12
* next paragraph) shall be included in all copies or substantial portions
13
* of the Software.
14
*
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21
* DEALINGS IN THE SOFTWARE.
22
*
23
* Authors:
24
* Wladimir J. van der Laan <[email protected]>
25
*/
26
27
#include "etnaviv_resource.h"
28
29
#include "hw/common.xml.h"
30
31
#include "etnaviv_context.h"
32
#include "etnaviv_debug.h"
33
#include "etnaviv_screen.h"
34
#include "etnaviv_translate.h"
35
36
#include "util/hash_table.h"
37
#include "util/u_inlines.h"
38
#include "util/u_memory.h"
39
40
#include "drm-uapi/drm_fourcc.h"
41
42
static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
43
{
44
switch (modifier) {
45
case DRM_FORMAT_MOD_VIVANTE_TILED:
46
return ETNA_LAYOUT_TILED;
47
case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
48
return ETNA_LAYOUT_SUPER_TILED;
49
case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
50
return ETNA_LAYOUT_MULTI_TILED;
51
case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
52
return ETNA_LAYOUT_MULTI_SUPERTILED;
53
case DRM_FORMAT_MOD_LINEAR:
54
default:
55
return ETNA_LAYOUT_LINEAR;
56
}
57
}
58
59
static uint64_t layout_to_modifier(enum etna_surface_layout layout)
60
{
61
switch (layout) {
62
case ETNA_LAYOUT_TILED:
63
return DRM_FORMAT_MOD_VIVANTE_TILED;
64
case ETNA_LAYOUT_SUPER_TILED:
65
return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
66
case ETNA_LAYOUT_MULTI_TILED:
67
return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
68
case ETNA_LAYOUT_MULTI_SUPERTILED:
69
return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
70
case ETNA_LAYOUT_LINEAR:
71
return DRM_FORMAT_MOD_LINEAR;
72
default:
73
return DRM_FORMAT_MOD_INVALID;
74
}
75
}
76
77
/* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
78
* So, in a buffer of N pixels, there are N / (4 * 4) tiles.
79
* We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
80
* N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
81
*/
82
bool
83
etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
84
struct etna_resource *rsc)
85
{
86
struct etna_screen *screen = etna_screen(pscreen);
87
size_t rt_ts_size, ts_layer_stride;
88
size_t ts_bits_per_tile, bytes_per_tile;
89
uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
90
int8_t ts_compress_fmt;
91
92
assert(!rsc->ts_bo);
93
94
/* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
95
* v4 compression can be enabled everywhere without any known drawback,
96
* except that in-place resolve must go through a slower path
97
*/
98
ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
99
translate_ts_format(rsc->base.format) : -1;
100
101
if (screen->specs.halti >= 5) {
102
/* enable 256B ts mode with compression, as it improves performance
103
* the size of the resource might also determine if we want to use it or not
104
*/
105
if (ts_compress_fmt >= 0)
106
ts_mode = TS_MODE_256B;
107
108
ts_bits_per_tile = 4;
109
bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
110
} else {
111
ts_bits_per_tile = screen->specs.bits_per_tile;
112
bytes_per_tile = 64;
113
}
114
115
ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
116
bytes_per_tile * 8 / ts_bits_per_tile),
117
0x100 * screen->specs.pixel_pipes);
118
rt_ts_size = ts_layer_stride * rsc->base.array_size;
119
if (rt_ts_size == 0)
120
return true;
121
122
DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
123
rsc, rt_ts_size);
124
125
struct etna_bo *rt_ts;
126
rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
127
128
if (unlikely(!rt_ts)) {
129
BUG("Problem allocating tile status for resource");
130
return false;
131
}
132
133
rsc->ts_bo = rt_ts;
134
rsc->levels[0].ts_offset = 0;
135
rsc->levels[0].ts_layer_stride = ts_layer_stride;
136
rsc->levels[0].ts_size = rt_ts_size;
137
rsc->levels[0].ts_mode = ts_mode;
138
rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
139
140
return true;
141
}
142
143
static bool
144
etna_screen_can_create_resource(struct pipe_screen *pscreen,
145
const struct pipe_resource *templat)
146
{
147
struct etna_screen *screen = etna_screen(pscreen);
148
if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL))
149
return false;
150
151
/* templat->bind is not set here, so we must use the minimum sizes */
152
uint max_size =
153
MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
154
155
if (templat->width0 > max_size || templat->height0 > max_size)
156
return false;
157
158
return true;
159
}
160
161
static unsigned
162
setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
163
unsigned msaa_xscale, unsigned msaa_yscale)
164
{
165
struct pipe_resource *prsc = &rsc->base;
166
unsigned level, size = 0;
167
unsigned width = prsc->width0;
168
unsigned height = prsc->height0;
169
unsigned depth = prsc->depth0;
170
171
for (level = 0; level <= prsc->last_level; level++) {
172
struct etna_resource_level *mip = &rsc->levels[level];
173
174
mip->width = width;
175
mip->height = height;
176
mip->depth = depth;
177
mip->padded_width = align(width * msaa_xscale, paddingX);
178
mip->padded_height = align(height * msaa_yscale, paddingY);
179
mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
180
mip->offset = size;
181
mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
182
mip->size = prsc->array_size * mip->layer_stride;
183
184
/* align levels to 64 bytes to be able to render to them */
185
size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
186
187
width = u_minify(width, 1);
188
height = u_minify(height, 1);
189
depth = u_minify(depth, 1);
190
}
191
192
return size;
193
}
194
195
/* Is rs alignment needed? */
196
static bool is_rs_align(struct etna_screen *screen,
197
const struct pipe_resource *tmpl)
198
{
199
return screen->specs.use_blt ? false : (
200
VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
201
!etna_resource_sampler_only(tmpl));
202
}
203
204
/* Create a new resource object, using the given template info */
205
struct pipe_resource *
206
etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
207
uint64_t modifier, const struct pipe_resource *templat)
208
{
209
struct etna_screen *screen = etna_screen(pscreen);
210
struct etna_resource *rsc;
211
unsigned size;
212
213
DBG_F(ETNA_DBG_RESOURCE_MSGS,
214
"target=%d, format=%s, %ux%ux%u, array_size=%u, "
215
"last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
216
templat->target, util_format_name(templat->format), templat->width0,
217
templat->height0, templat->depth0, templat->array_size,
218
templat->last_level, templat->nr_samples, templat->usage,
219
templat->bind, templat->flags);
220
221
/* Determine scaling for antialiasing, allow override using debug flag */
222
int nr_samples = templat->nr_samples;
223
if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
224
!(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
225
if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
226
nr_samples = 2;
227
if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
228
nr_samples = 4;
229
}
230
231
int msaa_xscale = 1, msaa_yscale = 1;
232
if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale)) {
233
/* Number of samples not supported */
234
return NULL;
235
}
236
237
/* Determine needed padding (alignment of height/width) */
238
unsigned paddingX = 0, paddingY = 0;
239
unsigned halign = TEXTURE_HALIGN_FOUR;
240
if (!util_format_is_compressed(templat->format)) {
241
/* If we have the TEXTURE_HALIGN feature, we can always align to the
242
* resolve engine's width. If not, we must not align resources used
243
* only for textures. If this GPU uses the BLT engine, never do RS align.
244
*/
245
etna_layout_multiple(layout, screen->specs.pixel_pipes,
246
is_rs_align (screen, templat),
247
&paddingX, &paddingY, &halign);
248
assert(paddingX && paddingY);
249
} else {
250
/* Compressed textures are padded to their block size, but we don't have
251
* to do anything special for that. */
252
paddingX = 1;
253
paddingY = 1;
254
}
255
256
if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
257
paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
258
259
rsc = CALLOC_STRUCT(etna_resource);
260
if (!rsc)
261
return NULL;
262
263
rsc->base = *templat;
264
rsc->base.screen = pscreen;
265
rsc->base.nr_samples = nr_samples;
266
rsc->layout = layout;
267
rsc->halign = halign;
268
rsc->explicit_flush = true;
269
270
pipe_reference_init(&rsc->base.reference, 1);
271
util_range_init(&rsc->valid_buffer_range);
272
273
size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
274
275
if (unlikely(templat->bind & PIPE_BIND_SCANOUT) && screen->ro) {
276
struct pipe_resource scanout_templat = *templat;
277
struct winsys_handle handle;
278
279
scanout_templat.width0 = align(scanout_templat.width0, paddingX);
280
scanout_templat.height0 = align(scanout_templat.height0, paddingY);
281
282
rsc->scanout = renderonly_scanout_for_resource(&scanout_templat,
283
screen->ro, &handle);
284
if (!rsc->scanout) {
285
BUG("Problem allocating kms memory for resource");
286
goto free_rsc;
287
}
288
289
assert(handle.type == WINSYS_HANDLE_TYPE_FD);
290
rsc->levels[0].stride = handle.stride;
291
rsc->bo = etna_screen_bo_from_handle(pscreen, &handle);
292
close(handle.handle);
293
if (unlikely(!rsc->bo))
294
goto free_rsc;
295
} else {
296
uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
297
298
if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
299
flags |= DRM_ETNA_GEM_FORCE_MMU;
300
301
rsc->bo = etna_bo_new(screen->dev, size, flags);
302
if (unlikely(!rsc->bo)) {
303
BUG("Problem allocating video memory for resource");
304
goto free_rsc;
305
}
306
}
307
308
if (DBG_ENABLED(ETNA_DBG_ZERO)) {
309
void *map = etna_bo_map(rsc->bo);
310
etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_WRITE);
311
memset(map, 0, size);
312
etna_bo_cpu_fini(rsc->bo);
313
}
314
315
mtx_init(&rsc->lock, mtx_recursive);
316
rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
317
_mesa_key_pointer_equal);
318
if (!rsc->pending_ctx)
319
goto free_rsc;
320
321
return &rsc->base;
322
323
free_rsc:
324
FREE(rsc);
325
return NULL;
326
}
327
328
static struct pipe_resource *
329
etna_resource_create(struct pipe_screen *pscreen,
330
const struct pipe_resource *templat)
331
{
332
struct etna_screen *screen = etna_screen(pscreen);
333
unsigned layout = ETNA_LAYOUT_TILED;
334
335
/* At this point we don't know if the resource will be used as a texture,
336
* render target, or both, because gallium sets the bits whenever possible
337
* This matters because on some GPUs (GC2000) there is no tiling that is
338
* compatible with both TE and PE.
339
*
340
* We expect that depth/stencil buffers will always be used by PE (rendering),
341
* and any other non-scanout resource will be used as a texture at some point,
342
* So allocate a render-compatible base buffer for scanout/depthstencil buffers,
343
* and a texture-compatible base buffer in other cases
344
*
345
*/
346
if (templat->bind & PIPE_BIND_DEPTH_STENCIL) {
347
if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
348
layout |= ETNA_LAYOUT_BIT_MULTI;
349
if (screen->specs.can_supertile)
350
layout |= ETNA_LAYOUT_BIT_SUPER;
351
} else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
352
etna_resource_hw_tileable(screen->specs.use_blt, templat)) {
353
layout |= ETNA_LAYOUT_BIT_SUPER;
354
}
355
356
if (/* linear base or scanout without modifier requested */
357
(templat->bind & (PIPE_BIND_LINEAR | PIPE_BIND_SCANOUT)) ||
358
templat->target == PIPE_BUFFER || /* buffer always linear */
359
/* compressed textures don't use tiling, they have their own "tiles" */
360
util_format_is_compressed(templat->format)) {
361
layout = ETNA_LAYOUT_LINEAR;
362
}
363
364
/* modifier is only used for scanout surfaces, so safe to use LINEAR here */
365
return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
366
}
367
368
enum modifier_priority {
369
MODIFIER_PRIORITY_INVALID = 0,
370
MODIFIER_PRIORITY_LINEAR,
371
MODIFIER_PRIORITY_SPLIT_TILED,
372
MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
373
MODIFIER_PRIORITY_TILED,
374
MODIFIER_PRIORITY_SUPER_TILED,
375
};
376
377
static const uint64_t priority_to_modifier[] = {
378
[MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
379
[MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
380
[MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
381
[MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
382
[MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
383
[MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
384
};
385
386
static uint64_t
387
select_best_modifier(const struct etna_screen * screen,
388
const uint64_t *modifiers, const unsigned count)
389
{
390
enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
391
392
for (int i = 0; i < count; i++) {
393
switch (modifiers[i]) {
394
case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
395
if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
396
!screen->specs.can_supertile)
397
break;
398
prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
399
break;
400
case DRM_FORMAT_MOD_VIVANTE_TILED:
401
if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
402
break;
403
prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
404
break;
405
case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
406
if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
407
break;
408
prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
409
break;
410
case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
411
if (screen->specs.pixel_pipes < 2)
412
break;
413
prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
414
break;
415
case DRM_FORMAT_MOD_LINEAR:
416
prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
417
break;
418
case DRM_FORMAT_MOD_INVALID:
419
default:
420
break;
421
}
422
}
423
424
return priority_to_modifier[prio];
425
}
426
427
static struct pipe_resource *
428
etna_resource_create_modifiers(struct pipe_screen *pscreen,
429
const struct pipe_resource *templat,
430
const uint64_t *modifiers, int count)
431
{
432
struct etna_screen *screen = etna_screen(pscreen);
433
struct pipe_resource tmpl = *templat;
434
uint64_t modifier = select_best_modifier(screen, modifiers, count);
435
436
if (modifier == DRM_FORMAT_MOD_INVALID)
437
return NULL;
438
439
/*
440
* We currently assume that all buffers allocated through this interface
441
* should be scanout enabled.
442
*/
443
tmpl.bind |= PIPE_BIND_SCANOUT;
444
445
return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
446
}
447
448
static void
449
etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
450
{
451
etna_resource(prsc)->seqno++;
452
}
453
454
static void
455
etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
456
{
457
struct etna_resource *rsc = etna_resource(prsc);
458
459
mtx_lock(&rsc->lock);
460
assert(!_mesa_set_next_entry(rsc->pending_ctx, NULL));
461
_mesa_set_destroy(rsc->pending_ctx, NULL);
462
mtx_unlock(&rsc->lock);
463
464
if (rsc->bo)
465
etna_bo_del(rsc->bo);
466
467
if (rsc->ts_bo)
468
etna_bo_del(rsc->ts_bo);
469
470
if (rsc->scanout)
471
renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
472
473
util_range_destroy(&rsc->valid_buffer_range);
474
475
pipe_resource_reference(&rsc->texture, NULL);
476
pipe_resource_reference(&rsc->render, NULL);
477
478
for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
479
FREE(rsc->levels[i].patch_offsets);
480
481
mtx_destroy(&rsc->lock);
482
483
FREE(rsc);
484
}
485
486
static struct pipe_resource *
487
etna_resource_from_handle(struct pipe_screen *pscreen,
488
const struct pipe_resource *tmpl,
489
struct winsys_handle *handle, unsigned usage)
490
{
491
struct etna_screen *screen = etna_screen(pscreen);
492
struct etna_resource *rsc;
493
struct etna_resource_level *level;
494
struct pipe_resource *prsc;
495
496
DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
497
"nr_samples=%u, usage=%u, bind=%x, flags=%x",
498
tmpl->target, util_format_name(tmpl->format), tmpl->width0,
499
tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
500
tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
501
502
rsc = CALLOC_STRUCT(etna_resource);
503
if (!rsc)
504
return NULL;
505
506
level = &rsc->levels[0];
507
prsc = &rsc->base;
508
509
*prsc = *tmpl;
510
511
pipe_reference_init(&prsc->reference, 1);
512
util_range_init(&rsc->valid_buffer_range);
513
prsc->screen = pscreen;
514
515
rsc->bo = etna_screen_bo_from_handle(pscreen, handle);
516
if (!rsc->bo)
517
goto fail;
518
519
rsc->seqno = 1;
520
rsc->layout = modifier_to_layout(handle->modifier);
521
rsc->halign = TEXTURE_HALIGN_FOUR;
522
523
if (usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH)
524
rsc->explicit_flush = true;
525
526
level->width = tmpl->width0;
527
level->height = tmpl->height0;
528
level->depth = tmpl->depth0;
529
level->stride = handle->stride;
530
level->offset = handle->offset;
531
532
/* Determine padding of the imported resource. */
533
unsigned paddingX = 0, paddingY = 0;
534
etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
535
is_rs_align(screen, tmpl),
536
&paddingX, &paddingY, &rsc->halign);
537
538
if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
539
paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
540
level->padded_width = align(level->width, paddingX);
541
level->padded_height = align(level->height, paddingY);
542
543
level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
544
level->padded_height);
545
level->size = level->layer_stride;
546
547
/* The DDX must give us a BO which conforms to our padding size.
548
* The stride of the BO must be greater or equal to our padded
549
* stride. The size of the BO must accomodate the padded height. */
550
if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
551
BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
552
level->stride, util_format_get_stride(tmpl->format, level->padded_width),
553
util_format_name(tmpl->format));
554
goto fail;
555
}
556
if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
557
BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
558
etna_bo_size(rsc->bo), level->stride * level->padded_height,
559
util_format_name(tmpl->format));
560
goto fail;
561
}
562
563
mtx_init(&rsc->lock, mtx_recursive);
564
rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
565
_mesa_key_pointer_equal);
566
if (!rsc->pending_ctx)
567
goto fail;
568
569
if (screen->ro) {
570
struct pipe_resource *imp_prsc = prsc;
571
do {
572
etna_resource(imp_prsc)->scanout =
573
renderonly_create_gpu_import_for_resource(imp_prsc, screen->ro,
574
NULL);
575
/* failure is expected for scanout incompatible buffers */
576
} while ((imp_prsc = imp_prsc->next));
577
}
578
579
return prsc;
580
581
fail:
582
etna_resource_destroy(pscreen, prsc);
583
584
return NULL;
585
}
586
587
static bool
588
etna_resource_get_handle(struct pipe_screen *pscreen,
589
struct pipe_context *pctx,
590
struct pipe_resource *prsc,
591
struct winsys_handle *handle, unsigned usage)
592
{
593
struct etna_screen *screen = etna_screen(pscreen);
594
struct etna_resource *rsc = etna_resource(prsc);
595
struct renderonly_scanout *scanout;
596
597
if (handle->plane) {
598
struct pipe_resource *cur = prsc;
599
600
for (int i = 0; i < handle->plane; i++) {
601
cur = cur->next;
602
if (!cur)
603
return false;
604
}
605
rsc = etna_resource(cur);
606
}
607
608
/* Scanout is always attached to the base resource */
609
scanout = rsc->scanout;
610
611
handle->stride = rsc->levels[0].stride;
612
handle->offset = rsc->levels[0].offset;
613
handle->modifier = layout_to_modifier(rsc->layout);
614
615
if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
616
rsc->explicit_flush = false;
617
618
if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
619
return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
620
} else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
621
if (screen->ro) {
622
return renderonly_get_handle(scanout, handle);
623
} else {
624
handle->handle = etna_bo_handle(rsc->bo);
625
return true;
626
}
627
} else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
628
handle->handle = etna_bo_dmabuf(rsc->bo);
629
return true;
630
} else {
631
return false;
632
}
633
}
634
635
static bool
636
etna_resource_get_param(struct pipe_screen *pscreen,
637
struct pipe_context *pctx, struct pipe_resource *prsc,
638
unsigned plane, unsigned layer, unsigned level,
639
enum pipe_resource_param param,
640
unsigned usage, uint64_t *value)
641
{
642
switch (param) {
643
case PIPE_RESOURCE_PARAM_NPLANES: {
644
unsigned count = 0;
645
646
for (struct pipe_resource *cur = prsc; cur; cur = cur->next)
647
count++;
648
*value = count;
649
return true;
650
}
651
default:
652
return false;
653
}
654
}
655
656
void
657
etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
658
enum etna_resource_status status)
659
{
660
struct pipe_resource *referenced = NULL;
661
struct etna_resource *rsc;
662
663
if (!prsc)
664
return;
665
666
mtx_lock(&ctx->lock);
667
668
rsc = etna_resource(prsc);
669
again:
670
mtx_lock(&rsc->lock);
671
672
set_foreach(rsc->pending_ctx, entry) {
673
struct etna_context *extctx = (struct etna_context *)entry->key;
674
struct pipe_context *pctx = &extctx->base;
675
bool need_flush = false;
676
677
if (mtx_trylock(&extctx->lock) != thrd_success) {
678
/*
679
* The other context could be locked in etna_flush() and
680
* stuck waiting for the resource lock, so release the
681
* resource lock here, let etna_flush() finish, and try
682
* again.
683
*/
684
mtx_unlock(&rsc->lock);
685
thrd_yield();
686
goto again;
687
}
688
689
set_foreach(extctx->used_resources_read, entry2) {
690
struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
691
if (ctx == extctx || rsc2 != rsc)
692
continue;
693
694
if (status & ETNA_PENDING_WRITE) {
695
need_flush = true;
696
break;
697
}
698
}
699
700
if (need_flush) {
701
pctx->flush(pctx, NULL, 0);
702
mtx_unlock(&extctx->lock);
703
continue;
704
}
705
706
set_foreach(extctx->used_resources_write, entry2) {
707
struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
708
if (ctx == extctx || rsc2 != rsc)
709
continue;
710
711
need_flush = true;
712
break;
713
}
714
715
if (need_flush)
716
pctx->flush(pctx, NULL, 0);
717
718
mtx_unlock(&extctx->lock);
719
}
720
721
rsc->status = status;
722
723
if (!_mesa_set_search(rsc->pending_ctx, ctx)) {
724
pipe_resource_reference(&referenced, prsc);
725
_mesa_set_add((status & ETNA_PENDING_READ) ?
726
ctx->used_resources_read : ctx->used_resources_write, rsc);
727
_mesa_set_add(rsc->pending_ctx, ctx);
728
}
729
730
mtx_unlock(&rsc->lock);
731
mtx_unlock(&ctx->lock);
732
}
733
734
bool
735
etna_resource_has_valid_ts(struct etna_resource *rsc)
736
{
737
if (!rsc->ts_bo)
738
return false;
739
740
for (int level = 0; level <= rsc->base.last_level; level++)
741
if (rsc->levels[level].ts_valid)
742
return true;
743
744
return false;
745
}
746
747
void
748
etna_resource_screen_init(struct pipe_screen *pscreen)
749
{
750
pscreen->can_create_resource = etna_screen_can_create_resource;
751
pscreen->resource_create = etna_resource_create;
752
pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
753
pscreen->resource_from_handle = etna_resource_from_handle;
754
pscreen->resource_get_handle = etna_resource_get_handle;
755
pscreen->resource_get_param = etna_resource_get_param;
756
pscreen->resource_changed = etna_resource_changed;
757
pscreen->resource_destroy = etna_resource_destroy;
758
}
759
760