Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a2xx/fd2_texture.c
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/*1* Copyright (C) 2012-2013 Rob Clark <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22* Authors:23* Rob Clark <[email protected]>24*/2526#include "pipe/p_state.h"27#include "util/u_inlines.h"28#include "util/u_memory.h"29#include "util/u_string.h"3031#include "fd2_texture.h"32#include "fd2_util.h"3334static enum sq_tex_clamp35tex_clamp(unsigned wrap)36{37switch (wrap) {38case PIPE_TEX_WRAP_REPEAT:39return SQ_TEX_WRAP;40case PIPE_TEX_WRAP_CLAMP:41return SQ_TEX_CLAMP_HALF_BORDER;42case PIPE_TEX_WRAP_CLAMP_TO_EDGE:43return SQ_TEX_CLAMP_LAST_TEXEL;44case PIPE_TEX_WRAP_CLAMP_TO_BORDER:45return SQ_TEX_CLAMP_BORDER;46case PIPE_TEX_WRAP_MIRROR_REPEAT:47return SQ_TEX_MIRROR;48case PIPE_TEX_WRAP_MIRROR_CLAMP:49return SQ_TEX_MIRROR_ONCE_HALF_BORDER;50case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:51return SQ_TEX_MIRROR_ONCE_LAST_TEXEL;52case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:53return SQ_TEX_MIRROR_ONCE_BORDER;54default:55DBG("invalid wrap: %u", wrap);56return 0;57}58}5960static enum sq_tex_filter61tex_filter(unsigned filter)62{63switch (filter) {64case PIPE_TEX_FILTER_NEAREST:65return SQ_TEX_FILTER_POINT;66case PIPE_TEX_FILTER_LINEAR:67return SQ_TEX_FILTER_BILINEAR;68default:69DBG("invalid filter: %u", filter);70return 0;71}72}7374static enum sq_tex_filter75mip_filter(unsigned filter)76{77switch (filter) {78case PIPE_TEX_MIPFILTER_NONE:79return SQ_TEX_FILTER_BASEMAP;80case PIPE_TEX_MIPFILTER_NEAREST:81return SQ_TEX_FILTER_POINT;82case PIPE_TEX_MIPFILTER_LINEAR:83return SQ_TEX_FILTER_BILINEAR;84default:85DBG("invalid filter: %u", filter);86return 0;87}88}8990static void *91fd2_sampler_state_create(struct pipe_context *pctx,92const struct pipe_sampler_state *cso)93{94struct fd2_sampler_stateobj *so = CALLOC_STRUCT(fd2_sampler_stateobj);9596if (!so)97return NULL;9899so->base = *cso;100101/* TODO102* cso->max_anisotropy103* cso->normalized_coords (dealt with by shader for rect textures?)104*/105106/* SQ_TEX0_PITCH() must be OR'd in later when we know the bound texture: */107so->tex0 = A2XX_SQ_TEX_0_CLAMP_X(tex_clamp(cso->wrap_s)) |108A2XX_SQ_TEX_0_CLAMP_Y(tex_clamp(cso->wrap_t)) |109A2XX_SQ_TEX_0_CLAMP_Z(tex_clamp(cso->wrap_r));110111so->tex3 = A2XX_SQ_TEX_3_XY_MAG_FILTER(tex_filter(cso->mag_img_filter)) |112A2XX_SQ_TEX_3_XY_MIN_FILTER(tex_filter(cso->min_img_filter)) |113A2XX_SQ_TEX_3_MIP_FILTER(mip_filter(cso->min_mip_filter));114115so->tex4 = 0;116if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE)117so->tex4 = A2XX_SQ_TEX_4_LOD_BIAS(cso->lod_bias);118119return so;120}121122static void123fd2_sampler_states_bind(struct pipe_context *pctx, enum pipe_shader_type shader,124unsigned start, unsigned nr, void **hwcso) in_dt125{126if (!hwcso)127nr = 0;128129if (shader == PIPE_SHADER_FRAGMENT) {130struct fd_context *ctx = fd_context(pctx);131132/* on a2xx, since there is a flat address space for textures/samplers,133* a change in # of fragment textures/samplers will trigger patching and134* re-emitting the vertex shader:135*/136if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers)137ctx->dirty |= FD_DIRTY_TEXSTATE;138}139140fd_sampler_states_bind(pctx, shader, start, nr, hwcso);141}142143static enum sq_tex_dimension144tex_dimension(unsigned target)145{146switch (target) {147default:148assert(0);149case PIPE_TEXTURE_1D:150assert(0); /* TODO */151return SQ_TEX_DIMENSION_1D;152case PIPE_TEXTURE_RECT:153case PIPE_TEXTURE_2D:154return SQ_TEX_DIMENSION_2D;155case PIPE_TEXTURE_3D:156assert(0); /* TODO */157return SQ_TEX_DIMENSION_3D;158case PIPE_TEXTURE_CUBE:159return SQ_TEX_DIMENSION_CUBE;160}161}162163static struct pipe_sampler_view *164fd2_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,165const struct pipe_sampler_view *cso)166{167struct fd2_pipe_sampler_view *so = CALLOC_STRUCT(fd2_pipe_sampler_view);168struct fd_resource *rsc = fd_resource(prsc);169struct surface_format fmt = fd2_pipe2surface(cso->format);170171if (!so)172return NULL;173174so->base = *cso;175pipe_reference(NULL, &prsc->reference);176so->base.texture = prsc;177so->base.reference.count = 1;178so->base.context = pctx;179180so->tex0 = A2XX_SQ_TEX_0_SIGN_X(fmt.sign) | A2XX_SQ_TEX_0_SIGN_Y(fmt.sign) |181A2XX_SQ_TEX_0_SIGN_Z(fmt.sign) | A2XX_SQ_TEX_0_SIGN_W(fmt.sign) |182A2XX_SQ_TEX_0_PITCH(fdl2_pitch_pixels(&rsc->layout, 0) *183util_format_get_blockwidth(prsc->format)) |184COND(rsc->layout.tile_mode, A2XX_SQ_TEX_0_TILED);185so->tex1 = A2XX_SQ_TEX_1_FORMAT(fmt.format) |186A2XX_SQ_TEX_1_CLAMP_POLICY(SQ_TEX_CLAMP_POLICY_OGL);187so->tex2 = A2XX_SQ_TEX_2_HEIGHT(prsc->height0 - 1) |188A2XX_SQ_TEX_2_WIDTH(prsc->width0 - 1);189so->tex3 = A2XX_SQ_TEX_3_NUM_FORMAT(fmt.num_format) |190fd2_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,191cso->swizzle_b, cso->swizzle_a) |192A2XX_SQ_TEX_3_EXP_ADJUST(fmt.exp_adjust);193194so->tex4 = A2XX_SQ_TEX_4_MIP_MIN_LEVEL(fd_sampler_first_level(cso)) |195A2XX_SQ_TEX_4_MIP_MAX_LEVEL(fd_sampler_last_level(cso));196197so->tex5 = A2XX_SQ_TEX_5_DIMENSION(tex_dimension(prsc->target));198199return &so->base;200}201202static void203fd2_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,204unsigned start, unsigned nr,205unsigned unbind_num_trailing_slots,206struct pipe_sampler_view **views) in_dt207{208if (shader == PIPE_SHADER_FRAGMENT) {209struct fd_context *ctx = fd_context(pctx);210211/* on a2xx, since there is a flat address space for textures/samplers,212* a change in # of fragment textures/samplers will trigger patching and213* re-emitting the vertex shader:214*/215if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_textures)216ctx->dirty |= FD_DIRTY_TEXSTATE;217}218219fd_set_sampler_views(pctx, shader, start, nr, unbind_num_trailing_slots,220views);221}222223/* map gallium sampler-id to hw const-idx.. adreno uses a flat address224* space of samplers (const-idx), so we need to map the gallium sampler-id225* which is per-shader to a global const-idx space.226*227* Fragment shader sampler maps directly to const-idx, and vertex shader228* is offset by the # of fragment shader samplers. If the # of fragment229* shader samplers changes, this shifts the vertex shader indexes.230*231* TODO maybe we can do frag shader 0..N and vert shader N..0 to avoid232* this??233*/234unsigned235fd2_get_const_idx(struct fd_context *ctx, struct fd_texture_stateobj *tex,236unsigned samp_id) assert_dt237{238if (tex == &ctx->tex[PIPE_SHADER_FRAGMENT])239return samp_id;240return samp_id + ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers;241}242243void244fd2_texture_init(struct pipe_context *pctx)245{246pctx->create_sampler_state = fd2_sampler_state_create;247pctx->bind_sampler_states = fd2_sampler_states_bind;248pctx->create_sampler_view = fd2_sampler_view_create;249pctx->set_sampler_views = fd2_set_sampler_views;250}251252253