Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a2xx/fd2_util.c
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/*1* Copyright (C) 2012 Rob Clark <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22* Authors:23* Rob Clark <[email protected]>24*/2526#include "pipe/p_defines.h"27#include "util/format/u_format.h"2829#include "fd2_util.h"3031static enum a2xx_sq_surfaceformat32pipe2surface(enum pipe_format format, struct surface_format *fmt)33{34const struct util_format_description *desc = util_format_description(format);3536if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) {37switch (format) {38/* Compressed textures. */39case PIPE_FORMAT_ETC1_RGB8:40return FMT_ETC1_RGB;41case PIPE_FORMAT_DXT1_RGB:42case PIPE_FORMAT_DXT1_RGBA:43return FMT_DXT1;44case PIPE_FORMAT_DXT3_RGBA:45return FMT_DXT2_3;46case PIPE_FORMAT_DXT5_RGBA:47return FMT_DXT4_5;48case PIPE_FORMAT_ATC_RGB:49return FMT_ATI_TC_555_565_RGB;50case PIPE_FORMAT_ATC_RGBA_EXPLICIT:51return FMT_ATI_TC_555_565_RGBA;52case PIPE_FORMAT_ATC_RGBA_INTERPOLATED:53return FMT_ATI_TC_555_565_RGBA_INTERP;54/* YUV buffers. */55case PIPE_FORMAT_UYVY:56return FMT_Y1_Cr_Y0_Cb;57case PIPE_FORMAT_YUYV:58return FMT_Cr_Y1_Cb_Y0;59default:60return ~0;61}62}6364uint32_t channel_size = 0;65for (unsigned i = 0; i < 4; i++)66channel_size |= desc->channel[i].size << i * 8;6768unsigned i = util_format_get_first_non_void_channel(format);69if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED ||70desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)71fmt->sign = SQ_TEX_SIGN_SIGNED;72if (!desc->channel[i].normalized)73fmt->num_format = SQ_TEX_NUM_FORMAT_INT;74if (desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)75fmt->exp_adjust = -16;7677/* Note: the 3 channel 24bpp/48bpp/96bpp formats are only for vertex fetch78* we can use the 4 channel format and ignore the 4th component just isn't79* used80* XXX: is it possible for the extra loaded component to cause a MMU fault?81*/8283#define CASE(r, g, b, a) case (r | g << 8 | b << 16 | a << 24)8485/* clang-format off */86if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {87switch (channel_size) {88CASE(16, 0, 0, 0): return FMT_16_FLOAT;89CASE(16, 16, 0, 0): return FMT_16_16_FLOAT;90CASE(16, 16, 16, 0): return FMT_16_16_16_16_FLOAT; /* Note: only for vertex */91CASE(16, 16, 16, 16): return FMT_16_16_16_16_FLOAT;92CASE(32, 0, 0, 0): return FMT_32_FLOAT;93CASE(32, 32, 0, 0): return FMT_32_32_FLOAT;94CASE(32, 32, 32, 0): return FMT_32_32_32_FLOAT;95CASE(32, 32, 32, 32): return FMT_32_32_32_32_FLOAT;96}97} else {98switch (channel_size) {99CASE( 8, 0, 0, 0): return FMT_8;100CASE( 8, 8, 0, 0): return FMT_8_8;101CASE( 8, 8, 8, 0): return FMT_8_8_8_8; /* Note: only for vertex */102CASE( 8, 8, 8, 8): return FMT_8_8_8_8;103CASE(16, 0, 0, 0): return FMT_16;104CASE(16, 16, 0, 0): return FMT_16_16;105CASE(16, 16, 16, 0): return FMT_16_16_16_16; /* Note: only for vertex */106CASE(16, 16, 16, 16): return FMT_16_16_16_16;107CASE(32, 0, 0, 0): return FMT_32;108CASE(32, 32, 0, 0): return FMT_32_32;109CASE(32, 32, 32, 0): return FMT_32_32_32_32; /* Note: only for vertex */110CASE(32, 32, 32, 32): return FMT_32_32_32_32;111CASE( 4, 4, 4, 4): return FMT_4_4_4_4;112CASE( 5, 5, 5, 1): return FMT_1_5_5_5;113CASE( 5, 6, 5, 0): return FMT_5_6_5;114CASE(10, 10, 10, 2): return FMT_2_10_10_10;115CASE( 8, 24, 0, 0): return FMT_24_8;116CASE( 2, 3, 3, 0): return FMT_2_3_3; /* Note: R/B swapped */117}118}119/* clang-format on */120#undef CASE121122return ~0;123}124125struct surface_format126fd2_pipe2surface(enum pipe_format format)127{128struct surface_format fmt = {129.sign = SQ_TEX_SIGN_UNSIGNED,130.num_format = SQ_TEX_NUM_FORMAT_FRAC,131.exp_adjust = 0,132};133fmt.format = pipe2surface(format, &fmt);134return fmt;135}136137enum a2xx_colorformatx138fd2_pipe2color(enum pipe_format format)139{140switch (format) {141/* 8-bit buffers. */142case PIPE_FORMAT_R8_UNORM:143return COLORX_8;144case PIPE_FORMAT_B2G3R3_UNORM:145return COLORX_2_3_3; /* note: untested */146147/* 16-bit buffers. */148case PIPE_FORMAT_B5G6R5_UNORM:149return COLORX_5_6_5;150case PIPE_FORMAT_B5G5R5A1_UNORM:151case PIPE_FORMAT_B5G5R5X1_UNORM:152return COLORX_1_5_5_5;153case PIPE_FORMAT_B4G4R4A4_UNORM:154case PIPE_FORMAT_B4G4R4X4_UNORM:155return COLORX_4_4_4_4;156case PIPE_FORMAT_R8G8_UNORM:157return COLORX_8_8;158159/* 32-bit buffers. */160case PIPE_FORMAT_B8G8R8A8_UNORM:161case PIPE_FORMAT_B8G8R8X8_UNORM:162case PIPE_FORMAT_R8G8B8A8_UNORM:163case PIPE_FORMAT_R8G8B8X8_UNORM:164return COLORX_8_8_8_8;165/* Note: snorm untested */166case PIPE_FORMAT_R8G8B8A8_SNORM:167case PIPE_FORMAT_R8G8B8X8_SNORM:168return COLORX_S8_8_8_8;169170/* float buffers */171case PIPE_FORMAT_R16_FLOAT:172return COLORX_16_FLOAT;173case PIPE_FORMAT_R16G16_FLOAT:174return COLORX_16_16_FLOAT;175case PIPE_FORMAT_R16G16B16A16_FLOAT:176return COLORX_16_16_16_16_FLOAT;177case PIPE_FORMAT_R32_FLOAT:178return COLORX_32_FLOAT;179case PIPE_FORMAT_R32G32_FLOAT:180return COLORX_32_32_FLOAT;181case PIPE_FORMAT_R32G32B32A32_FLOAT:182return COLORX_32_32_32_32_FLOAT;183184default:185return ~0;186}187}188189static inline enum sq_tex_swiz190tex_swiz(unsigned swiz)191{192switch (swiz) {193default:194case PIPE_SWIZZLE_X:195return SQ_TEX_X;196case PIPE_SWIZZLE_Y:197return SQ_TEX_Y;198case PIPE_SWIZZLE_Z:199return SQ_TEX_Z;200case PIPE_SWIZZLE_W:201return SQ_TEX_W;202case PIPE_SWIZZLE_0:203return SQ_TEX_ZERO;204case PIPE_SWIZZLE_1:205return SQ_TEX_ONE;206}207}208209uint32_t210fd2_tex_swiz(enum pipe_format format, unsigned swizzle_r, unsigned swizzle_g,211unsigned swizzle_b, unsigned swizzle_a)212{213const struct util_format_description *desc = util_format_description(format);214unsigned char swiz[4] = {215swizzle_r,216swizzle_g,217swizzle_b,218swizzle_a,219}, rswiz[4];220221util_format_compose_swizzles(desc->swizzle, swiz, rswiz);222223return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(rswiz[0])) |224A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(rswiz[1])) |225A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(rswiz[2])) |226A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(rswiz[3]));227}228229uint32_t230fd2_vtx_swiz(enum pipe_format format, unsigned swizzle)231{232const struct util_format_description *desc = util_format_description(format);233unsigned char swiz[4], rswiz[4];234235for (unsigned i = 0; i < 4; i++)236swiz[i] = (swizzle >> i * 3) & 7;237238util_format_compose_swizzles(desc->swizzle, swiz, rswiz);239240return rswiz[0] | rswiz[1] << 3 | rswiz[2] << 6 | rswiz[3] << 9;241}242243244