Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
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/*1* Copyright (C) 2013 Rob Clark <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22* Authors:23* Rob Clark <[email protected]>24*/2526#include "pipe/p_state.h"27#include "util/format/u_format.h"28#include "util/u_memory.h"29#include "util/u_prim.h"30#include "util/u_string.h"3132#include "freedreno_resource.h"33#include "freedreno_state.h"3435#include "fd3_context.h"36#include "fd3_draw.h"37#include "fd3_emit.h"38#include "fd3_format.h"39#include "fd3_program.h"40#include "fd3_zsa.h"4142static inline uint32_t43add_sat(uint32_t a, int32_t b)44{45int64_t ret = (uint64_t)a + (int64_t)b;46if (ret > ~0U)47return ~0U;48if (ret < 0)49return 0;50return (uint32_t)ret;51}5253static void54draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,55struct fd3_emit *emit, unsigned index_offset) assert_dt56{57const struct pipe_draw_info *info = emit->info;58enum pc_di_primtype primtype = ctx->primtypes[info->mode];5960fd3_emit_state(ctx, ring, emit);6162if (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE))63fd3_emit_vertex_bufs(ring, emit);6465OUT_PKT0(ring, REG_A3XX_PC_VERTEX_REUSE_BLOCK_CNTL, 1);66OUT_RING(ring, 0x0000000b); /* PC_VERTEX_REUSE_BLOCK_CNTL */6768OUT_PKT0(ring, REG_A3XX_VFD_INDEX_MIN, 4);69OUT_RING(ring, info->index_bounds_valid70? add_sat(info->min_index,71info->index_size ? emit->draw->index_bias : 0)72: 0); /* VFD_INDEX_MIN */73OUT_RING(ring, info->index_bounds_valid74? add_sat(info->max_index,75info->index_size ? emit->draw->index_bias : 0)76: ~0); /* VFD_INDEX_MAX */77OUT_RING(ring, info->start_instance); /* VFD_INSTANCEID_OFFSET */78OUT_RING(ring, info->index_size ? emit->draw->index_bias79: emit->draw->start); /* VFD_INDEX_OFFSET */8081OUT_PKT0(ring, REG_A3XX_PC_RESTART_INDEX, 1);82OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */83info->restart_index84: 0xffffffff);8586/* points + psize -> spritelist: */87if (ctx->rasterizer->point_size_per_vertex &&88fd3_emit_get_vp(emit)->writes_psize && (info->mode == PIPE_PRIM_POINTS))89primtype = DI_PT_POINTLIST_PSIZE;9091fd_draw_emit(ctx->batch, ring, primtype,92emit->binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY, info,93emit->draw, index_offset);94}9596static bool97fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,98unsigned drawid_offset,99const struct pipe_draw_indirect_info *indirect,100const struct pipe_draw_start_count_bias *draw,101unsigned index_offset) in_dt102{103struct fd3_emit emit = {104.debug = &ctx->debug,105.vtx = &ctx->vtx,106.info = info,107.drawid_offset = drawid_offset,108.indirect = indirect,109.draw = draw,110.key = {111.vs = ctx->prog.vs,112.fs = ctx->prog.fs,113},114.rasterflat = ctx->rasterizer->flatshade,115.sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,116.sprite_coord_mode = ctx->rasterizer->sprite_coord_mode,117};118119if (info->mode != PIPE_PRIM_MAX && !indirect && !info->primitive_restart &&120!u_trim_pipe_prim(info->mode, (unsigned *)&draw->count))121return false;122123if (fd3_needs_manual_clipping(ir3_get_shader(ctx->prog.vs), ctx->rasterizer))124emit.key.key.ucp_enables = ctx->rasterizer->clip_plane_enable;125126ir3_fixup_shader_state(&ctx->base, &emit.key.key);127128unsigned dirty = ctx->dirty;129130emit.prog = fd3_program_state(131ir3_cache_lookup(ctx->shader_cache, &emit.key, &ctx->debug));132133/* bail if compile failed: */134if (!emit.prog)135return false;136137const struct ir3_shader_variant *vp = fd3_emit_get_vp(&emit);138const struct ir3_shader_variant *fp = fd3_emit_get_fp(&emit);139140ir3_update_max_tf_vtx(ctx, vp);141142/* do regular pass first: */143144if (unlikely(ctx->stats_users > 0)) {145ctx->stats.vs_regs += ir3_shader_halfregs(vp);146ctx->stats.fs_regs += ir3_shader_halfregs(fp);147}148149emit.binning_pass = false;150emit.dirty = dirty;151draw_impl(ctx, ctx->batch->draw, &emit, index_offset);152153/* and now binning pass: */154emit.binning_pass = true;155emit.dirty = dirty & ~(FD_DIRTY_BLEND);156emit.vs = NULL; /* we changed key so need to refetch vs */157emit.fs = NULL;158draw_impl(ctx, ctx->batch->binning, &emit, index_offset);159160fd_context_all_clean(ctx);161162return true;163}164165void166fd3_draw_init(struct pipe_context *pctx) disable_thread_safety_analysis167{168struct fd_context *ctx = fd_context(pctx);169ctx->draw_vbo = fd3_draw_vbo;170}171172173