Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
4574 views
/*1* Copyright (C) 2013 Rob Clark <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22* Authors:23* Rob Clark <[email protected]>24*/2526#include "pipe/p_state.h"27#include "util/format/u_format.h"28#include "util/u_inlines.h"29#include "util/u_memory.h"30#include "util/u_string.h"3132#include "fd3_format.h"33#include "fd3_texture.h"3435static enum a3xx_tex_clamp36tex_clamp(unsigned wrap, bool *needs_border)37{38switch (wrap) {39case PIPE_TEX_WRAP_REPEAT:40return A3XX_TEX_REPEAT;41case PIPE_TEX_WRAP_CLAMP_TO_EDGE:42return A3XX_TEX_CLAMP_TO_EDGE;43case PIPE_TEX_WRAP_CLAMP_TO_BORDER:44*needs_border = true;45return A3XX_TEX_CLAMP_TO_BORDER;46case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:47/* only works for PoT.. need to emulate otherwise! */48return A3XX_TEX_MIRROR_CLAMP;49case PIPE_TEX_WRAP_MIRROR_REPEAT:50return A3XX_TEX_MIRROR_REPEAT;51case PIPE_TEX_WRAP_MIRROR_CLAMP:52case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:53/* these two we could perhaps emulate, but we currently54* just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP55*/56default:57DBG("invalid wrap: %u", wrap);58return 0;59}60}6162static enum a3xx_tex_filter63tex_filter(unsigned filter, bool aniso)64{65switch (filter) {66case PIPE_TEX_FILTER_NEAREST:67return A3XX_TEX_NEAREST;68case PIPE_TEX_FILTER_LINEAR:69return aniso ? A3XX_TEX_ANISO : A3XX_TEX_LINEAR;70default:71DBG("invalid filter: %u", filter);72return 0;73}74}7576static void *77fd3_sampler_state_create(struct pipe_context *pctx,78const struct pipe_sampler_state *cso)79{80struct fd3_sampler_stateobj *so = CALLOC_STRUCT(fd3_sampler_stateobj);81unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));82bool miplinear = false;8384if (!so)85return NULL;8687if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)88miplinear = true;8990so->base = *cso;9192so->needs_border = false;93so->texsamp0 =94COND(!cso->normalized_coords, A3XX_TEX_SAMP_0_UNNORM_COORDS) |95COND(!cso->seamless_cube_map, A3XX_TEX_SAMP_0_CUBEMAPSEAMLESSFILTOFF) |96COND(miplinear, A3XX_TEX_SAMP_0_MIPFILTER_LINEAR) |97A3XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |98A3XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |99A3XX_TEX_SAMP_0_ANISO(aniso) |100A3XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, &so->needs_border)) |101A3XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, &so->needs_border)) |102A3XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, &so->needs_border));103104if (cso->compare_mode)105so->texsamp0 |=106A3XX_TEX_SAMP_0_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */107108so->texsamp1 = A3XX_TEX_SAMP_1_LOD_BIAS(cso->lod_bias);109110if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {111so->texsamp1 |= A3XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |112A3XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);113} else {114/* If we're not doing mipmap filtering, we still need a slightly > 0115* LOD clamp so the HW can decide between min and mag filtering of116* level 0.117*/118so->texsamp1 |= A3XX_TEX_SAMP_1_MIN_LOD(MIN2(cso->min_lod, 0.125)) |119A3XX_TEX_SAMP_1_MAX_LOD(MIN2(cso->max_lod, 0.125));120}121122return so;123}124125static enum a3xx_tex_type126tex_type(unsigned target)127{128switch (target) {129default:130assert(0);131case PIPE_BUFFER:132case PIPE_TEXTURE_1D:133case PIPE_TEXTURE_1D_ARRAY:134return A3XX_TEX_1D;135case PIPE_TEXTURE_RECT:136case PIPE_TEXTURE_2D:137case PIPE_TEXTURE_2D_ARRAY:138return A3XX_TEX_2D;139case PIPE_TEXTURE_3D:140return A3XX_TEX_3D;141case PIPE_TEXTURE_CUBE:142case PIPE_TEXTURE_CUBE_ARRAY:143return A3XX_TEX_CUBE;144}145}146147static struct pipe_sampler_view *148fd3_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,149const struct pipe_sampler_view *cso)150{151struct fd3_pipe_sampler_view *so = CALLOC_STRUCT(fd3_pipe_sampler_view);152struct fd_resource *rsc = fd_resource(prsc);153unsigned lvl;154155if (!so)156return NULL;157158so->base = *cso;159pipe_reference(NULL, &prsc->reference);160so->base.texture = prsc;161so->base.reference.count = 1;162so->base.context = pctx;163164so->texconst0 = A3XX_TEX_CONST_0_TILE_MODE(rsc->layout.tile_mode) |165A3XX_TEX_CONST_0_TYPE(tex_type(prsc->target)) |166A3XX_TEX_CONST_0_FMT(fd3_pipe2tex(cso->format)) |167fd3_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,168cso->swizzle_b, cso->swizzle_a);169170if (prsc->target == PIPE_BUFFER || util_format_is_pure_integer(cso->format))171so->texconst0 |= A3XX_TEX_CONST_0_NOCONVERT;172if (util_format_is_srgb(cso->format))173so->texconst0 |= A3XX_TEX_CONST_0_SRGB;174175if (prsc->target == PIPE_BUFFER) {176lvl = 0;177so->texconst1 =178A3XX_TEX_CONST_1_WIDTH(cso->u.buf.size /179util_format_get_blocksize(cso->format)) |180A3XX_TEX_CONST_1_HEIGHT(1);181} else {182unsigned miplevels;183184lvl = fd_sampler_first_level(cso);185miplevels = fd_sampler_last_level(cso) - lvl;186187so->texconst0 |= A3XX_TEX_CONST_0_MIPLVLS(miplevels);188so->texconst1 = A3XX_TEX_CONST_1_PITCHALIGN(rsc->layout.pitchalign - 4) |189A3XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |190A3XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));191}192/* when emitted, A3XX_TEX_CONST_2_INDX() must be OR'd in: */193struct fdl_slice *slice = fd_resource_slice(rsc, lvl);194so->texconst2 = A3XX_TEX_CONST_2_PITCH(fd_resource_pitch(rsc, lvl));195switch (prsc->target) {196case PIPE_TEXTURE_1D_ARRAY:197case PIPE_TEXTURE_2D_ARRAY:198so->texconst3 = A3XX_TEX_CONST_3_DEPTH(prsc->array_size - 1) |199A3XX_TEX_CONST_3_LAYERSZ1(slice->size0);200break;201case PIPE_TEXTURE_3D:202so->texconst3 = A3XX_TEX_CONST_3_DEPTH(u_minify(prsc->depth0, lvl)) |203A3XX_TEX_CONST_3_LAYERSZ1(slice->size0);204so->texconst3 |= A3XX_TEX_CONST_3_LAYERSZ2(205fd_resource_slice(rsc, prsc->last_level)->size0);206break;207default:208so->texconst3 = 0x00000000;209break;210}211212return &so->base;213}214215void216fd3_texture_init(struct pipe_context *pctx)217{218pctx->create_sampler_state = fd3_sampler_state_create;219pctx->bind_sampler_states = fd_sampler_states_bind;220pctx->create_sampler_view = fd3_sampler_view_create;221pctx->set_sampler_views = fd_set_sampler_views;222}223224225