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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a5xx/fd5_draw.h
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/*
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* Copyright (C) 2016 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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#ifndef FD5_DRAW_H_
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#define FD5_DRAW_H_
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#include "pipe/p_context.h"
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#include "freedreno_draw.h"
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#include "fd5_context.h"
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#include "fd5_screen.h"
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/* some bits in common w/ a4xx: */
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#include "a4xx/fd4_draw.h"
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void fd5_draw_init(struct pipe_context *pctx);
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static inline void
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fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
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enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
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enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances,
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enum a4xx_index_size idx_type, uint32_t max_indices,
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uint32_t idx_offset, struct pipe_resource *idx_buffer)
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{
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/* for debug after a lock up, write a unique counter value
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* to scratch7 for each draw, to make it easier to match up
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* register dumps to cmdstream. The combination of IB
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* (scratch6) and DRAW is enough to "triangulate" the
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* particular draw that caused lockup.
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*/
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emit_marker5(ring, 7);
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OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
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if (vismode == USE_VISIBILITY) {
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/* leave vis mode blank for now, it will be patched up when
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* we know if we are binning or not
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*/
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OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
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&batch->draw_patches);
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} else {
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OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
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}
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OUT_RING(ring, instances); /* NumInstances */
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OUT_RING(ring, count); /* NumIndices */
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if (idx_buffer) {
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OUT_RING(ring, 0x0); /* XXX */
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OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
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OUT_RING(ring, max_indices);
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}
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emit_marker5(ring, 7);
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fd_reset_wfi(batch);
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}
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static inline void
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fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
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enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
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const struct pipe_draw_info *info,
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const struct pipe_draw_indirect_info *indirect,
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const struct pipe_draw_start_count_bias *draw, unsigned index_offset)
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{
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struct pipe_resource *idx_buffer = NULL;
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enum a4xx_index_size idx_type;
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enum pc_di_src_sel src_sel;
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uint32_t max_indices, idx_offset;
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if (indirect && indirect->buffer) {
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struct fd_resource *ind = fd_resource(indirect->buffer);
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emit_marker5(ring, 7);
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if (info->index_size) {
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struct pipe_resource *idx = info->index.resource;
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max_indices = idx->width0 / info->index_size;
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OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
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OUT_RINGP(ring,
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DRAW4(primtype, DI_SRC_SEL_DMA,
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fd4_size2indextype(info->index_size), 0),
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&batch->draw_patches);
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OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
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OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indices));
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OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
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} else {
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OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
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OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
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&batch->draw_patches);
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OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
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}
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emit_marker5(ring, 7);
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fd_reset_wfi(batch);
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return;
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}
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if (info->index_size) {
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assert(!info->has_user_indices);
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idx_buffer = info->index.resource;
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idx_type = fd4_size2indextype(info->index_size);
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max_indices = idx_buffer->width0 / info->index_size;
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idx_offset = index_offset + draw->start * info->index_size;
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src_sel = DI_SRC_SEL_DMA;
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} else {
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idx_buffer = NULL;
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idx_type = INDEX4_SIZE_32_BIT;
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max_indices = 0;
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idx_offset = 0;
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src_sel = DI_SRC_SEL_AUTO_INDEX;
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}
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fd5_draw(batch, ring, primtype, vismode, src_sel, draw->count,
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info->instance_count, idx_type, max_indices, idx_offset,
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idx_buffer);
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}
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#endif /* FD5_DRAW_H_ */
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