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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a5xx/fd5_image.c
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/*
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* Copyright (C) 2017 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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#include "pipe/p_state.h"
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#include "fd5_format.h"
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#include "fd5_image.h"
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#include "fd5_texture.h"
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#include "freedreno_resource.h"
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static enum a4xx_state_block texsb[] = {
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[PIPE_SHADER_COMPUTE] = SB4_CS_TEX,
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[PIPE_SHADER_FRAGMENT] = SB4_FS_TEX,
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};
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static enum a4xx_state_block imgsb[] = {
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[PIPE_SHADER_COMPUTE] = SB4_CS_SSBO,
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[PIPE_SHADER_FRAGMENT] = SB4_SSBO,
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};
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struct fd5_image {
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enum pipe_format pfmt;
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enum a5xx_tex_fmt fmt;
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enum a5xx_tex_type type;
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bool srgb;
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uint32_t cpp;
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uint32_t width;
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uint32_t height;
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uint32_t depth;
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uint32_t pitch;
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uint32_t array_pitch;
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struct fd_bo *bo;
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uint32_t offset;
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bool buffer;
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};
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static void
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translate_image(struct fd5_image *img, struct pipe_image_view *pimg)
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{
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enum pipe_format format = pimg->format;
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struct pipe_resource *prsc = pimg->resource;
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struct fd_resource *rsc = fd_resource(prsc);
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if (!pimg->resource) {
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memset(img, 0, sizeof(*img));
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return;
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}
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img->pfmt = format;
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img->fmt = fd5_pipe2tex(format);
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img->type = fd5_tex_type(prsc->target);
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img->srgb = util_format_is_srgb(format);
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img->cpp = rsc->layout.cpp;
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img->bo = rsc->bo;
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/* Treat cube textures as 2d-array: */
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if (img->type == A5XX_TEX_CUBE)
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img->type = A5XX_TEX_2D;
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if (prsc->target == PIPE_BUFFER) {
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img->buffer = true;
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img->offset = pimg->u.buf.offset;
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img->pitch = 0;
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img->array_pitch = 0;
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/* size is encoded with low 15b in WIDTH and high bits in
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* HEIGHT, in units of elements:
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*/
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unsigned sz = pimg->u.buf.size / util_format_get_blocksize(format);
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img->width = sz & MASK(15);
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img->height = sz >> 15;
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img->depth = 0;
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} else {
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img->buffer = false;
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unsigned lvl = pimg->u.tex.level;
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img->offset = fd_resource_offset(rsc, lvl, pimg->u.tex.first_layer);
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img->pitch = fd_resource_pitch(rsc, lvl);
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img->width = u_minify(prsc->width0, lvl);
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img->height = u_minify(prsc->height0, lvl);
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unsigned layers = pimg->u.tex.last_layer - pimg->u.tex.first_layer + 1;
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switch (prsc->target) {
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case PIPE_TEXTURE_RECT:
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case PIPE_TEXTURE_1D:
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case PIPE_TEXTURE_2D:
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img->array_pitch = rsc->layout.layer_size;
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img->depth = 1;
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break;
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case PIPE_TEXTURE_1D_ARRAY:
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case PIPE_TEXTURE_2D_ARRAY:
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img->array_pitch = rsc->layout.layer_size;
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img->depth = layers;
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break;
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case PIPE_TEXTURE_CUBE:
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case PIPE_TEXTURE_CUBE_ARRAY:
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img->array_pitch = rsc->layout.layer_size;
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img->depth = layers;
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break;
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case PIPE_TEXTURE_3D:
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img->array_pitch = fd_resource_slice(rsc, lvl)->size0;
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img->depth = u_minify(prsc->depth0, lvl);
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break;
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default:
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img->array_pitch = 0;
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img->depth = 0;
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break;
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}
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}
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}
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static void
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emit_image_tex(struct fd_ringbuffer *ring, unsigned slot, struct fd5_image *img,
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enum pipe_shader_type shader)
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{
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OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 12);
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OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) |
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CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) |
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CP_LOAD_STATE4_0_STATE_BLOCK(texsb[shader]) |
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CP_LOAD_STATE4_0_NUM_UNIT(1));
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OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) |
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CP_LOAD_STATE4_1_EXT_SRC_ADDR(0));
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OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0));
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OUT_RING(ring, A5XX_TEX_CONST_0_FMT(img->fmt) |
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fd5_tex_swiz(img->pfmt, PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y,
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PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W) |
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COND(img->srgb, A5XX_TEX_CONST_0_SRGB));
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OUT_RING(ring, A5XX_TEX_CONST_1_WIDTH(img->width) |
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A5XX_TEX_CONST_1_HEIGHT(img->height));
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OUT_RING(ring,
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COND(img->buffer, A5XX_TEX_CONST_2_UNK4 | A5XX_TEX_CONST_2_UNK31) |
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A5XX_TEX_CONST_2_TYPE(img->type) |
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A5XX_TEX_CONST_2_PITCH(img->pitch));
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OUT_RING(ring, A5XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch));
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if (img->bo) {
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OUT_RELOC(ring, img->bo, img->offset,
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(uint64_t)A5XX_TEX_CONST_5_DEPTH(img->depth) << 32, 0);
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} else {
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, A5XX_TEX_CONST_5_DEPTH(img->depth));
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}
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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}
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static void
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emit_image_ssbo(struct fd_ringbuffer *ring, unsigned slot,
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struct fd5_image *img, enum pipe_shader_type shader)
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{
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OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 2);
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OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) |
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CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) |
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CP_LOAD_STATE4_0_STATE_BLOCK(imgsb[shader]) |
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CP_LOAD_STATE4_0_NUM_UNIT(1));
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OUT_RING(ring,
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CP_LOAD_STATE4_1_STATE_TYPE(1) | CP_LOAD_STATE4_1_EXT_SRC_ADDR(0));
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OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0));
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OUT_RING(ring,
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A5XX_SSBO_1_0_FMT(img->fmt) | A5XX_SSBO_1_0_WIDTH(img->width));
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OUT_RING(ring, A5XX_SSBO_1_1_HEIGHT(img->height) |
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A5XX_SSBO_1_1_DEPTH(img->depth));
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OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 2);
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OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) |
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CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) |
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CP_LOAD_STATE4_0_STATE_BLOCK(imgsb[shader]) |
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CP_LOAD_STATE4_0_NUM_UNIT(1));
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OUT_RING(ring,
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CP_LOAD_STATE4_1_STATE_TYPE(2) | CP_LOAD_STATE4_1_EXT_SRC_ADDR(0));
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OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0));
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if (img->bo) {
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OUT_RELOC(ring, img->bo, img->offset, 0, 0);
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} else {
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, 0x00000000);
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}
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}
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/* Emit required "SSBO" and sampler state. The sampler state is used by the
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* hw for imageLoad(), and "SSBO" state for imageStore(). Returns max sampler
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* used.
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*/
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void
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fd5_emit_images(struct fd_context *ctx, struct fd_ringbuffer *ring,
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enum pipe_shader_type shader,
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const struct ir3_shader_variant *v)
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{
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struct fd_shaderimg_stateobj *so = &ctx->shaderimg[shader];
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unsigned enabled_mask = so->enabled_mask;
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const struct ir3_ibo_mapping *m = &v->image_mapping;
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while (enabled_mask) {
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unsigned index = u_bit_scan(&enabled_mask);
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struct fd5_image img;
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translate_image(&img, &so->si[index]);
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emit_image_tex(ring, m->image_to_tex[index] + m->tex_base, &img, shader);
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emit_image_ssbo(ring, v->shader->nir->info.num_ssbos + index, &img,
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shader);
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}
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}
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