Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
4574 views
1
/*
2
* Copyright (C) 2016 Rob Clark <[email protected]>
3
*
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
6
* to deal in the Software without restriction, including without limitation
7
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
* and/or sell copies of the Software, and to permit persons to whom the
9
* Software is furnished to do so, subject to the following conditions:
10
*
11
* The above copyright notice and this permission notice (including the next
12
* paragraph) shall be included in all copies or substantial portions of the
13
* Software.
14
*
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21
* SOFTWARE.
22
*
23
* Authors:
24
* Rob Clark <[email protected]>
25
*/
26
27
#include "pipe/p_state.h"
28
#include "util/format/u_format.h"
29
#include "util/u_inlines.h"
30
#include "util/u_memory.h"
31
#include "util/u_string.h"
32
33
#include "fd5_format.h"
34
#include "fd5_texture.h"
35
36
static enum a5xx_tex_clamp
37
tex_clamp(unsigned wrap, bool *needs_border)
38
{
39
switch (wrap) {
40
case PIPE_TEX_WRAP_REPEAT:
41
return A5XX_TEX_REPEAT;
42
case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
43
return A5XX_TEX_CLAMP_TO_EDGE;
44
case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
45
*needs_border = true;
46
return A5XX_TEX_CLAMP_TO_BORDER;
47
case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
48
/* only works for PoT.. need to emulate otherwise! */
49
return A5XX_TEX_MIRROR_CLAMP;
50
case PIPE_TEX_WRAP_MIRROR_REPEAT:
51
return A5XX_TEX_MIRROR_REPEAT;
52
case PIPE_TEX_WRAP_MIRROR_CLAMP:
53
case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
54
/* these two we could perhaps emulate, but we currently
55
* just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
56
*/
57
default:
58
DBG("invalid wrap: %u", wrap);
59
return 0;
60
}
61
}
62
63
static enum a5xx_tex_filter
64
tex_filter(unsigned filter, bool aniso)
65
{
66
switch (filter) {
67
case PIPE_TEX_FILTER_NEAREST:
68
return A5XX_TEX_NEAREST;
69
case PIPE_TEX_FILTER_LINEAR:
70
return aniso ? A5XX_TEX_ANISO : A5XX_TEX_LINEAR;
71
default:
72
DBG("invalid filter: %u", filter);
73
return 0;
74
}
75
}
76
77
static void *
78
fd5_sampler_state_create(struct pipe_context *pctx,
79
const struct pipe_sampler_state *cso)
80
{
81
struct fd5_sampler_stateobj *so = CALLOC_STRUCT(fd5_sampler_stateobj);
82
unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
83
bool miplinear = false;
84
85
if (!so)
86
return NULL;
87
88
so->base = *cso;
89
90
if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
91
miplinear = true;
92
93
so->needs_border = false;
94
so->texsamp0 =
95
COND(miplinear, A5XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
96
A5XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
97
A5XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
98
A5XX_TEX_SAMP_0_ANISO(aniso) |
99
A5XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, &so->needs_border)) |
100
A5XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, &so->needs_border)) |
101
A5XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, &so->needs_border));
102
103
so->texsamp1 =
104
COND(!cso->seamless_cube_map, A5XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
105
COND(!cso->normalized_coords, A5XX_TEX_SAMP_1_UNNORM_COORDS);
106
107
so->texsamp0 |= A5XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
108
109
if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
110
so->texsamp1 |= A5XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
111
A5XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
112
} else {
113
/* If we're not doing mipmap filtering, we still need a slightly > 0
114
* LOD clamp so the HW can decide between min and mag filtering of
115
* level 0.
116
*/
117
so->texsamp1 |= A5XX_TEX_SAMP_1_MIN_LOD(MIN2(cso->min_lod, 0.125)) |
118
A5XX_TEX_SAMP_1_MAX_LOD(MIN2(cso->max_lod, 0.125));
119
}
120
121
if (cso->compare_mode)
122
so->texsamp1 |=
123
A5XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
124
125
return so;
126
}
127
128
static bool
129
use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format)
130
{
131
return false; // TODO check if this is still needed on a5xx
132
}
133
134
static struct pipe_sampler_view *
135
fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
136
const struct pipe_sampler_view *cso)
137
{
138
struct fd5_pipe_sampler_view *so = CALLOC_STRUCT(fd5_pipe_sampler_view);
139
struct fd_resource *rsc = fd_resource(prsc);
140
enum pipe_format format = cso->format;
141
unsigned lvl, layers = 0;
142
143
if (!so)
144
return NULL;
145
146
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
147
rsc = rsc->stencil;
148
format = rsc->b.b.format;
149
}
150
151
so->base = *cso;
152
pipe_reference(NULL, &prsc->reference);
153
so->base.texture = prsc;
154
so->base.reference.count = 1;
155
so->base.context = pctx;
156
157
so->texconst0 = A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(format)) |
158
A5XX_TEX_CONST_0_SAMPLES(fd_msaa_samples(prsc->nr_samples)) |
159
fd5_tex_swiz(format, cso->swizzle_r, cso->swizzle_g,
160
cso->swizzle_b, cso->swizzle_a);
161
162
/* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
163
* we get isn't quite right. Use SWAP(XYZW) as a cheap and cheerful
164
* way to re-arrange things so stencil component is where the swiz
165
* expects.
166
*
167
* Note that gallium expects stencil sampler to return (s,s,s,s)
168
* which isn't quite true. To make that happen we'd have to massage
169
* the swizzle. But in practice only the .x component is used.
170
*/
171
if (format == PIPE_FORMAT_X24S8_UINT) {
172
so->texconst0 |= A5XX_TEX_CONST_0_SWAP(XYZW);
173
}
174
175
if (util_format_is_srgb(format)) {
176
if (use_astc_srgb_workaround(pctx, format))
177
so->astc_srgb = true;
178
so->texconst0 |= A5XX_TEX_CONST_0_SRGB;
179
}
180
181
if (cso->target == PIPE_BUFFER) {
182
unsigned elements = cso->u.buf.size / util_format_get_blocksize(format);
183
184
lvl = 0;
185
so->texconst1 = A5XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
186
A5XX_TEX_CONST_1_HEIGHT(elements >> 15);
187
so->texconst2 = A5XX_TEX_CONST_2_UNK4 | A5XX_TEX_CONST_2_UNK31;
188
so->offset = cso->u.buf.offset;
189
} else {
190
unsigned miplevels;
191
192
lvl = fd_sampler_first_level(cso);
193
miplevels = fd_sampler_last_level(cso) - lvl;
194
layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
195
196
so->texconst0 |= A5XX_TEX_CONST_0_MIPLVLS(miplevels);
197
so->texconst1 = A5XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
198
A5XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
199
so->texconst2 = A5XX_TEX_CONST_2_PITCHALIGN(rsc->layout.pitchalign - 6) |
200
A5XX_TEX_CONST_2_PITCH(fd_resource_pitch(rsc, lvl));
201
so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
202
}
203
204
so->texconst2 |= A5XX_TEX_CONST_2_TYPE(fd5_tex_type(cso->target));
205
206
switch (cso->target) {
207
case PIPE_TEXTURE_RECT:
208
case PIPE_TEXTURE_1D:
209
case PIPE_TEXTURE_2D:
210
so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
211
so->texconst5 = A5XX_TEX_CONST_5_DEPTH(1);
212
break;
213
case PIPE_TEXTURE_1D_ARRAY:
214
case PIPE_TEXTURE_2D_ARRAY:
215
so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
216
so->texconst5 = A5XX_TEX_CONST_5_DEPTH(layers);
217
break;
218
case PIPE_TEXTURE_CUBE:
219
case PIPE_TEXTURE_CUBE_ARRAY:
220
so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
221
so->texconst5 = A5XX_TEX_CONST_5_DEPTH(layers / 6);
222
break;
223
case PIPE_TEXTURE_3D:
224
so->texconst3 =
225
A5XX_TEX_CONST_3_MIN_LAYERSZ(
226
fd_resource_slice(rsc, prsc->last_level)->size0) |
227
A5XX_TEX_CONST_3_ARRAY_PITCH(fd_resource_slice(rsc, lvl)->size0);
228
so->texconst5 = A5XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
229
break;
230
default:
231
so->texconst3 = 0x00000000;
232
break;
233
}
234
235
return &so->base;
236
}
237
238
static void
239
fd5_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
240
unsigned start, unsigned nr,
241
unsigned unbind_num_trailing_slots,
242
struct pipe_sampler_view **views)
243
{
244
struct fd_context *ctx = fd_context(pctx);
245
struct fd5_context *fd5_ctx = fd5_context(ctx);
246
uint16_t astc_srgb = 0;
247
unsigned i;
248
249
for (i = 0; i < nr; i++) {
250
if (views[i]) {
251
struct fd5_pipe_sampler_view *view = fd5_pipe_sampler_view(views[i]);
252
if (view->astc_srgb)
253
astc_srgb |= (1 << i);
254
}
255
}
256
257
fd_set_sampler_views(pctx, shader, start, nr, unbind_num_trailing_slots,
258
views);
259
260
if (shader == PIPE_SHADER_FRAGMENT) {
261
fd5_ctx->fastc_srgb = astc_srgb;
262
} else if (shader == PIPE_SHADER_VERTEX) {
263
fd5_ctx->vastc_srgb = astc_srgb;
264
}
265
}
266
267
void
268
fd5_texture_init(struct pipe_context *pctx)
269
{
270
pctx->create_sampler_state = fd5_sampler_state_create;
271
pctx->bind_sampler_states = fd_sampler_states_bind;
272
pctx->create_sampler_view = fd5_sampler_view_create;
273
pctx->set_sampler_views = fd5_set_sampler_views;
274
}
275
276