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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/freedreno/freedreno_gmem.c
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/*
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* Copyright (C) 2012 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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#include "pipe/p_state.h"
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#include "util/debug.h"
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#include "util/format/u_format.h"
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#include "util/hash_table.h"
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#include "util/u_dump.h"
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#include "util/u_inlines.h"
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#include "util/u_memory.h"
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#include "util/u_string.h"
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#include "u_tracepoints.h"
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#include "freedreno_context.h"
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#include "freedreno_fence.h"
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#include "freedreno_gmem.h"
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#include "freedreno_query_hw.h"
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#include "freedreno_resource.h"
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#include "freedreno_tracepoints.h"
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#include "freedreno_util.h"
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/*
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* GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
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* inside the GPU. All rendering happens to GMEM. Larger render targets
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* are split into tiles that are small enough for the color (and depth and/or
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* stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
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* if there was not a clear invalidating the previous tile contents, we need
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* to restore the previous tiles contents (system mem -> GMEM), and after all
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* the draw calls, before moving to the next tile, we need to save the tile
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* contents (GMEM -> system mem).
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*
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* The code in this file handles dealing with GMEM and tiling.
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*
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* The structure of the ringbuffer ends up being:
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*
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* +--<---<-- IB ---<---+---<---+---<---<---<--+
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* | | | |
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* v ^ ^ ^
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* ------------------------------------------------------
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* | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
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* ------------------------------------------------------
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* ^
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* |
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* address submitted in issueibcmds
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*
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* Where the per-tile section handles scissor setup, mem2gmem restore (if
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* needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
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* resolve.
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*/
73
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#ifndef BIN_DEBUG
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#define BIN_DEBUG 0
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#endif
77
78
/*
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* GMEM Cache:
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*
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* Caches GMEM state based on a given framebuffer state. The key is
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* meant to be the minimal set of data that results in a unique gmem
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* configuration, avoiding multiple keys arriving at the same gmem
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* state. For example, the render target format is not part of the
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* key, only the size per pixel. And the max_scissor bounds is not
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* part of they key, only the minx/miny (after clamping to tile
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* alignment) and width/height. This ensures that slightly different
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* max_scissor which would result in the same gmem state, do not
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* become different keys that map to the same state.
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*/
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struct gmem_key {
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uint16_t minx, miny;
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uint16_t width, height;
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uint8_t gmem_page_align; /* alignment in multiples of 0x1000 to reduce key size */
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uint8_t nr_cbufs;
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uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
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uint8_t zsbuf_cpp[2];
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};
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101
static uint32_t
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gmem_key_hash(const void *_key)
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{
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const struct gmem_key *key = _key;
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return _mesa_hash_data(key, sizeof(*key));
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}
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108
static bool
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gmem_key_equals(const void *_a, const void *_b)
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{
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const struct gmem_key *a = _a;
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const struct gmem_key *b = _b;
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return memcmp(a, b, sizeof(*a)) == 0;
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}
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static void
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dump_gmem_key(const struct gmem_key *key)
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{
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printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u", key->minx, key->miny,
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key->width, key->height);
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printf(", .gmem_page_align=%u, .nr_cbufs=%u", key->gmem_page_align,
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key->nr_cbufs);
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printf(", .cbuf_cpp = {");
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for (unsigned i = 0; i < ARRAY_SIZE(key->cbuf_cpp); i++)
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printf("%u,", key->cbuf_cpp[i]);
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printf("}, .zsbuf_cpp = {");
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for (unsigned i = 0; i < ARRAY_SIZE(key->zsbuf_cpp); i++)
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printf("%u,", key->zsbuf_cpp[i]);
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printf("}},\n");
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}
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static void
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dump_gmem_state(const struct fd_gmem_stateobj *gmem)
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{
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unsigned total = 0;
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printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n", gmem->bin_w, gmem->bin_h,
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gmem->nbins_x, gmem->nbins_y);
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for (int i = 0; i < ARRAY_SIZE(gmem->cbuf_base); i++) {
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if (!gmem->cbuf_cpp[i])
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continue;
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unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
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printf(" cbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
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gmem->cbuf_base[i], size, gmem->cbuf_cpp[i]);
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total = gmem->cbuf_base[i] + size;
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}
148
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for (int i = 0; i < ARRAY_SIZE(gmem->zsbuf_base); i++) {
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if (!gmem->zsbuf_cpp[i])
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continue;
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unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
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printf(" zsbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
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gmem->zsbuf_base[i], size, gmem->zsbuf_cpp[i]);
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total = gmem->zsbuf_base[i] + size;
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}
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printf("total: 0x%06x (of 0x%06x)\n", total, gmem->screen->gmemsize_bytes);
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}
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static unsigned
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div_align(unsigned num, unsigned denom, unsigned al)
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{
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return util_align_npot(DIV_ROUND_UP(num, denom), al);
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}
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169
static bool
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layout_gmem(struct gmem_key *key, uint32_t nbins_x, uint32_t nbins_y,
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struct fd_gmem_stateobj *gmem)
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{
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struct fd_screen *screen = gmem->screen;
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uint32_t gmem_align = key->gmem_page_align * 0x1000;
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uint32_t total = 0, i;
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177
if ((nbins_x == 0) || (nbins_y == 0))
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return false;
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180
uint32_t bin_w, bin_h;
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bin_w = div_align(key->width, nbins_x, screen->info->tile_align_w);
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bin_h = div_align(key->height, nbins_y, screen->info->tile_align_h);
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if (bin_w > screen->info->tile_max_w)
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return false;
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187
if (bin_h > screen->info->tile_max_h)
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return false;
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gmem->bin_w = bin_w;
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gmem->bin_h = bin_h;
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/* due to aligning bin_w/h, we could end up with one too
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* many bins in either dimension, so recalculate:
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*/
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gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w);
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gmem->nbins_y = DIV_ROUND_UP(key->height, bin_h);
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for (i = 0; i < MAX_RENDER_TARGETS; i++) {
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if (key->cbuf_cpp[i]) {
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gmem->cbuf_base[i] = util_align_npot(total, gmem_align);
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total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h;
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}
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}
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206
if (key->zsbuf_cpp[0]) {
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gmem->zsbuf_base[0] = util_align_npot(total, gmem_align);
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total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h;
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}
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if (key->zsbuf_cpp[1]) {
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gmem->zsbuf_base[1] = util_align_npot(total, gmem_align);
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total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h;
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}
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return total <= screen->gmemsize_bytes;
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}
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219
static void
220
calc_nbins(struct gmem_key *key, struct fd_gmem_stateobj *gmem)
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{
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struct fd_screen *screen = gmem->screen;
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uint32_t nbins_x = 1, nbins_y = 1;
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uint32_t max_width = screen->info->tile_max_w;
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uint32_t max_height = screen->info->tile_max_h;
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227
if (FD_DBG(MSGS)) {
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debug_printf("binning input: cbuf cpp:");
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for (unsigned i = 0; i < key->nr_cbufs; i++)
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debug_printf(" %d", key->cbuf_cpp[i]);
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debug_printf(", zsbuf cpp: %d; %dx%d\n", key->zsbuf_cpp[0], key->width,
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key->height);
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}
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235
/* first, find a bin size that satisfies the maximum width/
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* height restrictions:
237
*/
238
while (div_align(key->width, nbins_x, screen->info->tile_align_w) >
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max_width) {
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nbins_x++;
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}
242
243
while (div_align(key->height, nbins_y, screen->info->tile_align_h) >
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max_height) {
245
nbins_y++;
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}
247
248
/* then find a bin width/height that satisfies the memory
249
* constraints:
250
*/
251
while (!layout_gmem(key, nbins_x, nbins_y, gmem)) {
252
if (nbins_y > nbins_x) {
253
nbins_x++;
254
} else {
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nbins_y++;
256
}
257
}
258
259
/* Lets see if we can tweak the layout a bit and come up with
260
* something better:
261
*/
262
if ((((nbins_x - 1) * (nbins_y + 1)) < (nbins_x * nbins_y)) &&
263
layout_gmem(key, nbins_x - 1, nbins_y + 1, gmem)) {
264
nbins_x--;
265
nbins_y++;
266
} else if ((((nbins_x + 1) * (nbins_y - 1)) < (nbins_x * nbins_y)) &&
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layout_gmem(key, nbins_x + 1, nbins_y - 1, gmem)) {
268
nbins_x++;
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nbins_y--;
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}
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272
layout_gmem(key, nbins_x, nbins_y, gmem);
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}
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275
static struct fd_gmem_stateobj *
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gmem_stateobj_init(struct fd_screen *screen, struct gmem_key *key)
277
{
278
struct fd_gmem_stateobj *gmem =
279
rzalloc(screen->gmem_cache.ht, struct fd_gmem_stateobj);
280
pipe_reference_init(&gmem->reference, 1);
281
gmem->screen = screen;
282
gmem->key = key;
283
list_inithead(&gmem->node);
284
285
const unsigned npipes = screen->info->num_vsc_pipes;
286
uint32_t i, j, t, xoff, yoff;
287
uint32_t tpp_x, tpp_y;
288
int tile_n[npipes];
289
290
calc_nbins(key, gmem);
291
292
DBG("using %d bins of size %dx%d", gmem->nbins_x * gmem->nbins_y,
293
gmem->bin_w, gmem->bin_h);
294
295
memcpy(gmem->cbuf_cpp, key->cbuf_cpp, sizeof(key->cbuf_cpp));
296
memcpy(gmem->zsbuf_cpp, key->zsbuf_cpp, sizeof(key->zsbuf_cpp));
297
gmem->minx = key->minx;
298
gmem->miny = key->miny;
299
gmem->width = key->width;
300
gmem->height = key->height;
301
302
if (BIN_DEBUG) {
303
dump_gmem_state(gmem);
304
dump_gmem_key(key);
305
}
306
307
/*
308
* Assign tiles and pipes:
309
*
310
* At some point it might be worth playing with different
311
* strategies and seeing if that makes much impact on
312
* performance.
313
*/
314
315
#define div_round_up(v, a) (((v) + (a)-1) / (a))
316
/* figure out number of tiles per pipe: */
317
if (is_a20x(screen)) {
318
/* for a20x we want to minimize the number of "pipes"
319
* binning data has 3 bits for x/y (8x8) but the edges are used to
320
* cull off-screen vertices with hw binning, so we have 6x6 pipes
321
*/
322
tpp_x = 6;
323
tpp_y = 6;
324
} else {
325
tpp_x = tpp_y = 1;
326
while (div_round_up(gmem->nbins_y, tpp_y) > npipes)
327
tpp_y += 2;
328
while ((div_round_up(gmem->nbins_y, tpp_y) *
329
div_round_up(gmem->nbins_x, tpp_x)) > npipes)
330
tpp_x += 1;
331
}
332
333
#ifdef DEBUG
334
tpp_x = env_var_as_unsigned("TPP_X", tpp_x);
335
tpp_y = env_var_as_unsigned("TPP_Y", tpp_x);
336
#endif
337
338
gmem->maxpw = tpp_x;
339
gmem->maxph = tpp_y;
340
341
/* configure pipes: */
342
xoff = yoff = 0;
343
for (i = 0; i < npipes; i++) {
344
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
345
346
if (xoff >= gmem->nbins_x) {
347
xoff = 0;
348
yoff += tpp_y;
349
}
350
351
if (yoff >= gmem->nbins_y) {
352
break;
353
}
354
355
pipe->x = xoff;
356
pipe->y = yoff;
357
pipe->w = MIN2(tpp_x, gmem->nbins_x - xoff);
358
pipe->h = MIN2(tpp_y, gmem->nbins_y - yoff);
359
360
xoff += tpp_x;
361
}
362
363
/* number of pipes to use for a20x */
364
gmem->num_vsc_pipes = MAX2(1, i);
365
366
for (; i < npipes; i++) {
367
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
368
pipe->x = pipe->y = pipe->w = pipe->h = 0;
369
}
370
371
if (BIN_DEBUG) {
372
printf("%dx%d ... tpp=%dx%d\n", gmem->nbins_x, gmem->nbins_y, tpp_x,
373
tpp_y);
374
for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) {
375
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
376
printf("pipe[%d]: %ux%u @ %u,%u\n", i, pipe->w, pipe->h, pipe->x,
377
pipe->y);
378
}
379
}
380
381
/* configure tiles: */
382
t = 0;
383
yoff = key->miny;
384
memset(tile_n, 0, sizeof(tile_n));
385
for (i = 0; i < gmem->nbins_y; i++) {
386
int bw, bh;
387
388
xoff = key->minx;
389
390
/* clip bin height: */
391
bh = MIN2(gmem->bin_h, key->miny + key->height - yoff);
392
assert(bh > 0);
393
394
for (j = 0; j < gmem->nbins_x; j++) {
395
struct fd_tile *tile = &gmem->tile[t];
396
uint32_t p;
397
398
assert(t < ARRAY_SIZE(gmem->tile));
399
400
/* pipe number: */
401
p = ((i / tpp_y) * div_round_up(gmem->nbins_x, tpp_x)) + (j / tpp_x);
402
assert(p < gmem->num_vsc_pipes);
403
404
/* clip bin width: */
405
bw = MIN2(gmem->bin_w, key->minx + key->width - xoff);
406
assert(bw > 0);
407
408
tile->n = !is_a20x(screen) ? tile_n[p]++
409
: ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
410
tile->p = p;
411
tile->bin_w = bw;
412
tile->bin_h = bh;
413
tile->xoff = xoff;
414
tile->yoff = yoff;
415
416
if (BIN_DEBUG) {
417
printf("tile[%d]: p=%u, bin=%ux%u+%u+%u\n", t, p, bw, bh, xoff,
418
yoff);
419
}
420
421
t++;
422
423
xoff += bw;
424
}
425
426
yoff += bh;
427
}
428
429
if (BIN_DEBUG) {
430
t = 0;
431
for (i = 0; i < gmem->nbins_y; i++) {
432
for (j = 0; j < gmem->nbins_x; j++) {
433
struct fd_tile *tile = &gmem->tile[t++];
434
printf("|p:%u n:%u|", tile->p, tile->n);
435
}
436
printf("\n");
437
}
438
}
439
440
return gmem;
441
}
442
443
void
444
__fd_gmem_destroy(struct fd_gmem_stateobj *gmem)
445
{
446
struct fd_gmem_cache *cache = &gmem->screen->gmem_cache;
447
448
fd_screen_assert_locked(gmem->screen);
449
450
_mesa_hash_table_remove_key(cache->ht, gmem->key);
451
list_del(&gmem->node);
452
453
ralloc_free(gmem->key);
454
ralloc_free(gmem);
455
}
456
457
static struct gmem_key *
458
gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
459
{
460
struct fd_screen *screen = batch->ctx->screen;
461
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
462
bool has_zs = pfb->zsbuf &&
463
!!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED | FD_GMEM_STENCIL_ENABLED |
464
FD_GMEM_CLEARS_DEPTH_STENCIL));
465
struct gmem_key *key = rzalloc(screen->gmem_cache.ht, struct gmem_key);
466
467
if (has_zs || assume_zs) {
468
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
469
key->zsbuf_cpp[0] = rsc->layout.cpp;
470
if (rsc->stencil)
471
key->zsbuf_cpp[1] = rsc->stencil->layout.cpp;
472
} else {
473
/* we might have a zsbuf, but it isn't used */
474
batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
475
batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
476
}
477
478
key->nr_cbufs = pfb->nr_cbufs;
479
for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
480
if (pfb->cbufs[i])
481
key->cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
482
else
483
key->cbuf_cpp[i] = 4;
484
/* if MSAA, color buffers are super-sampled in GMEM: */
485
key->cbuf_cpp[i] *= pfb->samples;
486
}
487
488
/* NOTE: on a6xx, the max-scissor-rect is handled in fd6_gmem, and
489
* we just rely on CP_COND_EXEC to skip bins with no geometry.
490
*/
491
if (no_scis_opt || is_a6xx(screen)) {
492
key->minx = 0;
493
key->miny = 0;
494
key->width = pfb->width;
495
key->height = pfb->height;
496
} else {
497
struct pipe_scissor_state *scissor = &batch->max_scissor;
498
499
if (FD_DBG(NOSCIS)) {
500
scissor->minx = 0;
501
scissor->miny = 0;
502
scissor->maxx = pfb->width;
503
scissor->maxy = pfb->height;
504
}
505
506
/* round down to multiple of alignment: */
507
key->minx = scissor->minx & ~(screen->info->gmem_align_w - 1);
508
key->miny = scissor->miny & ~(screen->info->gmem_align_h - 1);
509
key->width = scissor->maxx - key->minx;
510
key->height = scissor->maxy - key->miny;
511
}
512
513
if (is_a20x(screen) && batch->cleared) {
514
/* under normal circumstances the requirement would be 4K
515
* but the fast clear path requires an alignment of 32K
516
*/
517
key->gmem_page_align = 8;
518
} else if (is_a6xx(screen)) {
519
key->gmem_page_align = (screen->info->tile_align_w == 96) ? 3 : 1;
520
} else {
521
// TODO re-check this across gens.. maybe it should only
522
// be a single page in some cases:
523
key->gmem_page_align = 4;
524
}
525
526
return key;
527
}
528
529
static struct fd_gmem_stateobj *
530
lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
531
{
532
struct fd_screen *screen = batch->ctx->screen;
533
struct fd_gmem_cache *cache = &screen->gmem_cache;
534
struct fd_gmem_stateobj *gmem = NULL;
535
536
/* Lock before allocating gmem_key, since that a screen-wide
537
* ralloc pool and ralloc itself is not thread-safe.
538
*/
539
fd_screen_lock(screen);
540
541
struct gmem_key *key = gmem_key_init(batch, assume_zs, no_scis_opt);
542
uint32_t hash = gmem_key_hash(key);
543
544
struct hash_entry *entry =
545
_mesa_hash_table_search_pre_hashed(cache->ht, hash, key);
546
if (entry) {
547
ralloc_free(key);
548
goto found;
549
}
550
551
/* limit the # of cached gmem states, discarding the least
552
* recently used state if needed:
553
*/
554
if (cache->ht->entries >= 20) {
555
struct fd_gmem_stateobj *last =
556
list_last_entry(&cache->lru, struct fd_gmem_stateobj, node);
557
fd_gmem_reference(&last, NULL);
558
}
559
560
entry = _mesa_hash_table_insert_pre_hashed(cache->ht, hash, key,
561
gmem_stateobj_init(screen, key));
562
563
found:
564
fd_gmem_reference(&gmem, entry->data);
565
/* Move to the head of the LRU: */
566
list_delinit(&gmem->node);
567
list_add(&gmem->node, &cache->lru);
568
569
fd_screen_unlock(screen);
570
571
return gmem;
572
}
573
574
/*
575
* GMEM render pass
576
*/
577
578
static void
579
render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem) assert_dt
580
{
581
struct fd_context *ctx = batch->ctx;
582
int i;
583
584
simple_mtx_lock(&ctx->gmem_lock);
585
586
ctx->emit_tile_init(batch);
587
588
if (batch->restore)
589
ctx->stats.batch_restore++;
590
591
for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
592
struct fd_tile *tile = &gmem->tile[i];
593
594
trace_start_tile(&batch->trace, tile->bin_h, tile->yoff, tile->bin_w,
595
tile->xoff);
596
597
ctx->emit_tile_prep(batch, tile);
598
599
if (batch->restore) {
600
ctx->emit_tile_mem2gmem(batch, tile);
601
}
602
603
ctx->emit_tile_renderprep(batch, tile);
604
605
if (ctx->query_prepare_tile)
606
ctx->query_prepare_tile(batch, i, batch->gmem);
607
608
/* emit IB to drawcmds: */
609
trace_start_draw_ib(&batch->trace);
610
if (ctx->emit_tile) {
611
ctx->emit_tile(batch, tile);
612
} else {
613
ctx->screen->emit_ib(batch->gmem, batch->draw);
614
}
615
trace_end_draw_ib(&batch->trace);
616
fd_reset_wfi(batch);
617
618
/* emit gmem2mem to transfer tile back to system memory: */
619
ctx->emit_tile_gmem2mem(batch, tile);
620
}
621
622
if (ctx->emit_tile_fini)
623
ctx->emit_tile_fini(batch);
624
625
simple_mtx_unlock(&ctx->gmem_lock);
626
}
627
628
static void
629
render_sysmem(struct fd_batch *batch) assert_dt
630
{
631
struct fd_context *ctx = batch->ctx;
632
633
ctx->emit_sysmem_prep(batch);
634
635
if (ctx->query_prepare_tile)
636
ctx->query_prepare_tile(batch, 0, batch->gmem);
637
638
if (!batch->nondraw) {
639
trace_start_draw_ib(&batch->trace);
640
}
641
/* emit IB to drawcmds: */
642
ctx->screen->emit_ib(batch->gmem, batch->draw);
643
644
if (!batch->nondraw) {
645
trace_end_draw_ib(&batch->trace);
646
}
647
648
fd_reset_wfi(batch);
649
650
if (ctx->emit_sysmem_fini)
651
ctx->emit_sysmem_fini(batch);
652
}
653
654
static void
655
flush_ring(struct fd_batch *batch)
656
{
657
if (FD_DBG(NOHW))
658
return;
659
660
fd_submit_flush(batch->submit, batch->in_fence_fd,
661
batch->fence ? &batch->fence->submit_fence : NULL);
662
663
if (batch->fence)
664
fd_fence_set_batch(batch->fence, NULL);
665
}
666
667
void
668
fd_gmem_render_tiles(struct fd_batch *batch)
669
{
670
struct fd_context *ctx = batch->ctx;
671
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
672
bool sysmem = false;
673
674
ctx->submit_count++;
675
676
if (!batch->nondraw) {
677
#if HAVE_PERFETTO
678
/* For non-draw batches, we don't really have a good place to
679
* match up the api event submit-id to the on-gpu rendering,
680
* so skip this for non-draw batches.
681
*/
682
fd_perfetto_submit(ctx);
683
#endif
684
trace_flush_batch(&batch->trace, batch, batch->cleared,
685
batch->gmem_reason, batch->num_draws);
686
trace_framebuffer_state(&batch->trace, pfb);
687
}
688
689
if (ctx->emit_sysmem_prep && !batch->nondraw) {
690
if (fd_autotune_use_bypass(&ctx->autotune, batch) && !FD_DBG(NOBYPASS)) {
691
sysmem = true;
692
}
693
694
/* For ARB_framebuffer_no_attachments: */
695
if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
696
sysmem = true;
697
}
698
}
699
700
if (FD_DBG(NOGMEM))
701
sysmem = true;
702
703
/* Layered rendering always needs bypass. */
704
for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
705
struct pipe_surface *psurf = pfb->cbufs[i];
706
if (!psurf)
707
continue;
708
if (psurf->u.tex.first_layer < psurf->u.tex.last_layer)
709
sysmem = true;
710
}
711
712
/* Tessellation doesn't seem to support tiled rendering so fall back to
713
* bypass.
714
*/
715
if (batch->tessellation) {
716
debug_assert(ctx->emit_sysmem_prep);
717
sysmem = true;
718
}
719
720
fd_reset_wfi(batch);
721
722
ctx->stats.batch_total++;
723
724
if (batch->nondraw) {
725
DBG("%p: rendering non-draw", batch);
726
render_sysmem(batch);
727
ctx->stats.batch_nondraw++;
728
} else if (sysmem) {
729
trace_render_sysmem(&batch->trace);
730
trace_start_render_pass(
731
&batch->trace, ctx->submit_count, pipe_surface_format(pfb->cbufs[0]),
732
pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height,
733
pfb->nr_cbufs, pfb->samples, 0, 0, 0);
734
if (ctx->query_prepare)
735
ctx->query_prepare(batch, 1);
736
render_sysmem(batch);
737
trace_end_render_pass(&batch->trace);
738
ctx->stats.batch_sysmem++;
739
} else {
740
struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, false, false);
741
batch->gmem_state = gmem;
742
trace_render_gmem(&batch->trace, gmem->nbins_x, gmem->nbins_y,
743
gmem->bin_w, gmem->bin_h);
744
trace_start_render_pass(
745
&batch->trace, ctx->submit_count, pipe_surface_format(pfb->cbufs[0]),
746
pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height,
747
pfb->nr_cbufs, pfb->samples, gmem->nbins_x * gmem->nbins_y,
748
gmem->bin_w, gmem->bin_h);
749
if (ctx->query_prepare)
750
ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
751
render_tiles(batch, gmem);
752
trace_end_render_pass(&batch->trace);
753
batch->gmem_state = NULL;
754
755
fd_screen_lock(ctx->screen);
756
fd_gmem_reference(&gmem, NULL);
757
fd_screen_unlock(ctx->screen);
758
759
ctx->stats.batch_gmem++;
760
}
761
762
flush_ring(batch);
763
764
u_trace_flush(&batch->trace);
765
}
766
767
/* Determine a worst-case estimate (ie. assuming we don't eliminate an
768
* unused depth/stencil) number of bins per vsc pipe.
769
*/
770
unsigned
771
fd_gmem_estimate_bins_per_pipe(struct fd_batch *batch)
772
{
773
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
774
struct fd_screen *screen = batch->ctx->screen;
775
struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, !!pfb->zsbuf, true);
776
unsigned nbins = gmem->maxpw * gmem->maxph;
777
778
fd_screen_lock(screen);
779
fd_gmem_reference(&gmem, NULL);
780
fd_screen_unlock(screen);
781
782
return nbins;
783
}
784
785
/* When deciding whether a tile needs mem2gmem, we need to take into
786
* account the scissor rect(s) that were cleared. To simplify we only
787
* consider the last scissor rect for each buffer, since the common
788
* case would be a single clear.
789
*/
790
bool
791
fd_gmem_needs_restore(struct fd_batch *batch, const struct fd_tile *tile,
792
uint32_t buffers)
793
{
794
if (!(batch->restore & buffers))
795
return false;
796
797
return true;
798
}
799
800
void
801
fd_gmem_screen_init(struct pipe_screen *pscreen)
802
{
803
struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
804
805
cache->ht = _mesa_hash_table_create(NULL, gmem_key_hash, gmem_key_equals);
806
list_inithead(&cache->lru);
807
}
808
809
void
810
fd_gmem_screen_fini(struct pipe_screen *pscreen)
811
{
812
struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
813
814
_mesa_hash_table_destroy(cache->ht, NULL);
815
}
816
817