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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/freedreno/freedreno_resource.c
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/*
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* Copyright (C) 2012 Rob Clark <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <[email protected]>
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*/
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27
#include "util/format/u_format.h"
28
#include "util/format/u_format_rgtc.h"
29
#include "util/format/u_format_zs.h"
30
#include "util/set.h"
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#include "util/u_drm.h"
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#include "util/u_inlines.h"
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#include "util/u_string.h"
34
#include "util/u_surface.h"
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#include "util/u_transfer.h"
36
37
#include "decode/util.h"
38
39
#include "freedreno_batch_cache.h"
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#include "freedreno_blitter.h"
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#include "freedreno_context.h"
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#include "freedreno_fence.h"
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#include "freedreno_query_hw.h"
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#include "freedreno_resource.h"
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#include "freedreno_screen.h"
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#include "freedreno_surface.h"
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#include "freedreno_util.h"
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49
#include <errno.h>
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#include "drm-uapi/drm_fourcc.h"
51
52
/* XXX this should go away, needed for 'struct winsys_handle' */
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#include "frontend/drm_driver.h"
54
55
/* A private modifier for now, so we have a way to request tiled but not
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* compressed. It would perhaps be good to get real modifiers for the
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* tiled formats, but would probably need to do some work to figure out
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* the layout(s) of the tiled modes, and whether they are the same
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* across generations.
60
*/
61
#define FD_FORMAT_MOD_QCOM_TILED fourcc_mod_code(QCOM, 0xffffffff)
62
63
/**
64
* Go through the entire state and see if the resource is bound
65
* anywhere. If it is, mark the relevant state as dirty. This is
66
* called on realloc_bo to ensure the necessary state is re-
67
* emitted so the GPU looks at the new backing bo.
68
*/
69
static void
70
rebind_resource_in_ctx(struct fd_context *ctx,
71
struct fd_resource *rsc) assert_dt
72
{
73
struct pipe_resource *prsc = &rsc->b.b;
74
75
if (ctx->rebind_resource)
76
ctx->rebind_resource(ctx, rsc);
77
78
/* VBOs */
79
if (rsc->dirty & FD_DIRTY_VTXBUF) {
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struct fd_vertexbuf_stateobj *vb = &ctx->vtx.vertexbuf;
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for (unsigned i = 0; i < vb->count && !(ctx->dirty & FD_DIRTY_VTXBUF);
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i++) {
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if (vb->vb[i].buffer.resource == prsc)
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fd_context_dirty(ctx, FD_DIRTY_VTXBUF);
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}
86
}
87
88
const enum fd_dirty_3d_state per_stage_dirty =
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FD_DIRTY_CONST | FD_DIRTY_TEX | FD_DIRTY_IMAGE | FD_DIRTY_SSBO;
90
91
if (!(rsc->dirty & per_stage_dirty))
92
return;
93
94
/* per-shader-stage resources: */
95
for (unsigned stage = 0; stage < PIPE_SHADER_TYPES; stage++) {
96
/* Constbufs.. note that constbuf[0] is normal uniforms emitted in
97
* cmdstream rather than by pointer..
98
*/
99
if ((rsc->dirty & FD_DIRTY_CONST) &&
100
!(ctx->dirty_shader[stage] & FD_DIRTY_CONST)) {
101
struct fd_constbuf_stateobj *cb = &ctx->constbuf[stage];
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const unsigned num_ubos = util_last_bit(cb->enabled_mask);
103
for (unsigned i = 1; i < num_ubos; i++) {
104
if (cb->cb[i].buffer == prsc) {
105
fd_context_dirty_shader(ctx, stage, FD_DIRTY_SHADER_CONST);
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break;
107
}
108
}
109
}
110
111
/* Textures */
112
if ((rsc->dirty & FD_DIRTY_TEX) &&
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!(ctx->dirty_shader[stage] & FD_DIRTY_TEX)) {
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struct fd_texture_stateobj *tex = &ctx->tex[stage];
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for (unsigned i = 0; i < tex->num_textures; i++) {
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if (tex->textures[i] && (tex->textures[i]->texture == prsc)) {
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fd_context_dirty_shader(ctx, stage, FD_DIRTY_SHADER_TEX);
118
break;
119
}
120
}
121
}
122
123
/* Images */
124
if ((rsc->dirty & FD_DIRTY_IMAGE) &&
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!(ctx->dirty_shader[stage] & FD_DIRTY_IMAGE)) {
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struct fd_shaderimg_stateobj *si = &ctx->shaderimg[stage];
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const unsigned num_images = util_last_bit(si->enabled_mask);
128
for (unsigned i = 0; i < num_images; i++) {
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if (si->si[i].resource == prsc) {
130
fd_context_dirty_shader(ctx, stage, FD_DIRTY_SHADER_IMAGE);
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break;
132
}
133
}
134
}
135
136
/* SSBOs */
137
if ((rsc->dirty & FD_DIRTY_SSBO) &&
138
!(ctx->dirty_shader[stage] & FD_DIRTY_SSBO)) {
139
struct fd_shaderbuf_stateobj *sb = &ctx->shaderbuf[stage];
140
const unsigned num_ssbos = util_last_bit(sb->enabled_mask);
141
for (unsigned i = 0; i < num_ssbos; i++) {
142
if (sb->sb[i].buffer == prsc) {
143
fd_context_dirty_shader(ctx, stage, FD_DIRTY_SHADER_SSBO);
144
break;
145
}
146
}
147
}
148
}
149
}
150
151
static void
152
rebind_resource(struct fd_resource *rsc) assert_dt
153
{
154
struct fd_screen *screen = fd_screen(rsc->b.b.screen);
155
156
fd_screen_lock(screen);
157
fd_resource_lock(rsc);
158
159
if (rsc->dirty)
160
list_for_each_entry (struct fd_context, ctx, &screen->context_list, node)
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rebind_resource_in_ctx(ctx, rsc);
162
163
fd_resource_unlock(rsc);
164
fd_screen_unlock(screen);
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}
166
167
static inline void
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fd_resource_set_bo(struct fd_resource *rsc, struct fd_bo *bo)
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{
170
struct fd_screen *screen = fd_screen(rsc->b.b.screen);
171
172
rsc->bo = bo;
173
rsc->seqno = p_atomic_inc_return(&screen->rsc_seqno);
174
}
175
176
int
177
__fd_resource_wait(struct fd_context *ctx, struct fd_resource *rsc, unsigned op,
178
const char *func)
179
{
180
if (op & FD_BO_PREP_NOSYNC)
181
return fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
182
183
int ret;
184
185
perf_time_ctx (ctx, 10000, "%s: a busy \"%" PRSC_FMT "\" BO stalled", func,
186
PRSC_ARGS(&rsc->b.b)) {
187
ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
188
}
189
190
return ret;
191
}
192
193
static void
194
realloc_bo(struct fd_resource *rsc, uint32_t size)
195
{
196
struct pipe_resource *prsc = &rsc->b.b;
197
struct fd_screen *screen = fd_screen(rsc->b.b.screen);
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uint32_t flags =
199
COND(prsc->bind & PIPE_BIND_SCANOUT, FD_BO_SCANOUT);
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/* TODO other flags? */
201
202
/* if we start using things other than write-combine,
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* be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
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*/
205
206
if (rsc->bo)
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fd_bo_del(rsc->bo);
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struct fd_bo *bo =
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fd_bo_new(screen->dev, size, flags, "%ux%ux%u@%u:%x", prsc->width0,
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prsc->height0, prsc->depth0, rsc->layout.cpp, prsc->bind);
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fd_resource_set_bo(rsc, bo);
213
214
/* Zero out the UBWC area on allocation. This fixes intermittent failures
215
* with UBWC, which I suspect are due to the HW having a hard time
216
* interpreting arbitrary values populating the flags buffer when the BO
217
* was recycled through the bo cache (instead of fresh allocations from
218
* the kernel, which are zeroed). sleep(1) in this spot didn't work
219
* around the issue, but any memset value seems to.
220
*/
221
if (rsc->layout.ubwc) {
222
rsc->needs_ubwc_clear = true;
223
}
224
225
util_range_set_empty(&rsc->valid_buffer_range);
226
fd_bc_invalidate_resource(rsc, true);
227
}
228
229
static void
230
do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit,
231
bool fallback) assert_dt
232
{
233
struct pipe_context *pctx = &ctx->base;
234
235
assert(!ctx->in_blit);
236
ctx->in_blit = true;
237
238
/* TODO size threshold too?? */
239
if (fallback || !fd_blit(pctx, blit)) {
240
/* do blit on cpu: */
241
util_resource_copy_region(pctx, blit->dst.resource, blit->dst.level,
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blit->dst.box.x, blit->dst.box.y,
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blit->dst.box.z, blit->src.resource,
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blit->src.level, &blit->src.box);
245
}
246
247
ctx->in_blit = false;
248
}
249
250
/**
251
* Replace the storage of dst with src. This is only used by TC in the
252
* DISCARD_WHOLE_RESOURCE path, and src is a freshly allocated buffer.
253
*/
254
void
255
fd_replace_buffer_storage(struct pipe_context *pctx, struct pipe_resource *pdst,
256
struct pipe_resource *psrc, unsigned num_rebinds, uint32_t rebind_mask,
257
uint32_t delete_buffer_id)
258
{
259
struct fd_context *ctx = fd_context(pctx);
260
struct fd_resource *dst = fd_resource(pdst);
261
struct fd_resource *src = fd_resource(psrc);
262
263
DBG("pdst=%p, psrc=%p", pdst, psrc);
264
265
/* This should only be called with buffers.. which side-steps some tricker
266
* cases, like a rsc that is in a batch-cache key...
267
*/
268
assert(pdst->target == PIPE_BUFFER);
269
assert(psrc->target == PIPE_BUFFER);
270
assert(dst->track->bc_batch_mask == 0);
271
assert(src->track->bc_batch_mask == 0);
272
assert(src->track->batch_mask == 0);
273
assert(src->track->write_batch == NULL);
274
assert(memcmp(&dst->layout, &src->layout, sizeof(dst->layout)) == 0);
275
276
/* get rid of any references that batch-cache might have to us (which
277
* should empty/destroy rsc->batches hashset)
278
*
279
* Note that we aren't actually destroying dst, but we are replacing
280
* it's storage so we want to go thru the same motions of decoupling
281
* it's batch connections.
282
*/
283
fd_bc_invalidate_resource(dst, true);
284
rebind_resource(dst);
285
286
util_idalloc_mt_free(&ctx->screen->buffer_ids, delete_buffer_id);
287
288
fd_screen_lock(ctx->screen);
289
290
fd_bo_del(dst->bo);
291
dst->bo = fd_bo_ref(src->bo);
292
293
fd_resource_tracking_reference(&dst->track, src->track);
294
src->is_replacement = true;
295
296
dst->seqno = p_atomic_inc_return(&ctx->screen->rsc_seqno);
297
298
fd_screen_unlock(ctx->screen);
299
}
300
301
static unsigned
302
translate_usage(unsigned usage)
303
{
304
uint32_t op = 0;
305
306
if (usage & PIPE_MAP_READ)
307
op |= FD_BO_PREP_READ;
308
309
if (usage & PIPE_MAP_WRITE)
310
op |= FD_BO_PREP_WRITE;
311
312
return op;
313
}
314
315
bool
316
fd_resource_busy(struct pipe_screen *pscreen, struct pipe_resource *prsc,
317
unsigned usage)
318
{
319
struct fd_resource *rsc = fd_resource(prsc);
320
321
if (pending(rsc, !!(usage & PIPE_MAP_WRITE)))
322
return true;
323
324
if (resource_busy(rsc, translate_usage(usage)))
325
return true;
326
327
return false;
328
}
329
330
static void flush_resource(struct fd_context *ctx, struct fd_resource *rsc,
331
unsigned usage);
332
333
/**
334
* Helper to check if the format is something that we can blit/render
335
* to.. if the format is not renderable, there is no point in trying
336
* to do a staging blit (as it will still end up being a cpu copy)
337
*/
338
static bool
339
is_renderable(struct pipe_resource *prsc)
340
{
341
struct pipe_screen *pscreen = prsc->screen;
342
return pscreen->is_format_supported(
343
pscreen, prsc->format, prsc->target, prsc->nr_samples,
344
prsc->nr_storage_samples, PIPE_BIND_RENDER_TARGET);
345
}
346
347
/**
348
* @rsc: the resource to shadow
349
* @level: the level to discard (if box != NULL, otherwise ignored)
350
* @box: the box to discard (or NULL if none)
351
* @modifier: the modifier for the new buffer state
352
*/
353
static bool
354
fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
355
unsigned level, const struct pipe_box *box,
356
uint64_t modifier) assert_dt
357
{
358
struct pipe_context *pctx = &ctx->base;
359
struct pipe_resource *prsc = &rsc->b.b;
360
struct fd_screen *screen = fd_screen(pctx->screen);
361
struct fd_batch *batch;
362
bool fallback = false;
363
364
if (prsc->next)
365
return false;
366
367
/* Flush any pending batches writing the resource before we go mucking around
368
* in its insides. The blit would immediately cause the batch to be flushed,
369
* anyway.
370
*/
371
fd_bc_flush_writer(ctx, rsc);
372
373
/* Because IB1 ("gmem") cmdstream is built only when we flush the
374
* batch, we need to flush any batches that reference this rsc as
375
* a render target. Otherwise the framebuffer state emitted in
376
* IB1 will reference the resources new state, and not the state
377
* at the point in time that the earlier draws referenced it.
378
*
379
* Note that being in the gmem key doesn't necessarily mean the
380
* batch was considered a writer!
381
*/
382
foreach_batch (batch, &screen->batch_cache, rsc->track->bc_batch_mask) {
383
fd_batch_flush(batch);
384
}
385
386
/* TODO: somehow munge dimensions and format to copy unsupported
387
* render target format to something that is supported?
388
*/
389
if (!is_renderable(prsc))
390
fallback = true;
391
392
/* do shadowing back-blits on the cpu for buffers -- requires about a page of
393
* DMA to make GPU copies worth it according to robclark. Note, if you
394
* decide to do it on the GPU then you'll need to update valid_buffer_range
395
* in the swap()s below.
396
*/
397
if (prsc->target == PIPE_BUFFER)
398
fallback = true;
399
400
bool discard_whole_level = box && util_texrange_covers_whole_level(
401
prsc, level, box->x, box->y, box->z,
402
box->width, box->height, box->depth);
403
404
/* TODO need to be more clever about current level */
405
if ((prsc->target >= PIPE_TEXTURE_2D) && box && !discard_whole_level)
406
return false;
407
408
struct pipe_resource *pshadow = pctx->screen->resource_create_with_modifiers(
409
pctx->screen, prsc, &modifier, 1);
410
411
if (!pshadow)
412
return false;
413
414
assert(!ctx->in_shadow);
415
ctx->in_shadow = true;
416
417
/* get rid of any references that batch-cache might have to us (which
418
* should empty/destroy rsc->batches hashset)
419
*/
420
fd_bc_invalidate_resource(rsc, false);
421
rebind_resource(rsc);
422
423
fd_screen_lock(ctx->screen);
424
425
/* Swap the backing bo's, so shadow becomes the old buffer,
426
* blit from shadow to new buffer. From here on out, we
427
* cannot fail.
428
*
429
* Note that we need to do it in this order, otherwise if
430
* we go down cpu blit path, the recursive transfer_map()
431
* sees the wrong status..
432
*/
433
struct fd_resource *shadow = fd_resource(pshadow);
434
435
DBG("shadow: %p (%d, %p) -> %p (%d, %p)", rsc, rsc->b.b.reference.count,
436
rsc->track, shadow, shadow->b.b.reference.count, shadow->track);
437
438
swap(rsc->bo, shadow->bo);
439
swap(rsc->valid, shadow->valid);
440
441
/* swap() doesn't work because you can't typeof() the bitfield. */
442
bool temp = shadow->needs_ubwc_clear;
443
shadow->needs_ubwc_clear = rsc->needs_ubwc_clear;
444
rsc->needs_ubwc_clear = temp;
445
446
swap(rsc->layout, shadow->layout);
447
rsc->seqno = p_atomic_inc_return(&ctx->screen->rsc_seqno);
448
449
/* at this point, the newly created shadow buffer is not referenced
450
* by any batches, but the existing rsc (probably) is. We need to
451
* transfer those references over:
452
*/
453
debug_assert(shadow->track->batch_mask == 0);
454
foreach_batch (batch, &ctx->screen->batch_cache, rsc->track->batch_mask) {
455
struct set_entry *entry = _mesa_set_search(batch->resources, rsc);
456
_mesa_set_remove(batch->resources, entry);
457
_mesa_set_add(batch->resources, shadow);
458
}
459
swap(rsc->track, shadow->track);
460
461
fd_screen_unlock(ctx->screen);
462
463
struct pipe_blit_info blit = {};
464
blit.dst.resource = prsc;
465
blit.dst.format = prsc->format;
466
blit.src.resource = pshadow;
467
blit.src.format = pshadow->format;
468
blit.mask = util_format_get_mask(prsc->format);
469
blit.filter = PIPE_TEX_FILTER_NEAREST;
470
471
#define set_box(field, val) \
472
do { \
473
blit.dst.field = (val); \
474
blit.src.field = (val); \
475
} while (0)
476
477
/* Disable occlusion queries during shadow blits. */
478
bool saved_active_queries = ctx->active_queries;
479
pctx->set_active_query_state(pctx, false);
480
481
/* blit the other levels in their entirety: */
482
for (unsigned l = 0; l <= prsc->last_level; l++) {
483
if (box && l == level)
484
continue;
485
486
/* just blit whole level: */
487
set_box(level, l);
488
set_box(box.width, u_minify(prsc->width0, l));
489
set_box(box.height, u_minify(prsc->height0, l));
490
set_box(box.depth, u_minify(prsc->depth0, l));
491
492
for (int i = 0; i < prsc->array_size; i++) {
493
set_box(box.z, i);
494
do_blit(ctx, &blit, fallback);
495
}
496
}
497
498
/* deal w/ current level specially, since we might need to split
499
* it up into a couple blits:
500
*/
501
if (box && !discard_whole_level) {
502
set_box(level, level);
503
504
switch (prsc->target) {
505
case PIPE_BUFFER:
506
case PIPE_TEXTURE_1D:
507
set_box(box.y, 0);
508
set_box(box.z, 0);
509
set_box(box.height, 1);
510
set_box(box.depth, 1);
511
512
if (box->x > 0) {
513
set_box(box.x, 0);
514
set_box(box.width, box->x);
515
516
do_blit(ctx, &blit, fallback);
517
}
518
if ((box->x + box->width) < u_minify(prsc->width0, level)) {
519
set_box(box.x, box->x + box->width);
520
set_box(box.width,
521
u_minify(prsc->width0, level) - (box->x + box->width));
522
523
do_blit(ctx, &blit, fallback);
524
}
525
break;
526
case PIPE_TEXTURE_2D:
527
/* TODO */
528
default:
529
unreachable("TODO");
530
}
531
}
532
533
pctx->set_active_query_state(pctx, saved_active_queries);
534
535
ctx->in_shadow = false;
536
537
pipe_resource_reference(&pshadow, NULL);
538
539
return true;
540
}
541
542
/**
543
* Uncompress an UBWC compressed buffer "in place". This works basically
544
* like resource shadowing, creating a new resource, and doing an uncompress
545
* blit, and swapping the state between shadow and original resource so it
546
* appears to the gallium frontends as if nothing changed.
547
*/
548
void
549
fd_resource_uncompress(struct fd_context *ctx, struct fd_resource *rsc, bool linear)
550
{
551
tc_assert_driver_thread(ctx->tc);
552
553
uint64_t modifier = linear ? DRM_FORMAT_MOD_LINEAR : FD_FORMAT_MOD_QCOM_TILED;
554
555
bool success = fd_try_shadow_resource(ctx, rsc, 0, NULL, modifier);
556
557
/* shadow should not fail in any cases where we need to uncompress: */
558
debug_assert(success);
559
}
560
561
/**
562
* Debug helper to hexdump a resource.
563
*/
564
void
565
fd_resource_dump(struct fd_resource *rsc, const char *name)
566
{
567
fd_bo_cpu_prep(rsc->bo, NULL, FD_BO_PREP_READ);
568
printf("%s: \n", name);
569
dump_hex(fd_bo_map(rsc->bo), fd_bo_size(rsc->bo));
570
}
571
572
static struct fd_resource *
573
fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
574
unsigned level, const struct pipe_box *box)
575
assert_dt
576
{
577
struct pipe_context *pctx = &ctx->base;
578
struct pipe_resource tmpl = rsc->b.b;
579
580
/* We cannot currently do stencil export on earlier gens, and
581
* u_blitter cannot do blits involving stencil otherwise:
582
*/
583
if ((ctx->screen->gpu_id < 600) && !ctx->blit &&
584
(util_format_get_mask(tmpl.format) & PIPE_MASK_S))
585
return NULL;
586
587
tmpl.width0 = box->width;
588
tmpl.height0 = box->height;
589
/* for array textures, box->depth is the array_size, otherwise
590
* for 3d textures, it is the depth:
591
*/
592
if (tmpl.array_size > 1) {
593
if (tmpl.target == PIPE_TEXTURE_CUBE)
594
tmpl.target = PIPE_TEXTURE_2D_ARRAY;
595
tmpl.array_size = box->depth;
596
tmpl.depth0 = 1;
597
} else {
598
tmpl.array_size = 1;
599
tmpl.depth0 = box->depth;
600
}
601
tmpl.last_level = 0;
602
tmpl.bind |= PIPE_BIND_LINEAR;
603
tmpl.usage = PIPE_USAGE_STAGING;
604
605
struct pipe_resource *pstaging =
606
pctx->screen->resource_create(pctx->screen, &tmpl);
607
if (!pstaging)
608
return NULL;
609
610
return fd_resource(pstaging);
611
}
612
613
static void
614
fd_blit_from_staging(struct fd_context *ctx,
615
struct fd_transfer *trans) assert_dt
616
{
617
DBG("");
618
struct pipe_resource *dst = trans->b.b.resource;
619
struct pipe_blit_info blit = {};
620
621
blit.dst.resource = dst;
622
blit.dst.format = dst->format;
623
blit.dst.level = trans->b.b.level;
624
blit.dst.box = trans->b.b.box;
625
blit.src.resource = trans->staging_prsc;
626
blit.src.format = trans->staging_prsc->format;
627
blit.src.level = 0;
628
blit.src.box = trans->staging_box;
629
blit.mask = util_format_get_mask(trans->staging_prsc->format);
630
blit.filter = PIPE_TEX_FILTER_NEAREST;
631
632
do_blit(ctx, &blit, false);
633
}
634
635
static void
636
fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans) assert_dt
637
{
638
DBG("");
639
struct pipe_resource *src = trans->b.b.resource;
640
struct pipe_blit_info blit = {};
641
642
blit.src.resource = src;
643
blit.src.format = src->format;
644
blit.src.level = trans->b.b.level;
645
blit.src.box = trans->b.b.box;
646
blit.dst.resource = trans->staging_prsc;
647
blit.dst.format = trans->staging_prsc->format;
648
blit.dst.level = 0;
649
blit.dst.box = trans->staging_box;
650
blit.mask = util_format_get_mask(trans->staging_prsc->format);
651
blit.filter = PIPE_TEX_FILTER_NEAREST;
652
653
do_blit(ctx, &blit, false);
654
}
655
656
static void
657
fd_resource_transfer_flush_region(struct pipe_context *pctx,
658
struct pipe_transfer *ptrans,
659
const struct pipe_box *box)
660
{
661
struct fd_resource *rsc = fd_resource(ptrans->resource);
662
663
if (ptrans->resource->target == PIPE_BUFFER)
664
util_range_add(&rsc->b.b, &rsc->valid_buffer_range,
665
ptrans->box.x + box->x,
666
ptrans->box.x + box->x + box->width);
667
}
668
669
static void
670
flush_resource(struct fd_context *ctx, struct fd_resource *rsc,
671
unsigned usage) assert_dt
672
{
673
if (usage & PIPE_MAP_WRITE) {
674
fd_bc_flush_readers(ctx, rsc);
675
} else {
676
fd_bc_flush_writer(ctx, rsc);
677
}
678
}
679
680
static void
681
fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
682
in_dt
683
{
684
struct fd_context *ctx = fd_context(pctx);
685
struct fd_resource *rsc = fd_resource(prsc);
686
687
flush_resource(ctx, rsc, PIPE_MAP_READ);
688
689
/* If we had to flush a batch, make sure it makes it's way all the
690
* way to the kernel:
691
*/
692
fd_resource_wait(ctx, rsc, FD_BO_PREP_FLUSH);
693
}
694
695
static void
696
fd_resource_transfer_unmap(struct pipe_context *pctx,
697
struct pipe_transfer *ptrans)
698
in_dt /* TODO for threaded-ctx we'll need to split out unsynchronized path */
699
{
700
struct fd_context *ctx = fd_context(pctx);
701
struct fd_resource *rsc = fd_resource(ptrans->resource);
702
struct fd_transfer *trans = fd_transfer(ptrans);
703
704
if (trans->staging_prsc) {
705
if (ptrans->usage & PIPE_MAP_WRITE)
706
fd_blit_from_staging(ctx, trans);
707
pipe_resource_reference(&trans->staging_prsc, NULL);
708
}
709
710
if (!(ptrans->usage & PIPE_MAP_UNSYNCHRONIZED)) {
711
fd_bo_cpu_fini(rsc->bo);
712
}
713
714
util_range_add(&rsc->b.b, &rsc->valid_buffer_range, ptrans->box.x,
715
ptrans->box.x + ptrans->box.width);
716
717
pipe_resource_reference(&ptrans->resource, NULL);
718
719
assert(trans->b.staging == NULL); /* for threaded context only */
720
721
/* Don't use pool_transfers_unsync. We are always in the driver
722
* thread. Freeing an object into a different pool is allowed.
723
*/
724
slab_free(&ctx->transfer_pool, ptrans);
725
}
726
727
static void
728
invalidate_resource(struct fd_resource *rsc, unsigned usage) assert_dt
729
{
730
bool needs_flush = pending(rsc, !!(usage & PIPE_MAP_WRITE));
731
unsigned op = translate_usage(usage);
732
733
if (needs_flush || resource_busy(rsc, op)) {
734
rebind_resource(rsc);
735
realloc_bo(rsc, fd_bo_size(rsc->bo));
736
} else {
737
util_range_set_empty(&rsc->valid_buffer_range);
738
}
739
}
740
741
static void *
742
resource_transfer_map_unsync(struct pipe_context *pctx,
743
struct pipe_resource *prsc, unsigned level,
744
unsigned usage, const struct pipe_box *box,
745
struct fd_transfer *trans)
746
{
747
struct fd_resource *rsc = fd_resource(prsc);
748
enum pipe_format format = prsc->format;
749
uint32_t offset;
750
char *buf;
751
752
buf = fd_bo_map(rsc->bo);
753
offset = box->y / util_format_get_blockheight(format) * trans->b.b.stride +
754
box->x / util_format_get_blockwidth(format) * rsc->layout.cpp +
755
fd_resource_offset(rsc, level, box->z);
756
757
if (usage & PIPE_MAP_WRITE)
758
rsc->valid = true;
759
760
return buf + offset;
761
}
762
763
/**
764
* Note, with threaded_context, resource_transfer_map() is only called
765
* in driver thread, but resource_transfer_map_unsync() can be called in
766
* either driver or frontend thread.
767
*/
768
static void *
769
resource_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
770
unsigned level, unsigned usage,
771
const struct pipe_box *box,
772
struct fd_transfer *trans) in_dt
773
{
774
struct fd_context *ctx = fd_context(pctx);
775
struct fd_resource *rsc = fd_resource(prsc);
776
char *buf;
777
int ret = 0;
778
779
tc_assert_driver_thread(ctx->tc);
780
781
/* Strip the read flag if the buffer has been invalidated (or is freshly
782
* created). Avoids extra staging blits of undefined data on glTexSubImage of
783
* a fresh DEPTH_COMPONENT or STENCIL_INDEX texture being stored as z24s8.
784
*/
785
if (!rsc->valid)
786
usage &= ~PIPE_MAP_READ;
787
788
/* we always need a staging texture for tiled buffers:
789
*
790
* TODO we might sometimes want to *also* shadow the resource to avoid
791
* splitting a batch.. for ex, mid-frame texture uploads to a tiled
792
* texture.
793
*/
794
if (rsc->layout.tile_mode) {
795
struct fd_resource *staging_rsc;
796
797
assert(prsc->target != PIPE_BUFFER);
798
799
staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
800
if (staging_rsc) {
801
trans->staging_prsc = &staging_rsc->b.b;
802
trans->b.b.stride = fd_resource_pitch(staging_rsc, 0);
803
trans->b.b.layer_stride = fd_resource_layer_stride(staging_rsc, 0);
804
trans->staging_box = *box;
805
trans->staging_box.x = 0;
806
trans->staging_box.y = 0;
807
trans->staging_box.z = 0;
808
809
if (usage & PIPE_MAP_READ) {
810
fd_blit_to_staging(ctx, trans);
811
812
fd_resource_wait(ctx, staging_rsc, FD_BO_PREP_READ);
813
}
814
815
buf = fd_bo_map(staging_rsc->bo);
816
817
ctx->stats.staging_uploads++;
818
819
return buf;
820
}
821
}
822
823
if (usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE) {
824
invalidate_resource(rsc, usage);
825
} else {
826
unsigned op = translate_usage(usage);
827
bool needs_flush = pending(rsc, !!(usage & PIPE_MAP_WRITE));
828
829
/* If the GPU is writing to the resource, or if it is reading from the
830
* resource and we're trying to write to it, flush the renders.
831
*/
832
bool busy = needs_flush || resource_busy(rsc, op);
833
834
/* if we need to flush/stall, see if we can make a shadow buffer
835
* to avoid this:
836
*
837
* TODO we could go down this path !reorder && !busy_for_read
838
* ie. we only *don't* want to go down this path if the blit
839
* will trigger a flush!
840
*/
841
if (ctx->screen->reorder && busy && !(usage & PIPE_MAP_READ) &&
842
(usage & PIPE_MAP_DISCARD_RANGE)) {
843
844
/* try shadowing only if it avoids a flush, otherwise staging would
845
* be better:
846
*/
847
if (needs_flush && fd_try_shadow_resource(ctx, rsc, level, box,
848
DRM_FORMAT_MOD_LINEAR)) {
849
needs_flush = busy = false;
850
ctx->stats.shadow_uploads++;
851
} else {
852
struct fd_resource *staging_rsc = NULL;
853
854
if (needs_flush) {
855
flush_resource(ctx, rsc, usage);
856
needs_flush = false;
857
}
858
859
/* in this case, we don't need to shadow the whole resource,
860
* since any draw that references the previous contents has
861
* already had rendering flushed for all tiles. So we can
862
* use a staging buffer to do the upload.
863
*/
864
if (is_renderable(prsc))
865
staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
866
if (staging_rsc) {
867
trans->staging_prsc = &staging_rsc->b.b;
868
trans->b.b.stride = fd_resource_pitch(staging_rsc, 0);
869
trans->b.b.layer_stride =
870
fd_resource_layer_stride(staging_rsc, 0);
871
trans->staging_box = *box;
872
trans->staging_box.x = 0;
873
trans->staging_box.y = 0;
874
trans->staging_box.z = 0;
875
buf = fd_bo_map(staging_rsc->bo);
876
877
ctx->stats.staging_uploads++;
878
879
return buf;
880
}
881
}
882
}
883
884
if (needs_flush) {
885
flush_resource(ctx, rsc, usage);
886
needs_flush = false;
887
}
888
889
/* The GPU keeps track of how the various bo's are being used, and
890
* will wait if necessary for the proper operation to have
891
* completed.
892
*/
893
if (busy) {
894
ret = fd_resource_wait(ctx, rsc, op);
895
if (ret)
896
return NULL;
897
}
898
}
899
900
return resource_transfer_map_unsync(pctx, prsc, level, usage, box, trans);
901
}
902
903
static unsigned
904
improve_transfer_map_usage(struct fd_context *ctx, struct fd_resource *rsc,
905
unsigned usage, const struct pipe_box *box)
906
/* Not *strictly* true, but the access to things that must only be in driver-
907
* thread are protected by !(usage & TC_TRANSFER_MAP_THREADED_UNSYNC):
908
*/
909
in_dt
910
{
911
if (usage & TC_TRANSFER_MAP_NO_INVALIDATE) {
912
usage &= ~PIPE_MAP_DISCARD_WHOLE_RESOURCE;
913
}
914
915
if (usage & TC_TRANSFER_MAP_THREADED_UNSYNC)
916
usage |= PIPE_MAP_UNSYNCHRONIZED;
917
918
if (!(usage &
919
(TC_TRANSFER_MAP_NO_INFER_UNSYNCHRONIZED | PIPE_MAP_UNSYNCHRONIZED))) {
920
if (ctx->in_shadow && !(usage & PIPE_MAP_READ)) {
921
usage |= PIPE_MAP_UNSYNCHRONIZED;
922
} else if ((usage & PIPE_MAP_WRITE) && (rsc->b.b.target == PIPE_BUFFER) &&
923
!util_ranges_intersect(&rsc->valid_buffer_range, box->x,
924
box->x + box->width)) {
925
/* We are trying to write to a previously uninitialized range. No need
926
* to synchronize.
927
*/
928
usage |= PIPE_MAP_UNSYNCHRONIZED;
929
}
930
}
931
932
return usage;
933
}
934
935
static void *
936
fd_resource_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
937
unsigned level, unsigned usage,
938
const struct pipe_box *box,
939
struct pipe_transfer **pptrans)
940
{
941
struct fd_context *ctx = fd_context(pctx);
942
struct fd_resource *rsc = fd_resource(prsc);
943
struct fd_transfer *trans;
944
struct pipe_transfer *ptrans;
945
946
DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
947
box->width, box->height, box->x, box->y);
948
949
if ((usage & PIPE_MAP_DIRECTLY) && rsc->layout.tile_mode) {
950
DBG("CANNOT MAP DIRECTLY!\n");
951
return NULL;
952
}
953
954
if (usage & TC_TRANSFER_MAP_THREADED_UNSYNC) {
955
ptrans = slab_alloc(&ctx->transfer_pool_unsync);
956
} else {
957
ptrans = slab_alloc(&ctx->transfer_pool);
958
}
959
960
if (!ptrans)
961
return NULL;
962
963
/* slab_alloc_st() doesn't zero: */
964
trans = fd_transfer(ptrans);
965
memset(trans, 0, sizeof(*trans));
966
967
usage = improve_transfer_map_usage(ctx, rsc, usage, box);
968
969
pipe_resource_reference(&ptrans->resource, prsc);
970
ptrans->level = level;
971
ptrans->usage = usage;
972
ptrans->box = *box;
973
ptrans->stride = fd_resource_pitch(rsc, level);
974
ptrans->layer_stride = fd_resource_layer_stride(rsc, level);
975
976
void *ret;
977
if (usage & PIPE_MAP_UNSYNCHRONIZED) {
978
ret = resource_transfer_map_unsync(pctx, prsc, level, usage, box, trans);
979
} else {
980
ret = resource_transfer_map(pctx, prsc, level, usage, box, trans);
981
}
982
983
if (ret) {
984
*pptrans = ptrans;
985
} else {
986
fd_resource_transfer_unmap(pctx, ptrans);
987
}
988
989
return ret;
990
}
991
992
static void
993
fd_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
994
{
995
struct fd_screen *screen = fd_screen(prsc->screen);
996
struct fd_resource *rsc = fd_resource(prsc);
997
998
if (!rsc->is_replacement)
999
fd_bc_invalidate_resource(rsc, true);
1000
if (rsc->bo)
1001
fd_bo_del(rsc->bo);
1002
if (rsc->lrz)
1003
fd_bo_del(rsc->lrz);
1004
if (rsc->scanout)
1005
renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
1006
1007
if (prsc->target == PIPE_BUFFER)
1008
util_idalloc_mt_free(&screen->buffer_ids, rsc->b.buffer_id_unique);
1009
1010
threaded_resource_deinit(prsc);
1011
1012
util_range_destroy(&rsc->valid_buffer_range);
1013
simple_mtx_destroy(&rsc->lock);
1014
fd_resource_tracking_reference(&rsc->track, NULL);
1015
1016
FREE(rsc);
1017
}
1018
1019
static uint64_t
1020
fd_resource_modifier(struct fd_resource *rsc)
1021
{
1022
if (!rsc->layout.tile_mode)
1023
return DRM_FORMAT_MOD_LINEAR;
1024
1025
if (rsc->layout.ubwc_layer_size)
1026
return DRM_FORMAT_MOD_QCOM_COMPRESSED;
1027
1028
/* TODO invent a modifier for tiled but not UBWC buffers: */
1029
return DRM_FORMAT_MOD_INVALID;
1030
}
1031
1032
static bool
1033
fd_resource_get_handle(struct pipe_screen *pscreen, struct pipe_context *pctx,
1034
struct pipe_resource *prsc, struct winsys_handle *handle,
1035
unsigned usage)
1036
{
1037
struct fd_resource *rsc = fd_resource(prsc);
1038
1039
rsc->b.is_shared = true;
1040
1041
handle->modifier = fd_resource_modifier(rsc);
1042
1043
DBG("%" PRSC_FMT ", modifier=%" PRIx64, PRSC_ARGS(prsc), handle->modifier);
1044
1045
return fd_screen_bo_get_handle(pscreen, rsc->bo, rsc->scanout,
1046
fd_resource_pitch(rsc, 0), handle);
1047
}
1048
1049
/* special case to resize query buf after allocated.. */
1050
void
1051
fd_resource_resize(struct pipe_resource *prsc, uint32_t sz)
1052
{
1053
struct fd_resource *rsc = fd_resource(prsc);
1054
1055
debug_assert(prsc->width0 == 0);
1056
debug_assert(prsc->target == PIPE_BUFFER);
1057
debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
1058
1059
prsc->width0 = sz;
1060
realloc_bo(rsc, fd_screen(prsc->screen)->setup_slices(rsc));
1061
}
1062
1063
static void
1064
fd_resource_layout_init(struct pipe_resource *prsc)
1065
{
1066
struct fd_resource *rsc = fd_resource(prsc);
1067
struct fdl_layout *layout = &rsc->layout;
1068
1069
layout->format = prsc->format;
1070
1071
layout->width0 = prsc->width0;
1072
layout->height0 = prsc->height0;
1073
layout->depth0 = prsc->depth0;
1074
1075
layout->cpp = util_format_get_blocksize(prsc->format);
1076
layout->cpp *= fd_resource_nr_samples(prsc);
1077
layout->cpp_shift = ffs(layout->cpp) - 1;
1078
}
1079
1080
static struct fd_resource *
1081
alloc_resource_struct(struct pipe_screen *pscreen,
1082
const struct pipe_resource *tmpl)
1083
{
1084
struct fd_screen *screen = fd_screen(pscreen);
1085
struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
1086
1087
if (!rsc)
1088
return NULL;
1089
1090
struct pipe_resource *prsc = &rsc->b.b;
1091
*prsc = *tmpl;
1092
1093
pipe_reference_init(&prsc->reference, 1);
1094
prsc->screen = pscreen;
1095
1096
util_range_init(&rsc->valid_buffer_range);
1097
simple_mtx_init(&rsc->lock, mtx_plain);
1098
1099
rsc->track = CALLOC_STRUCT(fd_resource_tracking);
1100
if (!rsc->track) {
1101
free(rsc);
1102
return NULL;
1103
}
1104
1105
pipe_reference_init(&rsc->track->reference, 1);
1106
1107
threaded_resource_init(prsc);
1108
1109
if (tmpl->target == PIPE_BUFFER)
1110
rsc->b.buffer_id_unique = util_idalloc_mt_alloc(&screen->buffer_ids);
1111
1112
return rsc;
1113
}
1114
1115
/**
1116
* Helper that allocates a resource and resolves its layout (but doesn't
1117
* allocate its bo).
1118
*
1119
* It returns a pipe_resource (as fd_resource_create_with_modifiers()
1120
* would do), and also bo's minimum required size as an output argument.
1121
*/
1122
static struct pipe_resource *
1123
fd_resource_allocate_and_resolve(struct pipe_screen *pscreen,
1124
const struct pipe_resource *tmpl,
1125
const uint64_t *modifiers, int count,
1126
uint32_t *psize)
1127
{
1128
struct fd_screen *screen = fd_screen(pscreen);
1129
struct fd_resource *rsc;
1130
struct pipe_resource *prsc;
1131
enum pipe_format format = tmpl->format;
1132
uint32_t size;
1133
1134
rsc = alloc_resource_struct(pscreen, tmpl);
1135
if (!rsc)
1136
return NULL;
1137
1138
prsc = &rsc->b.b;
1139
1140
DBG("%" PRSC_FMT, PRSC_ARGS(prsc));
1141
1142
if (tmpl->bind & PIPE_BIND_SHARED)
1143
rsc->b.is_shared = true;
1144
1145
fd_resource_layout_init(prsc);
1146
1147
#define LINEAR (PIPE_BIND_SCANOUT | PIPE_BIND_LINEAR | PIPE_BIND_DISPLAY_TARGET)
1148
1149
bool linear = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
1150
if (linear) {
1151
perf_debug("%" PRSC_FMT ": linear: DRM_FORMAT_MOD_LINEAR requested!",
1152
PRSC_ARGS(prsc));
1153
} else if (tmpl->bind & LINEAR) {
1154
if (tmpl->usage != PIPE_USAGE_STAGING)
1155
perf_debug("%" PRSC_FMT ": linear: LINEAR bind requested!",
1156
PRSC_ARGS(prsc));
1157
linear = true;
1158
}
1159
1160
if (FD_DBG(NOTILE))
1161
linear = true;
1162
1163
/* Normally, for non-shared buffers, allow buffer compression if
1164
* not shared, otherwise only allow if QCOM_COMPRESSED modifier
1165
* is requested:
1166
*
1167
* TODO we should probably also limit tiled in a similar way,
1168
* except we don't have a format modifier for tiled. (We probably
1169
* should.)
1170
*/
1171
bool allow_ubwc = false;
1172
if (!linear) {
1173
allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_INVALID, modifiers, count);
1174
if (!allow_ubwc) {
1175
perf_debug("%" PRSC_FMT
1176
": not UBWC: DRM_FORMAT_MOD_INVALID not requested!",
1177
PRSC_ARGS(prsc));
1178
}
1179
if (tmpl->bind & PIPE_BIND_SHARED) {
1180
allow_ubwc =
1181
drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count);
1182
if (!allow_ubwc) {
1183
perf_debug("%" PRSC_FMT
1184
": not UBWC: shared and DRM_FORMAT_MOD_QCOM_COMPRESSED "
1185
"not requested!",
1186
PRSC_ARGS(prsc));
1187
linear = true;
1188
}
1189
}
1190
}
1191
1192
allow_ubwc &= !FD_DBG(NOUBWC);
1193
1194
if (screen->tile_mode && (tmpl->target != PIPE_BUFFER) && !linear) {
1195
rsc->layout.tile_mode = screen->tile_mode(prsc);
1196
}
1197
1198
rsc->internal_format = format;
1199
1200
rsc->layout.ubwc = rsc->layout.tile_mode && is_a6xx(screen) && allow_ubwc;
1201
1202
if (prsc->target == PIPE_BUFFER) {
1203
assert(prsc->format == PIPE_FORMAT_R8_UNORM);
1204
size = prsc->width0;
1205
fdl_layout_buffer(&rsc->layout, size);
1206
} else {
1207
size = screen->setup_slices(rsc);
1208
}
1209
1210
/* special case for hw-query buffer, which we need to allocate before we
1211
* know the size:
1212
*/
1213
if (size == 0) {
1214
/* note, semi-intention == instead of & */
1215
debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
1216
*psize = 0;
1217
return prsc;
1218
}
1219
1220
/* Set the layer size if the (non-a6xx) backend hasn't done so. */
1221
if (rsc->layout.layer_first && !rsc->layout.layer_size) {
1222
rsc->layout.layer_size = align(size, 4096);
1223
size = rsc->layout.layer_size * prsc->array_size;
1224
}
1225
1226
if (FD_DBG(LAYOUT))
1227
fdl_dump_layout(&rsc->layout);
1228
1229
/* Hand out the resolved size. */
1230
if (psize)
1231
*psize = size;
1232
1233
return prsc;
1234
}
1235
1236
/**
1237
* Create a new texture object, using the given template info.
1238
*/
1239
static struct pipe_resource *
1240
fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
1241
const struct pipe_resource *tmpl,
1242
const uint64_t *modifiers, int count)
1243
{
1244
struct fd_screen *screen = fd_screen(pscreen);
1245
struct fd_resource *rsc;
1246
struct pipe_resource *prsc;
1247
uint32_t size;
1248
1249
/* when using kmsro, scanout buffers are allocated on the display device
1250
* create_with_modifiers() doesn't give us usage flags, so we have to
1251
* assume that all calls with modifiers are scanout-possible
1252
*/
1253
if (screen->ro &&
1254
((tmpl->bind & PIPE_BIND_SCANOUT) ||
1255
!(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID))) {
1256
struct pipe_resource scanout_templat = *tmpl;
1257
struct renderonly_scanout *scanout;
1258
struct winsys_handle handle;
1259
1260
/* note: alignment is wrong for a6xx */
1261
scanout_templat.width0 = align(tmpl->width0, screen->info->gmem_align_w);
1262
1263
scanout =
1264
renderonly_scanout_for_resource(&scanout_templat, screen->ro, &handle);
1265
if (!scanout)
1266
return NULL;
1267
1268
renderonly_scanout_destroy(scanout, screen->ro);
1269
1270
assert(handle.type == WINSYS_HANDLE_TYPE_FD);
1271
rsc = fd_resource(pscreen->resource_from_handle(
1272
pscreen, tmpl, &handle, PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
1273
close(handle.handle);
1274
if (!rsc)
1275
return NULL;
1276
1277
return &rsc->b.b;
1278
}
1279
1280
prsc =
1281
fd_resource_allocate_and_resolve(pscreen, tmpl, modifiers, count, &size);
1282
if (!prsc)
1283
return NULL;
1284
rsc = fd_resource(prsc);
1285
1286
realloc_bo(rsc, size);
1287
if (!rsc->bo)
1288
goto fail;
1289
1290
return prsc;
1291
fail:
1292
fd_resource_destroy(pscreen, prsc);
1293
return NULL;
1294
}
1295
1296
static struct pipe_resource *
1297
fd_resource_create(struct pipe_screen *pscreen,
1298
const struct pipe_resource *tmpl)
1299
{
1300
const uint64_t mod = DRM_FORMAT_MOD_INVALID;
1301
return fd_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
1302
}
1303
1304
/**
1305
* Create a texture from a winsys_handle. The handle is often created in
1306
* another process by first creating a pipe texture and then calling
1307
* resource_get_handle.
1308
*/
1309
static struct pipe_resource *
1310
fd_resource_from_handle(struct pipe_screen *pscreen,
1311
const struct pipe_resource *tmpl,
1312
struct winsys_handle *handle, unsigned usage)
1313
{
1314
struct fd_screen *screen = fd_screen(pscreen);
1315
struct fd_resource *rsc = alloc_resource_struct(pscreen, tmpl);
1316
1317
if (!rsc)
1318
return NULL;
1319
1320
struct fdl_slice *slice = fd_resource_slice(rsc, 0);
1321
struct pipe_resource *prsc = &rsc->b.b;
1322
1323
DBG("%" PRSC_FMT ", modifier=%" PRIx64, PRSC_ARGS(prsc), handle->modifier);
1324
1325
rsc->b.is_shared = true;
1326
1327
fd_resource_layout_init(prsc);
1328
1329
struct fd_bo *bo = fd_screen_bo_from_handle(pscreen, handle);
1330
if (!bo)
1331
goto fail;
1332
1333
fd_resource_set_bo(rsc, bo);
1334
1335
rsc->internal_format = tmpl->format;
1336
rsc->layout.pitch0 = handle->stride;
1337
slice->offset = handle->offset;
1338
slice->size0 = handle->stride * prsc->height0;
1339
1340
/* use a pitchalign of gmem_align_w pixels, because GMEM resolve for
1341
* lower alignments is not implemented (but possible for a6xx at least)
1342
*
1343
* for UBWC-enabled resources, layout_resource_for_modifier will further
1344
* validate the pitch and set the right pitchalign
1345
*/
1346
rsc->layout.pitchalign =
1347
fdl_cpp_shift(&rsc->layout) + util_logbase2(screen->info->gmem_align_w);
1348
1349
/* apply the minimum pitchalign (note: actually 4 for a3xx but doesn't
1350
* matter) */
1351
if (is_a6xx(screen) || is_a5xx(screen))
1352
rsc->layout.pitchalign = MAX2(rsc->layout.pitchalign, 6);
1353
else
1354
rsc->layout.pitchalign = MAX2(rsc->layout.pitchalign, 5);
1355
1356
if (rsc->layout.pitch0 < (prsc->width0 * rsc->layout.cpp) ||
1357
fd_resource_pitch(rsc, 0) != rsc->layout.pitch0)
1358
goto fail;
1359
1360
assert(rsc->layout.cpp);
1361
1362
if (screen->layout_resource_for_modifier(rsc, handle->modifier) < 0)
1363
goto fail;
1364
1365
if (screen->ro) {
1366
rsc->scanout =
1367
renderonly_create_gpu_import_for_resource(prsc, screen->ro, NULL);
1368
/* failure is expected in some cases.. */
1369
}
1370
1371
rsc->valid = true;
1372
1373
return prsc;
1374
1375
fail:
1376
fd_resource_destroy(pscreen, prsc);
1377
return NULL;
1378
}
1379
1380
bool
1381
fd_render_condition_check(struct pipe_context *pctx)
1382
{
1383
struct fd_context *ctx = fd_context(pctx);
1384
1385
if (!ctx->cond_query)
1386
return true;
1387
1388
perf_debug("Implementing conditional rendering using a CPU read instaed of HW conditional rendering.");
1389
1390
union pipe_query_result res = {0};
1391
bool wait = ctx->cond_mode != PIPE_RENDER_COND_NO_WAIT &&
1392
ctx->cond_mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
1393
1394
if (pctx->get_query_result(pctx, ctx->cond_query, wait, &res))
1395
return (bool)res.u64 != ctx->cond_cond;
1396
1397
return true;
1398
}
1399
1400
static void
1401
fd_invalidate_resource(struct pipe_context *pctx,
1402
struct pipe_resource *prsc) in_dt
1403
{
1404
struct fd_context *ctx = fd_context(pctx);
1405
struct fd_resource *rsc = fd_resource(prsc);
1406
1407
if (prsc->target == PIPE_BUFFER) {
1408
/* Handle the glInvalidateBufferData() case:
1409
*/
1410
invalidate_resource(rsc, PIPE_MAP_READ | PIPE_MAP_WRITE);
1411
} else if (rsc->track->write_batch) {
1412
/* Handle the glInvalidateFramebuffer() case, telling us that
1413
* we can skip resolve.
1414
*/
1415
1416
struct fd_batch *batch = rsc->track->write_batch;
1417
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
1418
1419
if (pfb->zsbuf && pfb->zsbuf->texture == prsc) {
1420
batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
1421
fd_context_dirty(ctx, FD_DIRTY_ZSA);
1422
}
1423
1424
for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
1425
if (pfb->cbufs[i] && pfb->cbufs[i]->texture == prsc) {
1426
batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1427
fd_context_dirty(ctx, FD_DIRTY_FRAMEBUFFER);
1428
}
1429
}
1430
}
1431
1432
rsc->valid = false;
1433
}
1434
1435
static enum pipe_format
1436
fd_resource_get_internal_format(struct pipe_resource *prsc)
1437
{
1438
return fd_resource(prsc)->internal_format;
1439
}
1440
1441
static void
1442
fd_resource_set_stencil(struct pipe_resource *prsc,
1443
struct pipe_resource *stencil)
1444
{
1445
fd_resource(prsc)->stencil = fd_resource(stencil);
1446
}
1447
1448
static struct pipe_resource *
1449
fd_resource_get_stencil(struct pipe_resource *prsc)
1450
{
1451
struct fd_resource *rsc = fd_resource(prsc);
1452
if (rsc->stencil)
1453
return &rsc->stencil->b.b;
1454
return NULL;
1455
}
1456
1457
static const struct u_transfer_vtbl transfer_vtbl = {
1458
.resource_create = fd_resource_create,
1459
.resource_destroy = fd_resource_destroy,
1460
.transfer_map = fd_resource_transfer_map,
1461
.transfer_flush_region = fd_resource_transfer_flush_region,
1462
.transfer_unmap = fd_resource_transfer_unmap,
1463
.get_internal_format = fd_resource_get_internal_format,
1464
.set_stencil = fd_resource_set_stencil,
1465
.get_stencil = fd_resource_get_stencil,
1466
};
1467
1468
static const uint64_t supported_modifiers[] = {
1469
DRM_FORMAT_MOD_LINEAR,
1470
};
1471
1472
static int
1473
fd_layout_resource_for_modifier(struct fd_resource *rsc, uint64_t modifier)
1474
{
1475
switch (modifier) {
1476
case DRM_FORMAT_MOD_LINEAR:
1477
/* The dri gallium frontend will pass DRM_FORMAT_MOD_INVALID to us
1478
* when it's called through any of the non-modifier BO create entry
1479
* points. Other drivers will determine tiling from the kernel or
1480
* other legacy backchannels, but for freedreno it just means
1481
* LINEAR. */
1482
case DRM_FORMAT_MOD_INVALID:
1483
return 0;
1484
default:
1485
return -1;
1486
}
1487
}
1488
1489
static struct pipe_resource *
1490
fd_resource_from_memobj(struct pipe_screen *pscreen,
1491
const struct pipe_resource *tmpl,
1492
struct pipe_memory_object *pmemobj, uint64_t offset)
1493
{
1494
struct fd_screen *screen = fd_screen(pscreen);
1495
struct fd_memory_object *memobj = fd_memory_object(pmemobj);
1496
struct pipe_resource *prsc;
1497
struct fd_resource *rsc;
1498
uint32_t size;
1499
assert(memobj->bo);
1500
1501
/* We shouldn't get a scanout buffer here. */
1502
assert(!(tmpl->bind & PIPE_BIND_SCANOUT));
1503
1504
uint64_t modifiers = DRM_FORMAT_MOD_INVALID;
1505
if (tmpl->bind & PIPE_BIND_LINEAR) {
1506
modifiers = DRM_FORMAT_MOD_LINEAR;
1507
} else if (is_a6xx(screen) && tmpl->width0 >= FDL_MIN_UBWC_WIDTH) {
1508
modifiers = DRM_FORMAT_MOD_QCOM_COMPRESSED;
1509
}
1510
1511
/* Allocate new pipe resource. */
1512
prsc = fd_resource_allocate_and_resolve(pscreen, tmpl, &modifiers, 1, &size);
1513
if (!prsc)
1514
return NULL;
1515
rsc = fd_resource(prsc);
1516
rsc->b.is_shared = true;
1517
1518
/* bo's size has to be large enough, otherwise cleanup resource and fail
1519
* gracefully.
1520
*/
1521
if (fd_bo_size(memobj->bo) < size) {
1522
fd_resource_destroy(pscreen, prsc);
1523
return NULL;
1524
}
1525
1526
/* Share the bo with the memory object. */
1527
fd_resource_set_bo(rsc, fd_bo_ref(memobj->bo));
1528
1529
return prsc;
1530
}
1531
1532
static struct pipe_memory_object *
1533
fd_memobj_create_from_handle(struct pipe_screen *pscreen,
1534
struct winsys_handle *whandle, bool dedicated)
1535
{
1536
struct fd_memory_object *memobj = CALLOC_STRUCT(fd_memory_object);
1537
if (!memobj)
1538
return NULL;
1539
1540
struct fd_bo *bo = fd_screen_bo_from_handle(pscreen, whandle);
1541
if (!bo) {
1542
free(memobj);
1543
return NULL;
1544
}
1545
1546
memobj->b.dedicated = dedicated;
1547
memobj->bo = bo;
1548
1549
return &memobj->b;
1550
}
1551
1552
static void
1553
fd_memobj_destroy(struct pipe_screen *pscreen,
1554
struct pipe_memory_object *pmemobj)
1555
{
1556
struct fd_memory_object *memobj = fd_memory_object(pmemobj);
1557
1558
assert(memobj->bo);
1559
fd_bo_del(memobj->bo);
1560
1561
free(pmemobj);
1562
}
1563
1564
void
1565
fd_resource_screen_init(struct pipe_screen *pscreen)
1566
{
1567
struct fd_screen *screen = fd_screen(pscreen);
1568
bool fake_rgtc = screen->gpu_id < 400;
1569
1570
pscreen->resource_create = u_transfer_helper_resource_create;
1571
/* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1572
* variant:
1573
*/
1574
pscreen->resource_create_with_modifiers = fd_resource_create_with_modifiers;
1575
pscreen->resource_from_handle = fd_resource_from_handle;
1576
pscreen->resource_get_handle = fd_resource_get_handle;
1577
pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1578
1579
pscreen->transfer_helper =
1580
u_transfer_helper_create(&transfer_vtbl, true, false, fake_rgtc, true);
1581
1582
if (!screen->layout_resource_for_modifier)
1583
screen->layout_resource_for_modifier = fd_layout_resource_for_modifier;
1584
if (!screen->supported_modifiers) {
1585
screen->supported_modifiers = supported_modifiers;
1586
screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
1587
}
1588
1589
/* GL_EXT_memory_object */
1590
pscreen->memobj_create_from_handle = fd_memobj_create_from_handle;
1591
pscreen->memobj_destroy = fd_memobj_destroy;
1592
pscreen->resource_from_memobj = fd_resource_from_memobj;
1593
}
1594
1595
static void
1596
fd_get_sample_position(struct pipe_context *context, unsigned sample_count,
1597
unsigned sample_index, float *pos_out)
1598
{
1599
/* The following is copied from nouveau/nv50 except for position
1600
* values, which are taken from blob driver */
1601
static const uint8_t pos1[1][2] = {{0x8, 0x8}};
1602
static const uint8_t pos2[2][2] = {{0xc, 0xc}, {0x4, 0x4}};
1603
static const uint8_t pos4[4][2] = {{0x6, 0x2},
1604
{0xe, 0x6},
1605
{0x2, 0xa},
1606
{0xa, 0xe}};
1607
/* TODO needs to be verified on supported hw */
1608
static const uint8_t pos8[8][2] = {{0x9, 0x5}, {0x7, 0xb}, {0xd, 0x9},
1609
{0x5, 0x3}, {0x3, 0xd}, {0x1, 0x7},
1610
{0xb, 0xf}, {0xf, 0x1}};
1611
1612
const uint8_t(*ptr)[2];
1613
1614
switch (sample_count) {
1615
case 1:
1616
ptr = pos1;
1617
break;
1618
case 2:
1619
ptr = pos2;
1620
break;
1621
case 4:
1622
ptr = pos4;
1623
break;
1624
case 8:
1625
ptr = pos8;
1626
break;
1627
default:
1628
assert(0);
1629
return;
1630
}
1631
1632
pos_out[0] = ptr[sample_index][0] / 16.0f;
1633
pos_out[1] = ptr[sample_index][1] / 16.0f;
1634
}
1635
1636
static void
1637
fd_blit_pipe(struct pipe_context *pctx,
1638
const struct pipe_blit_info *blit_info) in_dt
1639
{
1640
/* wrap fd_blit to return void */
1641
fd_blit(pctx, blit_info);
1642
}
1643
1644
void
1645
fd_resource_context_init(struct pipe_context *pctx)
1646
{
1647
pctx->buffer_map = u_transfer_helper_transfer_map;
1648
pctx->texture_map = u_transfer_helper_transfer_map;
1649
pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1650
pctx->buffer_unmap = u_transfer_helper_transfer_unmap;
1651
pctx->texture_unmap = u_transfer_helper_transfer_unmap;
1652
pctx->buffer_subdata = u_default_buffer_subdata;
1653
pctx->texture_subdata = u_default_texture_subdata;
1654
pctx->create_surface = fd_create_surface;
1655
pctx->surface_destroy = fd_surface_destroy;
1656
pctx->resource_copy_region = fd_resource_copy_region;
1657
pctx->blit = fd_blit_pipe;
1658
pctx->flush_resource = fd_flush_resource;
1659
pctx->invalidate_resource = fd_invalidate_resource;
1660
pctx->get_sample_position = fd_get_sample_position;
1661
}
1662
1663