Path: blob/21.2-virgl/src/gallium/drivers/i915/i915_context.h
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/**************************************************************************1*2* Copyright 2003 VMware, Inc.3* All Rights Reserved.4*5* Permission is hereby granted, free of charge, to any person obtaining a6* copy of this software and associated documentation files (the7* "Software"), to deal in the Software without restriction, including8* without limitation the rights to use, copy, modify, merge, publish,9* distribute, sub license, and/or sell copies of the Software, and to10* permit persons to whom the Software is furnished to do so, subject to11* the following conditions:12*13* The above copyright notice and this permission notice (including the14* next paragraph) shall be included in all copies or substantial portions15* of the Software.16*17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS18* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.20* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR21* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,22* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE23* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.24*25**************************************************************************/2627#ifndef I915_CONTEXT_H28#define I915_CONTEXT_H2930#include "pipe/p_context.h"31#include "pipe/p_defines.h"32#include "pipe/p_state.h"3334#include "draw/draw_vertex.h"3536#include "tgsi/tgsi_scan.h"3738#include "util/slab.h"39#include "util/u_blitter.h"40#include "i915_reg.h"4142struct i915_winsys;43struct i915_winsys_buffer;44struct i915_winsys_batchbuffer;4546#define I915_TEX_UNITS 84748#define I915_DYNAMIC_MODES4 049#define I915_DYNAMIC_DEPTHSCALE_0 1 /* just the header */50#define I915_DYNAMIC_DEPTHSCALE_1 251#define I915_DYNAMIC_IAB 352#define I915_DYNAMIC_BC_0 4 /* just the header */53#define I915_DYNAMIC_BC_1 554#define I915_DYNAMIC_BFO_0 655#define I915_DYNAMIC_BFO_1 756#define I915_DYNAMIC_STP_0 857#define I915_DYNAMIC_STP_1 958#define I915_DYNAMIC_SC_ENA_0 1059#define I915_DYNAMIC_SC_RECT_0 1160#define I915_DYNAMIC_SC_RECT_1 1261#define I915_DYNAMIC_SC_RECT_2 1362#define I915_MAX_DYNAMIC 146364#define I915_IMMEDIATE_S0 065#define I915_IMMEDIATE_S1 166#define I915_IMMEDIATE_S2 267#define I915_IMMEDIATE_S3 368#define I915_IMMEDIATE_S4 469#define I915_IMMEDIATE_S5 570#define I915_IMMEDIATE_S6 671#define I915_IMMEDIATE_S7 772#define I915_MAX_IMMEDIATE 87374/* These must mach the order of LI0_STATE_* bits, as they will be used75* to generate hardware packets:76*/77#define I915_CACHE_STATIC 078#define I915_CACHE_DYNAMIC 1 /* handled specially */79#define I915_CACHE_SAMPLER 280#define I915_CACHE_MAP 381#define I915_CACHE_PROGRAM 482#define I915_CACHE_CONSTANTS 583#define I915_MAX_CACHE 68485#define I915_MAX_CONSTANT 328687/** See constant_flags[] below */88#define I915_CONSTFLAG_USER 0x1f8990/**91* Subclass of pipe_shader_state92*/93struct i915_fragment_shader {94struct pipe_shader_state state;9596struct tgsi_shader_info info;9798struct draw_fragment_shader *draw_data;99100uint32_t *program;101uint32_t program_len;102103/**104* constants introduced during translation.105* These are placed at the end of the constant buffer and grow toward106* the beginning (eg: slot 31, 30 29, ...)107* User-provided constants start at 0.108* This allows both types of constants to co-exist (until there's too many)109* and doesn't require regenerating/changing the fragment program to110* shuffle constants around.111*/112uint32_t num_constants;113float constants[I915_MAX_CONSTANT][4];114115/**116* Status of each constant117* if I915_CONSTFLAG_PARAM, the value must be taken from the corresponding118* slot of the user's constant buffer. (set by pipe->set_constant_buffer())119* Else, the bitmask indicates which components are occupied by immediates.120*/121ubyte constant_flags[I915_MAX_CONSTANT];122123/**124* The mapping between generics and hw texture coords.125* We need to share this between the vertex and fragment stages.126**/127int generic_mapping[I915_TEX_UNITS];128};129130struct i915_cache_context;131132/* Use to calculate differences between state emitted to hardware and133* current driver-calculated state.134*/135struct i915_state {136unsigned immediate[I915_MAX_IMMEDIATE];137unsigned dynamic[I915_MAX_DYNAMIC];138139/** number of constants passed in through a constant buffer */140uint32_t num_user_constants[PIPE_SHADER_TYPES];141142/* texture sampler state */143unsigned sampler[I915_TEX_UNITS][3];144unsigned sampler_enable_flags;145unsigned sampler_enable_nr;146147/* texture image buffers */148unsigned texbuffer[I915_TEX_UNITS][3];149150/** Describes the current hardware vertex layout */151struct vertex_info vertex_info;152153/* static state (dst/depth buffer state) */154struct i915_winsys_buffer *cbuf_bo;155unsigned cbuf_flags;156struct i915_winsys_buffer *depth_bo;157unsigned depth_flags;158unsigned dst_buf_vars;159uint32_t draw_offset;160uint32_t draw_size;161162/* Reswizzle for OC writes in PIXEL_SHADER_PROGRAM, or 0 if unnecessary. */163uint32_t fixup_swizzle;164/* Mapping from color buffer dst channels in HW to gallium API src channels.165*/166uint8_t color_swizzle[4];167168unsigned id; /* track lost context events */169};170171struct i915_blend_state {172unsigned iab;173unsigned iab_alpha_in_g;174unsigned iab_alpha_is_x;175176unsigned modes4;177unsigned LIS5;178179unsigned LIS6;180unsigned LIS6_alpha_in_g;181unsigned LIS6_alpha_is_x;182};183184struct i915_depth_stencil_state {185unsigned stencil_modes4_cw;186unsigned stencil_modes4_ccw;187unsigned bfo_cw[2];188unsigned bfo_ccw[2];189unsigned stencil_LIS5_cw;190unsigned stencil_LIS5_ccw;191unsigned depth_LIS6;192};193194struct i915_rasterizer_state {195struct pipe_rasterizer_state templ;196197unsigned light_twoside : 1;198unsigned st;199200unsigned LIS4;201unsigned LIS6;202unsigned LIS7;203unsigned sc[1];204205union {206float f;207unsigned u;208} ds[2];209};210211struct i915_sampler_state {212struct pipe_sampler_state templ;213unsigned state[3];214unsigned minlod;215unsigned maxlod;216};217218struct i915_surface {219struct pipe_surface templ;220uint32_t buf_info; /* _3DSTATE_BUF_INFO_CMD flags */221222/* PIXEL_SHADER_PROGRAM swizzle for OC buffer to handle the cbuf format (or 0223* if none). */224uint32_t oc_swizzle;225/* cbuf swizzle from dst r/g/b/a channels in memory to channels of gallium226* API. */227uint8_t color_swizzle[4];228229bool alpha_in_g : 1;230bool alpha_is_x : 1;231};232233struct i915_velems_state {234unsigned count;235struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];236};237238struct i915_context {239struct pipe_context base;240241struct i915_winsys *iws;242243struct draw_context *draw;244245/* The most recent drawing state as set by the driver:246*/247const struct i915_blend_state *blend;248const struct i915_sampler_state *fragment_sampler[PIPE_MAX_SAMPLERS];249struct pipe_sampler_state *vertex_samplers[PIPE_MAX_SAMPLERS];250const struct i915_depth_stencil_state *depth_stencil;251const struct i915_rasterizer_state *rasterizer;252253struct i915_fragment_shader *fs;254255void *vs;256257struct i915_velems_state *velems;258unsigned nr_vertex_buffers;259struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];260261struct pipe_blend_color blend_color;262struct pipe_stencil_ref stencil_ref;263struct pipe_clip_state clip;264struct pipe_resource *constants[PIPE_SHADER_TYPES];265struct pipe_framebuffer_state framebuffer;266struct pipe_poly_stipple poly_stipple;267struct pipe_scissor_state scissor;268struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS];269struct pipe_viewport_state viewport;270271unsigned dirty;272273unsigned num_samplers;274unsigned num_fragment_sampler_views;275276struct i915_winsys_batchbuffer *batch;277278/** Vertex buffer */279struct i915_winsys_buffer *vbo;280size_t vbo_offset;281unsigned vbo_flushed;282283struct i915_state current;284unsigned hardware_dirty;285unsigned immediate_dirty : I915_MAX_IMMEDIATE;286unsigned dynamic_dirty : I915_MAX_DYNAMIC;287unsigned static_dirty : 4;288unsigned flush_dirty : 2;289290struct i915_winsys_buffer *validation_buffers[2 + 1 + I915_TEX_UNITS];291int num_validation_buffers;292293struct slab_mempool transfer_pool;294struct slab_mempool texture_transfer_pool;295296/* state for tracking flushes */297int last_fired_vertices;298int fired_vertices;299int queued_vertices;300301bool no_log_program_errors;302303/** blitter/hw-clear */304struct blitter_context *blitter;305};306307/* A flag for each frontend state object:308*/309#define I915_NEW_VIEWPORT 0x1310#define I915_NEW_RASTERIZER 0x2311#define I915_NEW_FS 0x4312#define I915_NEW_BLEND 0x8313#define I915_NEW_CLIP 0x10314#define I915_NEW_SCISSOR 0x20315#define I915_NEW_STIPPLE 0x40316#define I915_NEW_FRAMEBUFFER 0x80317#define I915_NEW_ALPHA_TEST 0x100318#define I915_NEW_DEPTH_STENCIL 0x200319#define I915_NEW_SAMPLER 0x400320#define I915_NEW_SAMPLER_VIEW 0x800321#define I915_NEW_VS_CONSTANTS 0x1000322#define I915_NEW_FS_CONSTANTS 0x2000323#define I915_NEW_GS_CONSTANTS 0x4000324#define I915_NEW_VBO 0x8000325#define I915_NEW_VS 0x10000326#define I915_NEW_COLOR_SWIZZLE 0x20000327328/* Driver's internally generated state flags:329*/330#define I915_NEW_VERTEX_FORMAT 0x10000331332/* Dirty flags for hardware emit333*/334#define I915_HW_STATIC (1 << I915_CACHE_STATIC)335#define I915_HW_DYNAMIC (1 << I915_CACHE_DYNAMIC)336#define I915_HW_SAMPLER (1 << I915_CACHE_SAMPLER)337#define I915_HW_MAP (1 << I915_CACHE_MAP)338#define I915_HW_PROGRAM (1 << I915_CACHE_PROGRAM)339#define I915_HW_CONSTANTS (1 << I915_CACHE_CONSTANTS)340#define I915_HW_IMMEDIATE (1 << (I915_MAX_CACHE + 0))341#define I915_HW_INVARIANT (1 << (I915_MAX_CACHE + 1))342#define I915_HW_FLUSH (1 << (I915_MAX_CACHE + 1))343344/* hw flush handling */345#define I915_FLUSH_CACHE 1346#define I915_PIPELINE_FLUSH 2347348/* split up static state */349#define I915_DST_BUF_COLOR 1350#define I915_DST_BUF_DEPTH 2351#define I915_DST_VARS 4352#define I915_DST_RECT 8353354static inline void355i915_set_flush_dirty(struct i915_context *i915, unsigned flush)356{357i915->hardware_dirty |= I915_HW_FLUSH;358i915->flush_dirty |= flush;359}360361static inline uint32_t362i915_stencil_ccw(struct i915_context *i915)363{364/* If we're doing two sided stencil, then front_ccw means we need to reverse365* the state for the sides.366*/367return i915->rasterizer->templ.front_ccw &&368(i915->depth_stencil->bfo_cw[0] & BFO_STENCIL_TWO_SIDE);369}370/***********************************************************************371* i915_prim_emit.c:372*/373struct draw_stage *i915_draw_render_stage(struct i915_context *i915);374375/***********************************************************************376* i915_prim_vbuf.c:377*/378struct draw_stage *i915_draw_vbuf_stage(struct i915_context *i915);379380/***********************************************************************381* i915_state_emit.c:382*/383void i915_emit_hardware_state(struct i915_context *i915);384385/***********************************************************************386* i915_clear.c:387*/388void i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,389const struct pipe_scissor_state *scissor_state,390const union pipe_color_union *color, double depth,391unsigned stencil);392void i915_clear_render(struct pipe_context *pipe, unsigned buffers,393const struct pipe_scissor_state *scissor_state,394const union pipe_color_union *color, double depth,395unsigned stencil);396void i915_clear_emit(struct pipe_context *pipe, unsigned buffers,397const union pipe_color_union *color, double depth,398unsigned stencil, unsigned destx, unsigned desty,399unsigned width, unsigned height);400401/***********************************************************************402*403*/404void i915_init_state_functions(struct i915_context *i915);405void i915_init_flush_functions(struct i915_context *i915);406void i915_init_string_functions(struct i915_context *i915);407408/************************************************************************409* i915_context.c410*/411struct pipe_context *i915_create_context(struct pipe_screen *screen, void *priv,412unsigned flags);413414/***********************************************************************415* Inline conversion functions. These are better-typed than the416* macros used previously:417*/418static inline struct i915_context *419i915_context(struct pipe_context *pipe)420{421return (struct i915_context *)pipe;422}423424static inline struct i915_surface *425i915_surface(struct pipe_surface *pipe)426{427return (struct i915_surface *)pipe;428}429430#endif431432433