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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/i915/i915_debug_fp.c
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/**************************************************************************
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*
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* Copyright 2003 VMware, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#include "util/log.h"
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#include "util/ralloc.h"
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#include "util/u_debug.h"
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#include "i915_debug.h"
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#include "i915_debug_private.h"
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#include "i915_reg.h"
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#define PRINTF ralloc_asprintf_append
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static const char *opcodes[0x20] = {
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"NOP", "ADD", "MOV", "MUL", "MAD", "DP2ADD", "DP3", "DP4",
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"FRC", "RCP", "RSQ", "EXP", "LOG", "CMP", "MIN", "MAX",
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"FLR", "MOD", "TRC", "SGE", "SLT", "TEXLD", "TEXLDP", "TEXLDB",
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"TEXKILL", "DCL", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f",
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};
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static const int args[0x20] = {
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0, /* 0 nop */
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2, /* 1 add */
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1, /* 2 mov */
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2, /* 3 m ul */
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3, /* 4 mad */
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3, /* 5 dp2add */
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2, /* 6 dp3 */
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2, /* 7 dp4 */
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1, /* 8 frc */
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1, /* 9 rcp */
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1, /* a rsq */
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1, /* b exp */
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1, /* c log */
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3, /* d cmp */
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2, /* e min */
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2, /* f max */
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1, /* 10 flr */
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1, /* 11 mod */
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1, /* 12 trc */
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2, /* 13 sge */
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2, /* 14 slt */
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
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};
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static const char *regname[0x8] = {
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"R", "T", "CONST", "S", "OC", "OD", "U", "UNKNOWN",
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};
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static void
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print_reg_type_nr(char **stream, unsigned type, unsigned nr)
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{
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switch (type) {
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case REG_TYPE_T:
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switch (nr) {
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case T_DIFFUSE:
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PRINTF(stream, "T_DIFFUSE");
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return;
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case T_SPECULAR:
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PRINTF(stream, "T_SPECULAR");
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return;
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case T_FOG_W:
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PRINTF(stream, "T_FOG_W");
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return;
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default:
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PRINTF(stream, "T_TEX%d", nr);
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return;
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}
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case REG_TYPE_OC:
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if (nr == 0) {
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PRINTF(stream, "oC");
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return;
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}
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break;
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case REG_TYPE_OD:
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if (nr == 0) {
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PRINTF(stream, "oD");
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return;
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}
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break;
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default:
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break;
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}
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PRINTF(stream, "%s[%d]", regname[type], nr);
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}
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#define REG_SWIZZLE_MASK 0x7777
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#define REG_NEGATE_MASK 0x8888
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#define REG_SWIZZLE_XYZW \
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((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) | (SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) | \
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(SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) | (SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
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static void
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print_reg_neg_swizzle(char **stream, unsigned reg)
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{
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int i;
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if ((reg & REG_SWIZZLE_MASK) == REG_SWIZZLE_XYZW &&
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(reg & REG_NEGATE_MASK) == 0)
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return;
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PRINTF(stream, ".");
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for (i = 3; i >= 0; i--) {
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if (reg & (1 << ((i * 4) + 3)))
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PRINTF(stream, "-");
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switch ((reg >> (i * 4)) & 0x7) {
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case 0:
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PRINTF(stream, "x");
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break;
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case 1:
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PRINTF(stream, "y");
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break;
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case 2:
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PRINTF(stream, "z");
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break;
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case 3:
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PRINTF(stream, "w");
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break;
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case 4:
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PRINTF(stream, "0");
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break;
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case 5:
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PRINTF(stream, "1");
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break;
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default:
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PRINTF(stream, "?");
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break;
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}
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}
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}
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static void
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print_src_reg(char **stream, unsigned dword)
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{
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unsigned nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK;
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unsigned type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK;
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print_reg_type_nr(stream, type, nr);
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print_reg_neg_swizzle(stream, dword);
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}
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static void
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print_dest_reg(char **stream, unsigned dword)
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{
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unsigned nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK;
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unsigned type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK;
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print_reg_type_nr(stream, type, nr);
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if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL)
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return;
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PRINTF(stream, ".");
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if (dword & A0_DEST_CHANNEL_X)
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PRINTF(stream, "x");
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if (dword & A0_DEST_CHANNEL_Y)
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PRINTF(stream, "y");
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if (dword & A0_DEST_CHANNEL_Z)
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PRINTF(stream, "z");
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if (dword & A0_DEST_CHANNEL_W)
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PRINTF(stream, "w");
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}
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#define GET_SRC0_REG(r0, r1) ((r0 << 14) | (r1 >> A1_SRC0_CHANNEL_W_SHIFT))
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#define GET_SRC1_REG(r0, r1) ((r0 << 8) | (r1 >> A2_SRC1_CHANNEL_W_SHIFT))
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#define GET_SRC2_REG(r) (r)
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static void
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print_arith_op(char **stream, unsigned opcode, const unsigned *program)
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{
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if (opcode != A0_NOP) {
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print_dest_reg(stream, program[0]);
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if (program[0] & A0_DEST_SATURATE)
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PRINTF(stream, " = SATURATE ");
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else
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PRINTF(stream, " = ");
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}
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PRINTF(stream, "%s ", opcodes[opcode]);
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print_src_reg(stream, GET_SRC0_REG(program[0], program[1]));
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if (args[opcode] == 1)
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return;
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PRINTF(stream, ", ");
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print_src_reg(stream, GET_SRC1_REG(program[1], program[2]));
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if (args[opcode] == 2)
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return;
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PRINTF(stream, ", ");
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print_src_reg(stream, GET_SRC2_REG(program[2]));
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return;
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}
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static void
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print_tex_op(char **stream, unsigned opcode, const unsigned *program)
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{
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print_dest_reg(stream, program[0] | A0_DEST_CHANNEL_ALL);
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PRINTF(stream, " = ");
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PRINTF(stream, "%s ", opcodes[opcode]);
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PRINTF(stream, "S[%d],", program[0] & T0_SAMPLER_NR_MASK);
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print_reg_type_nr(stream,
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(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) & REG_TYPE_MASK,
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(program[1] >> T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK);
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}
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static void
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print_texkil_op(char **stream, unsigned opcode, const unsigned *program)
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{
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PRINTF(stream, "TEXKIL ");
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print_reg_type_nr(stream,
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(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) & REG_TYPE_MASK,
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(program[1] >> T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK);
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}
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static void
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print_dcl_op(char **stream, unsigned opcode, const unsigned *program)
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{
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unsigned type = (program[0] >> D0_TYPE_SHIFT) & REG_TYPE_MASK;
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PRINTF(stream, "%s ", opcodes[opcode]);
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unsigned dest_dword = program[0];
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if (type == REG_TYPE_S)
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dest_dword |= A0_DEST_CHANNEL_ALL;
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print_dest_reg(stream, dest_dword);
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if (type == REG_TYPE_S) {
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switch (program[0] & D0_SAMPLE_TYPE_MASK) {
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case D0_SAMPLE_TYPE_2D:
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PRINTF(stream, " 2D");
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break;
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case D0_SAMPLE_TYPE_VOLUME:
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PRINTF(stream, " 3D");
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break;
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case D0_SAMPLE_TYPE_CUBE:
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PRINTF(stream, " CUBE");
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break;
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default:
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PRINTF(stream, " XXX bad type");
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break;
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}
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}
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}
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void
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i915_disassemble_program(const unsigned *program, unsigned sz)
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{
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unsigned i;
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mesa_logi("\t\tBEGIN");
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assert((program[0] & 0x1ff) + 2 == sz);
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program++;
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for (i = 1; i < sz; i += 3, program += 3) {
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unsigned opcode = program[0] & (0x1f << 24);
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char *stream = ralloc_strdup(NULL, "");
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if ((int)opcode >= A0_NOP && opcode <= A0_SLT)
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print_arith_op(&stream, opcode >> 24, program);
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else if (opcode >= T0_TEXLD && opcode < T0_TEXKILL)
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print_tex_op(&stream, opcode >> 24, program);
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else if (opcode == T0_TEXKILL)
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print_texkil_op(&stream, opcode >> 24, program);
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else if (opcode == D0_DCL)
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print_dcl_op(&stream, opcode >> 24, program);
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else
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ralloc_asprintf_append(&stream, "\t\t Unknown opcode 0x%x\n", opcode);
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mesa_logi("\t\t %s ", stream);
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ralloc_free(stream);
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}
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mesa_logi("\t\tEND");
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}
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