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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/i915/i915_state_immediate.c
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/**************************************************************************
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*
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* Copyright 2007 VMware, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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/*
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* Authors:
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* Keith Whitwell <[email protected]>
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*/
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#include "util/u_memory.h"
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#include "i915_context.h"
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#include "i915_reg.h"
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#include "i915_state.h"
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#include "i915_state_inlines.h"
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/* Convinience function to check immediate state.
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*/
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static inline void
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set_immediate(struct i915_context *i915, unsigned offset, const unsigned state)
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{
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if (i915->current.immediate[offset] == state)
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return;
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i915->current.immediate[offset] = state;
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i915->immediate_dirty |= 1 << offset;
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i915->hardware_dirty |= I915_HW_IMMEDIATE;
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}
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/***********************************************************************
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* S0,S1: Vertex buffer state.
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*/
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static void
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upload_S0S1(struct i915_context *i915)
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{
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unsigned LIS0, LIS1;
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/* I915_NEW_VBO
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*/
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LIS0 = i915->vbo_offset;
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/* Need to force this */
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if (i915->dirty & I915_NEW_VBO) {
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i915->immediate_dirty |= 1 << I915_IMMEDIATE_S0;
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i915->hardware_dirty |= I915_HW_IMMEDIATE;
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}
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/* I915_NEW_VERTEX_SIZE
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*/
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{
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unsigned vertex_size = i915->current.vertex_info.size;
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LIS1 = ((vertex_size << 24) | (vertex_size << 16));
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}
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set_immediate(i915, I915_IMMEDIATE_S0, LIS0);
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set_immediate(i915, I915_IMMEDIATE_S1, LIS1);
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}
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const struct i915_tracked_state i915_upload_S0S1 = {
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"imm S0 S1", upload_S0S1, I915_NEW_VBO | I915_NEW_VERTEX_FORMAT};
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/***********************************************************************
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* S4: Vertex format, rasterization state
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*/
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static void
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upload_S2S4(struct i915_context *i915)
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{
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unsigned LIS2, LIS4;
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/* I915_NEW_VERTEX_FORMAT
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*/
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{
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LIS2 = i915->current.vertex_info.hwfmt[1];
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LIS4 = i915->current.vertex_info.hwfmt[0];
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assert(LIS4); /* should never be zero? */
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}
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LIS4 |= i915->rasterizer->LIS4;
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set_immediate(i915, I915_IMMEDIATE_S2, LIS2);
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set_immediate(i915, I915_IMMEDIATE_S4, LIS4);
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}
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const struct i915_tracked_state i915_upload_S2S4 = {
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"imm S2 S4", upload_S2S4, I915_NEW_RASTERIZER | I915_NEW_VERTEX_FORMAT};
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/***********************************************************************
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*/
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static void
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upload_S5(struct i915_context *i915)
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{
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unsigned LIS5 = 0;
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bool stencil_ccw = i915_stencil_ccw(i915);
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/* I915_NEW_DEPTH_STENCIL
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*/
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if (stencil_ccw)
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LIS5 |= i915->depth_stencil->stencil_LIS5_ccw;
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else
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LIS5 |= i915->depth_stencil->stencil_LIS5_cw;
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/* hope it's safe to set stencil ref value even if stencil test is disabled?
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*/
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LIS5 |= i915->stencil_ref.ref_value[stencil_ccw] << S5_STENCIL_REF_SHIFT;
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/* I915_NEW_BLEND
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*/
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LIS5 |= i915->blend->LIS5;
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#if 0
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/* I915_NEW_RASTERIZER
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*/
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if (i915->rasterizer->LIS7) {
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LIS5 |= S5_GLOBAL_DEPTH_OFFSET_ENABLE;
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}
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#endif
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set_immediate(i915, I915_IMMEDIATE_S5, LIS5);
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}
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const struct i915_tracked_state i915_upload_S5 = {
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"imm S5", upload_S5,
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I915_NEW_DEPTH_STENCIL | I915_NEW_BLEND | I915_NEW_RASTERIZER};
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/***********************************************************************
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*/
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static void
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upload_S6(struct i915_context *i915)
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{
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unsigned LIS6 = 0;
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/* I915_NEW_FRAMEBUFFER
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*/
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if (i915->framebuffer.cbufs[0])
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LIS6 |= S6_COLOR_WRITE_ENABLE;
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/* I915_NEW_BLEND
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*/
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if (i915->blend) {
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struct i915_surface *cbuf = i915_surface(i915->framebuffer.cbufs[0]);
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if (cbuf && cbuf->alpha_in_g)
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LIS6 |= i915->blend->LIS6_alpha_in_g;
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else if (cbuf && cbuf->alpha_is_x)
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LIS6 |= i915->blend->LIS6_alpha_is_x;
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else
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LIS6 |= i915->blend->LIS6;
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}
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/* I915_NEW_DEPTH
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*/
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if (i915->depth_stencil)
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LIS6 |= i915->depth_stencil->depth_LIS6;
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if (i915->rasterizer)
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LIS6 |= i915->rasterizer->LIS6;
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set_immediate(i915, I915_IMMEDIATE_S6, LIS6);
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}
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const struct i915_tracked_state i915_upload_S6 = {
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"imm S6", upload_S6,
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I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL | I915_NEW_FRAMEBUFFER |
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I915_NEW_RASTERIZER};
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/***********************************************************************
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*/
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static void
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upload_S7(struct i915_context *i915)
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{
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#if 0
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unsigned LIS7;
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/* I915_NEW_RASTERIZER
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*/
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LIS7 = i915->rasterizer->LIS7;
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set_immediate(i915, I915_IMMEDIATE_S7, LIS7);
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#endif
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}
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const struct i915_tracked_state i915_upload_S7 = {"imm S7", upload_S7,
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I915_NEW_RASTERIZER};
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/***********************************************************************
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*/
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static const struct i915_tracked_state *atoms[] = {
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&i915_upload_S0S1, &i915_upload_S2S4, &i915_upload_S5, &i915_upload_S6,
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&i915_upload_S7};
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static void
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update_immediate(struct i915_context *i915)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(atoms); i++)
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if (i915->dirty & atoms[i]->dirty)
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atoms[i]->update(i915);
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}
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struct i915_tracked_state i915_hw_immediate = {
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"immediate", update_immediate,
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~0 /* all state atoms, because we do internal checking */
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};
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