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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/iris/iris_genx_macros.h
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/*
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* Copyright © 2019 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* Macro and function definitions needed in order to use genxml.
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*
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* This should only be included in sources compiled per-generation.
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*/
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#include "iris_batch.h"
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#define __gen_address_type struct iris_address
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#define __gen_user_data struct iris_batch
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#define __gen_combine_address iris_combine_address
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static inline void *
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__gen_get_batch_dwords(struct iris_batch *batch, unsigned dwords)
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{
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return iris_get_command_space(batch, dwords * sizeof(uint32_t));
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}
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static inline struct iris_address
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__gen_address_offset(struct iris_address addr, uint64_t offset)
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{
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addr.offset += offset;
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return addr;
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}
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static uint64_t
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__gen_combine_address(struct iris_batch *batch, void *location,
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struct iris_address addr, uint32_t delta)
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{
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uint64_t result = addr.offset + delta;
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if (addr.bo) {
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iris_use_pinned_bo(batch, addr.bo,
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!iris_domain_is_read_only(addr.access), addr.access);
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/* Assume this is a general address, not relative to a base. */
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result += addr.bo->gtt_offset;
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}
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return result;
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}
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static inline struct iris_address
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__gen_get_batch_address(struct iris_batch *batch, void *location)
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{
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unreachable("Not supported by iris");
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}
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#define __gen_address_type struct iris_address
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#define __gen_user_data struct iris_batch
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#define __genxml_cmd_length(cmd) cmd ## _length
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#define __genxml_cmd_length_bias(cmd) cmd ## _length_bias
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#define __genxml_cmd_header(cmd) cmd ## _header
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#define __genxml_cmd_pack(cmd) cmd ## _pack
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#define __genxml_reg_num(cmd) cmd ## _num
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#include "genxml/genX_pack.h"
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#include "genxml/gen_macros.h"
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#include "genxml/genX_bits.h"
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/* CS_GPR(15) is reserved for combining conditional rendering predicates
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* with GL_ARB_indirect_parameters draw number predicates.
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*/
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#define MI_BUILDER_NUM_ALLOC_GPRS 15
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#include "common/mi_builder.h"
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#define _iris_pack_command(batch, cmd, dst, name) \
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for (struct cmd name = { __genxml_cmd_header(cmd) }, \
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*_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
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({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name); \
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_dst = NULL; \
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}))
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#define iris_pack_command(cmd, dst, name) \
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_iris_pack_command(NULL, cmd, dst, name)
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#define _iris_pack_state(batch, cmd, dst, name) \
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for (struct cmd name = {}, \
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*_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
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__genxml_cmd_pack(cmd)(batch, (void *)_dst, &name), \
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_dst = NULL)
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#define iris_pack_state(cmd, dst, name) \
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_iris_pack_state(NULL, cmd, dst, name)
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#define iris_emit_cmd(batch, cmd, name) \
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_iris_pack_command(batch, cmd, __gen_get_batch_dwords(batch, __genxml_cmd_length(cmd)), name)
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#define iris_emit_merge(batch, dwords0, dwords1, num_dwords) \
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do { \
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uint32_t *dw = __gen_get_batch_dwords(batch, num_dwords); \
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for (uint32_t i = 0; i < num_dwords; i++) \
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dw[i] = (dwords0)[i] | (dwords1)[i]; \
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VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords)); \
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} while (0)
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#define iris_emit_reg(batch, reg, name) \
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for (struct reg name = {}, *_cont = (struct reg *)1; _cont != NULL; \
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({ \
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uint32_t _dw[__genxml_cmd_length(reg)]; \
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__genxml_cmd_pack(reg)(NULL, _dw, &name); \
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for (unsigned i = 0; i < __genxml_cmd_length(reg); i++) { \
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iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { \
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lri.RegisterOffset = __genxml_reg_num(reg); \
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lri.DataDWord = _dw[i]; \
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} \
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} \
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_cont = NULL; \
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}))
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/**
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* iris_address constructor helpers:
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*
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* When using these to construct a CSO, pass NULL for \p bo, and manually
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* pin the BO later. Otherwise, genxml's address handling will add the
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* BO to the current batch's validation list at CSO creation time, rather
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* than at draw time as desired.
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*/
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UNUSED static struct iris_address
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ro_bo(struct iris_bo *bo, uint64_t offset)
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{
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return (struct iris_address) { .bo = bo, .offset = offset,
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.access = IRIS_DOMAIN_OTHER_READ };
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}
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UNUSED static struct iris_address
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rw_bo(struct iris_bo *bo, uint64_t offset, enum iris_domain access)
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{
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return (struct iris_address) { .bo = bo, .offset = offset,
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.access = access };
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}
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