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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/iris/iris_screen.h
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/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef IRIS_SCREEN_H
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#define IRIS_SCREEN_H
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#include "pipe/p_screen.h"
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#include "frontend/drm_driver.h"
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#include "util/disk_cache.h"
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#include "util/slab.h"
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#include "util/u_screen.h"
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#include "intel/dev/intel_device_info.h"
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#include "intel/isl/isl.h"
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#include "iris_bufmgr.h"
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#include "iris_binder.h"
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#include "iris_measure.h"
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#include "iris_resource.h"
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struct intel_l3_config;
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struct brw_vue_map;
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struct iris_vs_prog_key;
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struct iris_tcs_prog_key;
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struct iris_tes_prog_key;
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struct iris_gs_prog_key;
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struct iris_fs_prog_key;
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struct iris_cs_prog_key;
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enum iris_program_cache_id;
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#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
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#define WRITE_ONCE(x, v) *(volatile __typeof__(x) *)&(x) = (v)
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#define IRIS_MAX_TEXTURE_SAMPLERS 32
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#define IRIS_MAX_SOL_BUFFERS 4
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#define IRIS_MAP_BUFFER_ALIGNMENT 64
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/**
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* Virtual table for generation-specific (genxml) function calls.
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*/
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struct iris_vtable {
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void (*destroy_state)(struct iris_context *ice);
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void (*init_render_context)(struct iris_batch *batch);
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void (*init_compute_context)(struct iris_batch *batch);
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void (*upload_render_state)(struct iris_context *ice,
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struct iris_batch *batch,
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const struct pipe_draw_info *draw,
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unsigned drawid_offset,
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const struct pipe_draw_indirect_info *indirect,
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const struct pipe_draw_start_count_bias *sc);
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void (*update_surface_base_address)(struct iris_batch *batch,
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struct iris_binder *binder);
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void (*upload_compute_state)(struct iris_context *ice,
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struct iris_batch *batch,
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const struct pipe_grid_info *grid);
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void (*rebind_buffer)(struct iris_context *ice,
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struct iris_resource *res);
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void (*load_register_reg32)(struct iris_batch *batch, uint32_t dst,
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uint32_t src);
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void (*load_register_reg64)(struct iris_batch *batch, uint32_t dst,
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uint32_t src);
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void (*load_register_imm32)(struct iris_batch *batch, uint32_t reg,
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uint32_t val);
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void (*load_register_imm64)(struct iris_batch *batch, uint32_t reg,
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uint64_t val);
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void (*load_register_mem32)(struct iris_batch *batch, uint32_t reg,
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struct iris_bo *bo, uint32_t offset);
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void (*load_register_mem64)(struct iris_batch *batch, uint32_t reg,
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struct iris_bo *bo, uint32_t offset);
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void (*store_register_mem32)(struct iris_batch *batch, uint32_t reg,
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struct iris_bo *bo, uint32_t offset,
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bool predicated);
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void (*store_register_mem64)(struct iris_batch *batch, uint32_t reg,
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struct iris_bo *bo, uint32_t offset,
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bool predicated);
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void (*store_data_imm32)(struct iris_batch *batch,
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struct iris_bo *bo, uint32_t offset,
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uint32_t value);
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void (*store_data_imm64)(struct iris_batch *batch,
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struct iris_bo *bo, uint32_t offset,
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uint64_t value);
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void (*copy_mem_mem)(struct iris_batch *batch,
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struct iris_bo *dst_bo, uint32_t dst_offset,
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struct iris_bo *src_bo, uint32_t src_offset,
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unsigned bytes);
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void (*emit_raw_pipe_control)(struct iris_batch *batch,
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const char *reason, uint32_t flags,
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struct iris_bo *bo, uint32_t offset,
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uint64_t imm);
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void (*emit_mi_report_perf_count)(struct iris_batch *batch,
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struct iris_bo *bo,
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uint32_t offset_in_bytes,
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uint32_t report_id);
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unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
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void (*store_derived_program_state)(const struct intel_device_info *devinfo,
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enum iris_program_cache_id cache_id,
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struct iris_compiled_shader *shader);
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uint32_t *(*create_so_decl_list)(const struct pipe_stream_output_info *sol,
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const struct brw_vue_map *vue_map);
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void (*populate_vs_key)(const struct iris_context *ice,
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const struct shader_info *info,
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gl_shader_stage last_stage,
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struct iris_vs_prog_key *key);
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void (*populate_tcs_key)(const struct iris_context *ice,
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struct iris_tcs_prog_key *key);
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void (*populate_tes_key)(const struct iris_context *ice,
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const struct shader_info *info,
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gl_shader_stage last_stage,
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struct iris_tes_prog_key *key);
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void (*populate_gs_key)(const struct iris_context *ice,
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const struct shader_info *info,
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gl_shader_stage last_stage,
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struct iris_gs_prog_key *key);
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void (*populate_fs_key)(const struct iris_context *ice,
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const struct shader_info *info,
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struct iris_fs_prog_key *key);
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void (*populate_cs_key)(const struct iris_context *ice,
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struct iris_cs_prog_key *key);
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void (*lost_genx_state)(struct iris_context *ice, struct iris_batch *batch);
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};
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struct iris_address {
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struct iris_bo *bo;
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uint64_t offset;
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enum iris_domain access;
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};
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struct iris_screen {
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struct pipe_screen base;
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uint32_t refcount;
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/** Global slab allocator for iris_transfer_map objects */
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struct slab_parent_pool transfer_pool;
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/** drm device file descriptor, shared with bufmgr, do not close. */
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int fd;
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/**
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* drm device file descriptor to used for window system integration, owned
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* by iris_screen, can be a different DRM instance than fd.
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*/
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int winsys_fd;
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/** PCI ID for our GPU device */
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int pci_id;
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bool no_hw;
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struct iris_vtable vtbl;
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/** Global program_string_id counter (see get_program_string_id()) */
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unsigned program_id;
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/** Precompile shaders at link time? (Can be disabled for debugging.) */
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bool precompile;
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/** driconf options and application workarounds */
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struct {
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/** Dual color blend by location instead of index (for broken apps) */
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bool dual_color_blend_by_location;
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bool disable_throttling;
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bool always_flush_cache;
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} driconf;
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/** Does the kernel support various features (KERNEL_HAS_* bitfield)? */
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unsigned kernel_features;
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#define KERNEL_HAS_WAIT_FOR_SUBMIT (1<<0)
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unsigned subslice_total;
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uint64_t aperture_bytes;
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/**
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* Last sequence number allocated by the cache tracking mechanism.
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*
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* These are used for synchronization and are expected to identify a single
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* section of a batch, so they should be monotonically increasing and
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* unique across a single pipe_screen.
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*/
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uint64_t last_seqno;
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struct intel_device_info devinfo;
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struct isl_device isl_dev;
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struct iris_bufmgr *bufmgr;
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struct brw_compiler *compiler;
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struct intel_perf_config *perf_cfg;
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const struct intel_l3_config *l3_config_3d;
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const struct intel_l3_config *l3_config_cs;
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/**
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* A buffer containing a marker + description of the driver. This buffer is
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* added to all execbufs syscalls so that we can identify the driver that
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* generated a hang by looking at the content of the buffer in the error
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* state. It is also used for hardware workarounds that require scratch
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* writes or reads from some unimportant memory. To avoid overriding the
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* debug data, use the workaround_address field for workarounds.
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*/
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struct iris_bo *workaround_bo;
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struct iris_address workaround_address;
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struct disk_cache *disk_cache;
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struct intel_measure_device measure;
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};
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struct pipe_screen *
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iris_screen_create(int fd, const struct pipe_screen_config *config);
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void iris_screen_destroy(struct iris_screen *screen);
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UNUSED static inline struct pipe_screen *
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iris_pscreen_ref(struct pipe_screen *pscreen)
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{
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struct iris_screen *screen = (struct iris_screen *) pscreen;
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p_atomic_inc(&screen->refcount);
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return pscreen;
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}
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UNUSED static inline void
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iris_pscreen_unref(struct pipe_screen *pscreen)
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{
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struct iris_screen *screen = (struct iris_screen *) pscreen;
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if (p_atomic_dec_zero(&screen->refcount))
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iris_screen_destroy(screen);
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}
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bool
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iris_is_format_supported(struct pipe_screen *pscreen,
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enum pipe_format format,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned storage_sample_count,
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unsigned usage);
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void iris_disk_cache_init(struct iris_screen *screen);
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#endif
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