Path: blob/21.2-virgl/src/gallium/drivers/iris/iris_screen.h
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/*1* Copyright © 2017 Intel Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* on the rights to use, copy, modify, merge, publish, distribute, sub7* license, and/or sell copies of the Software, and to permit persons to whom8* the Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,18* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR19* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE20* USE OR OTHER DEALINGS IN THE SOFTWARE.21*/22#ifndef IRIS_SCREEN_H23#define IRIS_SCREEN_H2425#include "pipe/p_screen.h"26#include "frontend/drm_driver.h"27#include "util/disk_cache.h"28#include "util/slab.h"29#include "util/u_screen.h"30#include "intel/dev/intel_device_info.h"31#include "intel/isl/isl.h"32#include "iris_bufmgr.h"33#include "iris_binder.h"34#include "iris_measure.h"35#include "iris_resource.h"3637struct intel_l3_config;38struct brw_vue_map;39struct iris_vs_prog_key;40struct iris_tcs_prog_key;41struct iris_tes_prog_key;42struct iris_gs_prog_key;43struct iris_fs_prog_key;44struct iris_cs_prog_key;45enum iris_program_cache_id;4647#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))48#define WRITE_ONCE(x, v) *(volatile __typeof__(x) *)&(x) = (v)4950#define IRIS_MAX_TEXTURE_SAMPLERS 3251#define IRIS_MAX_SOL_BUFFERS 452#define IRIS_MAP_BUFFER_ALIGNMENT 645354/**55* Virtual table for generation-specific (genxml) function calls.56*/57struct iris_vtable {58void (*destroy_state)(struct iris_context *ice);59void (*init_render_context)(struct iris_batch *batch);60void (*init_compute_context)(struct iris_batch *batch);61void (*upload_render_state)(struct iris_context *ice,62struct iris_batch *batch,63const struct pipe_draw_info *draw,64unsigned drawid_offset,65const struct pipe_draw_indirect_info *indirect,66const struct pipe_draw_start_count_bias *sc);67void (*update_surface_base_address)(struct iris_batch *batch,68struct iris_binder *binder);69void (*upload_compute_state)(struct iris_context *ice,70struct iris_batch *batch,71const struct pipe_grid_info *grid);72void (*rebind_buffer)(struct iris_context *ice,73struct iris_resource *res);74void (*load_register_reg32)(struct iris_batch *batch, uint32_t dst,75uint32_t src);76void (*load_register_reg64)(struct iris_batch *batch, uint32_t dst,77uint32_t src);78void (*load_register_imm32)(struct iris_batch *batch, uint32_t reg,79uint32_t val);80void (*load_register_imm64)(struct iris_batch *batch, uint32_t reg,81uint64_t val);82void (*load_register_mem32)(struct iris_batch *batch, uint32_t reg,83struct iris_bo *bo, uint32_t offset);84void (*load_register_mem64)(struct iris_batch *batch, uint32_t reg,85struct iris_bo *bo, uint32_t offset);86void (*store_register_mem32)(struct iris_batch *batch, uint32_t reg,87struct iris_bo *bo, uint32_t offset,88bool predicated);89void (*store_register_mem64)(struct iris_batch *batch, uint32_t reg,90struct iris_bo *bo, uint32_t offset,91bool predicated);92void (*store_data_imm32)(struct iris_batch *batch,93struct iris_bo *bo, uint32_t offset,94uint32_t value);95void (*store_data_imm64)(struct iris_batch *batch,96struct iris_bo *bo, uint32_t offset,97uint64_t value);98void (*copy_mem_mem)(struct iris_batch *batch,99struct iris_bo *dst_bo, uint32_t dst_offset,100struct iris_bo *src_bo, uint32_t src_offset,101unsigned bytes);102void (*emit_raw_pipe_control)(struct iris_batch *batch,103const char *reason, uint32_t flags,104struct iris_bo *bo, uint32_t offset,105uint64_t imm);106107void (*emit_mi_report_perf_count)(struct iris_batch *batch,108struct iris_bo *bo,109uint32_t offset_in_bytes,110uint32_t report_id);111112unsigned (*derived_program_state_size)(enum iris_program_cache_id id);113void (*store_derived_program_state)(const struct intel_device_info *devinfo,114enum iris_program_cache_id cache_id,115struct iris_compiled_shader *shader);116uint32_t *(*create_so_decl_list)(const struct pipe_stream_output_info *sol,117const struct brw_vue_map *vue_map);118void (*populate_vs_key)(const struct iris_context *ice,119const struct shader_info *info,120gl_shader_stage last_stage,121struct iris_vs_prog_key *key);122void (*populate_tcs_key)(const struct iris_context *ice,123struct iris_tcs_prog_key *key);124void (*populate_tes_key)(const struct iris_context *ice,125const struct shader_info *info,126gl_shader_stage last_stage,127struct iris_tes_prog_key *key);128void (*populate_gs_key)(const struct iris_context *ice,129const struct shader_info *info,130gl_shader_stage last_stage,131struct iris_gs_prog_key *key);132void (*populate_fs_key)(const struct iris_context *ice,133const struct shader_info *info,134struct iris_fs_prog_key *key);135void (*populate_cs_key)(const struct iris_context *ice,136struct iris_cs_prog_key *key);137void (*lost_genx_state)(struct iris_context *ice, struct iris_batch *batch);138};139140struct iris_address {141struct iris_bo *bo;142uint64_t offset;143enum iris_domain access;144};145146struct iris_screen {147struct pipe_screen base;148149uint32_t refcount;150151/** Global slab allocator for iris_transfer_map objects */152struct slab_parent_pool transfer_pool;153154/** drm device file descriptor, shared with bufmgr, do not close. */155int fd;156157/**158* drm device file descriptor to used for window system integration, owned159* by iris_screen, can be a different DRM instance than fd.160*/161int winsys_fd;162163/** PCI ID for our GPU device */164int pci_id;165166bool no_hw;167168struct iris_vtable vtbl;169170/** Global program_string_id counter (see get_program_string_id()) */171unsigned program_id;172173/** Precompile shaders at link time? (Can be disabled for debugging.) */174bool precompile;175176/** driconf options and application workarounds */177struct {178/** Dual color blend by location instead of index (for broken apps) */179bool dual_color_blend_by_location;180bool disable_throttling;181bool always_flush_cache;182} driconf;183184/** Does the kernel support various features (KERNEL_HAS_* bitfield)? */185unsigned kernel_features;186#define KERNEL_HAS_WAIT_FOR_SUBMIT (1<<0)187188unsigned subslice_total;189190uint64_t aperture_bytes;191192/**193* Last sequence number allocated by the cache tracking mechanism.194*195* These are used for synchronization and are expected to identify a single196* section of a batch, so they should be monotonically increasing and197* unique across a single pipe_screen.198*/199uint64_t last_seqno;200201struct intel_device_info devinfo;202struct isl_device isl_dev;203struct iris_bufmgr *bufmgr;204struct brw_compiler *compiler;205struct intel_perf_config *perf_cfg;206207const struct intel_l3_config *l3_config_3d;208const struct intel_l3_config *l3_config_cs;209210/**211* A buffer containing a marker + description of the driver. This buffer is212* added to all execbufs syscalls so that we can identify the driver that213* generated a hang by looking at the content of the buffer in the error214* state. It is also used for hardware workarounds that require scratch215* writes or reads from some unimportant memory. To avoid overriding the216* debug data, use the workaround_address field for workarounds.217*/218struct iris_bo *workaround_bo;219struct iris_address workaround_address;220221struct disk_cache *disk_cache;222223struct intel_measure_device measure;224};225226struct pipe_screen *227iris_screen_create(int fd, const struct pipe_screen_config *config);228229void iris_screen_destroy(struct iris_screen *screen);230231UNUSED static inline struct pipe_screen *232iris_pscreen_ref(struct pipe_screen *pscreen)233{234struct iris_screen *screen = (struct iris_screen *) pscreen;235236p_atomic_inc(&screen->refcount);237return pscreen;238}239240UNUSED static inline void241iris_pscreen_unref(struct pipe_screen *pscreen)242{243struct iris_screen *screen = (struct iris_screen *) pscreen;244245if (p_atomic_dec_zero(&screen->refcount))246iris_screen_destroy(screen);247}248249bool250iris_is_format_supported(struct pipe_screen *pscreen,251enum pipe_format format,252enum pipe_texture_target target,253unsigned sample_count,254unsigned storage_sample_count,255unsigned usage);256257void iris_disk_cache_init(struct iris_screen *screen);258259#endif260261262