Path: blob/21.2-virgl/src/gallium/drivers/lima/lima_screen.c
4565 views
/*1* Copyright (c) 2017-2019 Lima Project2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sub license,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the11* next paragraph) shall be included in all copies or substantial portions12* of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER20* DEALINGS IN THE SOFTWARE.21*22*/2324#include <string.h>2526#include "util/ralloc.h"27#include "util/u_debug.h"28#include "util/u_screen.h"29#include "renderonly/renderonly.h"3031#include "drm-uapi/drm_fourcc.h"32#include "drm-uapi/lima_drm.h"3334#include "lima_screen.h"35#include "lima_context.h"36#include "lima_resource.h"37#include "lima_program.h"38#include "lima_bo.h"39#include "lima_fence.h"40#include "lima_format.h"41#include "lima_disk_cache.h"42#include "ir/lima_ir.h"4344#include "xf86drm.h"4546int lima_plb_max_blk = 0;47int lima_plb_pp_stream_cache_size = 0;4849static void50lima_screen_destroy(struct pipe_screen *pscreen)51{52struct lima_screen *screen = lima_screen(pscreen);5354slab_destroy_parent(&screen->transfer_pool);5556if (screen->ro)57screen->ro->destroy(screen->ro);5859if (screen->pp_buffer)60lima_bo_unreference(screen->pp_buffer);6162lima_bo_cache_fini(screen);63lima_bo_table_fini(screen);64disk_cache_destroy(screen->disk_cache);65ralloc_free(screen);66}6768static const char *69lima_screen_get_name(struct pipe_screen *pscreen)70{71struct lima_screen *screen = lima_screen(pscreen);7273switch (screen->gpu_type) {74case DRM_LIMA_PARAM_GPU_ID_MALI400:75return "Mali400";76case DRM_LIMA_PARAM_GPU_ID_MALI450:77return "Mali450";78}7980return NULL;81}8283static const char *84lima_screen_get_vendor(struct pipe_screen *pscreen)85{86return "lima";87}8889static const char *90lima_screen_get_device_vendor(struct pipe_screen *pscreen)91{92return "ARM";93}9495static int96lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)97{98switch (param) {99case PIPE_CAP_NPOT_TEXTURES:100case PIPE_CAP_BLEND_EQUATION_SEPARATE:101case PIPE_CAP_ACCELERATED:102case PIPE_CAP_UMA:103case PIPE_CAP_NATIVE_FENCE_FD:104case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:105case PIPE_CAP_TEXTURE_SWIZZLE:106return 1;107108/* Unimplemented, but for exporting OpenGL 2.0 */109case PIPE_CAP_OCCLUSION_QUERY:110case PIPE_CAP_POINT_SPRITE:111return 1;112113/* not clear supported */114case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:115case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:116case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:117case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:118return 1;119120case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:121case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:122case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:123return 1;124125case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:126return 1;127128case PIPE_CAP_MAX_TEXTURE_2D_SIZE:129return 1 << (LIMA_MAX_MIP_LEVELS - 1);130case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:131case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:132return LIMA_MAX_MIP_LEVELS;133134case PIPE_CAP_VENDOR_ID:135return 0x13B5;136137case PIPE_CAP_VIDEO_MEMORY:138return 0;139140case PIPE_CAP_PCI_GROUP:141case PIPE_CAP_PCI_BUS:142case PIPE_CAP_PCI_DEVICE:143case PIPE_CAP_PCI_FUNCTION:144return 0;145146case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:147case PIPE_CAP_SHAREABLE_SHADERS:148return 0;149150case PIPE_CAP_ALPHA_TEST:151return 1;152153case PIPE_CAP_FLATSHADE:154case PIPE_CAP_TWO_SIDED_COLOR:155case PIPE_CAP_CLIP_PLANES:156return 0;157158case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:159return 1;160161default:162return u_pipe_screen_get_param_defaults(pscreen, param);163}164}165166static float167lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)168{169switch (param) {170case PIPE_CAPF_MAX_LINE_WIDTH:171case PIPE_CAPF_MAX_LINE_WIDTH_AA:172case PIPE_CAPF_MAX_POINT_WIDTH:173case PIPE_CAPF_MAX_POINT_WIDTH_AA:174return 100.0f;175case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:176return 16.0f;177case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:178return 15.0f;179180default:181return 0.0f;182}183}184185static int186get_vertex_shader_param(struct lima_screen *screen,187enum pipe_shader_cap param)188{189switch (param) {190case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:191case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:192case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:193case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:194return 16384; /* need investigate */195196case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:197return 1024;198199case PIPE_SHADER_CAP_MAX_INPUTS:200return 16; /* attributes */201202case PIPE_SHADER_CAP_MAX_OUTPUTS:203return LIMA_MAX_VARYING_NUM; /* varying */204205/* Mali-400 GP provides space for 304 vec4 uniforms, globals and206* temporary variables. */207case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:208return 304 * 4 * sizeof(float);209210case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:211return 1;212213case PIPE_SHADER_CAP_PREFERRED_IR:214return PIPE_SHADER_IR_NIR;215216case PIPE_SHADER_CAP_MAX_TEMPS:217return 256; /* need investigate */218219case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:220return 32;221222default:223return 0;224}225}226227static int228get_fragment_shader_param(struct lima_screen *screen,229enum pipe_shader_cap param)230{231switch (param) {232case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:233case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:234case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:235case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:236return 16384; /* need investigate */237238case PIPE_SHADER_CAP_MAX_INPUTS:239return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */240241case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:242return 1024;243244/* The Mali-PP supports a uniform table up to size 32768 total.245* However, indirect access to an uniform only supports indices up246* to 8192 (a 2048 vec4 array). To prevent indices bigger than that,247* limit max const buffer size to 8192 for now. */248case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:249return 2048 * 4 * sizeof(float);250251case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:252return 1;253254case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:255case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:256return 16; /* need investigate */257258case PIPE_SHADER_CAP_PREFERRED_IR:259return PIPE_SHADER_IR_NIR;260261case PIPE_SHADER_CAP_MAX_TEMPS:262return 256; /* need investigate */263264case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:265case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:266return 1;267268case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:269case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:270return 0;271272case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:273return 32;274275default:276return 0;277}278}279280static int281lima_screen_get_shader_param(struct pipe_screen *pscreen,282enum pipe_shader_type shader,283enum pipe_shader_cap param)284{285struct lima_screen *screen = lima_screen(pscreen);286287switch (shader) {288case PIPE_SHADER_FRAGMENT:289return get_fragment_shader_param(screen, param);290case PIPE_SHADER_VERTEX:291return get_vertex_shader_param(screen, param);292293default:294return 0;295}296}297298static bool299lima_screen_is_format_supported(struct pipe_screen *pscreen,300enum pipe_format format,301enum pipe_texture_target target,302unsigned sample_count,303unsigned storage_sample_count,304unsigned usage)305{306switch (target) {307case PIPE_BUFFER:308case PIPE_TEXTURE_1D:309case PIPE_TEXTURE_2D:310case PIPE_TEXTURE_RECT:311case PIPE_TEXTURE_CUBE:312break;313default:314return false;315}316317if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))318return false;319320/* be able to support 16, now limit to 4 */321if (sample_count > 1 && sample_count != 4)322return false;323324if (usage & PIPE_BIND_RENDER_TARGET) {325if (!lima_format_pixel_supported(format))326return false;327328/* multisample unsupported with half float target */329if (sample_count > 1 && util_format_is_float(format))330return false;331}332333if (usage & PIPE_BIND_DEPTH_STENCIL) {334switch (format) {335case PIPE_FORMAT_Z16_UNORM:336case PIPE_FORMAT_Z24_UNORM_S8_UINT:337case PIPE_FORMAT_Z24X8_UNORM:338break;339default:340return false;341}342}343344if (usage & PIPE_BIND_VERTEX_BUFFER) {345switch (format) {346case PIPE_FORMAT_R32_FLOAT:347case PIPE_FORMAT_R32G32_FLOAT:348case PIPE_FORMAT_R32G32B32_FLOAT:349case PIPE_FORMAT_R32G32B32A32_FLOAT:350case PIPE_FORMAT_R32_FIXED:351case PIPE_FORMAT_R32G32_FIXED:352case PIPE_FORMAT_R32G32B32_FIXED:353case PIPE_FORMAT_R32G32B32A32_FIXED:354case PIPE_FORMAT_R16_FLOAT:355case PIPE_FORMAT_R16G16_FLOAT:356case PIPE_FORMAT_R16G16B16_FLOAT:357case PIPE_FORMAT_R16G16B16A16_FLOAT:358case PIPE_FORMAT_R32_UNORM:359case PIPE_FORMAT_R32G32_UNORM:360case PIPE_FORMAT_R32G32B32_UNORM:361case PIPE_FORMAT_R32G32B32A32_UNORM:362case PIPE_FORMAT_R32_SNORM:363case PIPE_FORMAT_R32G32_SNORM:364case PIPE_FORMAT_R32G32B32_SNORM:365case PIPE_FORMAT_R32G32B32A32_SNORM:366case PIPE_FORMAT_R32_USCALED:367case PIPE_FORMAT_R32G32_USCALED:368case PIPE_FORMAT_R32G32B32_USCALED:369case PIPE_FORMAT_R32G32B32A32_USCALED:370case PIPE_FORMAT_R32_SSCALED:371case PIPE_FORMAT_R32G32_SSCALED:372case PIPE_FORMAT_R32G32B32_SSCALED:373case PIPE_FORMAT_R32G32B32A32_SSCALED:374case PIPE_FORMAT_R16_UNORM:375case PIPE_FORMAT_R16G16_UNORM:376case PIPE_FORMAT_R16G16B16_UNORM:377case PIPE_FORMAT_R16G16B16A16_UNORM:378case PIPE_FORMAT_R16_SNORM:379case PIPE_FORMAT_R16G16_SNORM:380case PIPE_FORMAT_R16G16B16_SNORM:381case PIPE_FORMAT_R16G16B16A16_SNORM:382case PIPE_FORMAT_R16_USCALED:383case PIPE_FORMAT_R16G16_USCALED:384case PIPE_FORMAT_R16G16B16_USCALED:385case PIPE_FORMAT_R16G16B16A16_USCALED:386case PIPE_FORMAT_R16_SSCALED:387case PIPE_FORMAT_R16G16_SSCALED:388case PIPE_FORMAT_R16G16B16_SSCALED:389case PIPE_FORMAT_R16G16B16A16_SSCALED:390case PIPE_FORMAT_R8_UNORM:391case PIPE_FORMAT_R8G8_UNORM:392case PIPE_FORMAT_R8G8B8_UNORM:393case PIPE_FORMAT_R8G8B8A8_UNORM:394case PIPE_FORMAT_R8_SNORM:395case PIPE_FORMAT_R8G8_SNORM:396case PIPE_FORMAT_R8G8B8_SNORM:397case PIPE_FORMAT_R8G8B8A8_SNORM:398case PIPE_FORMAT_R8_USCALED:399case PIPE_FORMAT_R8G8_USCALED:400case PIPE_FORMAT_R8G8B8_USCALED:401case PIPE_FORMAT_R8G8B8A8_USCALED:402case PIPE_FORMAT_R8_SSCALED:403case PIPE_FORMAT_R8G8_SSCALED:404case PIPE_FORMAT_R8G8B8_SSCALED:405case PIPE_FORMAT_R8G8B8A8_SSCALED:406break;407default:408return false;409}410}411412if (usage & PIPE_BIND_INDEX_BUFFER) {413switch (format) {414case PIPE_FORMAT_R8_UINT:415case PIPE_FORMAT_R16_UINT:416case PIPE_FORMAT_R32_UINT:417break;418default:419return false;420}421}422423if (usage & PIPE_BIND_SAMPLER_VIEW)424return lima_format_texel_supported(format);425426return true;427}428429static const void *430lima_screen_get_compiler_options(struct pipe_screen *pscreen,431enum pipe_shader_ir ir,432enum pipe_shader_type shader)433{434return lima_program_get_compiler_options(shader);435}436437static bool438lima_screen_set_plb_max_blk(struct lima_screen *screen)439{440if (lima_plb_max_blk) {441screen->plb_max_blk = lima_plb_max_blk;442return true;443}444445if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)446screen->plb_max_blk = 4096;447else448screen->plb_max_blk = 512;449450drmDevicePtr devinfo;451452if (drmGetDevice2(screen->fd, 0, &devinfo))453return false;454455if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {456char **compatible = devinfo->deviceinfo.platform->compatible;457458if (compatible && *compatible)459if (!strcmp("allwinner,sun50i-h5-mali", *compatible))460screen->plb_max_blk = 2048;461}462463drmFreeDevice(&devinfo);464465return true;466}467468static bool469lima_screen_query_info(struct lima_screen *screen)470{471drmVersionPtr version = drmGetVersion(screen->fd);472if (!version)473return false;474475if (version->version_major > 1 || version->version_minor > 0)476screen->has_growable_heap_buffer = true;477478drmFreeVersion(version);479480if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)481screen->has_growable_heap_buffer = false;482483struct drm_lima_get_param param;484485memset(¶m, 0, sizeof(param));486param.param = DRM_LIMA_PARAM_GPU_ID;487if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))488return false;489490switch (param.value) {491case DRM_LIMA_PARAM_GPU_ID_MALI400:492case DRM_LIMA_PARAM_GPU_ID_MALI450:493screen->gpu_type = param.value;494break;495default:496return false;497}498499memset(¶m, 0, sizeof(param));500param.param = DRM_LIMA_PARAM_NUM_PP;501if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))502return false;503504screen->num_pp = param.value;505506lima_screen_set_plb_max_blk(screen);507508return true;509}510511static const uint64_t lima_available_modifiers[] = {512DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,513DRM_FORMAT_MOD_LINEAR,514};515516static bool lima_is_modifier_external_only(enum pipe_format format)517{518return util_format_is_yuv(format);519}520521static void522lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,523enum pipe_format format, int max,524uint64_t *modifiers,525unsigned int *external_only,526int *count)527{528int num_modifiers = ARRAY_SIZE(lima_available_modifiers);529530if (!modifiers) {531*count = num_modifiers;532return;533}534535*count = MIN2(max, num_modifiers);536for (int i = 0; i < *count; i++) {537modifiers[i] = lima_available_modifiers[i];538if (external_only)539external_only[i] = lima_is_modifier_external_only(format);540}541}542543static bool544lima_screen_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,545uint64_t modifier,546enum pipe_format format,547bool *external_only)548{549for (int i = 0; i < ARRAY_SIZE(lima_available_modifiers); i++) {550if (lima_available_modifiers[i] == modifier) {551if (external_only)552*external_only = lima_is_modifier_external_only(format);553554return true;555}556}557558return false;559}560561static const struct debug_named_value lima_debug_options[] = {562{ "gp", LIMA_DEBUG_GP,563"print GP shader compiler result of each stage" },564{ "pp", LIMA_DEBUG_PP,565"print PP shader compiler result of each stage" },566{ "dump", LIMA_DEBUG_DUMP,567"dump GPU command stream to $PWD/lima.dump" },568{ "shaderdb", LIMA_DEBUG_SHADERDB,569"print shader information for shaderdb" },570{ "nobocache", LIMA_DEBUG_NO_BO_CACHE,571"disable BO cache" },572{ "bocache", LIMA_DEBUG_BO_CACHE,573"print debug info for BO cache" },574{ "notiling", LIMA_DEBUG_NO_TILING,575"don't use tiled buffers" },576{ "nogrowheap", LIMA_DEBUG_NO_GROW_HEAP,577"disable growable heap buffer" },578{ "singlejob", LIMA_DEBUG_SINGLE_JOB,579"disable multi job optimization" },580{ "precompile", LIMA_DEBUG_PRECOMPILE,581"Precompile shaders for shader-db" },582{ "diskcache", LIMA_DEBUG_DISK_CACHE,583"print debug info for shader disk cache" },584{ NULL }585};586587DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", lima_debug_options, 0)588uint32_t lima_debug;589590static void591lima_screen_parse_env(void)592{593lima_debug = debug_get_option_lima_debug();594595lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);596if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||597lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {598fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "599"reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,600LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);601lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;602}603604lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);605if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {606fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "607"reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);608lima_plb_max_blk = 0;609}610611lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);612if (lima_ppir_force_spilling < 0) {613fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "614"reset to default 0\n", lima_ppir_force_spilling);615lima_ppir_force_spilling = 0;616}617618lima_plb_pp_stream_cache_size = debug_get_num_option("LIMA_PLB_PP_STREAM_CACHE_SIZE", 0);619if (lima_plb_pp_stream_cache_size < 0) {620fprintf(stderr, "lima: LIMA_PLB_PP_STREAM_CACHE_SIZE %d less than 0, "621"reset to default 0\n", lima_plb_pp_stream_cache_size);622lima_plb_pp_stream_cache_size = 0;623}624}625626static struct disk_cache *627lima_get_disk_shader_cache (struct pipe_screen *pscreen)628{629struct lima_screen *screen = lima_screen(pscreen);630631return screen->disk_cache;632}633634struct pipe_screen *635lima_screen_create(int fd, struct renderonly *ro)636{637uint64_t system_memory;638struct lima_screen *screen;639640screen = rzalloc(NULL, struct lima_screen);641if (!screen)642return NULL;643644screen->fd = fd;645screen->ro = ro;646647lima_screen_parse_env();648649/* Limit PP PLB stream cache size to 0.1% of system memory */650if (!lima_plb_pp_stream_cache_size &&651os_get_total_physical_memory(&system_memory))652lima_plb_pp_stream_cache_size = system_memory >> 10;653654/* Set lower limit on PP PLB cache size */655lima_plb_pp_stream_cache_size = MAX2(128 * 1024 * lima_ctx_num_plb,656lima_plb_pp_stream_cache_size);657658if (!lima_screen_query_info(screen))659goto err_out0;660661if (!lima_bo_cache_init(screen))662goto err_out0;663664if (!lima_bo_table_init(screen))665goto err_out1;666667screen->pp_ra = ppir_regalloc_init(screen);668if (!screen->pp_ra)669goto err_out2;670671screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);672if (!screen->pp_buffer)673goto err_out2;674screen->pp_buffer->cacheable = false;675676/* fs program for clear buffer?677* const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop678*/679static const uint32_t pp_clear_program[] = {6800x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,6810x000005f5, 0x00000000, 0x00000000, 0x00000000,682};683memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,684pp_clear_program, sizeof(pp_clear_program));685686/* copy texture to framebuffer, used to reload gpu tile buffer687* load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop688*/689static const uint32_t pp_reload_program[] = {6900x000005e6, 0xf1003c20, 0x00000000, 0x39001000,6910x00000e4e, 0x000007cf, 0x00000000, 0x00000000,692};693memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,694pp_reload_program, sizeof(pp_reload_program));695696/* 0/1/2 vertex index for reload/clear draw */697static const uint8_t pp_shared_index[] = { 0, 1, 2 };698memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,699pp_shared_index, sizeof(pp_shared_index));700701/* 4096x4096 gl pos used for partial clear */702static const float pp_clear_gl_pos[] = {7034096, 0, 1, 1,7040, 0, 1, 1,7050, 4096, 1, 1,706};707memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,708pp_clear_gl_pos, sizeof(pp_clear_gl_pos));709710/* is pp frame render state static? */711uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;712memset(pp_frame_rsw, 0, 0x40);713pp_frame_rsw[8] = 0x0000f008;714pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;715pp_frame_rsw[13] = 0x00000100;716717screen->base.destroy = lima_screen_destroy;718screen->base.get_name = lima_screen_get_name;719screen->base.get_vendor = lima_screen_get_vendor;720screen->base.get_device_vendor = lima_screen_get_device_vendor;721screen->base.get_param = lima_screen_get_param;722screen->base.get_paramf = lima_screen_get_paramf;723screen->base.get_shader_param = lima_screen_get_shader_param;724screen->base.context_create = lima_context_create;725screen->base.is_format_supported = lima_screen_is_format_supported;726screen->base.get_compiler_options = lima_screen_get_compiler_options;727screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;728screen->base.is_dmabuf_modifier_supported = lima_screen_is_dmabuf_modifier_supported;729screen->base.get_disk_shader_cache = lima_get_disk_shader_cache;730731lima_resource_screen_init(screen);732lima_fence_screen_init(screen);733lima_disk_cache_init(screen);734735slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);736737screen->refcnt = 1;738739return &screen->base;740741err_out2:742lima_bo_table_fini(screen);743err_out1:744lima_bo_cache_fini(screen);745err_out0:746ralloc_free(screen);747return NULL;748}749750751