Path: blob/21.2-virgl/src/gallium/drivers/nouveau/nv50/nv50_screen.h
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#ifndef __NV50_SCREEN_H__1#define __NV50_SCREEN_H__23#include "nouveau_screen.h"4#include "nouveau_fence.h"5#include "nouveau_mm.h"6#include "nouveau_heap.h"78#include "nv50/nv50_winsys.h"9#include "nv50/nv50_stateobj.h"1011#define NV50_TIC_MAX_ENTRIES 204812#define NV50_TSC_MAX_ENTRIES 20481314/* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */15#define NV50_MAX_PIPE_CONSTBUFS 141617struct nv50_context;1819#define NV50_CODE_BO_SIZE_LOG2 192021#define NV50_SCREEN_RESIDENT_BO_COUNT 52223#define NV50_MAX_VIEWPORTS 162425#define NV50_MAX_WINDOW_RECTANGLES 82627#define NV50_MAX_GLOBALS 162829#define ONE_TEMP_SIZE (4/*vector*/ * sizeof(float))3031struct nv50_blitter;3233struct nv50_graph_state {34uint32_t instance_elts; /* bitmask of per-instance elements */35uint32_t instance_base;36uint32_t interpolant_ctrl;37uint32_t semantic_color;38uint32_t semantic_psize;39int32_t index_bias;40uint32_t clip_mode;41bool uniform_buffer_bound[4];42bool prim_restart;43bool point_sprite;44bool rt_serialize;45bool flushed;46bool rasterizer_discard;47uint8_t tls_required;48bool new_tls_space;49uint8_t num_vtxbufs;50uint8_t num_vtxelts;51uint8_t num_textures[4];52uint8_t num_samplers[4];53uint8_t prim_size;54uint16_t scissor;55bool seamless_cube_map;56bool mul_zero_wins;57};5859struct nv50_screen {60struct nouveau_screen base;6162struct nv50_context *cur_ctx;63struct nv50_graph_state save_state;6465int num_occlusion_queries_active;6667struct nouveau_bo *code;68struct nouveau_bo *uniforms;69struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */70struct nouveau_bo *stack_bo;71struct nouveau_bo *tls_bo;7273unsigned TPs;74unsigned MPsInTP;75unsigned max_tls_space;76unsigned cur_tls_space;77unsigned mp_count;7879struct nouveau_heap *vp_code_heap;80struct nouveau_heap *gp_code_heap;81struct nouveau_heap *fp_code_heap;8283struct nv50_blitter *blitter;8485struct {86void **entries;87int next;88uint32_t lock[NV50_TIC_MAX_ENTRIES / 32];89} tic;9091struct {92void **entries;93int next;94uint32_t lock[NV50_TSC_MAX_ENTRIES / 32];95} tsc;9697struct {98uint32_t *map;99struct nouveau_bo *bo;100} fence;101102struct {103struct nv50_program *prog; /* compute state object to read MP counters */104struct nv50_hw_sm_query *mp_counter[4]; /* counter to query allocation */105uint8_t num_hw_sm_active;106} pm;107108struct nouveau_object *sync;109110struct nouveau_object *tesla;111struct nouveau_object *compute;112struct nouveau_object *eng2d;113struct nouveau_object *m2mf;114};115116static inline struct nv50_screen *117nv50_screen(struct pipe_screen *screen)118{119return (struct nv50_screen *)screen;120}121122int nv50_screen_get_driver_query_info(struct pipe_screen *, unsigned,123struct pipe_driver_query_info *);124int nv50_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,125struct pipe_driver_query_group_info *);126127bool nv50_blitter_create(struct nv50_screen *);128void nv50_blitter_destroy(struct nv50_screen *);129130int nv50_screen_tic_alloc(struct nv50_screen *, void *);131int nv50_screen_tsc_alloc(struct nv50_screen *, void *);132133int nv50_screen_compute_setup(struct nv50_screen *, struct nouveau_pushbuf *);134135static inline void136nv50_resource_fence(struct nv04_resource *res, uint32_t flags)137{138struct nv50_screen *screen = nv50_screen(res->base.screen);139140if (res->mm) {141nouveau_fence_ref(screen->base.fence.current, &res->fence);142if (flags & NOUVEAU_BO_WR)143nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);144}145}146147static inline void148nv50_resource_validate(struct nv04_resource *res, uint32_t flags)149{150if (likely(res->bo)) {151if (flags & NOUVEAU_BO_WR)152res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |153NOUVEAU_BUFFER_STATUS_DIRTY;154if (flags & NOUVEAU_BO_RD)155res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;156157nv50_resource_fence(res, flags);158}159}160161struct nv50_format {162uint32_t rt;163struct {164unsigned format:6;165unsigned type_r:3;166unsigned type_g:3;167unsigned type_b:3;168unsigned type_a:3;169unsigned src_x:3;170unsigned src_y:3;171unsigned src_z:3;172unsigned src_w:3;173} tic;174uint32_t usage;175};176177struct nv50_vertex_format {178uint32_t vtx;179uint32_t usage;180};181182extern const struct nv50_format nv50_format_table[];183extern const struct nv50_vertex_format nv50_vertex_format[];184185static inline void186nv50_screen_tic_unlock(struct nv50_screen *screen, struct nv50_tic_entry *tic)187{188if (tic->id >= 0)189screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));190}191192static inline void193nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)194{195if (tsc->id >= 0)196screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));197}198199static inline void200nv50_screen_tic_free(struct nv50_screen *screen, struct nv50_tic_entry *tic)201{202if (tic->id >= 0) {203screen->tic.entries[tic->id] = NULL;204screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));205}206}207208static inline void209nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)210{211if (tsc->id >= 0) {212screen->tsc.entries[tsc->id] = NULL;213screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));214}215}216217extern int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space);218219#endif220221222