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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
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#ifndef __NVC0_SCREEN_H__
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#define __NVC0_SCREEN_H__
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#include "nouveau_screen.h"
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#include "nouveau_mm.h"
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#include "nouveau_fence.h"
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#include "nouveau_heap.h"
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#include "nv_object.xml.h"
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#include "nvc0/nvc0_winsys.h"
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#include "nvc0/nvc0_stateobj.h"
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#define NVC0_TIC_MAX_ENTRIES 2048
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#define NVC0_TSC_MAX_ENTRIES 2048
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#define NVE4_IMG_MAX_HANDLES 512
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/* doesn't count driver-reserved slot */
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#define NVC0_MAX_PIPE_CONSTBUFS 15
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#define NVC0_MAX_CONST_BUFFERS 16
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#define NVC0_MAX_CONSTBUF_SIZE 65536
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#define NVC0_MAX_SURFACE_SLOTS 16
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#define NVC0_MAX_VIEWPORTS 16
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#define NVC0_MAX_BUFFERS 32
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#define NVC0_MAX_IMAGES 8
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#define NVC0_MAX_WINDOW_RECTANGLES 8
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struct nvc0_context;
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struct nvc0_blitter;
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struct nvc0_graph_state {
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bool flushed;
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bool rasterizer_discard;
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bool early_z_forced;
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bool prim_restart;
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uint32_t instance_elts; /* bitmask of per-instance elements */
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uint32_t instance_base;
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uint32_t constant_vbos;
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uint32_t constant_elts;
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int32_t index_bias;
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uint16_t scissor;
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bool flatshade;
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uint8_t patch_vertices;
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uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
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uint8_t num_vtxbufs;
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uint8_t num_vtxelts;
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uint8_t num_textures[6];
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uint8_t num_samplers[6];
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uint8_t tls_required; /* bitmask of shader types using l[] */
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uint8_t clip_enable;
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uint32_t clip_mode;
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bool uniform_buffer_bound[6];
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struct nvc0_transform_feedback_state *tfb;
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bool seamless_cube_map;
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bool post_depth_coverage;
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};
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struct nvc0_cb_binding {
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uint64_t addr;
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int size;
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};
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struct nvc0_screen {
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struct nouveau_screen base;
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struct nvc0_context *cur_ctx;
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struct nvc0_graph_state save_state;
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int num_occlusion_queries_active;
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struct nouveau_bo *text;
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struct nouveau_bo *uniform_bo;
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struct nouveau_bo *tls;
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struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
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struct nouveau_bo *poly_cache;
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uint8_t gpc_count;
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uint16_t mp_count;
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uint16_t mp_count_compute; /* magic reg can make compute use fewer MPs */
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struct nouveau_heap *text_heap;
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struct nouveau_heap *lib_code; /* allocated from text_heap */
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struct nvc0_blitter *blitter;
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struct {
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void **entries;
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int next;
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uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
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bool maxwell;
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} tic;
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struct {
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void **entries;
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int next;
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uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
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} tsc;
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struct {
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struct pipe_image_view **entries;
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int next;
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} img;
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struct {
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struct nouveau_bo *bo;
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uint32_t *map;
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} fence;
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struct {
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struct nvc0_program *prog; /* compute state object to read MP counters */
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struct nvc0_hw_sm_query *mp_counter[8]; /* counter to query allocation */
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uint8_t num_hw_sm_active[2];
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bool mp_counters_enabled;
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} pm;
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/* only maintained on Maxwell+ */
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struct nvc0_cb_binding cb_bindings[5][NVC0_MAX_CONST_BUFFERS];
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struct nouveau_object *eng3d; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */
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struct nouveau_object *eng2d;
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struct nouveau_object *m2mf;
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struct nouveau_object *compute;
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struct nouveau_object *nvsw;
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};
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static inline struct nvc0_screen *
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nvc0_screen(struct pipe_screen *screen)
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{
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return (struct nvc0_screen *)screen;
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}
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int nvc0_screen_get_driver_query_info(struct pipe_screen *, unsigned,
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struct pipe_driver_query_info *);
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int nvc0_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
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struct pipe_driver_query_group_info *);
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bool nvc0_blitter_create(struct nvc0_screen *);
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void nvc0_blitter_destroy(struct nvc0_screen *);
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void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
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int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
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int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
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int nve4_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
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int nvc0_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
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int nvc0_screen_resize_text_area(struct nvc0_screen *, uint64_t);
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// 3D Only
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void nvc0_screen_bind_cb_3d(struct nvc0_screen *, bool *, int, int, int, uint64_t);
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static inline void
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nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
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{
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struct nvc0_screen *screen = nvc0_screen(res->base.screen);
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if (res->mm) {
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nouveau_fence_ref(screen->base.fence.current, &res->fence);
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if (flags & NOUVEAU_BO_WR)
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nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
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}
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}
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static inline void
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nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
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{
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if (likely(res->bo)) {
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if (flags & NOUVEAU_BO_WR)
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res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
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NOUVEAU_BUFFER_STATUS_DIRTY;
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if (flags & NOUVEAU_BO_RD)
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res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
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nvc0_resource_fence(res, flags);
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}
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}
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struct nvc0_format {
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uint32_t rt;
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struct {
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unsigned format:7;
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unsigned type_r:3;
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unsigned type_g:3;
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unsigned type_b:3;
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unsigned type_a:3;
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unsigned src_x:3;
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unsigned src_y:3;
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unsigned src_z:3;
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unsigned src_w:3;
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} tic;
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uint32_t usage;
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};
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struct nvc0_vertex_format {
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uint32_t vtx;
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uint32_t usage;
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};
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extern const struct nvc0_format nvc0_format_table[];
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extern const struct nvc0_vertex_format nvc0_vertex_format[];
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static inline void
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nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
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{
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if (tic->bindless)
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return;
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if (tic->id >= 0)
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screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
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}
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static inline void
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nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
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{
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if (tsc->id >= 0)
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screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
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}
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static inline void
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nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
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{
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if (tic->id >= 0) {
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screen->tic.entries[tic->id] = NULL;
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screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
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}
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}
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static inline void
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nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
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{
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if (tsc->id >= 0) {
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screen->tsc.entries[tsc->id] = NULL;
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screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
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}
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}
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#endif
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