Path: blob/21.2-virgl/src/gallium/drivers/panfrost/pan_context.h
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/*1* © Copyright 2018 Alyssa Rosenzweig2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,19* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE20* SOFTWARE.21*22*/2324#ifndef __BUILDER_H__25#define __BUILDER_H__2627#define _LARGEFILE64_SOURCE 128#define CACHE_LINE_SIZE 1024 /* TODO */29#include <sys/mman.h>30#include <assert.h>31#include "pan_resource.h"32#include "pan_job.h"33#include "pan_blend_cso.h"34#include "pan_encoder.h"35#include "pan_texture.h"3637#include "pipe/p_compiler.h"38#include "pipe/p_config.h"39#include "pipe/p_context.h"40#include "pipe/p_defines.h"41#include "pipe/p_format.h"42#include "pipe/p_screen.h"43#include "pipe/p_state.h"44#include "util/u_blitter.h"45#include "util/hash_table.h"4647#include "midgard/midgard_compile.h"48#include "compiler/shader_enums.h"4950/* Forward declare to avoid extra header dep */51struct prim_convert_context;5253#define SET_BIT(lval, bit, cond) \54if (cond) \55lval |= (bit); \56else \57lval &= ~(bit);5859/* Dirty tracking flags. 3D is for general 3D state. Shader flags are60* per-stage. Renderer refers to Renderer State Descriptors. Vertex refers to61* vertex attributes/elements. */6263enum pan_dirty_3d {64PAN_DIRTY_VIEWPORT = BITFIELD_BIT(0),65PAN_DIRTY_SCISSOR = BITFIELD_BIT(1),66PAN_DIRTY_VERTEX = BITFIELD_BIT(2),67PAN_DIRTY_PARAMS = BITFIELD_BIT(3),68PAN_DIRTY_DRAWID = BITFIELD_BIT(4),69PAN_DIRTY_TLS_SIZE = BITFIELD_BIT(5),70};7172enum pan_dirty_shader {73PAN_DIRTY_STAGE_RENDERER = BITFIELD_BIT(0),74PAN_DIRTY_STAGE_TEXTURE = BITFIELD_BIT(1),75PAN_DIRTY_STAGE_SAMPLER = BITFIELD_BIT(2),76PAN_DIRTY_STAGE_IMAGE = BITFIELD_BIT(3),77PAN_DIRTY_STAGE_CONST = BITFIELD_BIT(4),78PAN_DIRTY_STAGE_SSBO = BITFIELD_BIT(5),79};8081struct panfrost_constant_buffer {82struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];83uint32_t enabled_mask;84};8586struct panfrost_query {87/* Passthrough from Gallium */88unsigned type;89unsigned index;9091/* For computed queries. 64-bit to prevent overflow */92struct {93uint64_t start;94uint64_t end;95};9697/* Memory for the GPU to writeback the value of the query */98struct pipe_resource *rsrc;99100/* Whether an occlusion query is for a MSAA framebuffer */101bool msaa;102};103104struct pipe_fence_handle {105struct pipe_reference reference;106uint32_t syncobj;107bool signaled;108};109110struct panfrost_streamout_target {111struct pipe_stream_output_target base;112uint32_t offset;113};114115struct panfrost_streamout {116struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];117unsigned num_targets;118};119120struct panfrost_context {121/* Gallium context */122struct pipe_context base;123124/* Dirty global state */125enum pan_dirty_3d dirty;126127/* Per shader stage dirty state */128enum pan_dirty_shader dirty_shader[PIPE_SHADER_TYPES];129130/* Unowned pools, so manage yourself. */131struct panfrost_pool descs, shaders;132133/* Sync obj used to keep track of in-flight jobs. */134uint32_t syncobj;135136/* Set of 32 batches. When the set is full, the LRU entry (the batch137* with the smallest seqnum) is flushed to free a slot.138*/139struct {140uint64_t seqnum;141struct panfrost_batch slots[PAN_MAX_BATCHES];142} batches;143144/* Bound job batch */145struct panfrost_batch *batch;146147/* Within a launch_grid call.. */148const struct pipe_grid_info *compute_grid;149150/* Bit mask for supported PIPE_DRAW for this hardware */151unsigned draw_modes;152153struct pipe_framebuffer_state pipe_framebuffer;154struct panfrost_streamout streamout;155156bool active_queries;157uint64_t prims_generated;158uint64_t tf_prims_generated;159struct panfrost_query *occlusion_query;160161bool indirect_draw;162unsigned drawid;163unsigned vertex_count;164unsigned instance_count;165unsigned offset_start;166unsigned base_vertex;167unsigned base_instance;168mali_ptr first_vertex_sysval_ptr;169mali_ptr base_vertex_sysval_ptr;170mali_ptr base_instance_sysval_ptr;171enum pipe_prim_type active_prim;172173/* If instancing is enabled, vertex count padded for instance; if174* it is disabled, just equal to plain vertex count */175unsigned padded_count;176177/* TODO: Multiple uniform buffers (index =/= 0), finer updates? */178179struct panfrost_constant_buffer constant_buffer[PIPE_SHADER_TYPES];180181struct panfrost_rasterizer *rasterizer;182struct panfrost_shader_variants *shader[PIPE_SHADER_TYPES];183struct panfrost_vertex_state *vertex;184185struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];186uint32_t vb_mask;187188struct pipe_shader_buffer ssbo[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];189uint32_t ssbo_mask[PIPE_SHADER_TYPES];190191struct pipe_image_view images[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_IMAGES];192uint32_t image_mask[PIPE_SHADER_TYPES];193194struct panfrost_sampler_state *samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];195unsigned sampler_count[PIPE_SHADER_TYPES];196197struct panfrost_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_SAMPLER_VIEWS];198unsigned sampler_view_count[PIPE_SHADER_TYPES];199200struct primconvert_context *primconvert;201struct blitter_context *blitter;202203struct panfrost_blend_state *blend;204205struct pipe_viewport_state pipe_viewport;206struct pipe_scissor_state scissor;207struct pipe_blend_color blend_color;208struct panfrost_zsa_state *depth_stencil;209struct pipe_stencil_ref stencil_ref;210uint16_t sample_mask;211unsigned min_samples;212213struct panfrost_query *cond_query;214bool cond_cond;215enum pipe_render_cond_flag cond_mode;216217bool is_noop;218219/* Mask of active render targets */220uint8_t fb_rt_mask;221};222223/* Corresponds to the CSO */224225struct panfrost_rasterizer {226struct pipe_rasterizer_state base;227228/* Partially packed RSD words */229struct mali_multisample_misc_packed multisample;230struct mali_stencil_mask_misc_packed stencil_misc;231};232233/* Linked varyings */234struct pan_linkage {235/* If the upload is owned by the CSO instead236* of the pool, the referenced BO. Else,237* NULL. */238struct panfrost_bo *bo;239240/* Uploaded attribute descriptors */241mali_ptr producer, consumer;242243/* Varyings buffers required */244uint32_t present;245246/* Per-vertex stride for general varying buffer */247uint32_t stride;248};249250/* Variants bundle together to form the backing CSO, bundling multiple251* shaders with varying emulated features baked in */252253/* A shader state corresponds to the actual, current variant of the shader */254struct panfrost_shader_state {255/* Compiled, mapped descriptor, ready for the hardware */256bool compiled;257258/* Respectively, shader binary and Renderer State Descriptor */259struct panfrost_pool_ref bin, state;260261/* For fragment shaders, a prepared (but not uploaded RSD) */262struct mali_renderer_state_packed partial_rsd;263264struct pan_shader_info info;265266/* Linked varyings, for non-separable programs */267struct pan_linkage linkage;268269struct pipe_stream_output_info stream_output;270uint64_t so_mask;271272/* Variants */273enum pipe_format rt_formats[8];274unsigned nr_cbufs;275276/* Mask of state that dirties the sysvals */277unsigned dirty_3d, dirty_shader;278};279280/* A collection of varyings (the CSO) */281struct panfrost_shader_variants {282/* A panfrost_shader_variants can represent a shader for283* either graphics or compute */284285bool is_compute;286287union {288struct pipe_shader_state base;289struct pipe_compute_state cbase;290};291292struct panfrost_shader_state *variants;293unsigned variant_space;294295unsigned variant_count;296297/* The current active variant */298unsigned active_variant;299};300301struct pan_vertex_buffer {302unsigned vbi;303unsigned divisor;304};305306struct panfrost_vertex_state {307unsigned num_elements;308309/* buffers corresponds to attribute buffer, element_buffers corresponds310* to an index in buffers for each vertex element */311struct pan_vertex_buffer buffers[PIPE_MAX_ATTRIBS];312unsigned element_buffer[PIPE_MAX_ATTRIBS];313unsigned nr_bufs;314315struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];316unsigned formats[PIPE_MAX_ATTRIBS];317};318319struct panfrost_zsa_state {320struct pipe_depth_stencil_alpha_state base;321322/* Is any depth, stencil, or alpha testing enabled? */323bool enabled;324325/* Mask of PIPE_CLEAR_{DEPTH,STENCIL} written */326unsigned draws;327328/* Prepacked words from the RSD */329struct mali_multisample_misc_packed rsd_depth;330struct mali_stencil_mask_misc_packed rsd_stencil;331struct mali_stencil_packed stencil_front, stencil_back;332};333334struct panfrost_sampler_state {335struct pipe_sampler_state base;336struct mali_midgard_sampler_packed hw;337};338339/* Misnomer: Sampler view corresponds to textures, not samplers */340341struct panfrost_sampler_view {342struct pipe_sampler_view base;343struct panfrost_pool_ref state;344struct mali_bifrost_texture_packed bifrost_descriptor;345mali_ptr texture_bo;346uint64_t modifier;347};348349static inline struct panfrost_context *350pan_context(struct pipe_context *pcontext)351{352return (struct panfrost_context *) pcontext;353}354355static inline struct panfrost_streamout_target *356pan_so_target(struct pipe_stream_output_target *target)357{358return (struct panfrost_streamout_target *)target;359}360361static inline struct panfrost_shader_state *362panfrost_get_shader_state(struct panfrost_context *ctx,363enum pipe_shader_type st)364{365struct panfrost_shader_variants *all = ctx->shader[st];366367if (!all)368return NULL;369370return &all->variants[all->active_variant];371}372373struct pipe_context *374panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags);375376bool377panfrost_writes_point_size(struct panfrost_context *ctx);378379struct panfrost_ptr380panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler);381382void383panfrost_flush(384struct pipe_context *pipe,385struct pipe_fence_handle **fence,386unsigned flags);387388bool389panfrost_render_condition_check(struct panfrost_context *ctx);390391void392panfrost_shader_compile(struct pipe_screen *pscreen,393struct panfrost_pool *shader_pool,394struct panfrost_pool *desc_pool,395enum pipe_shader_ir ir_type,396const void *ir,397gl_shader_stage stage,398struct panfrost_shader_state *state);399400void401panfrost_analyze_sysvals(struct panfrost_shader_state *ss);402403void404panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,405struct pipe_context *pctx,406struct pipe_resource *texture);407408/* Instancing */409410mali_ptr411panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i);412413/* Compute */414415void416panfrost_compute_context_init(struct pipe_context *pctx);417418static inline void419panfrost_dirty_state_all(struct panfrost_context *ctx)420{421ctx->dirty = ~0;422423for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i)424ctx->dirty_shader[i] = ~0;425}426427static inline void428panfrost_clean_state_3d(struct panfrost_context *ctx)429{430ctx->dirty = 0;431432for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) {433if (i != PIPE_SHADER_COMPUTE)434ctx->dirty_shader[i] = 0;435}436}437438void439panfrost_cmdstream_context_init(struct pipe_context *pipe);440441#endif442443444