Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/panfrost/pan_resource.c
4570 views
1
/*
2
* Copyright (C) 2008 VMware, Inc.
3
* Copyright (C) 2012 Rob Clark <[email protected]>
4
* Copyright (C) 2014-2017 Broadcom
5
* Copyright (C) 2018-2019 Alyssa Rosenzweig
6
* Copyright (C) 2019 Collabora, Ltd.
7
*
8
* Permission is hereby granted, free of charge, to any person obtaining a
9
* copy of this software and associated documentation files (the "Software"),
10
* to deal in the Software without restriction, including without limitation
11
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
12
* and/or sell copies of the Software, and to permit persons to whom the
13
* Software is furnished to do so, subject to the following conditions:
14
*
15
* The above copyright notice and this permission notice (including the next
16
* paragraph) shall be included in all copies or substantial portions of the
17
* Software.
18
*
19
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25
* SOFTWARE.
26
*
27
* Authors (Collabora):
28
* Tomeu Vizoso <[email protected]>
29
* Alyssa Rosenzweig <[email protected]>
30
*
31
*/
32
33
#include <xf86drm.h>
34
#include <fcntl.h>
35
#include "drm-uapi/drm_fourcc.h"
36
37
#include "frontend/winsys_handle.h"
38
#include "util/format/u_format.h"
39
#include "util/u_memory.h"
40
#include "util/u_surface.h"
41
#include "util/u_transfer.h"
42
#include "util/u_transfer_helper.h"
43
#include "util/u_gen_mipmap.h"
44
#include "util/u_drm.h"
45
46
#include "pan_bo.h"
47
#include "pan_context.h"
48
#include "pan_screen.h"
49
#include "pan_resource.h"
50
#include "pan_util.h"
51
#include "pan_tiling.h"
52
#include "decode.h"
53
#include "panfrost-quirks.h"
54
55
static bool
56
panfrost_should_checksum(const struct panfrost_device *dev, const struct panfrost_resource *pres);
57
58
static struct pipe_resource *
59
panfrost_resource_from_handle(struct pipe_screen *pscreen,
60
const struct pipe_resource *templat,
61
struct winsys_handle *whandle,
62
unsigned usage)
63
{
64
struct panfrost_device *dev = pan_device(pscreen);
65
struct panfrost_resource *rsc;
66
struct pipe_resource *prsc;
67
68
assert(whandle->type == WINSYS_HANDLE_TYPE_FD);
69
70
rsc = rzalloc(pscreen, struct panfrost_resource);
71
if (!rsc)
72
return NULL;
73
74
prsc = &rsc->base;
75
76
*prsc = *templat;
77
78
pipe_reference_init(&prsc->reference, 1);
79
prsc->screen = pscreen;
80
81
uint64_t mod = whandle->modifier == DRM_FORMAT_MOD_INVALID ?
82
DRM_FORMAT_MOD_LINEAR : whandle->modifier;
83
enum mali_texture_dimension dim =
84
panfrost_translate_texture_dimension(templat->target);
85
enum pan_image_crc_mode crc_mode =
86
panfrost_should_checksum(dev, rsc) ?
87
PAN_IMAGE_CRC_OOB : PAN_IMAGE_CRC_NONE;
88
struct pan_image_explicit_layout explicit_layout = {
89
.offset = whandle->offset,
90
.line_stride = whandle->stride,
91
};
92
93
bool valid = pan_image_layout_init(dev, &rsc->image.layout, mod,
94
templat->format, dim,
95
prsc->width0, prsc->height0,
96
prsc->depth0, prsc->array_size,
97
MAX2(prsc->nr_samples, 1), 1,
98
crc_mode, &explicit_layout);
99
100
if (!valid) {
101
ralloc_free(rsc);
102
return NULL;
103
}
104
105
rsc->image.data.bo = panfrost_bo_import(dev, whandle->handle);
106
/* Sometimes an import can fail e.g. on an invalid buffer fd, out of
107
* memory space to mmap it etc.
108
*/
109
if (!rsc->image.data.bo) {
110
ralloc_free(rsc);
111
return NULL;
112
}
113
if (rsc->image.layout.crc_mode == PAN_IMAGE_CRC_OOB)
114
rsc->image.crc.bo = panfrost_bo_create(dev, rsc->image.layout.crc_size, 0, "CRC data");
115
116
rsc->modifier_constant = true;
117
118
BITSET_SET(rsc->valid.data, 0);
119
panfrost_resource_set_damage_region(pscreen, &rsc->base, 0, NULL);
120
121
if (dev->ro) {
122
rsc->scanout =
123
renderonly_create_gpu_import_for_resource(prsc, dev->ro, NULL);
124
/* failure is expected in some cases.. */
125
}
126
127
return prsc;
128
}
129
130
static bool
131
panfrost_resource_get_handle(struct pipe_screen *pscreen,
132
struct pipe_context *ctx,
133
struct pipe_resource *pt,
134
struct winsys_handle *handle,
135
unsigned usage)
136
{
137
struct panfrost_device *dev = pan_device(pscreen);
138
struct panfrost_resource *rsrc = (struct panfrost_resource *) pt;
139
struct renderonly_scanout *scanout = rsrc->scanout;
140
141
handle->modifier = rsrc->image.layout.modifier;
142
rsrc->modifier_constant = true;
143
144
if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
145
return false;
146
} else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
147
if (dev->ro) {
148
return renderonly_get_handle(scanout, handle);
149
} else {
150
handle->handle = rsrc->image.data.bo->gem_handle;
151
handle->stride = rsrc->image.layout.slices[0].line_stride;
152
handle->offset = rsrc->image.layout.slices[0].offset;
153
return true;
154
}
155
} else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
156
if (scanout) {
157
struct drm_prime_handle args = {
158
.handle = scanout->handle,
159
.flags = DRM_CLOEXEC,
160
};
161
162
int ret = drmIoctl(dev->ro->kms_fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
163
if (ret == -1)
164
return false;
165
166
handle->stride = scanout->stride;
167
handle->handle = args.fd;
168
169
return true;
170
} else {
171
int fd = panfrost_bo_export(rsrc->image.data.bo);
172
173
if (fd < 0)
174
return false;
175
176
handle->handle = fd;
177
handle->stride = rsrc->image.layout.slices[0].line_stride;
178
handle->offset = rsrc->image.layout.slices[0].offset;
179
return true;
180
}
181
}
182
183
return false;
184
}
185
186
static void
187
panfrost_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
188
{
189
/* TODO */
190
}
191
192
static struct pipe_surface *
193
panfrost_create_surface(struct pipe_context *pipe,
194
struct pipe_resource *pt,
195
const struct pipe_surface *surf_tmpl)
196
{
197
struct pipe_surface *ps = NULL;
198
199
ps = CALLOC_STRUCT(pipe_surface);
200
201
if (ps) {
202
pipe_reference_init(&ps->reference, 1);
203
pipe_resource_reference(&ps->texture, pt);
204
ps->context = pipe;
205
ps->format = surf_tmpl->format;
206
207
if (pt->target != PIPE_BUFFER) {
208
assert(surf_tmpl->u.tex.level <= pt->last_level);
209
ps->width = u_minify(pt->width0, surf_tmpl->u.tex.level);
210
ps->height = u_minify(pt->height0, surf_tmpl->u.tex.level);
211
ps->nr_samples = surf_tmpl->nr_samples;
212
ps->u.tex.level = surf_tmpl->u.tex.level;
213
ps->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
214
ps->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
215
} else {
216
/* setting width as number of elements should get us correct renderbuffer width */
217
ps->width = surf_tmpl->u.buf.last_element - surf_tmpl->u.buf.first_element + 1;
218
ps->height = pt->height0;
219
ps->u.buf.first_element = surf_tmpl->u.buf.first_element;
220
ps->u.buf.last_element = surf_tmpl->u.buf.last_element;
221
assert(ps->u.buf.first_element <= ps->u.buf.last_element);
222
assert(ps->u.buf.last_element < ps->width);
223
}
224
}
225
226
return ps;
227
}
228
229
static void
230
panfrost_surface_destroy(struct pipe_context *pipe,
231
struct pipe_surface *surf)
232
{
233
assert(surf->texture);
234
pipe_resource_reference(&surf->texture, NULL);
235
free(surf);
236
}
237
238
static struct pipe_resource *
239
panfrost_create_scanout_res(struct pipe_screen *screen,
240
const struct pipe_resource *template,
241
uint64_t modifier)
242
{
243
struct panfrost_device *dev = pan_device(screen);
244
struct renderonly_scanout *scanout;
245
struct winsys_handle handle;
246
struct pipe_resource *res;
247
struct pipe_resource scanout_templat = *template;
248
249
/* Tiled formats need to be tile aligned */
250
if (modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) {
251
scanout_templat.width0 = ALIGN_POT(template->width0, 16);
252
scanout_templat.height0 = ALIGN_POT(template->height0, 16);
253
}
254
255
/* AFBC formats need a header. Thankfully we don't care about the
256
* stride so we can just use wonky dimensions as long as the right
257
* number of bytes are allocated at the end of the day... this implies
258
* that stride/pitch is invalid for AFBC buffers */
259
260
if (drm_is_afbc(modifier)) {
261
/* Space for the header. We need to keep vaguely similar
262
* dimensions because... reasons... to allocate with renderonly
263
* as a dumb buffer. To do so, after the usual 16x16 alignment,
264
* we add on extra rows for the header. The order of operations
265
* matters here, the extra rows of padding can in fact be
266
* needed and missing them can lead to faults. */
267
268
unsigned header_size = panfrost_afbc_header_size(
269
template->width0, template->height0);
270
271
unsigned pitch = ALIGN_POT(template->width0, 16) *
272
util_format_get_blocksize(template->format);
273
274
unsigned header_rows =
275
DIV_ROUND_UP(header_size, pitch);
276
277
scanout_templat.width0 = ALIGN_POT(template->width0, 16);
278
scanout_templat.height0 = ALIGN_POT(template->height0, 16) + header_rows;
279
}
280
281
scanout = renderonly_scanout_for_resource(&scanout_templat,
282
dev->ro, &handle);
283
if (!scanout)
284
return NULL;
285
286
assert(handle.type == WINSYS_HANDLE_TYPE_FD);
287
handle.modifier = modifier;
288
res = screen->resource_from_handle(screen, template, &handle,
289
PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE);
290
close(handle.handle);
291
if (!res)
292
return NULL;
293
294
struct panfrost_resource *pres = pan_resource(res);
295
296
pres->scanout = scanout;
297
298
return res;
299
}
300
301
static inline bool
302
panfrost_is_2d(const struct panfrost_resource *pres)
303
{
304
return (pres->base.target == PIPE_TEXTURE_2D)
305
|| (pres->base.target == PIPE_TEXTURE_RECT);
306
}
307
308
/* Based on the usage, determine if it makes sense to use u-inteleaved tiling.
309
* We only have routines to tile 2D textures of sane bpps. On the hardware
310
* level, not all usages are valid for tiling. Finally, if the app is hinting
311
* that the contents frequently change, tiling will be a loss.
312
*
313
* On platforms where it is supported, AFBC is even better. */
314
315
static bool
316
panfrost_should_afbc(struct panfrost_device *dev,
317
const struct panfrost_resource *pres,
318
enum pipe_format fmt)
319
{
320
/* AFBC resources may be rendered to, textured from, or shared across
321
* processes, but may not be used as e.g buffers */
322
const unsigned valid_binding =
323
PIPE_BIND_DEPTH_STENCIL |
324
PIPE_BIND_RENDER_TARGET |
325
PIPE_BIND_BLENDABLE |
326
PIPE_BIND_SAMPLER_VIEW |
327
PIPE_BIND_DISPLAY_TARGET |
328
PIPE_BIND_SCANOUT |
329
PIPE_BIND_SHARED;
330
331
if (pres->base.bind & ~valid_binding)
332
return false;
333
334
/* AFBC introduced with Mali T760 */
335
if (dev->quirks & MIDGARD_NO_AFBC)
336
return false;
337
338
/* AFBC<-->staging is expensive */
339
if (pres->base.usage == PIPE_USAGE_STREAM)
340
return false;
341
342
/* Only a small selection of formats are AFBC'able */
343
if (!panfrost_format_supports_afbc(dev, fmt))
344
return false;
345
346
/* AFBC does not support layered (GLES3 style) multisampling. Use
347
* EXT_multisampled_render_to_texture instead */
348
if (pres->base.nr_samples > 1)
349
return false;
350
351
switch (pres->base.target) {
352
case PIPE_TEXTURE_2D:
353
case PIPE_TEXTURE_2D_ARRAY:
354
case PIPE_TEXTURE_RECT:
355
break;
356
357
case PIPE_TEXTURE_3D:
358
/* 3D AFBC is only supported on Bifrost v7+. It's supposed to
359
* be supported on Midgard but it doesn't seem to work */
360
if (dev->arch < 7)
361
return false;
362
363
break;
364
365
default:
366
return false;
367
}
368
369
/* For one tile, AFBC is a loss compared to u-interleaved */
370
if (pres->base.width0 <= 16 && pres->base.height0 <= 16)
371
return false;
372
373
/* Otherwise, we'd prefer AFBC as it is dramatically more efficient
374
* than linear or usually even u-interleaved */
375
return true;
376
}
377
378
static bool
379
panfrost_should_tile(struct panfrost_device *dev,
380
const struct panfrost_resource *pres,
381
enum pipe_format fmt)
382
{
383
const unsigned valid_binding =
384
PIPE_BIND_DEPTH_STENCIL |
385
PIPE_BIND_RENDER_TARGET |
386
PIPE_BIND_BLENDABLE |
387
PIPE_BIND_SAMPLER_VIEW |
388
PIPE_BIND_DISPLAY_TARGET |
389
PIPE_BIND_SCANOUT |
390
PIPE_BIND_SHARED;
391
392
unsigned bpp = util_format_get_blocksizebits(fmt);
393
394
bool is_sane_bpp =
395
bpp == 8 || bpp == 16 || bpp == 24 || bpp == 32 ||
396
bpp == 64 || bpp == 128;
397
398
bool can_tile = panfrost_is_2d(pres)
399
&& is_sane_bpp
400
&& ((pres->base.bind & ~valid_binding) == 0);
401
402
return can_tile && (pres->base.usage != PIPE_USAGE_STREAM);
403
}
404
405
static uint64_t
406
panfrost_best_modifier(struct panfrost_device *dev,
407
const struct panfrost_resource *pres,
408
enum pipe_format fmt)
409
{
410
if (panfrost_should_afbc(dev, pres, fmt)) {
411
uint64_t afbc =
412
AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
413
AFBC_FORMAT_MOD_SPARSE;
414
415
if (panfrost_afbc_can_ytr(pres->base.format))
416
afbc |= AFBC_FORMAT_MOD_YTR;
417
418
return DRM_FORMAT_MOD_ARM_AFBC(afbc);
419
} else if (panfrost_should_tile(dev, pres, fmt))
420
return DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED;
421
else
422
return DRM_FORMAT_MOD_LINEAR;
423
}
424
425
static bool
426
panfrost_should_checksum(const struct panfrost_device *dev, const struct panfrost_resource *pres)
427
{
428
/* When checksumming is enabled, the tile data must fit in the
429
* size of the writeback buffer, so don't checksum formats
430
* that use too much space. */
431
432
unsigned bytes_per_pixel_max = (dev->arch == 6) ? 6 : 4;
433
434
unsigned bytes_per_pixel = MAX2(pres->base.nr_samples, 1) *
435
util_format_get_blocksize(pres->base.format);
436
437
return pres->base.bind & PIPE_BIND_RENDER_TARGET &&
438
panfrost_is_2d(pres) &&
439
bytes_per_pixel <= bytes_per_pixel_max &&
440
pres->base.last_level == 0 &&
441
!(dev->debug & PAN_DBG_NO_CRC);
442
}
443
444
static void
445
panfrost_resource_setup(struct panfrost_device *dev,
446
struct panfrost_resource *pres,
447
uint64_t modifier, enum pipe_format fmt)
448
{
449
uint64_t chosen_mod = modifier != DRM_FORMAT_MOD_INVALID ?
450
modifier : panfrost_best_modifier(dev, pres, fmt);
451
enum pan_image_crc_mode crc_mode =
452
panfrost_should_checksum(dev, pres) ?
453
PAN_IMAGE_CRC_INBAND : PAN_IMAGE_CRC_NONE;
454
enum mali_texture_dimension dim =
455
panfrost_translate_texture_dimension(pres->base.target);
456
457
/* We can only switch tiled->linear if the resource isn't already
458
* linear and if we control the modifier */
459
pres->modifier_constant =
460
!(chosen_mod != DRM_FORMAT_MOD_LINEAR &&
461
modifier == DRM_FORMAT_MOD_INVALID);
462
463
/* Z32_S8X24 variants are actually stored in 2 planes (one per
464
* component), we have to adjust the format on the first plane.
465
*/
466
if (fmt == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
467
fmt = PIPE_FORMAT_Z32_FLOAT;
468
469
ASSERTED bool valid =
470
pan_image_layout_init(dev, &pres->image.layout,
471
chosen_mod, fmt, dim,
472
pres->base.width0,
473
pres->base.height0,
474
pres->base.depth0,
475
pres->base.array_size,
476
MAX2(pres->base.nr_samples, 1),
477
pres->base.last_level + 1,
478
crc_mode, NULL);
479
assert(valid);
480
}
481
482
static void
483
panfrost_resource_init_afbc_headers(struct panfrost_resource *pres)
484
{
485
panfrost_bo_mmap(pres->image.data.bo);
486
487
unsigned nr_samples = MAX2(pres->base.nr_samples, 1);
488
489
for (unsigned i = 0; i < pres->base.array_size; ++i) {
490
for (unsigned l = 0; l <= pres->base.last_level; ++l) {
491
struct pan_image_slice_layout *slice = &pres->image.layout.slices[l];
492
493
for (unsigned s = 0; s < nr_samples; ++s) {
494
void *ptr = pres->image.data.bo->ptr.cpu +
495
(i * pres->image.layout.array_stride) +
496
slice->offset +
497
(s * slice->afbc.surface_stride);
498
499
/* Zero-ed AFBC headers seem to encode a plain
500
* black. Let's use this pattern to keep the
501
* initialization simple.
502
*/
503
memset(ptr, 0, slice->afbc.header_size);
504
}
505
}
506
}
507
}
508
509
void
510
panfrost_resource_set_damage_region(struct pipe_screen *screen,
511
struct pipe_resource *res,
512
unsigned int nrects,
513
const struct pipe_box *rects)
514
{
515
struct panfrost_device *dev = pan_device(screen);
516
struct panfrost_resource *pres = pan_resource(res);
517
struct pipe_scissor_state *damage_extent = &pres->damage.extent;
518
unsigned int i;
519
520
if (!pan_is_bifrost(dev) && !(dev->quirks & NO_TILE_ENABLE_MAP) &&
521
nrects > 1) {
522
if (!pres->damage.tile_map.data) {
523
pres->damage.tile_map.stride =
524
ALIGN_POT(DIV_ROUND_UP(res->width0, 32 * 8), 64);
525
pres->damage.tile_map.size =
526
pres->damage.tile_map.stride *
527
DIV_ROUND_UP(res->height0, 32);
528
pres->damage.tile_map.data =
529
ralloc_size(pres, pres->damage.tile_map.size);
530
}
531
532
memset(pres->damage.tile_map.data, 0, pres->damage.tile_map.size);
533
pres->damage.tile_map.enable = true;
534
} else {
535
pres->damage.tile_map.enable = false;
536
}
537
538
/* Track the damage extent: the quad including all damage regions. Will
539
* be used restrict the rendering area */
540
541
damage_extent->minx = 0xffff;
542
damage_extent->miny = 0xffff;
543
544
unsigned enable_count = 0;
545
546
for (i = 0; i < nrects; i++) {
547
int x = rects[i].x, w = rects[i].width, h = rects[i].height;
548
int y = res->height0 - (rects[i].y + h);
549
550
damage_extent->minx = MIN2(damage_extent->minx, x);
551
damage_extent->miny = MIN2(damage_extent->miny, y);
552
damage_extent->maxx = MAX2(damage_extent->maxx,
553
MIN2(x + w, res->width0));
554
damage_extent->maxy = MAX2(damage_extent->maxy,
555
MIN2(y + h, res->height0));
556
557
if (!pres->damage.tile_map.enable)
558
continue;
559
560
unsigned t_x_start = x / 32;
561
unsigned t_x_end = (x + w - 1) / 32;
562
unsigned t_y_start = y / 32;
563
unsigned t_y_end = (y + h - 1) / 32;
564
565
for (unsigned t_y = t_y_start; t_y <= t_y_end; t_y++) {
566
for (unsigned t_x = t_x_start; t_x <= t_x_end; t_x++) {
567
unsigned b = (t_y * pres->damage.tile_map.stride * 8) + t_x;
568
569
if (BITSET_TEST(pres->damage.tile_map.data, b))
570
continue;
571
572
BITSET_SET(pres->damage.tile_map.data, b);
573
enable_count++;
574
}
575
}
576
}
577
578
if (nrects == 0) {
579
damage_extent->minx = 0;
580
damage_extent->miny = 0;
581
damage_extent->maxx = res->width0;
582
damage_extent->maxy = res->height0;
583
}
584
585
if (pres->damage.tile_map.enable) {
586
unsigned t_x_start = damage_extent->minx / 32;
587
unsigned t_x_end = damage_extent->maxx / 32;
588
unsigned t_y_start = damage_extent->miny / 32;
589
unsigned t_y_end = damage_extent->maxy / 32;
590
unsigned tile_count = (t_x_end - t_x_start + 1) *
591
(t_y_end - t_y_start + 1);
592
593
/* Don't bother passing a tile-enable-map if the amount of
594
* tiles to reload is to close to the total number of tiles.
595
*/
596
if (tile_count - enable_count < 10)
597
pres->damage.tile_map.enable = false;
598
}
599
600
}
601
602
static struct pipe_resource *
603
panfrost_resource_create_with_modifier(struct pipe_screen *screen,
604
const struct pipe_resource *template,
605
uint64_t modifier)
606
{
607
struct panfrost_device *dev = pan_device(screen);
608
609
if (dev->ro && (template->bind &
610
(PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)))
611
return panfrost_create_scanout_res(screen, template, modifier);
612
613
struct panfrost_resource *so = rzalloc(screen, struct panfrost_resource);
614
so->base = *template;
615
so->base.screen = screen;
616
617
pipe_reference_init(&so->base.reference, 1);
618
619
util_range_init(&so->valid_buffer_range);
620
621
panfrost_resource_setup(dev, so, modifier, template->format);
622
623
/* Guess a label based on the bind */
624
unsigned bind = template->bind;
625
const char *label =
626
(bind & PIPE_BIND_INDEX_BUFFER) ? "Index buffer" :
627
(bind & PIPE_BIND_SCANOUT) ? "Scanout" :
628
(bind & PIPE_BIND_DISPLAY_TARGET) ? "Display target" :
629
(bind & PIPE_BIND_SHARED) ? "Shared resource" :
630
(bind & PIPE_BIND_RENDER_TARGET) ? "Render target" :
631
(bind & PIPE_BIND_DEPTH_STENCIL) ? "Depth/stencil buffer" :
632
(bind & PIPE_BIND_SAMPLER_VIEW) ? "Texture" :
633
(bind & PIPE_BIND_VERTEX_BUFFER) ? "Vertex buffer" :
634
(bind & PIPE_BIND_CONSTANT_BUFFER) ? "Constant buffer" :
635
(bind & PIPE_BIND_GLOBAL) ? "Global memory" :
636
(bind & PIPE_BIND_SHADER_BUFFER) ? "Shader buffer" :
637
(bind & PIPE_BIND_SHADER_IMAGE) ? "Shader image" :
638
"Other resource";
639
640
/* We create a BO immediately but don't bother mapping, since we don't
641
* care to map e.g. FBOs which the CPU probably won't touch */
642
so->image.data.bo =
643
panfrost_bo_create(dev, so->image.layout.data_size, PAN_BO_DELAY_MMAP, label);
644
645
if (drm_is_afbc(so->image.layout.modifier))
646
panfrost_resource_init_afbc_headers(so);
647
648
panfrost_resource_set_damage_region(screen, &so->base, 0, NULL);
649
650
if (template->bind & PIPE_BIND_INDEX_BUFFER)
651
so->index_cache = rzalloc(so, struct panfrost_minmax_cache);
652
653
return (struct pipe_resource *)so;
654
}
655
656
/* Default is to create a resource as don't care */
657
658
static struct pipe_resource *
659
panfrost_resource_create(struct pipe_screen *screen,
660
const struct pipe_resource *template)
661
{
662
return panfrost_resource_create_with_modifier(screen, template,
663
DRM_FORMAT_MOD_INVALID);
664
}
665
666
/* If no modifier is specified, we'll choose. Otherwise, the order of
667
* preference is compressed, tiled, linear. */
668
669
static struct pipe_resource *
670
panfrost_resource_create_with_modifiers(struct pipe_screen *screen,
671
const struct pipe_resource *template,
672
const uint64_t *modifiers, int count)
673
{
674
for (unsigned i = 0; i < PAN_MODIFIER_COUNT; ++i) {
675
if (drm_find_modifier(pan_best_modifiers[i], modifiers, count)) {
676
return panfrost_resource_create_with_modifier(screen, template,
677
pan_best_modifiers[i]);
678
}
679
}
680
681
/* If we didn't find one, app specified invalid */
682
assert(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID);
683
return panfrost_resource_create(screen, template);
684
}
685
686
static void
687
panfrost_resource_destroy(struct pipe_screen *screen,
688
struct pipe_resource *pt)
689
{
690
struct panfrost_device *dev = pan_device(screen);
691
struct panfrost_resource *rsrc = (struct panfrost_resource *) pt;
692
693
if (rsrc->scanout)
694
renderonly_scanout_destroy(rsrc->scanout, dev->ro);
695
696
if (rsrc->image.data.bo)
697
panfrost_bo_unreference(rsrc->image.data.bo);
698
699
if (rsrc->image.crc.bo)
700
panfrost_bo_unreference(rsrc->image.crc.bo);
701
702
util_range_destroy(&rsrc->valid_buffer_range);
703
ralloc_free(rsrc);
704
}
705
706
/* Most of the time we can do CPU-side transfers, but sometimes we need to use
707
* the 3D pipe for this. Let's wrap u_blitter to blit to/from staging textures.
708
* Code adapted from freedreno */
709
710
static struct panfrost_resource *
711
pan_alloc_staging(struct panfrost_context *ctx, struct panfrost_resource *rsc,
712
unsigned level, const struct pipe_box *box)
713
{
714
struct pipe_context *pctx = &ctx->base;
715
struct pipe_resource tmpl = rsc->base;
716
717
tmpl.width0 = box->width;
718
tmpl.height0 = box->height;
719
/* for array textures, box->depth is the array_size, otherwise
720
* for 3d textures, it is the depth:
721
*/
722
if (tmpl.array_size > 1) {
723
if (tmpl.target == PIPE_TEXTURE_CUBE)
724
tmpl.target = PIPE_TEXTURE_2D_ARRAY;
725
tmpl.array_size = box->depth;
726
tmpl.depth0 = 1;
727
} else {
728
tmpl.array_size = 1;
729
tmpl.depth0 = box->depth;
730
}
731
tmpl.last_level = 0;
732
tmpl.bind |= PIPE_BIND_LINEAR;
733
tmpl.bind &= ~(PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED);
734
735
struct pipe_resource *pstaging =
736
pctx->screen->resource_create(pctx->screen, &tmpl);
737
if (!pstaging)
738
return NULL;
739
740
return pan_resource(pstaging);
741
}
742
743
static enum pipe_format
744
pan_blit_format(enum pipe_format fmt)
745
{
746
const struct util_format_description *desc;
747
desc = util_format_description(fmt);
748
749
/* This must be an emulated format (using u_transfer_helper) as if it
750
* was real RGTC we wouldn't have used AFBC and needed a blit. */
751
if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC)
752
fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
753
754
return fmt;
755
}
756
757
static void
758
pan_blit_from_staging(struct pipe_context *pctx, struct panfrost_transfer *trans)
759
{
760
struct pipe_resource *dst = trans->base.resource;
761
struct pipe_blit_info blit = {0};
762
763
blit.dst.resource = dst;
764
blit.dst.format = pan_blit_format(dst->format);
765
blit.dst.level = trans->base.level;
766
blit.dst.box = trans->base.box;
767
blit.src.resource = trans->staging.rsrc;
768
blit.src.format = pan_blit_format(trans->staging.rsrc->format);
769
blit.src.level = 0;
770
blit.src.box = trans->staging.box;
771
blit.mask = util_format_get_mask(blit.src.format);
772
blit.filter = PIPE_TEX_FILTER_NEAREST;
773
774
panfrost_blit(pctx, &blit);
775
}
776
777
static void
778
pan_blit_to_staging(struct pipe_context *pctx, struct panfrost_transfer *trans)
779
{
780
struct pipe_resource *src = trans->base.resource;
781
struct pipe_blit_info blit = {0};
782
783
blit.src.resource = src;
784
blit.src.format = pan_blit_format(src->format);
785
blit.src.level = trans->base.level;
786
blit.src.box = trans->base.box;
787
blit.dst.resource = trans->staging.rsrc;
788
blit.dst.format = pan_blit_format(trans->staging.rsrc->format);
789
blit.dst.level = 0;
790
blit.dst.box = trans->staging.box;
791
blit.mask = util_format_get_mask(blit.dst.format);
792
blit.filter = PIPE_TEX_FILTER_NEAREST;
793
794
panfrost_blit(pctx, &blit);
795
}
796
797
static void *
798
panfrost_ptr_map(struct pipe_context *pctx,
799
struct pipe_resource *resource,
800
unsigned level,
801
unsigned usage, /* a combination of PIPE_MAP_x */
802
const struct pipe_box *box,
803
struct pipe_transfer **out_transfer)
804
{
805
struct panfrost_context *ctx = pan_context(pctx);
806
struct panfrost_device *dev = pan_device(pctx->screen);
807
struct panfrost_resource *rsrc = pan_resource(resource);
808
int bytes_per_pixel = util_format_get_blocksize(rsrc->image.layout.format);
809
struct panfrost_bo *bo = rsrc->image.data.bo;
810
811
/* Can't map tiled/compressed directly */
812
if ((usage & PIPE_MAP_DIRECTLY) && rsrc->image.layout.modifier != DRM_FORMAT_MOD_LINEAR)
813
return NULL;
814
815
struct panfrost_transfer *transfer = rzalloc(pctx, struct panfrost_transfer);
816
transfer->base.level = level;
817
transfer->base.usage = usage;
818
transfer->base.box = *box;
819
820
pipe_resource_reference(&transfer->base.resource, resource);
821
*out_transfer = &transfer->base;
822
823
/* We don't have s/w routines for AFBC, so use a staging texture */
824
if (drm_is_afbc(rsrc->image.layout.modifier)) {
825
struct panfrost_resource *staging = pan_alloc_staging(ctx, rsrc, level, box);
826
assert(staging);
827
828
/* Staging resources have one LOD: level 0. Query the strides
829
* on this LOD.
830
*/
831
transfer->base.stride = staging->image.layout.slices[0].line_stride;
832
transfer->base.layer_stride =
833
panfrost_get_layer_stride(&staging->image.layout, 0);
834
835
transfer->staging.rsrc = &staging->base;
836
837
transfer->staging.box = *box;
838
transfer->staging.box.x = 0;
839
transfer->staging.box.y = 0;
840
transfer->staging.box.z = 0;
841
842
assert(transfer->staging.rsrc != NULL);
843
844
bool valid = BITSET_TEST(rsrc->valid.data, level);
845
846
if ((usage & PIPE_MAP_READ) && (valid || rsrc->track.writer)) {
847
pan_blit_to_staging(pctx, transfer);
848
panfrost_flush_writer(ctx, staging);
849
panfrost_bo_wait(staging->image.data.bo, INT64_MAX, false);
850
}
851
852
panfrost_bo_mmap(staging->image.data.bo);
853
return staging->image.data.bo->ptr.cpu;
854
}
855
856
/* If we haven't already mmaped, now's the time */
857
panfrost_bo_mmap(bo);
858
859
if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
860
pandecode_inject_mmap(bo->ptr.gpu, bo->ptr.cpu, bo->size, NULL);
861
862
bool create_new_bo = usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE;
863
bool copy_resource = false;
864
865
if (!create_new_bo &&
866
!(usage & PIPE_MAP_UNSYNCHRONIZED) &&
867
(usage & PIPE_MAP_WRITE) &&
868
!(resource->target == PIPE_BUFFER
869
&& !util_ranges_intersect(&rsrc->valid_buffer_range, box->x, box->x + box->width)) &&
870
BITSET_COUNT(rsrc->track.users) != 0) {
871
872
/* When a resource to be modified is already being used by a
873
* pending batch, it is often faster to copy the whole BO than
874
* to flush and split the frame in two.
875
*/
876
877
panfrost_flush_writer(ctx, rsrc);
878
panfrost_bo_wait(bo, INT64_MAX, false);
879
880
create_new_bo = true;
881
copy_resource = true;
882
}
883
884
if (create_new_bo) {
885
/* If the BO is used by one of the pending batches or if it's
886
* not ready yet (still accessed by one of the already flushed
887
* batches), we try to allocate a new one to avoid waiting.
888
*/
889
if (BITSET_COUNT(rsrc->track.users) ||
890
!panfrost_bo_wait(bo, 0, true)) {
891
/* We want the BO to be MMAPed. */
892
uint32_t flags = bo->flags & ~PAN_BO_DELAY_MMAP;
893
struct panfrost_bo *newbo = NULL;
894
895
/* When the BO has been imported/exported, we can't
896
* replace it by another one, otherwise the
897
* importer/exporter wouldn't see the change we're
898
* doing to it.
899
*/
900
if (!(bo->flags & PAN_BO_SHARED))
901
newbo = panfrost_bo_create(dev, bo->size,
902
flags, bo->label);
903
904
if (newbo) {
905
if (copy_resource)
906
memcpy(newbo->ptr.cpu, rsrc->image.data.bo->ptr.cpu, bo->size);
907
908
panfrost_bo_unreference(bo);
909
rsrc->image.data.bo = newbo;
910
911
if (!copy_resource &&
912
drm_is_afbc(rsrc->image.layout.modifier))
913
panfrost_resource_init_afbc_headers(rsrc);
914
915
bo = newbo;
916
} else {
917
/* Allocation failed or was impossible, let's
918
* fall back on a flush+wait.
919
*/
920
panfrost_flush_batches_accessing_rsrc(ctx, rsrc);
921
panfrost_bo_wait(bo, INT64_MAX, true);
922
}
923
}
924
} else if ((usage & PIPE_MAP_WRITE)
925
&& resource->target == PIPE_BUFFER
926
&& !util_ranges_intersect(&rsrc->valid_buffer_range, box->x, box->x + box->width)) {
927
/* No flush for writes to uninitialized */
928
} else if (!(usage & PIPE_MAP_UNSYNCHRONIZED)) {
929
if (usage & PIPE_MAP_WRITE) {
930
panfrost_flush_batches_accessing_rsrc(ctx, rsrc);
931
panfrost_bo_wait(bo, INT64_MAX, true);
932
} else if (usage & PIPE_MAP_READ) {
933
panfrost_flush_writer(ctx, rsrc);
934
panfrost_bo_wait(bo, INT64_MAX, false);
935
}
936
}
937
938
if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) {
939
transfer->base.stride = box->width * bytes_per_pixel;
940
transfer->base.layer_stride = transfer->base.stride * box->height;
941
transfer->map = ralloc_size(transfer, transfer->base.layer_stride * box->depth);
942
assert(box->depth == 1);
943
944
if ((usage & PIPE_MAP_READ) && BITSET_TEST(rsrc->valid.data, level)) {
945
panfrost_load_tiled_image(
946
transfer->map,
947
bo->ptr.cpu + rsrc->image.layout.slices[level].offset,
948
box->x, box->y, box->width, box->height,
949
transfer->base.stride,
950
rsrc->image.layout.slices[level].line_stride,
951
rsrc->image.layout.format);
952
}
953
954
return transfer->map;
955
} else {
956
assert (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR);
957
958
/* Direct, persistent writes create holes in time for
959
* caching... I don't know if this is actually possible but we
960
* should still get it right */
961
962
unsigned dpw = PIPE_MAP_DIRECTLY | PIPE_MAP_WRITE | PIPE_MAP_PERSISTENT;
963
964
if ((usage & dpw) == dpw && rsrc->index_cache)
965
return NULL;
966
967
transfer->base.stride = rsrc->image.layout.slices[level].line_stride;
968
transfer->base.layer_stride =
969
panfrost_get_layer_stride(&rsrc->image.layout, level);
970
971
/* By mapping direct-write, we're implicitly already
972
* initialized (maybe), so be conservative */
973
974
if (usage & PIPE_MAP_WRITE) {
975
BITSET_SET(rsrc->valid.data, level);
976
panfrost_minmax_cache_invalidate(rsrc->index_cache, &transfer->base);
977
}
978
979
return bo->ptr.cpu
980
+ rsrc->image.layout.slices[level].offset
981
+ transfer->base.box.z * transfer->base.layer_stride
982
+ transfer->base.box.y * rsrc->image.layout.slices[level].line_stride
983
+ transfer->base.box.x * bytes_per_pixel;
984
}
985
}
986
987
void
988
pan_resource_modifier_convert(struct panfrost_context *ctx,
989
struct panfrost_resource *rsrc,
990
uint64_t modifier)
991
{
992
assert(!rsrc->modifier_constant);
993
994
struct pipe_resource *tmp_prsrc =
995
panfrost_resource_create_with_modifier(
996
ctx->base.screen, &rsrc->base, modifier);
997
struct panfrost_resource *tmp_rsrc = pan_resource(tmp_prsrc);
998
enum pipe_format blit_fmt = pan_blit_format(tmp_rsrc->base.format);
999
1000
unsigned depth = rsrc->base.target == PIPE_TEXTURE_3D ?
1001
rsrc->base.depth0 : rsrc->base.array_size;
1002
1003
struct pipe_box box =
1004
{ 0, 0, 0, rsrc->base.width0, rsrc->base.height0, depth };
1005
1006
struct pipe_blit_info blit = {
1007
.dst.resource = &tmp_rsrc->base,
1008
.dst.format = blit_fmt,
1009
.dst.box = box,
1010
.src.resource = &rsrc->base,
1011
.src.format = pan_blit_format(rsrc->base.format),
1012
.src.box = box,
1013
.mask = util_format_get_mask(blit_fmt),
1014
.filter = PIPE_TEX_FILTER_NEAREST
1015
};
1016
1017
for (int i = 0; i <= rsrc->base.last_level; i++) {
1018
if (BITSET_TEST(rsrc->valid.data, i)) {
1019
blit.dst.level = blit.src.level = i;
1020
panfrost_blit(&ctx->base, &blit);
1021
}
1022
}
1023
1024
panfrost_bo_unreference(rsrc->image.data.bo);
1025
if (rsrc->image.crc.bo)
1026
panfrost_bo_unreference(rsrc->image.crc.bo);
1027
1028
rsrc->image.data.bo = tmp_rsrc->image.data.bo;
1029
panfrost_bo_reference(rsrc->image.data.bo);
1030
1031
panfrost_resource_setup(pan_device(ctx->base.screen), rsrc, modifier,
1032
blit.dst.format);
1033
pipe_resource_reference(&tmp_prsrc, NULL);
1034
}
1035
1036
static bool
1037
panfrost_should_linear_convert(struct panfrost_resource *prsrc,
1038
struct pipe_transfer *transfer)
1039
{
1040
if (prsrc->modifier_constant)
1041
return false;
1042
1043
/* Overwriting the entire resource indicates streaming, for which
1044
* linear layout is most efficient due to the lack of expensive
1045
* conversion.
1046
*
1047
* For now we just switch to linear after a number of complete
1048
* overwrites to keep things simple, but we could do better.
1049
*/
1050
1051
unsigned depth = prsrc->base.target == PIPE_TEXTURE_3D ?
1052
prsrc->base.depth0 : prsrc->base.array_size;
1053
bool entire_overwrite =
1054
prsrc->base.last_level == 0 &&
1055
transfer->box.width == prsrc->base.width0 &&
1056
transfer->box.height == prsrc->base.height0 &&
1057
transfer->box.depth == depth &&
1058
transfer->box.x == 0 &&
1059
transfer->box.y == 0 &&
1060
transfer->box.z == 0;
1061
1062
if (entire_overwrite)
1063
++prsrc->modifier_updates;
1064
1065
return prsrc->modifier_updates >= LAYOUT_CONVERT_THRESHOLD;
1066
}
1067
1068
static void
1069
panfrost_ptr_unmap(struct pipe_context *pctx,
1070
struct pipe_transfer *transfer)
1071
{
1072
/* Gallium expects writeback here, so we tile */
1073
1074
struct panfrost_transfer *trans = pan_transfer(transfer);
1075
struct panfrost_resource *prsrc = (struct panfrost_resource *) transfer->resource;
1076
struct panfrost_device *dev = pan_device(pctx->screen);
1077
1078
if (transfer->usage & PIPE_MAP_WRITE)
1079
prsrc->valid.crc = false;
1080
1081
/* AFBC will use a staging resource. `initialized` will be set when the
1082
* fragment job is created; this is deferred to prevent useless surface
1083
* reloads that can cascade into DATA_INVALID_FAULTs due to reading
1084
* malformed AFBC data if uninitialized */
1085
1086
if (trans->staging.rsrc) {
1087
if (transfer->usage & PIPE_MAP_WRITE) {
1088
if (panfrost_should_linear_convert(prsrc, transfer)) {
1089
1090
panfrost_bo_unreference(prsrc->image.data.bo);
1091
if (prsrc->image.crc.bo)
1092
panfrost_bo_unreference(prsrc->image.crc.bo);
1093
1094
panfrost_resource_setup(dev, prsrc, DRM_FORMAT_MOD_LINEAR,
1095
prsrc->image.layout.format);
1096
1097
prsrc->image.data.bo = pan_resource(trans->staging.rsrc)->image.data.bo;
1098
panfrost_bo_reference(prsrc->image.data.bo);
1099
} else {
1100
pan_blit_from_staging(pctx, trans);
1101
panfrost_flush_batches_accessing_rsrc(pan_context(pctx), pan_resource(trans->staging.rsrc));
1102
}
1103
}
1104
1105
pipe_resource_reference(&trans->staging.rsrc, NULL);
1106
}
1107
1108
/* Tiling will occur in software from a staging cpu buffer */
1109
if (trans->map) {
1110
struct panfrost_bo *bo = prsrc->image.data.bo;
1111
1112
if (transfer->usage & PIPE_MAP_WRITE) {
1113
BITSET_SET(prsrc->valid.data, transfer->level);
1114
1115
if (prsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) {
1116
assert(transfer->box.depth == 1);
1117
1118
if (panfrost_should_linear_convert(prsrc, transfer)) {
1119
panfrost_resource_setup(dev, prsrc, DRM_FORMAT_MOD_LINEAR,
1120
prsrc->image.layout.format);
1121
if (prsrc->image.layout.data_size > bo->size) {
1122
const char *label = bo->label;
1123
panfrost_bo_unreference(bo);
1124
bo = prsrc->image.data.bo =
1125
panfrost_bo_create(dev, prsrc->image.layout.data_size, 0, label);
1126
assert(bo);
1127
}
1128
1129
util_copy_rect(
1130
bo->ptr.cpu + prsrc->image.layout.slices[0].offset,
1131
prsrc->base.format,
1132
prsrc->image.layout.slices[0].line_stride,
1133
0, 0,
1134
transfer->box.width,
1135
transfer->box.height,
1136
trans->map,
1137
transfer->stride,
1138
0, 0);
1139
} else {
1140
panfrost_store_tiled_image(
1141
bo->ptr.cpu + prsrc->image.layout.slices[transfer->level].offset,
1142
trans->map,
1143
transfer->box.x, transfer->box.y,
1144
transfer->box.width, transfer->box.height,
1145
prsrc->image.layout.slices[transfer->level].line_stride,
1146
transfer->stride,
1147
prsrc->image.layout.format);
1148
}
1149
}
1150
}
1151
}
1152
1153
1154
util_range_add(&prsrc->base, &prsrc->valid_buffer_range,
1155
transfer->box.x,
1156
transfer->box.x + transfer->box.width);
1157
1158
panfrost_minmax_cache_invalidate(prsrc->index_cache, transfer);
1159
1160
/* Derefence the resource */
1161
pipe_resource_reference(&transfer->resource, NULL);
1162
1163
/* Transfer itself is RALLOCed at the moment */
1164
ralloc_free(transfer);
1165
}
1166
1167
static void
1168
panfrost_ptr_flush_region(struct pipe_context *pctx,
1169
struct pipe_transfer *transfer,
1170
const struct pipe_box *box)
1171
{
1172
struct panfrost_resource *rsc = pan_resource(transfer->resource);
1173
1174
if (transfer->resource->target == PIPE_BUFFER) {
1175
util_range_add(&rsc->base, &rsc->valid_buffer_range,
1176
transfer->box.x + box->x,
1177
transfer->box.x + box->x + box->width);
1178
} else {
1179
BITSET_SET(rsc->valid.data, transfer->level);
1180
}
1181
}
1182
1183
static void
1184
panfrost_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsrc)
1185
{
1186
struct panfrost_context *ctx = pan_context(pctx);
1187
struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
1188
1189
/* Handle the glInvalidateFramebuffer case */
1190
if (batch->key.zsbuf && batch->key.zsbuf->texture == prsrc)
1191
batch->resolve &= ~PIPE_CLEAR_DEPTHSTENCIL;
1192
1193
for (unsigned i = 0; i < batch->key.nr_cbufs; ++i) {
1194
struct pipe_surface *surf = batch->key.cbufs[i];
1195
1196
if (surf && surf->texture == prsrc)
1197
batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1198
}
1199
}
1200
1201
static enum pipe_format
1202
panfrost_resource_get_internal_format(struct pipe_resource *rsrc)
1203
{
1204
struct panfrost_resource *prsrc = (struct panfrost_resource *) rsrc;
1205
return prsrc->image.layout.format;
1206
}
1207
1208
static bool
1209
panfrost_generate_mipmap(
1210
struct pipe_context *pctx,
1211
struct pipe_resource *prsrc,
1212
enum pipe_format format,
1213
unsigned base_level,
1214
unsigned last_level,
1215
unsigned first_layer,
1216
unsigned last_layer)
1217
{
1218
struct panfrost_resource *rsrc = pan_resource(prsrc);
1219
1220
/* Generating a mipmap invalidates the written levels, so make that
1221
* explicit so we don't try to wallpaper them back and end up with
1222
* u_blitter recursion */
1223
1224
assert(rsrc->image.data.bo);
1225
for (unsigned l = base_level + 1; l <= last_level; ++l)
1226
BITSET_CLEAR(rsrc->valid.data, l);
1227
1228
/* Beyond that, we just delegate the hard stuff. */
1229
1230
bool blit_res = util_gen_mipmap(
1231
pctx, prsrc, format,
1232
base_level, last_level,
1233
first_layer, last_layer,
1234
PIPE_TEX_FILTER_LINEAR);
1235
1236
return blit_res;
1237
}
1238
1239
/* Computes the address to a texture at a particular slice */
1240
1241
mali_ptr
1242
panfrost_get_texture_address(struct panfrost_resource *rsrc,
1243
unsigned level, unsigned layer,
1244
unsigned sample)
1245
{
1246
bool is_3d = rsrc->base.target == PIPE_TEXTURE_3D;
1247
unsigned array_idx = is_3d ? 0 : layer;
1248
unsigned surface_idx = is_3d ? layer : sample;
1249
return rsrc->image.data.bo->ptr.gpu +
1250
panfrost_texture_offset(&rsrc->image.layout, level,
1251
array_idx, surface_idx);
1252
}
1253
1254
void
1255
panfrost_get_afbc_pointers(struct panfrost_resource *rsrc,
1256
unsigned level, unsigned layer,
1257
mali_ptr *header, mali_ptr *body)
1258
{
1259
assert(drm_is_afbc(rsrc->image.layout.modifier));
1260
1261
struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level];
1262
1263
if (rsrc->base.target == PIPE_TEXTURE_3D) {
1264
*header = rsrc->image.data.bo->ptr.gpu + slice->offset +
1265
(layer * slice->afbc.surface_stride);
1266
*body = rsrc->image.data.bo->ptr.gpu + slice->offset +
1267
slice->afbc.header_size +
1268
(slice->surface_stride * layer);
1269
} else {
1270
*header = rsrc->image.data.bo->ptr.gpu +
1271
panfrost_texture_offset(&rsrc->image.layout,
1272
level, layer, 0);
1273
*body = *header + slice->afbc.header_size;
1274
}
1275
}
1276
1277
static void
1278
panfrost_resource_set_stencil(struct pipe_resource *prsrc,
1279
struct pipe_resource *stencil)
1280
{
1281
pan_resource(prsrc)->separate_stencil = pan_resource(stencil);
1282
}
1283
1284
static struct pipe_resource *
1285
panfrost_resource_get_stencil(struct pipe_resource *prsrc)
1286
{
1287
if (!pan_resource(prsrc)->separate_stencil)
1288
return NULL;
1289
1290
return &pan_resource(prsrc)->separate_stencil->base;
1291
}
1292
1293
static const struct u_transfer_vtbl transfer_vtbl = {
1294
.resource_create = panfrost_resource_create,
1295
.resource_destroy = panfrost_resource_destroy,
1296
.transfer_map = panfrost_ptr_map,
1297
.transfer_unmap = panfrost_ptr_unmap,
1298
.transfer_flush_region = panfrost_ptr_flush_region,
1299
.get_internal_format = panfrost_resource_get_internal_format,
1300
.set_stencil = panfrost_resource_set_stencil,
1301
.get_stencil = panfrost_resource_get_stencil,
1302
};
1303
1304
void
1305
panfrost_resource_screen_init(struct pipe_screen *pscreen)
1306
{
1307
struct panfrost_device *dev = pan_device(pscreen);
1308
1309
bool fake_rgtc = !panfrost_supports_compressed_format(dev, MALI_BC4_UNORM);
1310
1311
pscreen->resource_create_with_modifiers =
1312
panfrost_resource_create_with_modifiers;
1313
pscreen->resource_create = u_transfer_helper_resource_create;
1314
pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1315
pscreen->resource_from_handle = panfrost_resource_from_handle;
1316
pscreen->resource_get_handle = panfrost_resource_get_handle;
1317
pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1318
true, false,
1319
fake_rgtc, true);
1320
}
1321
1322
void
1323
panfrost_resource_context_init(struct pipe_context *pctx)
1324
{
1325
pctx->buffer_map = u_transfer_helper_transfer_map;
1326
pctx->buffer_unmap = u_transfer_helper_transfer_unmap;
1327
pctx->texture_map = u_transfer_helper_transfer_map;
1328
pctx->texture_unmap = u_transfer_helper_transfer_unmap;
1329
pctx->create_surface = panfrost_create_surface;
1330
pctx->surface_destroy = panfrost_surface_destroy;
1331
pctx->resource_copy_region = util_resource_copy_region;
1332
pctx->blit = panfrost_blit;
1333
pctx->generate_mipmap = panfrost_generate_mipmap;
1334
pctx->flush_resource = panfrost_flush_resource;
1335
pctx->invalidate_resource = panfrost_invalidate_resource;
1336
pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1337
pctx->buffer_subdata = u_default_buffer_subdata;
1338
pctx->texture_subdata = u_default_texture_subdata;
1339
}
1340
1341