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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/r300/compiler/radeon_program_constants.h
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/*
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* Copyright (C) 2009 Nicolai Haehnle.
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*
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef RADEON_PROGRAM_CONSTANTS_H
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#define RADEON_PROGRAM_CONSTANTS_H
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typedef enum {
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RC_SATURATE_NONE = 0,
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RC_SATURATE_ZERO_ONE,
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RC_SATURATE_MINUS_PLUS_ONE
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} rc_saturate_mode;
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typedef enum {
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RC_TEXTURE_2D_ARRAY,
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RC_TEXTURE_1D_ARRAY,
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RC_TEXTURE_CUBE,
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RC_TEXTURE_3D,
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RC_TEXTURE_RECT,
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RC_TEXTURE_2D,
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RC_TEXTURE_1D
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} rc_texture_target;
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typedef enum {
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/**
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* Used to indicate unused register descriptions and
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* source register that use a constant swizzle.
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*/
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RC_FILE_NONE = 0,
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RC_FILE_TEMPORARY,
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/**
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* Input register.
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*
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* \note The compiler attaches no implicit semantics to input registers.
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* Fragment/vertex program specific semantics must be defined explicitly
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* using the appropriate compiler interfaces.
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*/
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RC_FILE_INPUT,
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/**
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* Output register.
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*
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* \note The compiler attaches no implicit semantics to input registers.
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* Fragment/vertex program specific semantics must be defined explicitly
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* using the appropriate compiler interfaces.
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*/
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RC_FILE_OUTPUT,
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RC_FILE_ADDRESS,
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/**
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* Indicates a constant from the \ref rc_constant_list .
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*/
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RC_FILE_CONSTANT,
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/**
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* Indicates a special register, see RC_SPECIAL_xxx.
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*/
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RC_FILE_SPECIAL,
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/**
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* Indicates this register should use the result of the presubtract
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* operation.
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*/
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RC_FILE_PRESUB,
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/**
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* Indicates that the source index has been encoded as a 7-bit float.
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*/
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RC_FILE_INLINE
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} rc_register_file;
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enum {
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/** R500 fragment program ALU result "register" */
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RC_SPECIAL_ALU_RESULT = 0,
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/** Must be last */
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RC_NUM_SPECIAL_REGISTERS
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};
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#define RC_REGISTER_INDEX_BITS 10
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#define RC_REGISTER_MAX_INDEX (1 << RC_REGISTER_INDEX_BITS)
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typedef enum {
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RC_SWIZZLE_X = 0,
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RC_SWIZZLE_Y,
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RC_SWIZZLE_Z,
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RC_SWIZZLE_W,
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RC_SWIZZLE_ZERO,
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RC_SWIZZLE_ONE,
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RC_SWIZZLE_HALF,
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RC_SWIZZLE_UNUSED
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} rc_swizzle;
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#define RC_MAKE_SWIZZLE(a,b,c,d) (((a)<<0) | ((b)<<3) | ((c)<<6) | ((d)<<9))
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#define RC_MAKE_SWIZZLE_SMEAR(a) RC_MAKE_SWIZZLE((a),(a),(a),(a))
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#define GET_SWZ(swz, idx) (((swz) >> ((idx)*3)) & 0x7)
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#define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1)
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#define SET_SWZ(swz, idx, newv) \
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do { \
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(swz) = ((swz) & ~(7 << ((idx)*3))) | ((newv) << ((idx)*3)); \
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} while(0)
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#define RC_SWIZZLE_XYZW RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_W)
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#define RC_SWIZZLE_XYZ0 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ZERO)
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#define RC_SWIZZLE_XYZ1 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ONE)
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#define RC_SWIZZLE_XYZZ RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z)
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#define RC_SWIZZLE_XXXX RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_X)
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#define RC_SWIZZLE_YYYY RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Y)
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#define RC_SWIZZLE_ZZZZ RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Z)
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#define RC_SWIZZLE_WWWW RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_W)
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#define RC_SWIZZLE_0000 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ZERO)
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#define RC_SWIZZLE_1111 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ONE)
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#define RC_SWIZZLE_HHHH RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF)
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#define RC_SWIZZLE_UUUU RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_UNUSED)
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/**
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* \name Bitmasks for components of vectors.
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*
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* Used for write masks, negation masks, etc.
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*/
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/*@{*/
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#define RC_MASK_NONE 0
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#define RC_MASK_X 1
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#define RC_MASK_Y 2
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#define RC_MASK_Z 4
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#define RC_MASK_W 8
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#define RC_MASK_XY (RC_MASK_X|RC_MASK_Y)
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#define RC_MASK_XYZ (RC_MASK_X|RC_MASK_Y|RC_MASK_Z)
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#define RC_MASK_XYW (RC_MASK_X|RC_MASK_Y|RC_MASK_W)
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#define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W)
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/*@}*/
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typedef enum {
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RC_ALURESULT_NONE = 0,
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RC_ALURESULT_X,
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RC_ALURESULT_W
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} rc_write_aluresult;
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typedef enum {
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RC_PRESUB_NONE = 0,
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/** 1 - 2 * src0 */
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RC_PRESUB_BIAS,
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/** src1 - src0 */
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RC_PRESUB_SUB,
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/** src1 + src0 */
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RC_PRESUB_ADD,
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/** 1 - src0 */
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RC_PRESUB_INV
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} rc_presubtract_op;
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typedef enum {
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RC_OMOD_MUL_1,
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RC_OMOD_MUL_2,
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RC_OMOD_MUL_4,
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RC_OMOD_MUL_8,
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RC_OMOD_DIV_2,
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RC_OMOD_DIV_4,
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RC_OMOD_DIV_8,
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RC_OMOD_DISABLE
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} rc_omod_op;
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static inline int rc_presubtract_src_reg_count(rc_presubtract_op op){
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switch(op){
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case RC_PRESUB_BIAS:
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case RC_PRESUB_INV:
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return 1;
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case RC_PRESUB_ADD:
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case RC_PRESUB_SUB:
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return 2;
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default:
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return 0;
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}
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}
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#define RC_SOURCE_NONE 0x0
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#define RC_SOURCE_RGB 0x1
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#define RC_SOURCE_ALPHA 0x2
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typedef enum {
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RC_PRED_DISABLED,
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RC_PRED_SET,
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RC_PRED_INV
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} rc_predicate_mode;
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#endif /* RADEON_PROGRAM_CONSTANTS_H */
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