Path: blob/21.2-virgl/src/gallium/drivers/r300/compiler/radeon_program_constants.h
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/*1* Copyright (C) 2009 Nicolai Haehnle.2*3* All Rights Reserved.4*5* Permission is hereby granted, free of charge, to any person obtaining6* a copy of this software and associated documentation files (the7* "Software"), to deal in the Software without restriction, including8* without limitation the rights to use, copy, modify, merge, publish,9* distribute, sublicense, and/or sell copies of the Software, and to10* permit persons to whom the Software is furnished to do so, subject to11* the following conditions:12*13* The above copyright notice and this permission notice (including the14* next paragraph) shall be included in all copies or substantial15* portions of the Software.16*17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,18* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.20* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE21* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION22* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION23* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.24*25*/2627#ifndef RADEON_PROGRAM_CONSTANTS_H28#define RADEON_PROGRAM_CONSTANTS_H2930typedef enum {31RC_SATURATE_NONE = 0,32RC_SATURATE_ZERO_ONE,33RC_SATURATE_MINUS_PLUS_ONE34} rc_saturate_mode;3536typedef enum {37RC_TEXTURE_2D_ARRAY,38RC_TEXTURE_1D_ARRAY,39RC_TEXTURE_CUBE,40RC_TEXTURE_3D,41RC_TEXTURE_RECT,42RC_TEXTURE_2D,43RC_TEXTURE_1D44} rc_texture_target;4546typedef enum {47/**48* Used to indicate unused register descriptions and49* source register that use a constant swizzle.50*/51RC_FILE_NONE = 0,52RC_FILE_TEMPORARY,5354/**55* Input register.56*57* \note The compiler attaches no implicit semantics to input registers.58* Fragment/vertex program specific semantics must be defined explicitly59* using the appropriate compiler interfaces.60*/61RC_FILE_INPUT,6263/**64* Output register.65*66* \note The compiler attaches no implicit semantics to input registers.67* Fragment/vertex program specific semantics must be defined explicitly68* using the appropriate compiler interfaces.69*/70RC_FILE_OUTPUT,71RC_FILE_ADDRESS,7273/**74* Indicates a constant from the \ref rc_constant_list .75*/76RC_FILE_CONSTANT,7778/**79* Indicates a special register, see RC_SPECIAL_xxx.80*/81RC_FILE_SPECIAL,8283/**84* Indicates this register should use the result of the presubtract85* operation.86*/87RC_FILE_PRESUB,8889/**90* Indicates that the source index has been encoded as a 7-bit float.91*/92RC_FILE_INLINE93} rc_register_file;9495enum {96/** R500 fragment program ALU result "register" */97RC_SPECIAL_ALU_RESULT = 0,9899/** Must be last */100RC_NUM_SPECIAL_REGISTERS101};102103#define RC_REGISTER_INDEX_BITS 10104#define RC_REGISTER_MAX_INDEX (1 << RC_REGISTER_INDEX_BITS)105106typedef enum {107RC_SWIZZLE_X = 0,108RC_SWIZZLE_Y,109RC_SWIZZLE_Z,110RC_SWIZZLE_W,111RC_SWIZZLE_ZERO,112RC_SWIZZLE_ONE,113RC_SWIZZLE_HALF,114RC_SWIZZLE_UNUSED115} rc_swizzle;116117#define RC_MAKE_SWIZZLE(a,b,c,d) (((a)<<0) | ((b)<<3) | ((c)<<6) | ((d)<<9))118#define RC_MAKE_SWIZZLE_SMEAR(a) RC_MAKE_SWIZZLE((a),(a),(a),(a))119#define GET_SWZ(swz, idx) (((swz) >> ((idx)*3)) & 0x7)120#define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1)121#define SET_SWZ(swz, idx, newv) \122do { \123(swz) = ((swz) & ~(7 << ((idx)*3))) | ((newv) << ((idx)*3)); \124} while(0)125126#define RC_SWIZZLE_XYZW RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_W)127#define RC_SWIZZLE_XYZ0 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ZERO)128#define RC_SWIZZLE_XYZ1 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ONE)129#define RC_SWIZZLE_XYZZ RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z)130#define RC_SWIZZLE_XXXX RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_X)131#define RC_SWIZZLE_YYYY RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Y)132#define RC_SWIZZLE_ZZZZ RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Z)133#define RC_SWIZZLE_WWWW RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_W)134#define RC_SWIZZLE_0000 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ZERO)135#define RC_SWIZZLE_1111 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ONE)136#define RC_SWIZZLE_HHHH RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF)137#define RC_SWIZZLE_UUUU RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_UNUSED)138139/**140* \name Bitmasks for components of vectors.141*142* Used for write masks, negation masks, etc.143*/144/*@{*/145#define RC_MASK_NONE 0146#define RC_MASK_X 1147#define RC_MASK_Y 2148#define RC_MASK_Z 4149#define RC_MASK_W 8150#define RC_MASK_XY (RC_MASK_X|RC_MASK_Y)151#define RC_MASK_XYZ (RC_MASK_X|RC_MASK_Y|RC_MASK_Z)152#define RC_MASK_XYW (RC_MASK_X|RC_MASK_Y|RC_MASK_W)153#define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W)154/*@}*/155156typedef enum {157RC_ALURESULT_NONE = 0,158RC_ALURESULT_X,159RC_ALURESULT_W160} rc_write_aluresult;161162typedef enum {163RC_PRESUB_NONE = 0,164165/** 1 - 2 * src0 */166RC_PRESUB_BIAS,167168/** src1 - src0 */169RC_PRESUB_SUB,170171/** src1 + src0 */172RC_PRESUB_ADD,173174/** 1 - src0 */175RC_PRESUB_INV176} rc_presubtract_op;177178typedef enum {179RC_OMOD_MUL_1,180RC_OMOD_MUL_2,181RC_OMOD_MUL_4,182RC_OMOD_MUL_8,183RC_OMOD_DIV_2,184RC_OMOD_DIV_4,185RC_OMOD_DIV_8,186RC_OMOD_DISABLE187} rc_omod_op;188189static inline int rc_presubtract_src_reg_count(rc_presubtract_op op){190switch(op){191case RC_PRESUB_BIAS:192case RC_PRESUB_INV:193return 1;194case RC_PRESUB_ADD:195case RC_PRESUB_SUB:196return 2;197default:198return 0;199}200}201202#define RC_SOURCE_NONE 0x0203#define RC_SOURCE_RGB 0x1204#define RC_SOURCE_ALPHA 0x2205206typedef enum {207RC_PRED_DISABLED,208RC_PRED_SET,209RC_PRED_INV210} rc_predicate_mode;211212#endif /* RADEON_PROGRAM_CONSTANTS_H */213214215