Path: blob/21.2-virgl/src/gallium/drivers/r300/r300_chipset.h
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/*1* Copyright 2008 Corbin Simpson <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* on the rights to use, copy, modify, merge, publish, distribute, sub7* license, and/or sell copies of the Software, and to permit persons to whom8* the Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,18* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR19* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE20* USE OR OTHER DEALINGS IN THE SOFTWARE. */2122#ifndef R300_CHIPSET_H23#define R300_CHIPSET_H2425#include "pipe/p_compiler.h"2627/* these are sizes in dwords */28#define R300_HIZ_LIMIT 1024029#define RV530_HIZ_LIMIT 153603031/* rv3xx have only one pipe */32#define PIPE_ZMASK_SIZE 409633#define RV3xx_ZMASK_SIZE 51203435/* The size of a compressed tile. Each compressed tile takes 2 bits36* in the ZMASK RAM, so there is always 16 tiles per one dword. */37enum r300_zmask_compression {38R300_ZCOMP_4X4 = 4,39R300_ZCOMP_8X8 = 840};4142/* Structure containing all the possible information about a specific Radeon43* in the R3xx, R4xx, and R5xx families. */44struct r300_capabilities {45/* Chipset family */46int family;47/* The number of vertex floating-point units */48unsigned num_vert_fpus;49/* The number of texture units. */50unsigned num_tex_units;51/* Whether or not TCL is physically present */52boolean has_tcl;53/* Some chipsets do not have HiZ RAM - other have varying amounts. */54int hiz_ram;55/* Some chipsets have zmask ram per pipe some don't. */56int zmask_ram;57/* CMASK is for MSAA colorbuffer compression and fast clear. */58boolean has_cmask;59/* Compression mode for ZMASK. */60enum r300_zmask_compression z_compress;61/* Whether or not this is RV350 or newer, including all r400 and r50062* chipsets. The differences compared to the oldest r300 chips are:63* - Blend LTE/GTE thresholds64* - Better MACRO_SWITCH in texture tiling65* - Half float vertex66* - More HyperZ optimizations */67boolean is_rv350;68/* Whether or not this is R400. The differences compared their rv35069* cousins are:70* - Extended fragment shader registers71* - 3DC texture compression (RGTC2) */72boolean is_r400;73/* Whether or not this is an RV515 or newer; R500s have many differences74* that require extra consideration, compared to their rv350 cousins:75* - Extra bit of width and height on texture sizes76* - Blend color is split across two registers77* - Universal Shader (US) block used for fragment shaders78* - FP16 blending and multisampling79* - Full RGTC texture compression80* - 24-bit depth textures81* - Stencil back-face reference value82* - Ability to render up to 2^24 - 1 vertices with signed index offset */83boolean is_r500;84/* Whether or not the second pixel pipe is accessed with the high bit */85boolean high_second_pipe;86/* DXTC texture swizzling. */87boolean dxtc_swizzle;88/* Whether R500_US_FORMAT0_0 exists (R520-only and depends on DRM). */89boolean has_us_format;90};9192void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps);9394#endif /* R300_CHIPSET_H */959697