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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/r300/r300_context.h
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1
/*
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* Copyright 2008 Corbin Simpson <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#ifndef R300_CONTEXT_H
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#define R300_CONTEXT_H
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#define R300_BUFFER_ALIGNMENT 64
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#include "draw/draw_vertex.h"
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#include "util/u_blitter.h"
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#include "pipe/p_context.h"
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#include "util/u_inlines.h"
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#include "util/u_transfer.h"
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#include "r300_defines.h"
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#include "r300_screen.h"
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#include "compiler/radeon_regalloc.h"
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struct u_upload_mgr;
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struct r300_context;
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struct r300_fragment_shader;
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struct r300_vertex_shader;
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struct r300_stencilref_context;
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enum colormask_swizzle {
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COLORMASK_BGRA,
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COLORMASK_RGBA,
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COLORMASK_RRRR,
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COLORMASK_AAAA,
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COLORMASK_GRRG,
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COLORMASK_ARRA,
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COLORMASK_BGRX,
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COLORMASK_RGBX,
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COLORMASK_NUM_SWIZZLES
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};
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struct r300_atom {
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/* Name, for debugging. */
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const char* name;
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/* Opaque state. */
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void* state;
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/* Emit the state to the context. */
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void (*emit)(struct r300_context*, unsigned, void*);
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/* Upper bound on number of dwords to emit. */
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unsigned size;
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/* Whether this atom should be emitted. */
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boolean dirty;
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/* Whether this atom may be emitted with state == NULL. */
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boolean allow_null_state;
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};
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struct r300_aa_state {
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struct r300_surface *dest;
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uint32_t aa_config;
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};
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struct r300_blend_state {
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struct pipe_blend_state state;
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uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8];
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uint32_t cb_noclamp[8];
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uint32_t cb_noclamp_noalpha[8];
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uint32_t cb_no_readwrite[8];
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};
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struct r300_blend_color_state {
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struct pipe_blend_color state;
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uint32_t cb[3];
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};
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struct r300_clip_state {
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uint32_t cb[29];
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};
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struct r300_dsa_state {
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struct pipe_depth_stencil_alpha_state dsa;
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/* This is actually a command buffer with named dwords. */
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uint32_t cb_begin;
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uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */
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uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
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uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */
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uint32_t cb_reg;
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uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
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uint32_t cb_reg1;
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uint32_t alpha_value; /* R500_FG_ALPHA_VALUE: 0x4be0 */
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/* Same, but without ZB reads and writes. */
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uint32_t cb_zb_no_readwrite[8]; /* ZB not bound */
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/* Emitted separately: */
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uint32_t alpha_function;
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/* Whether a two-sided stencil is enabled. */
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boolean two_sided;
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/* Whether a fallback should be used for a two-sided stencil ref value. */
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boolean two_sided_stencil_ref;
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};
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struct r300_hyperz_state {
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int flush;
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/* This is actually a command buffer with named dwords. */
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uint32_t cb_flush_begin;
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uint32_t zb_zcache_ctlstat; /* R300_ZB_CACHE_CNTL */
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uint32_t cb_begin;
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uint32_t zb_bw_cntl; /* R300_ZB_BW_CNTL */
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uint32_t cb_reg1;
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uint32_t zb_depthclearvalue; /* R300_ZB_DEPTHCLEARVALUE */
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uint32_t cb_reg2;
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uint32_t sc_hyperz; /* R300_SC_HYPERZ */
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uint32_t cb_reg3;
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uint32_t gb_z_peq_config; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
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};
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struct r300_gpu_flush {
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uint32_t cb_flush_clean[6];
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};
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#define RS_STATE_MAIN_SIZE 27
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struct r300_rs_state {
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/* Original rasterizer state. */
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struct pipe_rasterizer_state rs;
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/* Draw-specific rasterizer state. */
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struct pipe_rasterizer_state rs_draw;
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/* Command buffers. */
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uint32_t cb_main[RS_STATE_MAIN_SIZE];
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uint32_t cb_poly_offset_zb16[5];
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uint32_t cb_poly_offset_zb24[5];
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/* The index to cb_main where the cull_mode register value resides. */
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unsigned cull_mode_index;
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/* Whether polygon offset is enabled. */
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boolean polygon_offset_enable;
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/* This is emitted in the draw function. */
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uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */
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};
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struct r300_rs_block {
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uint32_t vap_vtx_state_cntl; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
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uint32_t vap_vsm_vtx_assm; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
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uint32_t vap_out_vtx_fmt[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
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uint32_t gb_enable;
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uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
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uint32_t count; /* R300_RS_COUNT */
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uint32_t inst_count; /* R300_RS_INST_COUNT */
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uint32_t inst[8]; /* R300_RS_INST_[0-7] */
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};
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struct r300_sampler_state {
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struct pipe_sampler_state state;
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uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
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uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
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/* Min/max LOD must be clamped to [0, last_level], thus
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* it's dependent on a currently bound texture */
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unsigned min_lod, max_lod;
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};
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struct r300_texture_format_state {
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uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
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uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
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uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
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uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
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uint32_t us_format0; /* R500_US_FORMAT0_0: 0x4640 (through 15) */
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};
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struct r300_sampler_view {
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struct pipe_sampler_view base;
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/* For resource_copy_region. */
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unsigned width0_override;
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unsigned height0_override;
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/* Swizzles in the PIPE_SWIZZLE_* representation,
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* derived from base. */
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unsigned char swizzle[4];
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/* Copy of r300_texture::texture_format_state with format-specific bits
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* added. */
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struct r300_texture_format_state format;
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/* The texture cache region for this texture. */
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uint32_t texcache_region;
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};
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struct r300_texture_sampler_state {
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struct r300_texture_format_state format;
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uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
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uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
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uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
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};
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struct r300_textures_state {
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/* Textures. */
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struct r300_sampler_view *sampler_views[16];
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int sampler_view_count;
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/* Sampler states. */
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struct r300_sampler_state *sampler_states[16];
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int sampler_state_count;
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/* This is the merge of the texture and sampler states. */
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unsigned count;
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uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */
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struct r300_texture_sampler_state regs[16];
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};
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struct r300_vertex_stream_state {
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/* R300_VAP_PROG_STREAK_CNTL_[0-7] */
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uint32_t vap_prog_stream_cntl[8];
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/* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
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uint32_t vap_prog_stream_cntl_ext[8];
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unsigned count;
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};
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struct r300_invariant_state {
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uint32_t cb[24];
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};
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struct r300_vap_invariant_state {
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uint32_t cb[11];
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};
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struct r300_viewport_state {
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float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */
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float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */
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float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */
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float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
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float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */
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float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
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uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */
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};
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struct r300_ztop_state {
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uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */
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};
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/* The next several objects are not pure Radeon state; they inherit from
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* various Gallium classes. */
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struct r300_constant_buffer {
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/* Buffer of constants */
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uint32_t *ptr;
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/* Remapping table. */
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unsigned *remap_table;
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/* const buffer base */
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uint32_t buffer_base;
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};
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/* Query object.
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*
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* This is not a subclass of pipe_query because pipe_query is never
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* actually fully defined. So, rather than have it as a member, and do
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* subclass-style casting, we treat pipe_query as an opaque, and just
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* trust that our gallium frontend does not ever mess up query objects.
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*/
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struct r300_query {
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/* The kind of query. Currently only OQ is supported. */
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unsigned type;
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/* The number of pipes where query results are stored. */
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unsigned num_pipes;
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/* How many results have been written, in dwords. It's incremented
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* after end_query and flush. */
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unsigned num_results;
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/* if begin has been emitted */
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boolean begin_emitted;
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/* The buffer where query results are stored. */
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struct pb_buffer *buf;
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};
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struct r300_surface {
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struct pipe_surface base;
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/* Winsys buffer backing the texture. */
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struct pb_buffer *buf;
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enum radeon_bo_domain domain;
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uint32_t offset; /* COLOROFFSET or DEPTHOFFSET. */
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uint32_t pitch; /* COLORPITCH or DEPTHPITCH. */
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uint32_t pitch_zmask; /* ZMASK_PITCH */
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uint32_t pitch_hiz; /* HIZ_PITCH */
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uint32_t pitch_cmask; /* CMASK_PITCH */
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uint32_t format; /* US_OUT_FMT or ZB_FORMAT. */
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/* Parameters dedicated to the CBZB clear. */
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uint32_t cbzb_width; /* Aligned width. */
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uint32_t cbzb_height; /* Half of the height. */
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uint32_t cbzb_midpoint_offset; /* DEPTHOFFSET. */
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uint32_t cbzb_pitch; /* DEPTHPITCH. */
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uint32_t cbzb_format; /* ZB_FORMAT. */
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/* Whether the CBZB clear is allowed on the surface. */
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boolean cbzb_allowed;
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unsigned colormask_swizzle;
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};
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struct r300_texture_desc {
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/* Width, height, and depth.
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* Most of the time, these are equal to pipe_texture::width0, height0,
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* and depth0. However, NPOT 3D textures must have dimensions aligned
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* to POT, and this is the only case when these variables differ from
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* pipe_texture. */
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unsigned width0, height0, depth0;
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/* Buffer tiling.
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* Macrotiling is specified per-level because small mipmaps cannot
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* be macrotiled. */
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enum radeon_bo_layout microtile;
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enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];
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/* Offsets into the buffer. */
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unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];
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/* Strides for each mip-level. */
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unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];
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/* Size of one zslice or face or 2D image based on the texture target. */
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unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];
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/* Total size of this texture, in bytes,
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* derived from the texture properties. */
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unsigned size_in_bytes;
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/**
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* If non-zero, override the natural texture layout with
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* a custom stride (in bytes).
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*
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* \note Mipmapping fails for textures with a non-natural layout!
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*
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* \sa r300_texture_get_stride
362
*/
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unsigned stride_in_bytes_override;
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/* Whether this texture has non-power-of-two dimensions.
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* It can be either a regular texture or a rectangle one. */
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boolean is_npot;
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/* This flag says that hardware must use the stride for addressing
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* instead of the width. */
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boolean uses_stride_addressing;
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/* Whether CBZB fast color clear is allowed on the miplevel. */
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boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS];
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/* Zbuffer compression info for each miplevel. */
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boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS];
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/* If zero, then disable Z compression/HiZ. */
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unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];
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unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];
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/* Zmask/HiZ strides for each miplevel. */
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unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
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unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
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/* CMASK info for AA buffers (no mipmapping). */
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unsigned cmask_dwords;
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unsigned cmask_stride_in_pixels;
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};
389
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struct r300_resource
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{
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struct pipe_resource b;
393
394
/* Winsys buffer backing this resource. */
395
struct pb_buffer *buf;
396
enum radeon_bo_domain domain;
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398
/* Constant buffers and SWTCL vertex and index buffers are in user
399
* memory. */
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uint8_t *malloced_buffer;
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/* Texture description (addressing, layout, special features). */
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struct r300_texture_desc tex;
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/* This is the level tiling flags were last time set for.
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* It's used to prevent redundant tiling-flags changes from happening.*/
407
unsigned surface_level;
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};
409
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struct r300_vertex_element_state {
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unsigned count;
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struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
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unsigned format_size[PIPE_MAX_ATTRIBS];
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/* The size of the vertex, in dwords. */
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unsigned vertex_size_dwords;
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struct r300_vertex_stream_state vertex_stream;
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};
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enum r300_hiz_func {
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HIZ_FUNC_NONE,
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/* The function, when determined, is set in stone
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* until the next HiZ clear. */
426
427
/* MAX is written to the HiZ buffer.
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* Used for LESS, LEQUAL. */
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HIZ_FUNC_MAX,
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431
/* MIN is written to the HiZ buffer.
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* Used for GREATER, GEQUAL. */
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HIZ_FUNC_MIN,
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};
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/* For deferred fragment shader state validation. */
437
enum r300_fs_validity_status {
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FRAGMENT_SHADER_VALID, /* No need to change/validate the FS. */
439
FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */
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FRAGMENT_SHADER_DIRTY /* Always validate the FS (if the FS was changed) */
441
};
442
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struct r300_context {
444
/* Parent class */
445
struct pipe_context context;
446
447
/* The interface to the windowing system, etc. */
448
struct radeon_winsys *rws;
449
/* The submission context. */
450
struct radeon_winsys_ctx *ctx;
451
/* The command stream. */
452
struct radeon_cmdbuf cs;
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/* Screen. */
454
struct r300_screen *screen;
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456
/* Draw module. Used mostly for SW TCL. */
457
struct draw_context* draw;
458
/* Vertex buffer for SW TCL. */
459
struct pb_buffer *vbo;
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/* Offset and size into the SW TCL VBO. */
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size_t draw_vbo_offset;
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/* Accelerated blit support. */
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struct blitter_context* blitter;
465
/* Stencil two-sided reference value fallback. */
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struct r300_stencilref_context *stencilref_fallback;
467
468
/* The KIL opcode needs the first texture unit to be enabled
469
* on r3xx-r4xx. In order to calm down the CS checker, we bind this
470
* dummy texture there. */
471
struct r300_sampler_view *texkill_sampler;
472
473
/* When no vertex buffer is set, this one is used instead to prevent
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* hardlocks. */
475
struct pipe_vertex_buffer dummy_vb;
476
477
/* The currently active query. */
478
struct r300_query *query_current;
479
/* The saved query for blitter operations. */
480
struct r300_query *blitter_saved_query;
481
/* Query list. */
482
struct r300_query query_list;
483
484
/* Various CSO state objects. */
485
486
/* Each atom is emitted in the order it appears here, which can affect
487
* performance and stability if not handled with care. */
488
/* GPU flush. */
489
struct r300_atom gpu_flush;
490
/* Clears must be emitted immediately after the flush. */
491
/* HiZ clear */
492
struct r300_atom hiz_clear;
493
/* zmask clear */
494
struct r300_atom zmask_clear;
495
/* cmask clear */
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struct r300_atom cmask_clear;
497
/* Anti-aliasing (MSAA) state. */
498
struct r300_atom aa_state;
499
/* Framebuffer state. */
500
struct r300_atom fb_state;
501
/* HyperZ state (various SC/ZB bits). */
502
struct r300_atom hyperz_state;
503
/* ZTOP state. */
504
struct r300_atom ztop_state;
505
/* Depth, stencil, and alpha state. */
506
struct r300_atom dsa_state;
507
/* Blend state. */
508
struct r300_atom blend_state;
509
/* Blend color state. */
510
struct r300_atom blend_color_state;
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/* Scissor state. */
512
struct r300_atom scissor_state;
513
/* Sample mask. */
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struct r300_atom sample_mask;
515
/* Invariant state. This must be emitted to get the engine started. */
516
struct r300_atom invariant_state;
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/* Viewport state. */
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struct r300_atom viewport_state;
519
/* PVS flush. */
520
struct r300_atom pvs_flush;
521
/* VAP invariant state. */
522
struct r300_atom vap_invariant_state;
523
/* Vertex stream formatting state. */
524
struct r300_atom vertex_stream_state;
525
/* Vertex shader. */
526
struct r300_atom vs_state;
527
/* User clip planes. */
528
struct r300_atom clip_state;
529
/* RS block state + VAP (vertex shader) output mapping state. */
530
struct r300_atom rs_block_state;
531
/* Rasterizer state. */
532
struct r300_atom rs_state;
533
/* Framebuffer state (pipelined regs). */
534
struct r300_atom fb_state_pipelined;
535
/* Fragment shader. */
536
struct r300_atom fs;
537
/* Fragment shader RC_CONSTANT_STATE variables. */
538
struct r300_atom fs_rc_constant_state;
539
/* Fragment shader constant buffer. */
540
struct r300_atom fs_constants;
541
/* Vertex shader constant buffer. */
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struct r300_atom vs_constants;
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/* Texture cache invalidate. */
544
struct r300_atom texture_cache_inval;
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/* Textures state. */
546
struct r300_atom textures_state;
547
/* Occlusion query. */
548
struct r300_atom query_start;
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550
/* The pointers to the first and the last atom. */
551
struct r300_atom *first_dirty, *last_dirty;
552
553
/* Vertex elements for Gallium. */
554
struct r300_vertex_element_state *velems;
555
556
/* Vertex info for Draw. */
557
struct vertex_info vertex_info;
558
559
struct pipe_stencil_ref stencil_ref;
560
struct pipe_viewport_state viewport;
561
562
/* Stream locations for SWTCL. */
563
int stream_loc_notcl[16];
564
565
/* Flag indicating whether or not the HW is dirty. */
566
uint32_t dirty_hw;
567
/* Whether polygon offset is enabled. */
568
boolean polygon_offset_enabled;
569
/* Z buffer bit depth. */
570
uint32_t zbuffer_bpp;
571
/* Whether rendering is conditional and should be skipped. */
572
boolean skip_rendering;
573
/* The flag above saved by blitter. */
574
unsigned char blitter_saved_skip_rendering;
575
/* Point sprites texcoord index, 1 bit per texcoord */
576
int sprite_coord_enable;
577
/* Whether two-sided color selection is enabled (AKA light_twoside). */
578
boolean two_sided_color;
579
boolean flatshade;
580
boolean clip_halfz;
581
/* Whether fast color clear is enabled. */
582
boolean cbzb_clear;
583
/* Whether fragment shader needs to be validated. */
584
enum r300_fs_validity_status fs_status;
585
/* Framebuffer multi-write. */
586
boolean fb_multiwrite;
587
unsigned num_samples;
588
boolean msaa_enable;
589
boolean alpha_to_one;
590
boolean alpha_to_coverage;
591
592
void *dsa_decompress_zmask;
593
594
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
595
unsigned nr_vertex_buffers;
596
struct u_upload_mgr *uploader;
597
598
struct slab_child_pool pool_transfers;
599
600
/* Stat counter. */
601
uint64_t flush_counter;
602
603
/* const tracking for VS */
604
int vs_const_base;
605
606
/* Vertex array state info */
607
boolean vertex_arrays_dirty;
608
boolean vertex_arrays_indexed;
609
int vertex_arrays_offset;
610
int vertex_arrays_instance_id;
611
boolean instancing_enabled;
612
613
/* Hyper-Z stats. */
614
boolean hyperz_enabled; /* Whether it owns Hyper-Z access. */
615
int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */
616
unsigned num_z_clears; /* Since the last flush. */
617
618
/* ZMask state. */
619
boolean zmask_in_use; /* Whether ZMASK is enabled. */
620
boolean zmask_decompress; /* Whether ZMASK is being decompressed. */
621
struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */
622
623
/* HiZ state. */
624
boolean hiz_in_use; /* Whether HIZ is enabled. */
625
enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */
626
uint32_t hiz_clear_value; /* HiZ clear value. */
627
628
/* CMASK state. */
629
boolean cmask_access;
630
boolean cmask_in_use;
631
uint32_t color_clear_value; /* RGBA8 or RGBA1010102 */
632
uint32_t color_clear_value_ar; /* RGBA16F */
633
uint32_t color_clear_value_gb; /* RGBA16F */
634
635
/* Compiler state. */
636
struct rc_regalloc_state fs_regalloc_state; /* Register allocator info for
637
* fragment shaders. */
638
};
639
640
#define foreach_atom(r300, atom) \
641
for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
642
643
#define foreach_dirty_atom(r300, atom) \
644
for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
645
646
/* Convenience cast wrappers. */
647
static inline struct r300_query* r300_query(struct pipe_query* q)
648
{
649
return (struct r300_query*)q;
650
}
651
652
static inline struct r300_surface* r300_surface(struct pipe_surface* surf)
653
{
654
return (struct r300_surface*)surf;
655
}
656
657
static inline struct r300_resource* r300_resource(struct pipe_resource* tex)
658
{
659
return (struct r300_resource*)tex;
660
}
661
662
static inline struct r300_context* r300_context(struct pipe_context* context)
663
{
664
return (struct r300_context*)context;
665
}
666
667
static inline struct r300_fragment_shader *r300_fs(struct r300_context *r300)
668
{
669
return (struct r300_fragment_shader*)r300->fs.state;
670
}
671
672
static inline void r300_mark_atom_dirty(struct r300_context *r300,
673
struct r300_atom *atom)
674
{
675
atom->dirty = TRUE;
676
677
if (!r300->first_dirty) {
678
r300->first_dirty = atom;
679
r300->last_dirty = atom+1;
680
} else {
681
if (atom < r300->first_dirty)
682
r300->first_dirty = atom;
683
else if (atom+1 > r300->last_dirty)
684
r300->last_dirty = atom+1;
685
}
686
}
687
688
static inline struct pipe_surface *
689
r300_get_nonnull_cb(struct pipe_framebuffer_state *fb, unsigned i)
690
{
691
if (fb->cbufs[i])
692
return fb->cbufs[i];
693
694
/* The i-th framebuffer is NULL, return any non-NULL one. */
695
for (i = 0; i < fb->nr_cbufs; i++)
696
if (fb->cbufs[i])
697
return fb->cbufs[i];
698
699
return NULL;
700
}
701
702
struct pipe_context* r300_create_context(struct pipe_screen* screen,
703
void *priv, unsigned flags);
704
705
/* Context initialization. */
706
struct draw_stage* r300_draw_stage(struct r300_context* r300);
707
void r300_init_blit_functions(struct r300_context *r300);
708
void r300_init_flush_functions(struct r300_context* r300);
709
void r300_init_query_functions(struct r300_context* r300);
710
void r300_init_render_functions(struct r300_context *r300);
711
void r300_init_state_functions(struct r300_context* r300);
712
void r300_init_resource_functions(struct r300_context* r300);
713
714
/* r300_blit.c */
715
void r300_decompress_zmask(struct r300_context *r300);
716
void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);
717
void r300_decompress_zmask_locked(struct r300_context *r300);
718
bool r300_is_blit_supported(enum pipe_format format);
719
720
/* r300_flush.c */
721
void r300_flush(struct pipe_context *pipe,
722
unsigned flags,
723
struct pipe_fence_handle **fence);
724
725
/* r300_hyperz.c */
726
void r300_update_hyperz_state(struct r300_context* r300);
727
728
/* r300_query.c */
729
void r300_resume_query(struct r300_context *r300,
730
struct r300_query *query);
731
void r300_stop_query(struct r300_context *r300);
732
733
/* r300_render_translate.c */
734
void r300_translate_index_buffer(struct r300_context *r300,
735
const struct pipe_draw_info *info,
736
struct pipe_resource **out_index_buffer,
737
unsigned *index_size, unsigned index_offset,
738
unsigned *start, unsigned count);
739
740
/* r300_render_stencilref.c */
741
void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);
742
743
/* r300_render.c */
744
void r500_emit_index_bias(struct r300_context *r300, int index_bias);
745
void r300_blitter_draw_rectangle(struct blitter_context *blitter,
746
void *vertex_elements_cso,
747
blitter_get_vs_func get_vs,
748
int x1, int y1, int x2, int y2,
749
float depth, unsigned num_instances,
750
enum blitter_attrib_type type,
751
const union blitter_attrib *attrib);
752
753
/* r300_state.c */
754
enum r300_fb_state_change {
755
R300_CHANGED_FB_STATE = 0,
756
R300_CHANGED_HYPERZ_FLAG,
757
R300_CHANGED_MULTIWRITE,
758
R300_CHANGED_CMASK_ENABLE,
759
};
760
761
void r300_mark_fb_state_dirty(struct r300_context *r300,
762
enum r300_fb_state_change change);
763
void r300_mark_fs_code_dirty(struct r300_context *r300);
764
765
struct pipe_sampler_view *
766
r300_create_sampler_view_custom(struct pipe_context *pipe,
767
struct pipe_resource *texture,
768
const struct pipe_sampler_view *templ,
769
unsigned width0_override,
770
unsigned height0_override);
771
772
/* r300_state_derived.c */
773
void r300_update_derived_state(struct r300_context* r300);
774
775
/* r300_debug.c */
776
void r500_dump_rs_block(struct r300_rs_block *rs);
777
778
779
static inline boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
780
{
781
return SCREEN_DBG_ON(ctx->screen, flags);
782
}
783
784
static inline void CTX_DBG(struct r300_context * ctx, unsigned flags,
785
const char * fmt, ...)
786
{
787
if (CTX_DBG_ON(ctx, flags)) {
788
va_list va;
789
va_start(va, fmt);
790
vfprintf(stderr, fmt, va);
791
va_end(va);
792
}
793
}
794
795
#define DBG_ON CTX_DBG_ON
796
#define DBG CTX_DBG
797
798
#endif /* R300_CONTEXT_H */
799
800