Path: blob/21.2-virgl/src/gallium/drivers/r300/r300_context.h
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/*1* Copyright 2008 Corbin Simpson <[email protected]>2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* on the rights to use, copy, modify, merge, publish, distribute, sub7* license, and/or sell copies of the Software, and to permit persons to whom8* the Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,18* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR19* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE20* USE OR OTHER DEALINGS IN THE SOFTWARE. */2122#ifndef R300_CONTEXT_H23#define R300_CONTEXT_H2425#define R300_BUFFER_ALIGNMENT 642627#include "draw/draw_vertex.h"2829#include "util/u_blitter.h"3031#include "pipe/p_context.h"32#include "util/u_inlines.h"33#include "util/u_transfer.h"3435#include "r300_defines.h"36#include "r300_screen.h"37#include "compiler/radeon_regalloc.h"3839struct u_upload_mgr;40struct r300_context;41struct r300_fragment_shader;42struct r300_vertex_shader;43struct r300_stencilref_context;4445enum colormask_swizzle {46COLORMASK_BGRA,47COLORMASK_RGBA,48COLORMASK_RRRR,49COLORMASK_AAAA,50COLORMASK_GRRG,51COLORMASK_ARRA,52COLORMASK_BGRX,53COLORMASK_RGBX,54COLORMASK_NUM_SWIZZLES55};5657struct r300_atom {58/* Name, for debugging. */59const char* name;60/* Opaque state. */61void* state;62/* Emit the state to the context. */63void (*emit)(struct r300_context*, unsigned, void*);64/* Upper bound on number of dwords to emit. */65unsigned size;66/* Whether this atom should be emitted. */67boolean dirty;68/* Whether this atom may be emitted with state == NULL. */69boolean allow_null_state;70};7172struct r300_aa_state {73struct r300_surface *dest;7475uint32_t aa_config;76};7778struct r300_blend_state {79struct pipe_blend_state state;8081uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8];82uint32_t cb_noclamp[8];83uint32_t cb_noclamp_noalpha[8];84uint32_t cb_no_readwrite[8];85};8687struct r300_blend_color_state {88struct pipe_blend_color state;89uint32_t cb[3];90};9192struct r300_clip_state {93uint32_t cb[29];94};9596struct r300_dsa_state {97struct pipe_depth_stencil_alpha_state dsa;9899/* This is actually a command buffer with named dwords. */100uint32_t cb_begin;101uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */102uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */103uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */104uint32_t cb_reg;105uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */106uint32_t cb_reg1;107uint32_t alpha_value; /* R500_FG_ALPHA_VALUE: 0x4be0 */108109/* Same, but without ZB reads and writes. */110uint32_t cb_zb_no_readwrite[8]; /* ZB not bound */111112/* Emitted separately: */113uint32_t alpha_function;114115/* Whether a two-sided stencil is enabled. */116boolean two_sided;117/* Whether a fallback should be used for a two-sided stencil ref value. */118boolean two_sided_stencil_ref;119};120121struct r300_hyperz_state {122int flush;123/* This is actually a command buffer with named dwords. */124uint32_t cb_flush_begin;125uint32_t zb_zcache_ctlstat; /* R300_ZB_CACHE_CNTL */126uint32_t cb_begin;127uint32_t zb_bw_cntl; /* R300_ZB_BW_CNTL */128uint32_t cb_reg1;129uint32_t zb_depthclearvalue; /* R300_ZB_DEPTHCLEARVALUE */130uint32_t cb_reg2;131uint32_t sc_hyperz; /* R300_SC_HYPERZ */132uint32_t cb_reg3;133uint32_t gb_z_peq_config; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */134};135136struct r300_gpu_flush {137uint32_t cb_flush_clean[6];138};139140#define RS_STATE_MAIN_SIZE 27141142struct r300_rs_state {143/* Original rasterizer state. */144struct pipe_rasterizer_state rs;145/* Draw-specific rasterizer state. */146struct pipe_rasterizer_state rs_draw;147148/* Command buffers. */149uint32_t cb_main[RS_STATE_MAIN_SIZE];150uint32_t cb_poly_offset_zb16[5];151uint32_t cb_poly_offset_zb24[5];152153/* The index to cb_main where the cull_mode register value resides. */154unsigned cull_mode_index;155156/* Whether polygon offset is enabled. */157boolean polygon_offset_enable;158159/* This is emitted in the draw function. */160uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */161};162163struct r300_rs_block {164uint32_t vap_vtx_state_cntl; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */165uint32_t vap_vsm_vtx_assm; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */166uint32_t vap_out_vtx_fmt[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */167uint32_t gb_enable;168169uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */170uint32_t count; /* R300_RS_COUNT */171uint32_t inst_count; /* R300_RS_INST_COUNT */172uint32_t inst[8]; /* R300_RS_INST_[0-7] */173};174175struct r300_sampler_state {176struct pipe_sampler_state state;177178uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */179uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */180181/* Min/max LOD must be clamped to [0, last_level], thus182* it's dependent on a currently bound texture */183unsigned min_lod, max_lod;184};185186struct r300_texture_format_state {187uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */188uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */189uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */190uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */191uint32_t us_format0; /* R500_US_FORMAT0_0: 0x4640 (through 15) */192};193194struct r300_sampler_view {195struct pipe_sampler_view base;196197/* For resource_copy_region. */198unsigned width0_override;199unsigned height0_override;200201/* Swizzles in the PIPE_SWIZZLE_* representation,202* derived from base. */203unsigned char swizzle[4];204205/* Copy of r300_texture::texture_format_state with format-specific bits206* added. */207struct r300_texture_format_state format;208209/* The texture cache region for this texture. */210uint32_t texcache_region;211};212213struct r300_texture_sampler_state {214struct r300_texture_format_state format;215uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */216uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */217uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */218};219220struct r300_textures_state {221/* Textures. */222struct r300_sampler_view *sampler_views[16];223int sampler_view_count;224/* Sampler states. */225struct r300_sampler_state *sampler_states[16];226int sampler_state_count;227228/* This is the merge of the texture and sampler states. */229unsigned count;230uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */231struct r300_texture_sampler_state regs[16];232};233234struct r300_vertex_stream_state {235/* R300_VAP_PROG_STREAK_CNTL_[0-7] */236uint32_t vap_prog_stream_cntl[8];237/* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */238uint32_t vap_prog_stream_cntl_ext[8];239240unsigned count;241};242243struct r300_invariant_state {244uint32_t cb[24];245};246247struct r300_vap_invariant_state {248uint32_t cb[11];249};250251struct r300_viewport_state {252float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */253float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */254float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */255float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */256float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */257float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */258uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */259};260261struct r300_ztop_state {262uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */263};264265/* The next several objects are not pure Radeon state; they inherit from266* various Gallium classes. */267268struct r300_constant_buffer {269/* Buffer of constants */270uint32_t *ptr;271/* Remapping table. */272unsigned *remap_table;273/* const buffer base */274uint32_t buffer_base;275};276277/* Query object.278*279* This is not a subclass of pipe_query because pipe_query is never280* actually fully defined. So, rather than have it as a member, and do281* subclass-style casting, we treat pipe_query as an opaque, and just282* trust that our gallium frontend does not ever mess up query objects.283*/284struct r300_query {285/* The kind of query. Currently only OQ is supported. */286unsigned type;287/* The number of pipes where query results are stored. */288unsigned num_pipes;289/* How many results have been written, in dwords. It's incremented290* after end_query and flush. */291unsigned num_results;292/* if begin has been emitted */293boolean begin_emitted;294295/* The buffer where query results are stored. */296struct pb_buffer *buf;297};298299struct r300_surface {300struct pipe_surface base;301302/* Winsys buffer backing the texture. */303struct pb_buffer *buf;304305enum radeon_bo_domain domain;306307uint32_t offset; /* COLOROFFSET or DEPTHOFFSET. */308uint32_t pitch; /* COLORPITCH or DEPTHPITCH. */309uint32_t pitch_zmask; /* ZMASK_PITCH */310uint32_t pitch_hiz; /* HIZ_PITCH */311uint32_t pitch_cmask; /* CMASK_PITCH */312uint32_t format; /* US_OUT_FMT or ZB_FORMAT. */313314/* Parameters dedicated to the CBZB clear. */315uint32_t cbzb_width; /* Aligned width. */316uint32_t cbzb_height; /* Half of the height. */317uint32_t cbzb_midpoint_offset; /* DEPTHOFFSET. */318uint32_t cbzb_pitch; /* DEPTHPITCH. */319uint32_t cbzb_format; /* ZB_FORMAT. */320321/* Whether the CBZB clear is allowed on the surface. */322boolean cbzb_allowed;323324unsigned colormask_swizzle;325};326327struct r300_texture_desc {328/* Width, height, and depth.329* Most of the time, these are equal to pipe_texture::width0, height0,330* and depth0. However, NPOT 3D textures must have dimensions aligned331* to POT, and this is the only case when these variables differ from332* pipe_texture. */333unsigned width0, height0, depth0;334335/* Buffer tiling.336* Macrotiling is specified per-level because small mipmaps cannot337* be macrotiled. */338enum radeon_bo_layout microtile;339enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];340341/* Offsets into the buffer. */342unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];343344/* Strides for each mip-level. */345unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];346347/* Size of one zslice or face or 2D image based on the texture target. */348unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];349350/* Total size of this texture, in bytes,351* derived from the texture properties. */352unsigned size_in_bytes;353354/**355* If non-zero, override the natural texture layout with356* a custom stride (in bytes).357*358* \note Mipmapping fails for textures with a non-natural layout!359*360* \sa r300_texture_get_stride361*/362unsigned stride_in_bytes_override;363364/* Whether this texture has non-power-of-two dimensions.365* It can be either a regular texture or a rectangle one. */366boolean is_npot;367368/* This flag says that hardware must use the stride for addressing369* instead of the width. */370boolean uses_stride_addressing;371372/* Whether CBZB fast color clear is allowed on the miplevel. */373boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS];374375/* Zbuffer compression info for each miplevel. */376boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS];377/* If zero, then disable Z compression/HiZ. */378unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];379unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];380/* Zmask/HiZ strides for each miplevel. */381unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];382unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];383384/* CMASK info for AA buffers (no mipmapping). */385unsigned cmask_dwords;386unsigned cmask_stride_in_pixels;387};388389struct r300_resource390{391struct pipe_resource b;392393/* Winsys buffer backing this resource. */394struct pb_buffer *buf;395enum radeon_bo_domain domain;396397/* Constant buffers and SWTCL vertex and index buffers are in user398* memory. */399uint8_t *malloced_buffer;400401/* Texture description (addressing, layout, special features). */402struct r300_texture_desc tex;403404/* This is the level tiling flags were last time set for.405* It's used to prevent redundant tiling-flags changes from happening.*/406unsigned surface_level;407};408409struct r300_vertex_element_state {410unsigned count;411struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];412unsigned format_size[PIPE_MAX_ATTRIBS];413414/* The size of the vertex, in dwords. */415unsigned vertex_size_dwords;416417struct r300_vertex_stream_state vertex_stream;418};419420enum r300_hiz_func {421HIZ_FUNC_NONE,422423/* The function, when determined, is set in stone424* until the next HiZ clear. */425426/* MAX is written to the HiZ buffer.427* Used for LESS, LEQUAL. */428HIZ_FUNC_MAX,429430/* MIN is written to the HiZ buffer.431* Used for GREATER, GEQUAL. */432HIZ_FUNC_MIN,433};434435/* For deferred fragment shader state validation. */436enum r300_fs_validity_status {437FRAGMENT_SHADER_VALID, /* No need to change/validate the FS. */438FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */439FRAGMENT_SHADER_DIRTY /* Always validate the FS (if the FS was changed) */440};441442struct r300_context {443/* Parent class */444struct pipe_context context;445446/* The interface to the windowing system, etc. */447struct radeon_winsys *rws;448/* The submission context. */449struct radeon_winsys_ctx *ctx;450/* The command stream. */451struct radeon_cmdbuf cs;452/* Screen. */453struct r300_screen *screen;454455/* Draw module. Used mostly for SW TCL. */456struct draw_context* draw;457/* Vertex buffer for SW TCL. */458struct pb_buffer *vbo;459/* Offset and size into the SW TCL VBO. */460size_t draw_vbo_offset;461462/* Accelerated blit support. */463struct blitter_context* blitter;464/* Stencil two-sided reference value fallback. */465struct r300_stencilref_context *stencilref_fallback;466467/* The KIL opcode needs the first texture unit to be enabled468* on r3xx-r4xx. In order to calm down the CS checker, we bind this469* dummy texture there. */470struct r300_sampler_view *texkill_sampler;471472/* When no vertex buffer is set, this one is used instead to prevent473* hardlocks. */474struct pipe_vertex_buffer dummy_vb;475476/* The currently active query. */477struct r300_query *query_current;478/* The saved query for blitter operations. */479struct r300_query *blitter_saved_query;480/* Query list. */481struct r300_query query_list;482483/* Various CSO state objects. */484485/* Each atom is emitted in the order it appears here, which can affect486* performance and stability if not handled with care. */487/* GPU flush. */488struct r300_atom gpu_flush;489/* Clears must be emitted immediately after the flush. */490/* HiZ clear */491struct r300_atom hiz_clear;492/* zmask clear */493struct r300_atom zmask_clear;494/* cmask clear */495struct r300_atom cmask_clear;496/* Anti-aliasing (MSAA) state. */497struct r300_atom aa_state;498/* Framebuffer state. */499struct r300_atom fb_state;500/* HyperZ state (various SC/ZB bits). */501struct r300_atom hyperz_state;502/* ZTOP state. */503struct r300_atom ztop_state;504/* Depth, stencil, and alpha state. */505struct r300_atom dsa_state;506/* Blend state. */507struct r300_atom blend_state;508/* Blend color state. */509struct r300_atom blend_color_state;510/* Scissor state. */511struct r300_atom scissor_state;512/* Sample mask. */513struct r300_atom sample_mask;514/* Invariant state. This must be emitted to get the engine started. */515struct r300_atom invariant_state;516/* Viewport state. */517struct r300_atom viewport_state;518/* PVS flush. */519struct r300_atom pvs_flush;520/* VAP invariant state. */521struct r300_atom vap_invariant_state;522/* Vertex stream formatting state. */523struct r300_atom vertex_stream_state;524/* Vertex shader. */525struct r300_atom vs_state;526/* User clip planes. */527struct r300_atom clip_state;528/* RS block state + VAP (vertex shader) output mapping state. */529struct r300_atom rs_block_state;530/* Rasterizer state. */531struct r300_atom rs_state;532/* Framebuffer state (pipelined regs). */533struct r300_atom fb_state_pipelined;534/* Fragment shader. */535struct r300_atom fs;536/* Fragment shader RC_CONSTANT_STATE variables. */537struct r300_atom fs_rc_constant_state;538/* Fragment shader constant buffer. */539struct r300_atom fs_constants;540/* Vertex shader constant buffer. */541struct r300_atom vs_constants;542/* Texture cache invalidate. */543struct r300_atom texture_cache_inval;544/* Textures state. */545struct r300_atom textures_state;546/* Occlusion query. */547struct r300_atom query_start;548549/* The pointers to the first and the last atom. */550struct r300_atom *first_dirty, *last_dirty;551552/* Vertex elements for Gallium. */553struct r300_vertex_element_state *velems;554555/* Vertex info for Draw. */556struct vertex_info vertex_info;557558struct pipe_stencil_ref stencil_ref;559struct pipe_viewport_state viewport;560561/* Stream locations for SWTCL. */562int stream_loc_notcl[16];563564/* Flag indicating whether or not the HW is dirty. */565uint32_t dirty_hw;566/* Whether polygon offset is enabled. */567boolean polygon_offset_enabled;568/* Z buffer bit depth. */569uint32_t zbuffer_bpp;570/* Whether rendering is conditional and should be skipped. */571boolean skip_rendering;572/* The flag above saved by blitter. */573unsigned char blitter_saved_skip_rendering;574/* Point sprites texcoord index, 1 bit per texcoord */575int sprite_coord_enable;576/* Whether two-sided color selection is enabled (AKA light_twoside). */577boolean two_sided_color;578boolean flatshade;579boolean clip_halfz;580/* Whether fast color clear is enabled. */581boolean cbzb_clear;582/* Whether fragment shader needs to be validated. */583enum r300_fs_validity_status fs_status;584/* Framebuffer multi-write. */585boolean fb_multiwrite;586unsigned num_samples;587boolean msaa_enable;588boolean alpha_to_one;589boolean alpha_to_coverage;590591void *dsa_decompress_zmask;592593struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];594unsigned nr_vertex_buffers;595struct u_upload_mgr *uploader;596597struct slab_child_pool pool_transfers;598599/* Stat counter. */600uint64_t flush_counter;601602/* const tracking for VS */603int vs_const_base;604605/* Vertex array state info */606boolean vertex_arrays_dirty;607boolean vertex_arrays_indexed;608int vertex_arrays_offset;609int vertex_arrays_instance_id;610boolean instancing_enabled;611612/* Hyper-Z stats. */613boolean hyperz_enabled; /* Whether it owns Hyper-Z access. */614int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */615unsigned num_z_clears; /* Since the last flush. */616617/* ZMask state. */618boolean zmask_in_use; /* Whether ZMASK is enabled. */619boolean zmask_decompress; /* Whether ZMASK is being decompressed. */620struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */621622/* HiZ state. */623boolean hiz_in_use; /* Whether HIZ is enabled. */624enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */625uint32_t hiz_clear_value; /* HiZ clear value. */626627/* CMASK state. */628boolean cmask_access;629boolean cmask_in_use;630uint32_t color_clear_value; /* RGBA8 or RGBA1010102 */631uint32_t color_clear_value_ar; /* RGBA16F */632uint32_t color_clear_value_gb; /* RGBA16F */633634/* Compiler state. */635struct rc_regalloc_state fs_regalloc_state; /* Register allocator info for636* fragment shaders. */637};638639#define foreach_atom(r300, atom) \640for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)641642#define foreach_dirty_atom(r300, atom) \643for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)644645/* Convenience cast wrappers. */646static inline struct r300_query* r300_query(struct pipe_query* q)647{648return (struct r300_query*)q;649}650651static inline struct r300_surface* r300_surface(struct pipe_surface* surf)652{653return (struct r300_surface*)surf;654}655656static inline struct r300_resource* r300_resource(struct pipe_resource* tex)657{658return (struct r300_resource*)tex;659}660661static inline struct r300_context* r300_context(struct pipe_context* context)662{663return (struct r300_context*)context;664}665666static inline struct r300_fragment_shader *r300_fs(struct r300_context *r300)667{668return (struct r300_fragment_shader*)r300->fs.state;669}670671static inline void r300_mark_atom_dirty(struct r300_context *r300,672struct r300_atom *atom)673{674atom->dirty = TRUE;675676if (!r300->first_dirty) {677r300->first_dirty = atom;678r300->last_dirty = atom+1;679} else {680if (atom < r300->first_dirty)681r300->first_dirty = atom;682else if (atom+1 > r300->last_dirty)683r300->last_dirty = atom+1;684}685}686687static inline struct pipe_surface *688r300_get_nonnull_cb(struct pipe_framebuffer_state *fb, unsigned i)689{690if (fb->cbufs[i])691return fb->cbufs[i];692693/* The i-th framebuffer is NULL, return any non-NULL one. */694for (i = 0; i < fb->nr_cbufs; i++)695if (fb->cbufs[i])696return fb->cbufs[i];697698return NULL;699}700701struct pipe_context* r300_create_context(struct pipe_screen* screen,702void *priv, unsigned flags);703704/* Context initialization. */705struct draw_stage* r300_draw_stage(struct r300_context* r300);706void r300_init_blit_functions(struct r300_context *r300);707void r300_init_flush_functions(struct r300_context* r300);708void r300_init_query_functions(struct r300_context* r300);709void r300_init_render_functions(struct r300_context *r300);710void r300_init_state_functions(struct r300_context* r300);711void r300_init_resource_functions(struct r300_context* r300);712713/* r300_blit.c */714void r300_decompress_zmask(struct r300_context *r300);715void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);716void r300_decompress_zmask_locked(struct r300_context *r300);717bool r300_is_blit_supported(enum pipe_format format);718719/* r300_flush.c */720void r300_flush(struct pipe_context *pipe,721unsigned flags,722struct pipe_fence_handle **fence);723724/* r300_hyperz.c */725void r300_update_hyperz_state(struct r300_context* r300);726727/* r300_query.c */728void r300_resume_query(struct r300_context *r300,729struct r300_query *query);730void r300_stop_query(struct r300_context *r300);731732/* r300_render_translate.c */733void r300_translate_index_buffer(struct r300_context *r300,734const struct pipe_draw_info *info,735struct pipe_resource **out_index_buffer,736unsigned *index_size, unsigned index_offset,737unsigned *start, unsigned count);738739/* r300_render_stencilref.c */740void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);741742/* r300_render.c */743void r500_emit_index_bias(struct r300_context *r300, int index_bias);744void r300_blitter_draw_rectangle(struct blitter_context *blitter,745void *vertex_elements_cso,746blitter_get_vs_func get_vs,747int x1, int y1, int x2, int y2,748float depth, unsigned num_instances,749enum blitter_attrib_type type,750const union blitter_attrib *attrib);751752/* r300_state.c */753enum r300_fb_state_change {754R300_CHANGED_FB_STATE = 0,755R300_CHANGED_HYPERZ_FLAG,756R300_CHANGED_MULTIWRITE,757R300_CHANGED_CMASK_ENABLE,758};759760void r300_mark_fb_state_dirty(struct r300_context *r300,761enum r300_fb_state_change change);762void r300_mark_fs_code_dirty(struct r300_context *r300);763764struct pipe_sampler_view *765r300_create_sampler_view_custom(struct pipe_context *pipe,766struct pipe_resource *texture,767const struct pipe_sampler_view *templ,768unsigned width0_override,769unsigned height0_override);770771/* r300_state_derived.c */772void r300_update_derived_state(struct r300_context* r300);773774/* r300_debug.c */775void r500_dump_rs_block(struct r300_rs_block *rs);776777778static inline boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)779{780return SCREEN_DBG_ON(ctx->screen, flags);781}782783static inline void CTX_DBG(struct r300_context * ctx, unsigned flags,784const char * fmt, ...)785{786if (CTX_DBG_ON(ctx, flags)) {787va_list va;788va_start(va, fmt);789vfprintf(stderr, fmt, va);790va_end(va);791}792}793794#define DBG_ON CTX_DBG_ON795#define DBG CTX_DBG796797#endif /* R300_CONTEXT_H */798799800